ra2l1_pac/
lib.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.50.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:47:04 +0000
19#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "Arm Cortex-M23 based Microcontroller RA2L1 group"]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "acmplp")]
31pub mod acmplp;
32#[cfg(feature = "adc120")]
33pub mod adc120;
34#[cfg(feature = "agt0")]
35pub mod agt0;
36#[cfg(feature = "bus")]
37pub mod bus;
38#[cfg(feature = "cac")]
39pub mod cac;
40#[cfg(feature = "can0")]
41pub mod can0;
42#[cfg(feature = "crc")]
43pub mod crc;
44#[cfg(feature = "ctsu")]
45pub mod ctsu;
46#[cfg(feature = "dac12")]
47pub mod dac12;
48#[cfg(feature = "dbg")]
49pub mod dbg;
50#[cfg(feature = "doc")]
51pub mod doc;
52#[cfg(feature = "dtc")]
53pub mod dtc;
54#[cfg(feature = "elc")]
55pub mod elc;
56#[cfg(feature = "flcn")]
57pub mod flcn;
58#[cfg(feature = "gpt164")]
59pub mod gpt164;
60#[cfg(feature = "gpt320")]
61pub mod gpt320;
62#[cfg(feature = "gpt_ops")]
63pub mod gpt_ops;
64#[cfg(feature = "icu")]
65pub mod icu;
66#[cfg(feature = "iic0")]
67pub mod iic0;
68#[cfg(feature = "iic0wu")]
69pub mod iic0wu;
70#[cfg(feature = "iwdt")]
71pub mod iwdt;
72#[cfg(feature = "kint")]
73pub mod kint;
74#[cfg(feature = "mstp")]
75pub mod mstp;
76#[cfg(feature = "pfs")]
77pub mod pfs;
78#[cfg(feature = "poeg")]
79pub mod poeg;
80#[cfg(feature = "port0")]
81pub mod port0;
82#[cfg(feature = "port1")]
83pub mod port1;
84#[cfg(feature = "rmpu")]
85pub mod rmpu;
86#[cfg(feature = "rtc")]
87pub mod rtc;
88#[cfg(feature = "sci0")]
89pub mod sci0;
90#[cfg(feature = "sci1")]
91pub mod sci1;
92#[cfg(feature = "spi0")]
93pub mod spi0;
94#[cfg(feature = "sram")]
95pub mod sram;
96#[cfg(feature = "sysc")]
97pub mod sysc;
98#[cfg(feature = "wdt")]
99pub mod wdt;
100
101#[cfg(feature = "rmpu")]
102#[derive(Copy, Clone, Eq, PartialEq)]
103pub struct Rmpu {
104    ptr: *mut u8,
105}
106#[cfg(feature = "rmpu")]
107pub const RMPU: self::Rmpu = self::Rmpu {
108    ptr: 0x40000000u32 as _,
109};
110#[cfg(feature = "sram")]
111#[derive(Copy, Clone, Eq, PartialEq)]
112pub struct Sram {
113    ptr: *mut u8,
114}
115#[cfg(feature = "sram")]
116pub const SRAM: self::Sram = self::Sram {
117    ptr: 0x40002000u32 as _,
118};
119#[cfg(feature = "bus")]
120#[derive(Copy, Clone, Eq, PartialEq)]
121pub struct Bus {
122    ptr: *mut u8,
123}
124#[cfg(feature = "bus")]
125pub const BUS: self::Bus = self::Bus {
126    ptr: 0x40003000u32 as _,
127};
128#[cfg(feature = "dtc")]
129#[derive(Copy, Clone, Eq, PartialEq)]
130pub struct Dtc {
131    ptr: *mut u8,
132}
133#[cfg(feature = "dtc")]
134pub const DTC: self::Dtc = self::Dtc {
135    ptr: 0x40005400u32 as _,
136};
137#[cfg(feature = "icu")]
138#[derive(Copy, Clone, Eq, PartialEq)]
139pub struct Icu {
140    ptr: *mut u8,
141}
142#[cfg(feature = "icu")]
143pub const ICU: self::Icu = self::Icu {
144    ptr: 0x40006000u32 as _,
145};
146#[cfg(feature = "dbg")]
147#[derive(Copy, Clone, Eq, PartialEq)]
148pub struct Dbg {
149    ptr: *mut u8,
150}
151#[cfg(feature = "dbg")]
152pub const DBG: self::Dbg = self::Dbg {
153    ptr: 0x4001b000u32 as _,
154};
155#[cfg(feature = "sysc")]
156#[derive(Copy, Clone, Eq, PartialEq)]
157pub struct Sysc {
158    ptr: *mut u8,
159}
160#[cfg(feature = "sysc")]
161pub const SYSC: self::Sysc = self::Sysc {
162    ptr: 0x4001e000u32 as _,
163};
164#[cfg(feature = "port0")]
165#[derive(Copy, Clone, Eq, PartialEq)]
166pub struct Port0 {
167    ptr: *mut u8,
168}
169#[cfg(feature = "port0")]
170pub const PORT0: self::Port0 = self::Port0 {
171    ptr: 0x40040000u32 as _,
172};
173#[cfg(feature = "port1")]
174#[derive(Copy, Clone, Eq, PartialEq)]
175pub struct Port1 {
176    ptr: *mut u8,
177}
178#[cfg(feature = "port1")]
179pub const PORT1: self::Port1 = self::Port1 {
180    ptr: 0x40040020u32 as _,
181};
182#[cfg(feature = "port2")]
183pub const PORT2: self::Port1 = self::Port1 {
184    ptr: 0x40040040u32 as _,
185};
186#[cfg(feature = "port3")]
187pub const PORT3: self::Port0 = self::Port0 {
188    ptr: 0x40040060u32 as _,
189};
190#[cfg(feature = "port4")]
191pub const PORT4: self::Port0 = self::Port0 {
192    ptr: 0x40040080u32 as _,
193};
194#[cfg(feature = "port5")]
195pub const PORT5: self::Port0 = self::Port0 {
196    ptr: 0x400400a0u32 as _,
197};
198#[cfg(feature = "port6")]
199pub const PORT6: self::Port0 = self::Port0 {
200    ptr: 0x400400c0u32 as _,
201};
202#[cfg(feature = "port7")]
203pub const PORT7: self::Port0 = self::Port0 {
204    ptr: 0x400400e0u32 as _,
205};
206#[cfg(feature = "port8")]
207pub const PORT8: self::Port0 = self::Port0 {
208    ptr: 0x40040100u32 as _,
209};
210#[cfg(feature = "pfs")]
211#[derive(Copy, Clone, Eq, PartialEq)]
212pub struct Pfs {
213    ptr: *mut u8,
214}
215#[cfg(feature = "pfs")]
216pub const PFS: self::Pfs = self::Pfs {
217    ptr: 0x40040800u32 as _,
218};
219#[cfg(feature = "elc")]
220#[derive(Copy, Clone, Eq, PartialEq)]
221pub struct Elc {
222    ptr: *mut u8,
223}
224#[cfg(feature = "elc")]
225pub const ELC: self::Elc = self::Elc {
226    ptr: 0x40041000u32 as _,
227};
228#[cfg(feature = "poeg")]
229#[derive(Copy, Clone, Eq, PartialEq)]
230pub struct Poeg {
231    ptr: *mut u8,
232}
233#[cfg(feature = "poeg")]
234pub const POEG: self::Poeg = self::Poeg {
235    ptr: 0x40042000u32 as _,
236};
237#[cfg(feature = "rtc")]
238#[derive(Copy, Clone, Eq, PartialEq)]
239pub struct Rtc {
240    ptr: *mut u8,
241}
242#[cfg(feature = "rtc")]
243pub const RTC: self::Rtc = self::Rtc {
244    ptr: 0x40044000u32 as _,
245};
246#[cfg(feature = "wdt")]
247#[derive(Copy, Clone, Eq, PartialEq)]
248pub struct Wdt {
249    ptr: *mut u8,
250}
251#[cfg(feature = "wdt")]
252pub const WDT: self::Wdt = self::Wdt {
253    ptr: 0x40044200u32 as _,
254};
255#[cfg(feature = "iwdt")]
256#[derive(Copy, Clone, Eq, PartialEq)]
257pub struct Iwdt {
258    ptr: *mut u8,
259}
260#[cfg(feature = "iwdt")]
261pub const IWDT: self::Iwdt = self::Iwdt {
262    ptr: 0x40044400u32 as _,
263};
264#[cfg(feature = "cac")]
265#[derive(Copy, Clone, Eq, PartialEq)]
266pub struct Cac {
267    ptr: *mut u8,
268}
269#[cfg(feature = "cac")]
270pub const CAC: self::Cac = self::Cac {
271    ptr: 0x40044600u32 as _,
272};
273#[cfg(feature = "mstp")]
274#[derive(Copy, Clone, Eq, PartialEq)]
275pub struct Mstp {
276    ptr: *mut u8,
277}
278#[cfg(feature = "mstp")]
279pub const MSTP: self::Mstp = self::Mstp {
280    ptr: 0x40047000u32 as _,
281};
282#[cfg(feature = "can0")]
283#[derive(Copy, Clone, Eq, PartialEq)]
284pub struct Can0 {
285    ptr: *mut u8,
286}
287#[cfg(feature = "can0")]
288pub const CAN0: self::Can0 = self::Can0 {
289    ptr: 0x40050000u32 as _,
290};
291#[cfg(feature = "iic0")]
292#[derive(Copy, Clone, Eq, PartialEq)]
293pub struct Iic0 {
294    ptr: *mut u8,
295}
296#[cfg(feature = "iic0")]
297pub const IIC0: self::Iic0 = self::Iic0 {
298    ptr: 0x40053000u32 as _,
299};
300#[cfg(feature = "iic0wu")]
301#[derive(Copy, Clone, Eq, PartialEq)]
302pub struct Iic0Wu {
303    ptr: *mut u8,
304}
305#[cfg(feature = "iic0wu")]
306pub const IIC0WU: self::Iic0Wu = self::Iic0Wu {
307    ptr: 0x40053014u32 as _,
308};
309#[cfg(feature = "iic1")]
310pub const IIC1: self::Iic0 = self::Iic0 {
311    ptr: 0x40053100u32 as _,
312};
313#[cfg(feature = "doc")]
314#[derive(Copy, Clone, Eq, PartialEq)]
315pub struct Doc {
316    ptr: *mut u8,
317}
318#[cfg(feature = "doc")]
319pub const DOC: self::Doc = self::Doc {
320    ptr: 0x40054100u32 as _,
321};
322#[cfg(feature = "adc120")]
323#[derive(Copy, Clone, Eq, PartialEq)]
324pub struct Adc120 {
325    ptr: *mut u8,
326}
327#[cfg(feature = "adc120")]
328pub const ADC120: self::Adc120 = self::Adc120 {
329    ptr: 0x4005c000u32 as _,
330};
331#[cfg(feature = "dac12")]
332#[derive(Copy, Clone, Eq, PartialEq)]
333pub struct Dac12 {
334    ptr: *mut u8,
335}
336#[cfg(feature = "dac12")]
337pub const DAC12: self::Dac12 = self::Dac12 {
338    ptr: 0x4005e000u32 as _,
339};
340#[cfg(feature = "sci0")]
341#[derive(Copy, Clone, Eq, PartialEq)]
342pub struct Sci0 {
343    ptr: *mut u8,
344}
345#[cfg(feature = "sci0")]
346pub const SCI0: self::Sci0 = self::Sci0 {
347    ptr: 0x40070000u32 as _,
348};
349#[cfg(feature = "sci1")]
350#[derive(Copy, Clone, Eq, PartialEq)]
351pub struct Sci1 {
352    ptr: *mut u8,
353}
354#[cfg(feature = "sci1")]
355pub const SCI1: self::Sci1 = self::Sci1 {
356    ptr: 0x40070020u32 as _,
357};
358#[cfg(feature = "sci2")]
359pub const SCI2: self::Sci1 = self::Sci1 {
360    ptr: 0x40070040u32 as _,
361};
362#[cfg(feature = "sci3")]
363pub const SCI3: self::Sci1 = self::Sci1 {
364    ptr: 0x40070060u32 as _,
365};
366#[cfg(feature = "sci9")]
367pub const SCI9: self::Sci1 = self::Sci1 {
368    ptr: 0x40070120u32 as _,
369};
370#[cfg(feature = "spi0")]
371#[derive(Copy, Clone, Eq, PartialEq)]
372pub struct Spi0 {
373    ptr: *mut u8,
374}
375#[cfg(feature = "spi0")]
376pub const SPI0: self::Spi0 = self::Spi0 {
377    ptr: 0x40072000u32 as _,
378};
379#[cfg(feature = "spi1")]
380pub const SPI1: self::Spi0 = self::Spi0 {
381    ptr: 0x40072100u32 as _,
382};
383#[cfg(feature = "crc")]
384#[derive(Copy, Clone, Eq, PartialEq)]
385pub struct Crc {
386    ptr: *mut u8,
387}
388#[cfg(feature = "crc")]
389pub const CRC: self::Crc = self::Crc {
390    ptr: 0x40074000u32 as _,
391};
392#[cfg(feature = "gpt320")]
393#[derive(Copy, Clone, Eq, PartialEq)]
394pub struct Gpt320 {
395    ptr: *mut u8,
396}
397#[cfg(feature = "gpt320")]
398pub const GPT320: self::Gpt320 = self::Gpt320 {
399    ptr: 0x40078000u32 as _,
400};
401#[cfg(feature = "gpt321")]
402pub const GPT321: self::Gpt320 = self::Gpt320 {
403    ptr: 0x40078100u32 as _,
404};
405#[cfg(feature = "gpt322")]
406pub const GPT322: self::Gpt320 = self::Gpt320 {
407    ptr: 0x40078200u32 as _,
408};
409#[cfg(feature = "gpt323")]
410pub const GPT323: self::Gpt320 = self::Gpt320 {
411    ptr: 0x40078300u32 as _,
412};
413#[cfg(feature = "gpt164")]
414#[derive(Copy, Clone, Eq, PartialEq)]
415pub struct Gpt164 {
416    ptr: *mut u8,
417}
418#[cfg(feature = "gpt164")]
419pub const GPT164: self::Gpt164 = self::Gpt164 {
420    ptr: 0x40078400u32 as _,
421};
422#[cfg(feature = "gpt165")]
423pub const GPT165: self::Gpt164 = self::Gpt164 {
424    ptr: 0x40078500u32 as _,
425};
426#[cfg(feature = "gpt166")]
427pub const GPT166: self::Gpt164 = self::Gpt164 {
428    ptr: 0x40078600u32 as _,
429};
430#[cfg(feature = "gpt167")]
431pub const GPT167: self::Gpt164 = self::Gpt164 {
432    ptr: 0x40078700u32 as _,
433};
434#[cfg(feature = "gpt168")]
435pub const GPT168: self::Gpt164 = self::Gpt164 {
436    ptr: 0x40078800u32 as _,
437};
438#[cfg(feature = "gpt169")]
439pub const GPT169: self::Gpt164 = self::Gpt164 {
440    ptr: 0x40078900u32 as _,
441};
442#[cfg(feature = "gpt_ops")]
443#[derive(Copy, Clone, Eq, PartialEq)]
444pub struct GptOps {
445    ptr: *mut u8,
446}
447#[cfg(feature = "gpt_ops")]
448pub const GPT_OPS: self::GptOps = self::GptOps {
449    ptr: 0x40078ff0u32 as _,
450};
451#[cfg(feature = "kint")]
452#[derive(Copy, Clone, Eq, PartialEq)]
453pub struct Kint {
454    ptr: *mut u8,
455}
456#[cfg(feature = "kint")]
457pub const KINT: self::Kint = self::Kint {
458    ptr: 0x40080000u32 as _,
459};
460#[cfg(feature = "ctsu")]
461#[derive(Copy, Clone, Eq, PartialEq)]
462pub struct Ctsu {
463    ptr: *mut u8,
464}
465#[cfg(feature = "ctsu")]
466pub const CTSU: self::Ctsu = self::Ctsu {
467    ptr: 0x40082000u32 as _,
468};
469#[cfg(feature = "agt0")]
470#[derive(Copy, Clone, Eq, PartialEq)]
471pub struct Agt0 {
472    ptr: *mut u8,
473}
474#[cfg(feature = "agt0")]
475pub const AGT0: self::Agt0 = self::Agt0 {
476    ptr: 0x40084000u32 as _,
477};
478#[cfg(feature = "agt1")]
479pub const AGT1: self::Agt0 = self::Agt0 {
480    ptr: 0x40084100u32 as _,
481};
482#[cfg(feature = "acmplp")]
483#[derive(Copy, Clone, Eq, PartialEq)]
484pub struct Acmplp {
485    ptr: *mut u8,
486}
487#[cfg(feature = "acmplp")]
488pub const ACMPLP: self::Acmplp = self::Acmplp {
489    ptr: 0x40085e00u32 as _,
490};
491#[cfg(feature = "flcn")]
492#[derive(Copy, Clone, Eq, PartialEq)]
493pub struct Flcn {
494    ptr: *mut u8,
495}
496#[cfg(feature = "flcn")]
497pub const FLCN: self::Flcn = self::Flcn {
498    ptr: 0x407ec000u32 as _,
499};
500
501pub use cortex_m::peripheral::Peripherals as CorePeripherals;
502pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, ITM, MPU, NVIC, SCB, SYST, TPIU};
503#[doc = "Number available in the NVIC for configuring priority"]
504pub const NVIC_PRIO_BITS: u8 = 2;
505#[doc(hidden)]
506pub union Vector {
507    _handler: unsafe extern "C" fn(),
508    _reserved: u32,
509}
510#[cfg(feature = "rt")]
511pub use self::Interrupt as interrupt;
512#[cfg(feature = "rt")]
513pub use cortex_m_rt::interrupt;
514#[cfg(feature = "rt")]
515pub mod interrupt_handlers {
516    unsafe extern "C" {
517        pub fn IEL0();
518        pub fn IEL1();
519        pub fn IEL2();
520        pub fn IEL3();
521        pub fn IEL4();
522        pub fn IEL5();
523        pub fn IEL6();
524        pub fn IEL7();
525        pub fn IEL8();
526        pub fn IEL9();
527        pub fn IEL10();
528        pub fn IEL11();
529        pub fn IEL12();
530        pub fn IEL13();
531        pub fn IEL14();
532        pub fn IEL15();
533        pub fn IEL16();
534        pub fn IEL17();
535        pub fn IEL18();
536        pub fn IEL19();
537        pub fn IEL20();
538        pub fn IEL21();
539        pub fn IEL22();
540        pub fn IEL23();
541        pub fn IEL24();
542        pub fn IEL25();
543        pub fn IEL26();
544        pub fn IEL27();
545        pub fn IEL28();
546        pub fn IEL29();
547        pub fn IEL30();
548        pub fn IEL31();
549    }
550}
551#[cfg(feature = "rt")]
552#[doc(hidden)]
553#[unsafe(link_section = ".vector_table.interrupts")]
554#[unsafe(no_mangle)]
555pub static __INTERRUPTS: [Vector; 32] = [
556    Vector {
557        _handler: interrupt_handlers::IEL0,
558    },
559    Vector {
560        _handler: interrupt_handlers::IEL1,
561    },
562    Vector {
563        _handler: interrupt_handlers::IEL2,
564    },
565    Vector {
566        _handler: interrupt_handlers::IEL3,
567    },
568    Vector {
569        _handler: interrupt_handlers::IEL4,
570    },
571    Vector {
572        _handler: interrupt_handlers::IEL5,
573    },
574    Vector {
575        _handler: interrupt_handlers::IEL6,
576    },
577    Vector {
578        _handler: interrupt_handlers::IEL7,
579    },
580    Vector {
581        _handler: interrupt_handlers::IEL8,
582    },
583    Vector {
584        _handler: interrupt_handlers::IEL9,
585    },
586    Vector {
587        _handler: interrupt_handlers::IEL10,
588    },
589    Vector {
590        _handler: interrupt_handlers::IEL11,
591    },
592    Vector {
593        _handler: interrupt_handlers::IEL12,
594    },
595    Vector {
596        _handler: interrupt_handlers::IEL13,
597    },
598    Vector {
599        _handler: interrupt_handlers::IEL14,
600    },
601    Vector {
602        _handler: interrupt_handlers::IEL15,
603    },
604    Vector {
605        _handler: interrupt_handlers::IEL16,
606    },
607    Vector {
608        _handler: interrupt_handlers::IEL17,
609    },
610    Vector {
611        _handler: interrupt_handlers::IEL18,
612    },
613    Vector {
614        _handler: interrupt_handlers::IEL19,
615    },
616    Vector {
617        _handler: interrupt_handlers::IEL20,
618    },
619    Vector {
620        _handler: interrupt_handlers::IEL21,
621    },
622    Vector {
623        _handler: interrupt_handlers::IEL22,
624    },
625    Vector {
626        _handler: interrupt_handlers::IEL23,
627    },
628    Vector {
629        _handler: interrupt_handlers::IEL24,
630    },
631    Vector {
632        _handler: interrupt_handlers::IEL25,
633    },
634    Vector {
635        _handler: interrupt_handlers::IEL26,
636    },
637    Vector {
638        _handler: interrupt_handlers::IEL27,
639    },
640    Vector {
641        _handler: interrupt_handlers::IEL28,
642    },
643    Vector {
644        _handler: interrupt_handlers::IEL29,
645    },
646    Vector {
647        _handler: interrupt_handlers::IEL30,
648    },
649    Vector {
650        _handler: interrupt_handlers::IEL31,
651    },
652];
653#[doc = "Enumeration of all the interrupts."]
654#[derive(Copy, Clone, Debug, PartialEq, Eq)]
655#[repr(u16)]
656pub enum Interrupt {
657    #[doc = "ICU Interrupt 0"]
658    IEL0 = 0,
659
660    #[doc = "ICU Interrupt 1"]
661    IEL1 = 1,
662
663    #[doc = "ICU Interrupt 2"]
664    IEL2 = 2,
665
666    #[doc = "ICU Interrupt 3"]
667    IEL3 = 3,
668
669    #[doc = "ICU Interrupt 4"]
670    IEL4 = 4,
671
672    #[doc = "ICU Interrupt 5"]
673    IEL5 = 5,
674
675    #[doc = "ICU Interrupt 6"]
676    IEL6 = 6,
677
678    #[doc = "ICU Interrupt 7"]
679    IEL7 = 7,
680
681    #[doc = "ICU Interrupt 8"]
682    IEL8 = 8,
683
684    #[doc = "ICU Interrupt 9"]
685    IEL9 = 9,
686
687    #[doc = "ICU Interrupt 10"]
688    IEL10 = 10,
689
690    #[doc = "ICU Interrupt 11"]
691    IEL11 = 11,
692
693    #[doc = "ICU Interrupt 12"]
694    IEL12 = 12,
695
696    #[doc = "ICU Interrupt 13"]
697    IEL13 = 13,
698
699    #[doc = "ICU Interrupt 14"]
700    IEL14 = 14,
701
702    #[doc = "ICU Interrupt 15"]
703    IEL15 = 15,
704
705    #[doc = "ICU Interrupt 16"]
706    IEL16 = 16,
707
708    #[doc = "ICU Interrupt 17"]
709    IEL17 = 17,
710
711    #[doc = "ICU Interrupt 18"]
712    IEL18 = 18,
713
714    #[doc = "ICU Interrupt 19"]
715    IEL19 = 19,
716
717    #[doc = "ICU Interrupt 20"]
718    IEL20 = 20,
719
720    #[doc = "ICU Interrupt 21"]
721    IEL21 = 21,
722
723    #[doc = "ICU Interrupt 22"]
724    IEL22 = 22,
725
726    #[doc = "ICU Interrupt 23"]
727    IEL23 = 23,
728
729    #[doc = "ICU Interrupt 24"]
730    IEL24 = 24,
731
732    #[doc = "ICU Interrupt 25"]
733    IEL25 = 25,
734
735    #[doc = "ICU Interrupt 26"]
736    IEL26 = 26,
737
738    #[doc = "ICU Interrupt 27"]
739    IEL27 = 27,
740
741    #[doc = "ICU Interrupt 28"]
742    IEL28 = 28,
743
744    #[doc = "ICU Interrupt 29"]
745    IEL29 = 29,
746
747    #[doc = "ICU Interrupt 30"]
748    IEL30 = 30,
749
750    #[doc = "ICU Interrupt 31"]
751    IEL31 = 31,
752}
753unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
754    #[inline(always)]
755    fn number(self) -> u16 {
756        self as u16
757    }
758}
759#[allow(non_snake_case)]
760/// Required for compatibility with RTIC and other frameworks
761pub struct Peripherals {
762    #[cfg(feature = "rmpu")]
763    pub RMPU: self::Rmpu,
764    #[cfg(feature = "sram")]
765    pub SRAM: self::Sram,
766    #[cfg(feature = "bus")]
767    pub BUS: self::Bus,
768    #[cfg(feature = "dtc")]
769    pub DTC: self::Dtc,
770    #[cfg(feature = "icu")]
771    pub ICU: self::Icu,
772    #[cfg(feature = "dbg")]
773    pub DBG: self::Dbg,
774    #[cfg(feature = "sysc")]
775    pub SYSC: self::Sysc,
776    #[cfg(feature = "port0")]
777    pub PORT0: self::Port0,
778    #[cfg(feature = "port1")]
779    pub PORT1: self::Port1,
780    #[cfg(feature = "port2")]
781    pub PORT2: self::Port1,
782    #[cfg(feature = "port3")]
783    pub PORT3: self::Port0,
784    #[cfg(feature = "port4")]
785    pub PORT4: self::Port0,
786    #[cfg(feature = "port5")]
787    pub PORT5: self::Port0,
788    #[cfg(feature = "port6")]
789    pub PORT6: self::Port0,
790    #[cfg(feature = "port7")]
791    pub PORT7: self::Port0,
792    #[cfg(feature = "port8")]
793    pub PORT8: self::Port0,
794    #[cfg(feature = "pfs")]
795    pub PFS: self::Pfs,
796    #[cfg(feature = "elc")]
797    pub ELC: self::Elc,
798    #[cfg(feature = "poeg")]
799    pub POEG: self::Poeg,
800    #[cfg(feature = "rtc")]
801    pub RTC: self::Rtc,
802    #[cfg(feature = "wdt")]
803    pub WDT: self::Wdt,
804    #[cfg(feature = "iwdt")]
805    pub IWDT: self::Iwdt,
806    #[cfg(feature = "cac")]
807    pub CAC: self::Cac,
808    #[cfg(feature = "mstp")]
809    pub MSTP: self::Mstp,
810    #[cfg(feature = "can0")]
811    pub CAN0: self::Can0,
812    #[cfg(feature = "iic0")]
813    pub IIC0: self::Iic0,
814    #[cfg(feature = "iic0wu")]
815    pub IIC0WU: self::Iic0Wu,
816    #[cfg(feature = "iic1")]
817    pub IIC1: self::Iic0,
818    #[cfg(feature = "doc")]
819    pub DOC: self::Doc,
820    #[cfg(feature = "adc120")]
821    pub ADC120: self::Adc120,
822    #[cfg(feature = "dac12")]
823    pub DAC12: self::Dac12,
824    #[cfg(feature = "sci0")]
825    pub SCI0: self::Sci0,
826    #[cfg(feature = "sci1")]
827    pub SCI1: self::Sci1,
828    #[cfg(feature = "sci2")]
829    pub SCI2: self::Sci1,
830    #[cfg(feature = "sci3")]
831    pub SCI3: self::Sci1,
832    #[cfg(feature = "sci9")]
833    pub SCI9: self::Sci1,
834    #[cfg(feature = "spi0")]
835    pub SPI0: self::Spi0,
836    #[cfg(feature = "spi1")]
837    pub SPI1: self::Spi0,
838    #[cfg(feature = "crc")]
839    pub CRC: self::Crc,
840    #[cfg(feature = "gpt320")]
841    pub GPT320: self::Gpt320,
842    #[cfg(feature = "gpt321")]
843    pub GPT321: self::Gpt320,
844    #[cfg(feature = "gpt322")]
845    pub GPT322: self::Gpt320,
846    #[cfg(feature = "gpt323")]
847    pub GPT323: self::Gpt320,
848    #[cfg(feature = "gpt164")]
849    pub GPT164: self::Gpt164,
850    #[cfg(feature = "gpt165")]
851    pub GPT165: self::Gpt164,
852    #[cfg(feature = "gpt166")]
853    pub GPT166: self::Gpt164,
854    #[cfg(feature = "gpt167")]
855    pub GPT167: self::Gpt164,
856    #[cfg(feature = "gpt168")]
857    pub GPT168: self::Gpt164,
858    #[cfg(feature = "gpt169")]
859    pub GPT169: self::Gpt164,
860    #[cfg(feature = "gpt_ops")]
861    pub GPT_OPS: self::GptOps,
862    #[cfg(feature = "kint")]
863    pub KINT: self::Kint,
864    #[cfg(feature = "ctsu")]
865    pub CTSU: self::Ctsu,
866    #[cfg(feature = "agt0")]
867    pub AGT0: self::Agt0,
868    #[cfg(feature = "agt1")]
869    pub AGT1: self::Agt0,
870    #[cfg(feature = "acmplp")]
871    pub ACMPLP: self::Acmplp,
872    #[cfg(feature = "flcn")]
873    pub FLCN: self::Flcn,
874}
875
876impl Peripherals {
877    /// Returns Peripheral struct multiple times
878    /// Required for compatibility with RTIC and other frameworks
879    #[inline]
880    pub fn take() -> Option<Self> {
881        Some(Self::steal())
882    }
883
884    /// Returns Peripheral struct multiple times
885    /// Required for compatibility with RTIC and other frameworks
886    #[inline]
887    pub fn steal() -> Self {
888        Peripherals {
889            #[cfg(feature = "rmpu")]
890            RMPU: crate::RMPU,
891            #[cfg(feature = "sram")]
892            SRAM: crate::SRAM,
893            #[cfg(feature = "bus")]
894            BUS: crate::BUS,
895            #[cfg(feature = "dtc")]
896            DTC: crate::DTC,
897            #[cfg(feature = "icu")]
898            ICU: crate::ICU,
899            #[cfg(feature = "dbg")]
900            DBG: crate::DBG,
901            #[cfg(feature = "sysc")]
902            SYSC: crate::SYSC,
903            #[cfg(feature = "port0")]
904            PORT0: crate::PORT0,
905            #[cfg(feature = "port1")]
906            PORT1: crate::PORT1,
907            #[cfg(feature = "port2")]
908            PORT2: crate::PORT2,
909            #[cfg(feature = "port3")]
910            PORT3: crate::PORT3,
911            #[cfg(feature = "port4")]
912            PORT4: crate::PORT4,
913            #[cfg(feature = "port5")]
914            PORT5: crate::PORT5,
915            #[cfg(feature = "port6")]
916            PORT6: crate::PORT6,
917            #[cfg(feature = "port7")]
918            PORT7: crate::PORT7,
919            #[cfg(feature = "port8")]
920            PORT8: crate::PORT8,
921            #[cfg(feature = "pfs")]
922            PFS: crate::PFS,
923            #[cfg(feature = "elc")]
924            ELC: crate::ELC,
925            #[cfg(feature = "poeg")]
926            POEG: crate::POEG,
927            #[cfg(feature = "rtc")]
928            RTC: crate::RTC,
929            #[cfg(feature = "wdt")]
930            WDT: crate::WDT,
931            #[cfg(feature = "iwdt")]
932            IWDT: crate::IWDT,
933            #[cfg(feature = "cac")]
934            CAC: crate::CAC,
935            #[cfg(feature = "mstp")]
936            MSTP: crate::MSTP,
937            #[cfg(feature = "can0")]
938            CAN0: crate::CAN0,
939            #[cfg(feature = "iic0")]
940            IIC0: crate::IIC0,
941            #[cfg(feature = "iic0wu")]
942            IIC0WU: crate::IIC0WU,
943            #[cfg(feature = "iic1")]
944            IIC1: crate::IIC1,
945            #[cfg(feature = "doc")]
946            DOC: crate::DOC,
947            #[cfg(feature = "adc120")]
948            ADC120: crate::ADC120,
949            #[cfg(feature = "dac12")]
950            DAC12: crate::DAC12,
951            #[cfg(feature = "sci0")]
952            SCI0: crate::SCI0,
953            #[cfg(feature = "sci1")]
954            SCI1: crate::SCI1,
955            #[cfg(feature = "sci2")]
956            SCI2: crate::SCI2,
957            #[cfg(feature = "sci3")]
958            SCI3: crate::SCI3,
959            #[cfg(feature = "sci9")]
960            SCI9: crate::SCI9,
961            #[cfg(feature = "spi0")]
962            SPI0: crate::SPI0,
963            #[cfg(feature = "spi1")]
964            SPI1: crate::SPI1,
965            #[cfg(feature = "crc")]
966            CRC: crate::CRC,
967            #[cfg(feature = "gpt320")]
968            GPT320: crate::GPT320,
969            #[cfg(feature = "gpt321")]
970            GPT321: crate::GPT321,
971            #[cfg(feature = "gpt322")]
972            GPT322: crate::GPT322,
973            #[cfg(feature = "gpt323")]
974            GPT323: crate::GPT323,
975            #[cfg(feature = "gpt164")]
976            GPT164: crate::GPT164,
977            #[cfg(feature = "gpt165")]
978            GPT165: crate::GPT165,
979            #[cfg(feature = "gpt166")]
980            GPT166: crate::GPT166,
981            #[cfg(feature = "gpt167")]
982            GPT167: crate::GPT167,
983            #[cfg(feature = "gpt168")]
984            GPT168: crate::GPT168,
985            #[cfg(feature = "gpt169")]
986            GPT169: crate::GPT169,
987            #[cfg(feature = "gpt_ops")]
988            GPT_OPS: crate::GPT_OPS,
989            #[cfg(feature = "kint")]
990            KINT: crate::KINT,
991            #[cfg(feature = "ctsu")]
992            CTSU: crate::CTSU,
993            #[cfg(feature = "agt0")]
994            AGT0: crate::AGT0,
995            #[cfg(feature = "agt1")]
996            AGT1: crate::AGT1,
997            #[cfg(feature = "acmplp")]
998            ACMPLP: crate::ACMPLP,
999            #[cfg(feature = "flcn")]
1000            FLCN: crate::FLCN,
1001        }
1002    }
1003}
ra2l1_pac/lib.rs

ra2l1_pac/
lib.rs
