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ra2l1_pac/
ctsu.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.50.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:03:37 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Capacitive Touch Sensing Unit"]
28unsafe impl ::core::marker::Send for super::Ctsu {}
29unsafe impl ::core::marker::Sync for super::Ctsu {}
30impl super::Ctsu {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "CTSU Control Register A"]
38    #[inline(always)]
39    pub const fn ctsucra(
40        &self,
41    ) -> &'static crate::common::Reg<self::Ctsucra_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Ctsucra_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "CTSU Control Register A"]
50    #[inline(always)]
51    pub const fn ctsucral(
52        &self,
53    ) -> &'static crate::common::Reg<self::Ctsucral_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Ctsucral_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(0usize),
57            )
58        }
59    }
60
61    #[doc = "CTSU Control Register A"]
62    #[inline(always)]
63    pub const fn ctsucr0(
64        &self,
65    ) -> &'static crate::common::Reg<self::Ctsucr0_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Ctsucr0_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(0usize),
69            )
70        }
71    }
72
73    #[doc = "CTSU Control Register A"]
74    #[inline(always)]
75    pub const fn ctsucr1(
76        &self,
77    ) -> &'static crate::common::Reg<self::Ctsucr1_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Ctsucr1_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(1usize),
81            )
82        }
83    }
84
85    #[doc = "CTSU Control Register A"]
86    #[inline(always)]
87    pub const fn ctsucrah(
88        &self,
89    ) -> &'static crate::common::Reg<self::Ctsucrah_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Ctsucrah_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(2usize),
93            )
94        }
95    }
96
97    #[doc = "CTSU Control Register A"]
98    #[inline(always)]
99    pub const fn ctsucr2(
100        &self,
101    ) -> &'static crate::common::Reg<self::Ctsucr2_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Ctsucr2_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(2usize),
105            )
106        }
107    }
108
109    #[doc = "CTSU Control Register A"]
110    #[inline(always)]
111    pub const fn ctsucr3(
112        &self,
113    ) -> &'static crate::common::Reg<self::Ctsucr3_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::Ctsucr3_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(3usize),
117            )
118        }
119    }
120
121    #[doc = "CTSU Control Register B"]
122    #[inline(always)]
123    pub const fn ctsucrb(
124        &self,
125    ) -> &'static crate::common::Reg<self::Ctsucrb_SPEC, crate::common::RW> {
126        unsafe {
127            crate::common::Reg::<self::Ctsucrb_SPEC, crate::common::RW>::from_ptr(
128                self._svd2pac_as_ptr().add(4usize),
129            )
130        }
131    }
132
133    #[doc = "CTSU Control Register B"]
134    #[inline(always)]
135    pub const fn ctsucrbl(
136        &self,
137    ) -> &'static crate::common::Reg<self::Ctsucrbl_SPEC, crate::common::RW> {
138        unsafe {
139            crate::common::Reg::<self::Ctsucrbl_SPEC, crate::common::RW>::from_ptr(
140                self._svd2pac_as_ptr().add(4usize),
141            )
142        }
143    }
144
145    #[doc = "CTSU Control Register B"]
146    #[inline(always)]
147    pub const fn ctsusdprs(
148        &self,
149    ) -> &'static crate::common::Reg<self::Ctsusdprs_SPEC, crate::common::RW> {
150        unsafe {
151            crate::common::Reg::<self::Ctsusdprs_SPEC, crate::common::RW>::from_ptr(
152                self._svd2pac_as_ptr().add(4usize),
153            )
154        }
155    }
156
157    #[doc = "CTSU Control Register B"]
158    #[inline(always)]
159    pub const fn ctsusst(
160        &self,
161    ) -> &'static crate::common::Reg<self::Ctsusst_SPEC, crate::common::RW> {
162        unsafe {
163            crate::common::Reg::<self::Ctsusst_SPEC, crate::common::RW>::from_ptr(
164                self._svd2pac_as_ptr().add(5usize),
165            )
166        }
167    }
168
169    #[doc = "CTSU Control Register B"]
170    #[inline(always)]
171    pub const fn ctsucrbh(
172        &self,
173    ) -> &'static crate::common::Reg<self::Ctsucrbh_SPEC, crate::common::RW> {
174        unsafe {
175            crate::common::Reg::<self::Ctsucrbh_SPEC, crate::common::RW>::from_ptr(
176                self._svd2pac_as_ptr().add(6usize),
177            )
178        }
179    }
180
181    #[doc = "CTSU Control Register B"]
182    #[inline(always)]
183    pub const fn ctsudclkc(
184        &self,
185    ) -> &'static crate::common::Reg<self::Ctsudclkc_SPEC, crate::common::RW> {
186        unsafe {
187            crate::common::Reg::<self::Ctsudclkc_SPEC, crate::common::RW>::from_ptr(
188                self._svd2pac_as_ptr().add(7usize),
189            )
190        }
191    }
192
193    #[doc = "CTSU Measurement Channel Register"]
194    #[inline(always)]
195    pub const fn ctsumch(
196        &self,
197    ) -> &'static crate::common::Reg<self::Ctsumch_SPEC, crate::common::RW> {
198        unsafe {
199            crate::common::Reg::<self::Ctsumch_SPEC, crate::common::RW>::from_ptr(
200                self._svd2pac_as_ptr().add(8usize),
201            )
202        }
203    }
204
205    #[doc = "CTSU Measurement Channel Register"]
206    #[inline(always)]
207    pub const fn ctsumchl(
208        &self,
209    ) -> &'static crate::common::Reg<self::Ctsumchl_SPEC, crate::common::RW> {
210        unsafe {
211            crate::common::Reg::<self::Ctsumchl_SPEC, crate::common::RW>::from_ptr(
212                self._svd2pac_as_ptr().add(8usize),
213            )
214        }
215    }
216
217    #[doc = "CTSU Measurement Channel Register"]
218    #[inline(always)]
219    pub const fn ctsumch0(
220        &self,
221    ) -> &'static crate::common::Reg<self::Ctsumch0_SPEC, crate::common::RW> {
222        unsafe {
223            crate::common::Reg::<self::Ctsumch0_SPEC, crate::common::RW>::from_ptr(
224                self._svd2pac_as_ptr().add(8usize),
225            )
226        }
227    }
228
229    #[doc = "CTSU Measurement Channel Register"]
230    #[inline(always)]
231    pub const fn ctsumch1(
232        &self,
233    ) -> &'static crate::common::Reg<self::Ctsumch1_SPEC, crate::common::RW> {
234        unsafe {
235            crate::common::Reg::<self::Ctsumch1_SPEC, crate::common::RW>::from_ptr(
236                self._svd2pac_as_ptr().add(9usize),
237            )
238        }
239    }
240
241    #[doc = "CTSU Measurement Channel Register"]
242    #[inline(always)]
243    pub const fn ctsumchh(
244        &self,
245    ) -> &'static crate::common::Reg<self::Ctsumchh_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::Ctsumchh_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(10usize),
249            )
250        }
251    }
252
253    #[doc = "CTSU Measurement Channel Register"]
254    #[inline(always)]
255    pub const fn ctsumfaf(
256        &self,
257    ) -> &'static crate::common::Reg<self::Ctsumfaf_SPEC, crate::common::RW> {
258        unsafe {
259            crate::common::Reg::<self::Ctsumfaf_SPEC, crate::common::RW>::from_ptr(
260                self._svd2pac_as_ptr().add(10usize),
261            )
262        }
263    }
264
265    #[doc = "CTSU Channel Enable Control Register A"]
266    #[inline(always)]
267    pub const fn ctsuchaca(
268        &self,
269    ) -> &'static crate::common::Reg<self::Ctsuchaca_SPEC, crate::common::RW> {
270        unsafe {
271            crate::common::Reg::<self::Ctsuchaca_SPEC, crate::common::RW>::from_ptr(
272                self._svd2pac_as_ptr().add(12usize),
273            )
274        }
275    }
276
277    #[doc = "CTSU Channel Enable Control Register A"]
278    #[inline(always)]
279    pub const fn ctsuchacal(
280        &self,
281    ) -> &'static crate::common::Reg<self::Ctsuchacal_SPEC, crate::common::RW> {
282        unsafe {
283            crate::common::Reg::<self::Ctsuchacal_SPEC, crate::common::RW>::from_ptr(
284                self._svd2pac_as_ptr().add(12usize),
285            )
286        }
287    }
288
289    #[doc = "CTSU Channel Enable Control Register A"]
290    #[inline(always)]
291    pub const fn ctsuchac0(
292        &self,
293    ) -> &'static crate::common::Reg<self::Ctsuchac0_SPEC, crate::common::RW> {
294        unsafe {
295            crate::common::Reg::<self::Ctsuchac0_SPEC, crate::common::RW>::from_ptr(
296                self._svd2pac_as_ptr().add(12usize),
297            )
298        }
299    }
300
301    #[doc = "CTSU Channel Enable Control Register A"]
302    #[inline(always)]
303    pub const fn ctsuchac1(
304        &self,
305    ) -> &'static crate::common::Reg<self::Ctsuchac1_SPEC, crate::common::RW> {
306        unsafe {
307            crate::common::Reg::<self::Ctsuchac1_SPEC, crate::common::RW>::from_ptr(
308                self._svd2pac_as_ptr().add(13usize),
309            )
310        }
311    }
312
313    #[doc = "CTSU Channel Enable Control Register A"]
314    #[inline(always)]
315    pub const fn ctsuchacah(
316        &self,
317    ) -> &'static crate::common::Reg<self::Ctsuchacah_SPEC, crate::common::RW> {
318        unsafe {
319            crate::common::Reg::<self::Ctsuchacah_SPEC, crate::common::RW>::from_ptr(
320                self._svd2pac_as_ptr().add(14usize),
321            )
322        }
323    }
324
325    #[doc = "CTSU Channel Enable Control Register A"]
326    #[inline(always)]
327    pub const fn ctsuchac2(
328        &self,
329    ) -> &'static crate::common::Reg<self::Ctsuchac2_SPEC, crate::common::RW> {
330        unsafe {
331            crate::common::Reg::<self::Ctsuchac2_SPEC, crate::common::RW>::from_ptr(
332                self._svd2pac_as_ptr().add(14usize),
333            )
334        }
335    }
336
337    #[doc = "CTSU Channel Enable Control Register A"]
338    #[inline(always)]
339    pub const fn ctsuchac3(
340        &self,
341    ) -> &'static crate::common::Reg<self::Ctsuchac3_SPEC, crate::common::RW> {
342        unsafe {
343            crate::common::Reg::<self::Ctsuchac3_SPEC, crate::common::RW>::from_ptr(
344                self._svd2pac_as_ptr().add(15usize),
345            )
346        }
347    }
348
349    #[doc = "CTSU Channel Enable Control Register B"]
350    #[inline(always)]
351    pub const fn ctsuchacb(
352        &self,
353    ) -> &'static crate::common::Reg<self::Ctsuchacb_SPEC, crate::common::RW> {
354        unsafe {
355            crate::common::Reg::<self::Ctsuchacb_SPEC, crate::common::RW>::from_ptr(
356                self._svd2pac_as_ptr().add(16usize),
357            )
358        }
359    }
360
361    #[doc = "CTSU Channel Enable Control Register B"]
362    #[inline(always)]
363    pub const fn ctsuchacbl(
364        &self,
365    ) -> &'static crate::common::Reg<self::Ctsuchacbl_SPEC, crate::common::RW> {
366        unsafe {
367            crate::common::Reg::<self::Ctsuchacbl_SPEC, crate::common::RW>::from_ptr(
368                self._svd2pac_as_ptr().add(16usize),
369            )
370        }
371    }
372
373    #[doc = "CTSU Channel Enable Control Register B"]
374    #[inline(always)]
375    pub const fn ctsuchac4(
376        &self,
377    ) -> &'static crate::common::Reg<self::Ctsuchac4_SPEC, crate::common::RW> {
378        unsafe {
379            crate::common::Reg::<self::Ctsuchac4_SPEC, crate::common::RW>::from_ptr(
380                self._svd2pac_as_ptr().add(16usize),
381            )
382        }
383    }
384
385    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
386    #[inline(always)]
387    pub const fn ctsuchtrca(
388        &self,
389    ) -> &'static crate::common::Reg<self::Ctsuchtrca_SPEC, crate::common::RW> {
390        unsafe {
391            crate::common::Reg::<self::Ctsuchtrca_SPEC, crate::common::RW>::from_ptr(
392                self._svd2pac_as_ptr().add(20usize),
393            )
394        }
395    }
396
397    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
398    #[inline(always)]
399    pub const fn ctsuchtrcal(
400        &self,
401    ) -> &'static crate::common::Reg<self::Ctsuchtrcal_SPEC, crate::common::RW> {
402        unsafe {
403            crate::common::Reg::<self::Ctsuchtrcal_SPEC, crate::common::RW>::from_ptr(
404                self._svd2pac_as_ptr().add(20usize),
405            )
406        }
407    }
408
409    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
410    #[inline(always)]
411    pub const fn ctsuchtrc0(
412        &self,
413    ) -> &'static crate::common::Reg<self::Ctsuchtrc0_SPEC, crate::common::RW> {
414        unsafe {
415            crate::common::Reg::<self::Ctsuchtrc0_SPEC, crate::common::RW>::from_ptr(
416                self._svd2pac_as_ptr().add(20usize),
417            )
418        }
419    }
420
421    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
422    #[inline(always)]
423    pub const fn ctsuchtrc1(
424        &self,
425    ) -> &'static crate::common::Reg<self::Ctsuchtrc1_SPEC, crate::common::RW> {
426        unsafe {
427            crate::common::Reg::<self::Ctsuchtrc1_SPEC, crate::common::RW>::from_ptr(
428                self._svd2pac_as_ptr().add(21usize),
429            )
430        }
431    }
432
433    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
434    #[inline(always)]
435    pub const fn ctsuchtrcah(
436        &self,
437    ) -> &'static crate::common::Reg<self::Ctsuchtrcah_SPEC, crate::common::RW> {
438        unsafe {
439            crate::common::Reg::<self::Ctsuchtrcah_SPEC, crate::common::RW>::from_ptr(
440                self._svd2pac_as_ptr().add(22usize),
441            )
442        }
443    }
444
445    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
446    #[inline(always)]
447    pub const fn ctsuchtrc2(
448        &self,
449    ) -> &'static crate::common::Reg<self::Ctsuchtrc2_SPEC, crate::common::RW> {
450        unsafe {
451            crate::common::Reg::<self::Ctsuchtrc2_SPEC, crate::common::RW>::from_ptr(
452                self._svd2pac_as_ptr().add(22usize),
453            )
454        }
455    }
456
457    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
458    #[inline(always)]
459    pub const fn ctsuchtrc3(
460        &self,
461    ) -> &'static crate::common::Reg<self::Ctsuchtrc3_SPEC, crate::common::RW> {
462        unsafe {
463            crate::common::Reg::<self::Ctsuchtrc3_SPEC, crate::common::RW>::from_ptr(
464                self._svd2pac_as_ptr().add(23usize),
465            )
466        }
467    }
468
469    #[doc = "CTSU Channel Transmit/Receive Control Register B"]
470    #[inline(always)]
471    pub const fn ctsuchtrcb(
472        &self,
473    ) -> &'static crate::common::Reg<self::Ctsuchtrcb_SPEC, crate::common::RW> {
474        unsafe {
475            crate::common::Reg::<self::Ctsuchtrcb_SPEC, crate::common::RW>::from_ptr(
476                self._svd2pac_as_ptr().add(24usize),
477            )
478        }
479    }
480
481    #[doc = "CTSU Channel Transmit/Receive Control Register B"]
482    #[inline(always)]
483    pub const fn ctsuchtrcbl(
484        &self,
485    ) -> &'static crate::common::Reg<self::Ctsuchtrcbl_SPEC, crate::common::RW> {
486        unsafe {
487            crate::common::Reg::<self::Ctsuchtrcbl_SPEC, crate::common::RW>::from_ptr(
488                self._svd2pac_as_ptr().add(24usize),
489            )
490        }
491    }
492
493    #[doc = "CTSU Channel Transmit/Receive Control Register B"]
494    #[inline(always)]
495    pub const fn ctsuchtrc4(
496        &self,
497    ) -> &'static crate::common::Reg<self::Ctsuchtrc4_SPEC, crate::common::RW> {
498        unsafe {
499            crate::common::Reg::<self::Ctsuchtrc4_SPEC, crate::common::RW>::from_ptr(
500                self._svd2pac_as_ptr().add(24usize),
501            )
502        }
503    }
504
505    #[doc = "CTSU Status Register"]
506    #[inline(always)]
507    pub const fn ctsusr(
508        &self,
509    ) -> &'static crate::common::Reg<self::Ctsusr_SPEC, crate::common::RW> {
510        unsafe {
511            crate::common::Reg::<self::Ctsusr_SPEC, crate::common::RW>::from_ptr(
512                self._svd2pac_as_ptr().add(28usize),
513            )
514        }
515    }
516
517    #[doc = "CTSU Status Register"]
518    #[inline(always)]
519    pub const fn ctsusrl(
520        &self,
521    ) -> &'static crate::common::Reg<self::Ctsusrl_SPEC, crate::common::RW> {
522        unsafe {
523            crate::common::Reg::<self::Ctsusrl_SPEC, crate::common::RW>::from_ptr(
524                self._svd2pac_as_ptr().add(28usize),
525            )
526        }
527    }
528
529    #[doc = "CTSU Status Register"]
530    #[inline(always)]
531    pub const fn ctsusr0(
532        &self,
533    ) -> &'static crate::common::Reg<self::Ctsusr0_SPEC, crate::common::RW> {
534        unsafe {
535            crate::common::Reg::<self::Ctsusr0_SPEC, crate::common::RW>::from_ptr(
536                self._svd2pac_as_ptr().add(28usize),
537            )
538        }
539    }
540
541    #[doc = "CTSU Status Register"]
542    #[inline(always)]
543    pub const fn ctsust(
544        &self,
545    ) -> &'static crate::common::Reg<self::Ctsust_SPEC, crate::common::RW> {
546        unsafe {
547            crate::common::Reg::<self::Ctsust_SPEC, crate::common::RW>::from_ptr(
548                self._svd2pac_as_ptr().add(29usize),
549            )
550        }
551    }
552
553    #[doc = "CTSU Status Register"]
554    #[inline(always)]
555    pub const fn ctsusrh(
556        &self,
557    ) -> &'static crate::common::Reg<self::Ctsusrh_SPEC, crate::common::RW> {
558        unsafe {
559            crate::common::Reg::<self::Ctsusrh_SPEC, crate::common::RW>::from_ptr(
560                self._svd2pac_as_ptr().add(30usize),
561            )
562        }
563    }
564
565    #[doc = "CTSU Status Register"]
566    #[inline(always)]
567    pub const fn ctsusr2(
568        &self,
569    ) -> &'static crate::common::Reg<self::Ctsusr2_SPEC, crate::common::RW> {
570        unsafe {
571            crate::common::Reg::<self::Ctsusr2_SPEC, crate::common::RW>::from_ptr(
572                self._svd2pac_as_ptr().add(30usize),
573            )
574        }
575    }
576
577    #[doc = "CTSU Sensor Offset Register"]
578    #[inline(always)]
579    pub const fn ctsuso(
580        &self,
581    ) -> &'static crate::common::Reg<self::Ctsuso_SPEC, crate::common::RW> {
582        unsafe {
583            crate::common::Reg::<self::Ctsuso_SPEC, crate::common::RW>::from_ptr(
584                self._svd2pac_as_ptr().add(32usize),
585            )
586        }
587    }
588
589    #[doc = "CTSU Sensor Offset Register"]
590    #[inline(always)]
591    pub const fn ctsuso0(
592        &self,
593    ) -> &'static crate::common::Reg<self::Ctsuso0_SPEC, crate::common::RW> {
594        unsafe {
595            crate::common::Reg::<self::Ctsuso0_SPEC, crate::common::RW>::from_ptr(
596                self._svd2pac_as_ptr().add(32usize),
597            )
598        }
599    }
600
601    #[doc = "CTSU Sensor Offset Register"]
602    #[inline(always)]
603    pub const fn ctsuso1(
604        &self,
605    ) -> &'static crate::common::Reg<self::Ctsuso1_SPEC, crate::common::RW> {
606        unsafe {
607            crate::common::Reg::<self::Ctsuso1_SPEC, crate::common::RW>::from_ptr(
608                self._svd2pac_as_ptr().add(34usize),
609            )
610        }
611    }
612
613    #[doc = "CTSU Sensor Counter Register"]
614    #[inline(always)]
615    pub const fn ctsuscnt(
616        &self,
617    ) -> &'static crate::common::Reg<self::Ctsuscnt_SPEC, crate::common::R> {
618        unsafe {
619            crate::common::Reg::<self::Ctsuscnt_SPEC, crate::common::R>::from_ptr(
620                self._svd2pac_as_ptr().add(36usize),
621            )
622        }
623    }
624
625    #[doc = "CTSU Sensor Counter Register"]
626    #[inline(always)]
627    pub const fn ctsusc(&self) -> &'static crate::common::Reg<self::Ctsusc_SPEC, crate::common::R> {
628        unsafe {
629            crate::common::Reg::<self::Ctsusc_SPEC, crate::common::R>::from_ptr(
630                self._svd2pac_as_ptr().add(36usize),
631            )
632        }
633    }
634
635    #[doc = "CTSU Calibration Register"]
636    #[inline(always)]
637    pub const fn ctsucalib(
638        &self,
639    ) -> &'static crate::common::Reg<self::Ctsucalib_SPEC, crate::common::RW> {
640        unsafe {
641            crate::common::Reg::<self::Ctsucalib_SPEC, crate::common::RW>::from_ptr(
642                self._svd2pac_as_ptr().add(40usize),
643            )
644        }
645    }
646
647    #[doc = "CTSU Calibration Register"]
648    #[inline(always)]
649    pub const fn ctsudbgr0(
650        &self,
651    ) -> &'static crate::common::Reg<self::Ctsudbgr0_SPEC, crate::common::RW> {
652        unsafe {
653            crate::common::Reg::<self::Ctsudbgr0_SPEC, crate::common::RW>::from_ptr(
654                self._svd2pac_as_ptr().add(40usize),
655            )
656        }
657    }
658
659    #[doc = "CTSU Calibration Register"]
660    #[inline(always)]
661    pub const fn ctsudbgr1(
662        &self,
663    ) -> &'static crate::common::Reg<self::Ctsudbgr1_SPEC, crate::common::RW> {
664        unsafe {
665            crate::common::Reg::<self::Ctsudbgr1_SPEC, crate::common::RW>::from_ptr(
666                self._svd2pac_as_ptr().add(42usize),
667            )
668        }
669    }
670
671    #[doc = "CTSU Sensor Unit Clock Control Register A"]
672    #[inline(always)]
673    pub const fn ctsusuclka(
674        &self,
675    ) -> &'static crate::common::Reg<self::Ctsusuclka_SPEC, crate::common::RW> {
676        unsafe {
677            crate::common::Reg::<self::Ctsusuclka_SPEC, crate::common::RW>::from_ptr(
678                self._svd2pac_as_ptr().add(44usize),
679            )
680        }
681    }
682
683    #[doc = "CTSU Sensor Unit Clock Control Register A"]
684    #[inline(always)]
685    pub const fn ctsusuclk0(
686        &self,
687    ) -> &'static crate::common::Reg<self::Ctsusuclk0_SPEC, crate::common::RW> {
688        unsafe {
689            crate::common::Reg::<self::Ctsusuclk0_SPEC, crate::common::RW>::from_ptr(
690                self._svd2pac_as_ptr().add(44usize),
691            )
692        }
693    }
694
695    #[doc = "CTSU Sensor Unit Clock Control Register A"]
696    #[inline(always)]
697    pub const fn ctsusuclk1(
698        &self,
699    ) -> &'static crate::common::Reg<self::Ctsusuclk1_SPEC, crate::common::RW> {
700        unsafe {
701            crate::common::Reg::<self::Ctsusuclk1_SPEC, crate::common::RW>::from_ptr(
702                self._svd2pac_as_ptr().add(46usize),
703            )
704        }
705    }
706
707    #[doc = "CTSU Sensor Unit Clock Control Register B"]
708    #[inline(always)]
709    pub const fn ctsusuclkb(
710        &self,
711    ) -> &'static crate::common::Reg<self::Ctsusuclkb_SPEC, crate::common::RW> {
712        unsafe {
713            crate::common::Reg::<self::Ctsusuclkb_SPEC, crate::common::RW>::from_ptr(
714                self._svd2pac_as_ptr().add(48usize),
715            )
716        }
717    }
718
719    #[doc = "CTSU Sensor Unit Clock Control Register B"]
720    #[inline(always)]
721    pub const fn ctsusuclk2(
722        &self,
723    ) -> &'static crate::common::Reg<self::Ctsusuclk2_SPEC, crate::common::RW> {
724        unsafe {
725            crate::common::Reg::<self::Ctsusuclk2_SPEC, crate::common::RW>::from_ptr(
726                self._svd2pac_as_ptr().add(48usize),
727            )
728        }
729    }
730
731    #[doc = "CTSU Sensor Unit Clock Control Register B"]
732    #[inline(always)]
733    pub const fn ctsusuclk3(
734        &self,
735    ) -> &'static crate::common::Reg<self::Ctsusuclk3_SPEC, crate::common::RW> {
736        unsafe {
737            crate::common::Reg::<self::Ctsusuclk3_SPEC, crate::common::RW>::from_ptr(
738                self._svd2pac_as_ptr().add(50usize),
739            )
740        }
741    }
742
743    #[doc = "CTSU CFC Counter Register"]
744    #[inline(always)]
745    pub const fn ctsucfccnt(
746        &self,
747    ) -> &'static crate::common::Reg<self::Ctsucfccnt_SPEC, crate::common::R> {
748        unsafe {
749            crate::common::Reg::<self::Ctsucfccnt_SPEC, crate::common::R>::from_ptr(
750                self._svd2pac_as_ptr().add(52usize),
751            )
752        }
753    }
754
755    #[doc = "CTSU CFC Counter Register"]
756    #[inline(always)]
757    pub const fn ctsucfccntl(
758        &self,
759    ) -> &'static crate::common::Reg<self::Ctsucfccntl_SPEC, crate::common::R> {
760        unsafe {
761            crate::common::Reg::<self::Ctsucfccntl_SPEC, crate::common::R>::from_ptr(
762                self._svd2pac_as_ptr().add(52usize),
763            )
764        }
765    }
766}
767#[doc(hidden)]
768#[derive(Copy, Clone, Eq, PartialEq)]
769pub struct Ctsucra_SPEC;
770impl crate::sealed::RegSpec for Ctsucra_SPEC {
771    type DataType = u32;
772}
773
774#[doc = "CTSU Control Register A"]
775pub type Ctsucra = crate::RegValueT<Ctsucra_SPEC>;
776
777impl Ctsucra {
778    #[doc = "CTSU Measurement Operation Start"]
779    #[inline(always)]
780    pub fn strt(
781        self,
782    ) -> crate::common::RegisterField<
783        0,
784        0x1,
785        1,
786        0,
787        ctsucra::Strt,
788        ctsucra::Strt,
789        Ctsucra_SPEC,
790        crate::common::RW,
791    > {
792        crate::common::RegisterField::<
793            0,
794            0x1,
795            1,
796            0,
797            ctsucra::Strt,
798            ctsucra::Strt,
799            Ctsucra_SPEC,
800            crate::common::RW,
801        >::from_register(self, 0)
802    }
803
804    #[doc = "CTSU Measurement Operation Start Trigger Select"]
805    #[inline(always)]
806    pub fn cap(
807        self,
808    ) -> crate::common::RegisterField<
809        1,
810        0x1,
811        1,
812        0,
813        ctsucra::Cap,
814        ctsucra::Cap,
815        Ctsucra_SPEC,
816        crate::common::RW,
817    > {
818        crate::common::RegisterField::<
819            1,
820            0x1,
821            1,
822            0,
823            ctsucra::Cap,
824            ctsucra::Cap,
825            Ctsucra_SPEC,
826            crate::common::RW,
827        >::from_register(self, 0)
828    }
829
830    #[doc = "CTSU Wait State Power-Saving Enable"]
831    #[inline(always)]
832    pub fn snz(
833        self,
834    ) -> crate::common::RegisterField<
835        2,
836        0x1,
837        1,
838        0,
839        ctsucra::Snz,
840        ctsucra::Snz,
841        Ctsucra_SPEC,
842        crate::common::RW,
843    > {
844        crate::common::RegisterField::<
845            2,
846            0x1,
847            1,
848            0,
849            ctsucra::Snz,
850            ctsucra::Snz,
851            Ctsucra_SPEC,
852            crate::common::RW,
853        >::from_register(self, 0)
854    }
855
856    #[doc = "CTSU CFC Power On Control"]
857    #[inline(always)]
858    pub fn cfcon(
859        self,
860    ) -> crate::common::RegisterField<
861        3,
862        0x1,
863        1,
864        0,
865        ctsucra::Cfcon,
866        ctsucra::Cfcon,
867        Ctsucra_SPEC,
868        crate::common::RW,
869    > {
870        crate::common::RegisterField::<
871            3,
872            0x1,
873            1,
874            0,
875            ctsucra::Cfcon,
876            ctsucra::Cfcon,
877            Ctsucra_SPEC,
878            crate::common::RW,
879        >::from_register(self, 0)
880    }
881
882    #[doc = "CTSU Control Block Initialization"]
883    #[inline(always)]
884    pub fn init(self) -> crate::common::RegisterFieldBool<4, 1, 0, Ctsucra_SPEC, crate::common::W> {
885        crate::common::RegisterFieldBool::<4, 1, 0, Ctsucra_SPEC, crate::common::W>::from_register(
886            self, 0,
887        )
888    }
889
890    #[doc = "CTSU Boost Circuit Control"]
891    #[inline(always)]
892    pub fn pumpon(
893        self,
894    ) -> crate::common::RegisterField<
895        5,
896        0x1,
897        1,
898        0,
899        ctsucra::Pumpon,
900        ctsucra::Pumpon,
901        Ctsucra_SPEC,
902        crate::common::RW,
903    > {
904        crate::common::RegisterField::<
905            5,
906            0x1,
907            1,
908            0,
909            ctsucra::Pumpon,
910            ctsucra::Pumpon,
911            Ctsucra_SPEC,
912            crate::common::RW,
913        >::from_register(self, 0)
914    }
915
916    #[doc = "CTSU Transmission Power Supply Selection"]
917    #[inline(always)]
918    pub fn txvsel(
919        self,
920    ) -> crate::common::RegisterField<
921        6,
922        0x3,
923        1,
924        0,
925        ctsucra::Txvsel,
926        ctsucra::Txvsel,
927        Ctsucra_SPEC,
928        crate::common::RW,
929    > {
930        crate::common::RegisterField::<
931            6,
932            0x3,
933            1,
934            0,
935            ctsucra::Txvsel,
936            ctsucra::Txvsel,
937            Ctsucra_SPEC,
938            crate::common::RW,
939        >::from_register(self, 0)
940    }
941
942    #[doc = "CTSU Power On Control"]
943    #[inline(always)]
944    pub fn pon(
945        self,
946    ) -> crate::common::RegisterField<
947        8,
948        0x1,
949        1,
950        0,
951        ctsucra::Pon,
952        ctsucra::Pon,
953        Ctsucra_SPEC,
954        crate::common::RW,
955    > {
956        crate::common::RegisterField::<
957            8,
958            0x1,
959            1,
960            0,
961            ctsucra::Pon,
962            ctsucra::Pon,
963            Ctsucra_SPEC,
964            crate::common::RW,
965        >::from_register(self, 0)
966    }
967
968    #[doc = "TSCAP Pin Enable"]
969    #[inline(always)]
970    pub fn csw(
971        self,
972    ) -> crate::common::RegisterField<
973        9,
974        0x1,
975        1,
976        0,
977        ctsucra::Csw,
978        ctsucra::Csw,
979        Ctsucra_SPEC,
980        crate::common::RW,
981    > {
982        crate::common::RegisterField::<
983            9,
984            0x1,
985            1,
986            0,
987            ctsucra::Csw,
988            ctsucra::Csw,
989            Ctsucra_SPEC,
990            crate::common::RW,
991        >::from_register(self, 0)
992    }
993
994    #[doc = "CTSU Power Supply Operating Mode Setting"]
995    #[inline(always)]
996    pub fn atune0(
997        self,
998    ) -> crate::common::RegisterField<
999        10,
1000        0x1,
1001        1,
1002        0,
1003        ctsucra::Atune0,
1004        ctsucra::Atune0,
1005        Ctsucra_SPEC,
1006        crate::common::RW,
1007    > {
1008        crate::common::RegisterField::<
1009            10,
1010            0x1,
1011            1,
1012            0,
1013            ctsucra::Atune0,
1014            ctsucra::Atune0,
1015            Ctsucra_SPEC,
1016            crate::common::RW,
1017        >::from_register(self, 0)
1018    }
1019
1020    #[doc = "CTSU Current Range Adjustment"]
1021    #[inline(always)]
1022    pub fn atune1(
1023        self,
1024    ) -> crate::common::RegisterField<
1025        11,
1026        0x1,
1027        1,
1028        0,
1029        ctsucra::Atune1,
1030        ctsucra::Atune1,
1031        Ctsucra_SPEC,
1032        crate::common::RW,
1033    > {
1034        crate::common::RegisterField::<
1035            11,
1036            0x1,
1037            1,
1038            0,
1039            ctsucra::Atune1,
1040            ctsucra::Atune1,
1041            Ctsucra_SPEC,
1042            crate::common::RW,
1043        >::from_register(self, 0)
1044    }
1045
1046    #[doc = "CTSU Operating Clock Select"]
1047    #[inline(always)]
1048    pub fn clk(
1049        self,
1050    ) -> crate::common::RegisterField<
1051        12,
1052        0x3,
1053        1,
1054        0,
1055        ctsucra::Clk,
1056        ctsucra::Clk,
1057        Ctsucra_SPEC,
1058        crate::common::RW,
1059    > {
1060        crate::common::RegisterField::<
1061            12,
1062            0x3,
1063            1,
1064            0,
1065            ctsucra::Clk,
1066            ctsucra::Clk,
1067            Ctsucra_SPEC,
1068            crate::common::RW,
1069        >::from_register(self, 0)
1070    }
1071
1072    #[doc = "CTSU Measurement Mode Select 0"]
1073    #[inline(always)]
1074    pub fn md0(
1075        self,
1076    ) -> crate::common::RegisterField<
1077        14,
1078        0x1,
1079        1,
1080        0,
1081        ctsucra::Md0,
1082        ctsucra::Md0,
1083        Ctsucra_SPEC,
1084        crate::common::RW,
1085    > {
1086        crate::common::RegisterField::<
1087            14,
1088            0x1,
1089            1,
1090            0,
1091            ctsucra::Md0,
1092            ctsucra::Md0,
1093            Ctsucra_SPEC,
1094            crate::common::RW,
1095        >::from_register(self, 0)
1096    }
1097
1098    #[doc = "CTSU Measurement Mode Select 1"]
1099    #[inline(always)]
1100    pub fn md1(
1101        self,
1102    ) -> crate::common::RegisterField<
1103        15,
1104        0x1,
1105        1,
1106        0,
1107        ctsucra::Md1,
1108        ctsucra::Md1,
1109        Ctsucra_SPEC,
1110        crate::common::RW,
1111    > {
1112        crate::common::RegisterField::<
1113            15,
1114            0x1,
1115            1,
1116            0,
1117            ctsucra::Md1,
1118            ctsucra::Md1,
1119            Ctsucra_SPEC,
1120            crate::common::RW,
1121        >::from_register(self, 0)
1122    }
1123
1124    #[doc = "CTSU Measurement Mode Select 2"]
1125    #[inline(always)]
1126    pub fn md2(
1127        self,
1128    ) -> crate::common::RegisterField<
1129        16,
1130        0x1,
1131        1,
1132        0,
1133        ctsucra::Md2,
1134        ctsucra::Md2,
1135        Ctsucra_SPEC,
1136        crate::common::RW,
1137    > {
1138        crate::common::RegisterField::<
1139            16,
1140            0x1,
1141            1,
1142            0,
1143            ctsucra::Md2,
1144            ctsucra::Md2,
1145            Ctsucra_SPEC,
1146            crate::common::RW,
1147        >::from_register(self, 0)
1148    }
1149
1150    #[doc = "CTSU Current Range Adjustment"]
1151    #[inline(always)]
1152    pub fn atune2(
1153        self,
1154    ) -> crate::common::RegisterField<
1155        17,
1156        0x1,
1157        1,
1158        0,
1159        ctsucra::Atune2,
1160        ctsucra::Atune2,
1161        Ctsucra_SPEC,
1162        crate::common::RW,
1163    > {
1164        crate::common::RegisterField::<
1165            17,
1166            0x1,
1167            1,
1168            0,
1169            ctsucra::Atune2,
1170            ctsucra::Atune2,
1171            Ctsucra_SPEC,
1172            crate::common::RW,
1173        >::from_register(self, 0)
1174    }
1175
1176    #[doc = "CTSU Load Control During Measurement"]
1177    #[inline(always)]
1178    pub fn load(
1179        self,
1180    ) -> crate::common::RegisterField<
1181        18,
1182        0x3,
1183        1,
1184        0,
1185        ctsucra::Load,
1186        ctsucra::Load,
1187        Ctsucra_SPEC,
1188        crate::common::RW,
1189    > {
1190        crate::common::RegisterField::<
1191            18,
1192            0x3,
1193            1,
1194            0,
1195            ctsucra::Load,
1196            ctsucra::Load,
1197            Ctsucra_SPEC,
1198            crate::common::RW,
1199        >::from_register(self, 0)
1200    }
1201
1202    #[doc = "CTSU Non-Measured Channel Output Select"]
1203    #[inline(always)]
1204    pub fn posel(
1205        self,
1206    ) -> crate::common::RegisterField<
1207        20,
1208        0x3,
1209        1,
1210        0,
1211        ctsucra::Posel,
1212        ctsucra::Posel,
1213        Ctsucra_SPEC,
1214        crate::common::RW,
1215    > {
1216        crate::common::RegisterField::<
1217            20,
1218            0x3,
1219            1,
1220            0,
1221            ctsucra::Posel,
1222            ctsucra::Posel,
1223            Ctsucra_SPEC,
1224            crate::common::RW,
1225        >::from_register(self, 0)
1226    }
1227
1228    #[doc = "CTSU Sensor Drive Pulse Select"]
1229    #[inline(always)]
1230    pub fn sdpsel(
1231        self,
1232    ) -> crate::common::RegisterField<
1233        22,
1234        0x1,
1235        1,
1236        0,
1237        ctsucra::Sdpsel,
1238        ctsucra::Sdpsel,
1239        Ctsucra_SPEC,
1240        crate::common::RW,
1241    > {
1242        crate::common::RegisterField::<
1243            22,
1244            0x1,
1245            1,
1246            0,
1247            ctsucra::Sdpsel,
1248            ctsucra::Sdpsel,
1249            Ctsucra_SPEC,
1250            crate::common::RW,
1251        >::from_register(self, 0)
1252    }
1253
1254    #[doc = "CTSU Boost Circuit Clock Select"]
1255    #[inline(always)]
1256    pub fn pcsel(
1257        self,
1258    ) -> crate::common::RegisterField<
1259        23,
1260        0x1,
1261        1,
1262        0,
1263        ctsucra::Pcsel,
1264        ctsucra::Pcsel,
1265        Ctsucra_SPEC,
1266        crate::common::RW,
1267    > {
1268        crate::common::RegisterField::<
1269            23,
1270            0x1,
1271            1,
1272            0,
1273            ctsucra::Pcsel,
1274            ctsucra::Pcsel,
1275            Ctsucra_SPEC,
1276            crate::common::RW,
1277        >::from_register(self, 0)
1278    }
1279
1280    #[doc = "CTSU STCLK Select"]
1281    #[inline(always)]
1282    pub fn stclk(
1283        self,
1284    ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Ctsucra_SPEC, crate::common::RW> {
1285        crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Ctsucra_SPEC,crate::common::RW>::from_register(self,0)
1286    }
1287
1288    #[doc = "CTSU Current Measurement Mode Select"]
1289    #[inline(always)]
1290    pub fn dcmode(
1291        self,
1292    ) -> crate::common::RegisterField<
1293        30,
1294        0x1,
1295        1,
1296        0,
1297        ctsucra::Dcmode,
1298        ctsucra::Dcmode,
1299        Ctsucra_SPEC,
1300        crate::common::RW,
1301    > {
1302        crate::common::RegisterField::<
1303            30,
1304            0x1,
1305            1,
1306            0,
1307            ctsucra::Dcmode,
1308            ctsucra::Dcmode,
1309            Ctsucra_SPEC,
1310            crate::common::RW,
1311        >::from_register(self, 0)
1312    }
1313
1314    #[doc = "CTSU Current Measurement Feedback Select"]
1315    #[inline(always)]
1316    pub fn dcback(
1317        self,
1318    ) -> crate::common::RegisterField<
1319        31,
1320        0x1,
1321        1,
1322        0,
1323        ctsucra::Dcback,
1324        ctsucra::Dcback,
1325        Ctsucra_SPEC,
1326        crate::common::RW,
1327    > {
1328        crate::common::RegisterField::<
1329            31,
1330            0x1,
1331            1,
1332            0,
1333            ctsucra::Dcback,
1334            ctsucra::Dcback,
1335            Ctsucra_SPEC,
1336            crate::common::RW,
1337        >::from_register(self, 0)
1338    }
1339}
1340impl ::core::default::Default for Ctsucra {
1341    #[inline(always)]
1342    fn default() -> Ctsucra {
1343        <crate::RegValueT<Ctsucra_SPEC> as RegisterValue<_>>::new(0)
1344    }
1345}
1346pub mod ctsucra {
1347
1348    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1349    pub struct Strt_SPEC;
1350    pub type Strt = crate::EnumBitfieldStruct<u8, Strt_SPEC>;
1351    impl Strt {
1352        #[doc = "Stop measurement operation"]
1353        pub const _0: Self = Self::new(0);
1354
1355        #[doc = "Start measurement operation"]
1356        pub const _1: Self = Self::new(1);
1357    }
1358    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1359    pub struct Cap_SPEC;
1360    pub type Cap = crate::EnumBitfieldStruct<u8, Cap_SPEC>;
1361    impl Cap {
1362        #[doc = "Software trigger"]
1363        pub const _0: Self = Self::new(0);
1364
1365        #[doc = "External trigger"]
1366        pub const _1: Self = Self::new(1);
1367    }
1368    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1369    pub struct Snz_SPEC;
1370    pub type Snz = crate::EnumBitfieldStruct<u8, Snz_SPEC>;
1371    impl Snz {
1372        #[doc = "Disable power-saving function during wait state"]
1373        pub const _0: Self = Self::new(0);
1374
1375        #[doc = "Enable power-saving function during wait state"]
1376        pub const _1: Self = Self::new(1);
1377    }
1378    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1379    pub struct Cfcon_SPEC;
1380    pub type Cfcon = crate::EnumBitfieldStruct<u8, Cfcon_SPEC>;
1381    impl Cfcon {
1382        #[doc = "CFC power off"]
1383        pub const _0: Self = Self::new(0);
1384
1385        #[doc = "CFC power on"]
1386        pub const _1: Self = Self::new(1);
1387    }
1388    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1389    pub struct Pumpon_SPEC;
1390    pub type Pumpon = crate::EnumBitfieldStruct<u8, Pumpon_SPEC>;
1391    impl Pumpon {
1392        #[doc = "Boost circuit off"]
1393        pub const _0: Self = Self::new(0);
1394
1395        #[doc = "Boost circuit on"]
1396        pub const _1: Self = Self::new(1);
1397    }
1398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1399    pub struct Txvsel_SPEC;
1400    pub type Txvsel = crate::EnumBitfieldStruct<u8, Txvsel_SPEC>;
1401    impl Txvsel {
1402        #[doc = "Selecting VCC as the power supply for the transmit pins of mutual capacitance method."]
1403        pub const _00: Self = Self::new(0);
1404
1405        #[doc = "Selecting VCC as the power supply for the transmit pins of the mutual capacitance method. In addition, noise is reduced during GPIO operation. (Recommended)"]
1406        pub const _01: Self = Self::new(1);
1407
1408        #[doc = "Select VCC as the power source for the transmitter pins used as the active shield."]
1409        pub const _10: Self = Self::new(2);
1410
1411        #[doc = "Setting prohibited"]
1412        pub const _11: Self = Self::new(3);
1413    }
1414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1415    pub struct Pon_SPEC;
1416    pub type Pon = crate::EnumBitfieldStruct<u8, Pon_SPEC>;
1417    impl Pon {
1418        #[doc = "Power off the CTSU"]
1419        pub const _0: Self = Self::new(0);
1420
1421        #[doc = "Power on the CTSU"]
1422        pub const _1: Self = Self::new(1);
1423    }
1424    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1425    pub struct Csw_SPEC;
1426    pub type Csw = crate::EnumBitfieldStruct<u8, Csw_SPEC>;
1427    impl Csw {
1428        #[doc = "Disable"]
1429        pub const _0: Self = Self::new(0);
1430
1431        #[doc = "Enable"]
1432        pub const _1: Self = Self::new(1);
1433    }
1434    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1435    pub struct Atune0_SPEC;
1436    pub type Atune0 = crate::EnumBitfieldStruct<u8, Atune0_SPEC>;
1437    impl Atune0 {
1438        #[doc = "VCC ≥ 2.4 V: Normal voltage operating mode VCC < 2.4 V: Setting prohibited"]
1439        pub const _0: Self = Self::new(0);
1440
1441        #[doc = "Low-voltage operating mode"]
1442        pub const _1: Self = Self::new(1);
1443    }
1444    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1445    pub struct Atune1_SPEC;
1446    pub type Atune1 = crate::EnumBitfieldStruct<u8, Atune1_SPEC>;
1447    impl Atune1 {
1448        #[doc = "80 µA when ATUNE2 = 0 20 µA when ATUNE2 = 1"]
1449        pub const _0: Self = Self::new(0);
1450
1451        #[doc = "40 µA when ATUNE2 = 0 160 µA when ATUNE2 = 1"]
1452        pub const _1: Self = Self::new(1);
1453    }
1454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1455    pub struct Clk_SPEC;
1456    pub type Clk = crate::EnumBitfieldStruct<u8, Clk_SPEC>;
1457    impl Clk {
1458        #[doc = "PCLKB"]
1459        pub const _00: Self = Self::new(0);
1460
1461        #[doc = "PCLKB/2 (PCLKB divided by 2)"]
1462        pub const _01: Self = Self::new(1);
1463
1464        #[doc = "PCLKB/4 (PCLKB divided by 4)"]
1465        pub const _10: Self = Self::new(2);
1466
1467        #[doc = "PCLKB/8 (PCLKB divided by 8)"]
1468        pub const _11: Self = Self::new(3);
1469    }
1470    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1471    pub struct Md0_SPEC;
1472    pub type Md0 = crate::EnumBitfieldStruct<u8, Md0_SPEC>;
1473    impl Md0 {
1474        #[doc = "Single scan mode"]
1475        pub const _0: Self = Self::new(0);
1476
1477        #[doc = "Multi-scan mode"]
1478        pub const _1: Self = Self::new(1);
1479    }
1480    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1481    pub struct Md1_SPEC;
1482    pub type Md1 = crate::EnumBitfieldStruct<u8, Md1_SPEC>;
1483    impl Md1 {
1484        #[doc = "One-time measurement (self-capacitance method)"]
1485        pub const _0: Self = Self::new(0);
1486
1487        #[doc = "Two times measurement (mutual capacitance method)"]
1488        pub const _1: Self = Self::new(1);
1489    }
1490    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1491    pub struct Md2_SPEC;
1492    pub type Md2 = crate::EnumBitfieldStruct<u8, Md2_SPEC>;
1493    impl Md2 {
1494        #[doc = "Measure the switched capacitor current and the DC current"]
1495        pub const _0: Self = Self::new(0);
1496
1497        #[doc = "Measure the charge transfer by CFC circuit (parallel measurement)"]
1498        pub const _1: Self = Self::new(1);
1499    }
1500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1501    pub struct Atune2_SPEC;
1502    pub type Atune2 = crate::EnumBitfieldStruct<u8, Atune2_SPEC>;
1503    impl Atune2 {
1504        #[doc = "80 µA when ATUNE1 = 0 40 µA when ATUNE1 = 1"]
1505        pub const _0: Self = Self::new(0);
1506
1507        #[doc = "20 µA when ATUNE1 = 0 160 µA when ATUNE1 = 1"]
1508        pub const _1: Self = Self::new(1);
1509    }
1510    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1511    pub struct Load_SPEC;
1512    pub type Load = crate::EnumBitfieldStruct<u8, Load_SPEC>;
1513    impl Load {
1514        #[doc = "2.5 µA constant current load"]
1515        pub const _00: Self = Self::new(0);
1516
1517        #[doc = "No load"]
1518        pub const _01: Self = Self::new(1);
1519
1520        #[doc = "20 µA constant current load and overcurrent detector disabled"]
1521        pub const _10: Self = Self::new(2);
1522
1523        #[doc = "Resistance load for calibration. To set LOAD\\[1:0\\] bits to resistance load for calibration, set these bits to 10b before they are set to 11b."]
1524        pub const _11: Self = Self::new(3);
1525    }
1526    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1527    pub struct Posel_SPEC;
1528    pub type Posel = crate::EnumBitfieldStruct<u8, Posel_SPEC>;
1529    impl Posel {
1530        #[doc = "Output low"]
1531        pub const _00: Self = Self::new(0);
1532
1533        #[doc = "Hi-Z"]
1534        pub const _01: Self = Self::new(1);
1535
1536        #[doc = "Setting prohibited"]
1537        pub const _10: Self = Self::new(2);
1538
1539        #[doc = "Output a pulse in phase with the transmit channel"]
1540        pub const _11: Self = Self::new(3);
1541    }
1542    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1543    pub struct Sdpsel_SPEC;
1544    pub type Sdpsel = crate::EnumBitfieldStruct<u8, Sdpsel_SPEC>;
1545    impl Sdpsel {
1546        #[doc = "Random pulse"]
1547        pub const _0: Self = Self::new(0);
1548
1549        #[doc = "Normal pulse using the sensor unit clock"]
1550        pub const _1: Self = Self::new(1);
1551    }
1552    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1553    pub struct Pcsel_SPEC;
1554    pub type Pcsel = crate::EnumBitfieldStruct<u8, Pcsel_SPEC>;
1555    impl Pcsel {
1556        #[doc = "Sensor drive pulse divided by 2"]
1557        pub const _0: Self = Self::new(0);
1558
1559        #[doc = "STCLK"]
1560        pub const _1: Self = Self::new(1);
1561    }
1562    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1563    pub struct Dcmode_SPEC;
1564    pub type Dcmode = crate::EnumBitfieldStruct<u8, Dcmode_SPEC>;
1565    impl Dcmode {
1566        #[doc = "Electrostatic capacitance measurement mode"]
1567        pub const _0: Self = Self::new(0);
1568
1569        #[doc = "Current measurement mode"]
1570        pub const _1: Self = Self::new(1);
1571    }
1572    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1573    pub struct Dcback_SPEC;
1574    pub type Dcback = crate::EnumBitfieldStruct<u8, Dcback_SPEC>;
1575    impl Dcback {
1576        #[doc = "TSCAP pin is selected"]
1577        pub const _0: Self = Self::new(0);
1578
1579        #[doc = "Measurement pin is selected. It is recommended in the current measurement mode."]
1580        pub const _1: Self = Self::new(1);
1581    }
1582}
1583#[doc(hidden)]
1584#[derive(Copy, Clone, Eq, PartialEq)]
1585pub struct Ctsucral_SPEC;
1586impl crate::sealed::RegSpec for Ctsucral_SPEC {
1587    type DataType = u16;
1588}
1589
1590#[doc = "CTSU Control Register A"]
1591pub type Ctsucral = crate::RegValueT<Ctsucral_SPEC>;
1592
1593impl NoBitfieldReg<Ctsucral_SPEC> for Ctsucral {}
1594impl ::core::default::Default for Ctsucral {
1595    #[inline(always)]
1596    fn default() -> Ctsucral {
1597        <crate::RegValueT<Ctsucral_SPEC> as RegisterValue<_>>::new(0)
1598    }
1599}
1600
1601#[doc(hidden)]
1602#[derive(Copy, Clone, Eq, PartialEq)]
1603pub struct Ctsucr0_SPEC;
1604impl crate::sealed::RegSpec for Ctsucr0_SPEC {
1605    type DataType = u8;
1606}
1607
1608#[doc = "CTSU Control Register A"]
1609pub type Ctsucr0 = crate::RegValueT<Ctsucr0_SPEC>;
1610
1611impl NoBitfieldReg<Ctsucr0_SPEC> for Ctsucr0 {}
1612impl ::core::default::Default for Ctsucr0 {
1613    #[inline(always)]
1614    fn default() -> Ctsucr0 {
1615        <crate::RegValueT<Ctsucr0_SPEC> as RegisterValue<_>>::new(0)
1616    }
1617}
1618
1619#[doc(hidden)]
1620#[derive(Copy, Clone, Eq, PartialEq)]
1621pub struct Ctsucr1_SPEC;
1622impl crate::sealed::RegSpec for Ctsucr1_SPEC {
1623    type DataType = u8;
1624}
1625
1626#[doc = "CTSU Control Register A"]
1627pub type Ctsucr1 = crate::RegValueT<Ctsucr1_SPEC>;
1628
1629impl NoBitfieldReg<Ctsucr1_SPEC> for Ctsucr1 {}
1630impl ::core::default::Default for Ctsucr1 {
1631    #[inline(always)]
1632    fn default() -> Ctsucr1 {
1633        <crate::RegValueT<Ctsucr1_SPEC> as RegisterValue<_>>::new(0)
1634    }
1635}
1636
1637#[doc(hidden)]
1638#[derive(Copy, Clone, Eq, PartialEq)]
1639pub struct Ctsucrah_SPEC;
1640impl crate::sealed::RegSpec for Ctsucrah_SPEC {
1641    type DataType = u16;
1642}
1643
1644#[doc = "CTSU Control Register A"]
1645pub type Ctsucrah = crate::RegValueT<Ctsucrah_SPEC>;
1646
1647impl NoBitfieldReg<Ctsucrah_SPEC> for Ctsucrah {}
1648impl ::core::default::Default for Ctsucrah {
1649    #[inline(always)]
1650    fn default() -> Ctsucrah {
1651        <crate::RegValueT<Ctsucrah_SPEC> as RegisterValue<_>>::new(0)
1652    }
1653}
1654
1655#[doc(hidden)]
1656#[derive(Copy, Clone, Eq, PartialEq)]
1657pub struct Ctsucr2_SPEC;
1658impl crate::sealed::RegSpec for Ctsucr2_SPEC {
1659    type DataType = u8;
1660}
1661
1662#[doc = "CTSU Control Register A"]
1663pub type Ctsucr2 = crate::RegValueT<Ctsucr2_SPEC>;
1664
1665impl NoBitfieldReg<Ctsucr2_SPEC> for Ctsucr2 {}
1666impl ::core::default::Default for Ctsucr2 {
1667    #[inline(always)]
1668    fn default() -> Ctsucr2 {
1669        <crate::RegValueT<Ctsucr2_SPEC> as RegisterValue<_>>::new(0)
1670    }
1671}
1672
1673#[doc(hidden)]
1674#[derive(Copy, Clone, Eq, PartialEq)]
1675pub struct Ctsucr3_SPEC;
1676impl crate::sealed::RegSpec for Ctsucr3_SPEC {
1677    type DataType = u8;
1678}
1679
1680#[doc = "CTSU Control Register A"]
1681pub type Ctsucr3 = crate::RegValueT<Ctsucr3_SPEC>;
1682
1683impl NoBitfieldReg<Ctsucr3_SPEC> for Ctsucr3 {}
1684impl ::core::default::Default for Ctsucr3 {
1685    #[inline(always)]
1686    fn default() -> Ctsucr3 {
1687        <crate::RegValueT<Ctsucr3_SPEC> as RegisterValue<_>>::new(0)
1688    }
1689}
1690
1691#[doc(hidden)]
1692#[derive(Copy, Clone, Eq, PartialEq)]
1693pub struct Ctsucrb_SPEC;
1694impl crate::sealed::RegSpec for Ctsucrb_SPEC {
1695    type DataType = u32;
1696}
1697
1698#[doc = "CTSU Control Register B"]
1699pub type Ctsucrb = crate::RegValueT<Ctsucrb_SPEC>;
1700
1701impl Ctsucrb {
1702    #[doc = "Frequency of Drive Pulse Phase Control"]
1703    #[inline(always)]
1704    pub fn prratio(
1705        self,
1706    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Ctsucrb_SPEC, crate::common::RW> {
1707        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Ctsucrb_SPEC,crate::common::RW>::from_register(self,0)
1708    }
1709
1710    #[doc = "Phase Control Period"]
1711    #[inline(always)]
1712    pub fn prmode(
1713        self,
1714    ) -> crate::common::RegisterField<
1715        4,
1716        0x3,
1717        1,
1718        0,
1719        ctsucrb::Prmode,
1720        ctsucrb::Prmode,
1721        Ctsucrb_SPEC,
1722        crate::common::RW,
1723    > {
1724        crate::common::RegisterField::<
1725            4,
1726            0x3,
1727            1,
1728            0,
1729            ctsucrb::Prmode,
1730            ctsucrb::Prmode,
1731            Ctsucrb_SPEC,
1732            crate::common::RW,
1733        >::from_register(self, 0)
1734    }
1735
1736    #[doc = "High-Pass Noise Reduction Function Disable"]
1737    #[inline(always)]
1738    pub fn soff(
1739        self,
1740    ) -> crate::common::RegisterField<
1741        6,
1742        0x1,
1743        1,
1744        0,
1745        ctsucrb::Soff,
1746        ctsucrb::Soff,
1747        Ctsucrb_SPEC,
1748        crate::common::RW,
1749    > {
1750        crate::common::RegisterField::<
1751            6,
1752            0x1,
1753            1,
1754            0,
1755            ctsucrb::Soff,
1756            ctsucrb::Soff,
1757            Ctsucrb_SPEC,
1758            crate::common::RW,
1759        >::from_register(self, 0)
1760    }
1761
1762    #[doc = "Drive Pulse Phase Control"]
1763    #[inline(always)]
1764    pub fn proff(
1765        self,
1766    ) -> crate::common::RegisterField<
1767        7,
1768        0x1,
1769        1,
1770        0,
1771        ctsucrb::Proff,
1772        ctsucrb::Proff,
1773        Ctsucrb_SPEC,
1774        crate::common::RW,
1775    > {
1776        crate::common::RegisterField::<
1777            7,
1778            0x1,
1779            1,
1780            0,
1781            ctsucrb::Proff,
1782            ctsucrb::Proff,
1783            Ctsucrb_SPEC,
1784            crate::common::RW,
1785        >::from_register(self, 0)
1786    }
1787
1788    #[doc = "Wait Time Sensor Stabilization"]
1789    #[inline(always)]
1790    pub fn sst(
1791        self,
1792    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ctsucrb_SPEC, crate::common::RW> {
1793        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ctsucrb_SPEC,crate::common::RW>::from_register(self,0)
1794    }
1795
1796    #[doc = "Spread Spectrum Modulation Frequency"]
1797    #[inline(always)]
1798    pub fn ssmod(
1799        self,
1800    ) -> crate::common::RegisterField<
1801        24,
1802        0x7,
1803        1,
1804        0,
1805        ctsucrb::Ssmod,
1806        ctsucrb::Ssmod,
1807        Ctsucrb_SPEC,
1808        crate::common::RW,
1809    > {
1810        crate::common::RegisterField::<
1811            24,
1812            0x7,
1813            1,
1814            0,
1815            ctsucrb::Ssmod,
1816            ctsucrb::Ssmod,
1817            Ctsucrb_SPEC,
1818            crate::common::RW,
1819        >::from_register(self, 0)
1820    }
1821
1822    #[doc = "Adjusting the SUCLK frequency"]
1823    #[inline(always)]
1824    pub fn sscnt(
1825        self,
1826    ) -> crate::common::RegisterField<
1827        28,
1828        0x3,
1829        1,
1830        0,
1831        ctsucrb::Sscnt,
1832        ctsucrb::Sscnt,
1833        Ctsucrb_SPEC,
1834        crate::common::RW,
1835    > {
1836        crate::common::RegisterField::<
1837            28,
1838            0x3,
1839            1,
1840            0,
1841            ctsucrb::Sscnt,
1842            ctsucrb::Sscnt,
1843            Ctsucrb_SPEC,
1844            crate::common::RW,
1845        >::from_register(self, 0)
1846    }
1847}
1848impl ::core::default::Default for Ctsucrb {
1849    #[inline(always)]
1850    fn default() -> Ctsucrb {
1851        <crate::RegValueT<Ctsucrb_SPEC> as RegisterValue<_>>::new(0)
1852    }
1853}
1854pub mod ctsucrb {
1855
1856    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1857    pub struct Prmode_SPEC;
1858    pub type Prmode = crate::EnumBitfieldStruct<u8, Prmode_SPEC>;
1859    impl Prmode {
1860        #[doc = "510 pulses (512 pulses when PROFF = 1)"]
1861        pub const _00: Self = Self::new(0);
1862
1863        #[doc = "126 pulses (128 pulses when PROFF = 1)"]
1864        pub const _01: Self = Self::new(1);
1865
1866        #[doc = "62 pulses (64 pulses when PROFF = 1)"]
1867        pub const _10: Self = Self::new(2);
1868
1869        #[doc = "Setting prohibited"]
1870        pub const _11: Self = Self::new(3);
1871    }
1872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1873    pub struct Soff_SPEC;
1874    pub type Soff = crate::EnumBitfieldStruct<u8, Soff_SPEC>;
1875    impl Soff {
1876        #[doc = "Turn the spread spectrum on"]
1877        pub const _0: Self = Self::new(0);
1878
1879        #[doc = "Turn the spread spectrum off"]
1880        pub const _1: Self = Self::new(1);
1881    }
1882    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1883    pub struct Proff_SPEC;
1884    pub type Proff = crate::EnumBitfieldStruct<u8, Proff_SPEC>;
1885    impl Proff {
1886        #[doc = "The drive pulse phase is controlled by random numbers."]
1887        pub const _0: Self = Self::new(0);
1888
1889        #[doc = "The drive pulse phase is not controlled by random numbers."]
1890        pub const _1: Self = Self::new(1);
1891    }
1892    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1893    pub struct Ssmod_SPEC;
1894    pub type Ssmod = crate::EnumBitfieldStruct<u8, Ssmod_SPEC>;
1895    impl Ssmod {
1896        #[doc = "125 kHz (recommended)"]
1897        pub const _000: Self = Self::new(0);
1898
1899        #[doc = "83.3 kHz"]
1900        pub const _001: Self = Self::new(1);
1901
1902        #[doc = "62.5 kHz"]
1903        pub const _010: Self = Self::new(2);
1904
1905        #[doc = "31.3 kHz"]
1906        pub const _011: Self = Self::new(3);
1907    }
1908    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1909    pub struct Sscnt_SPEC;
1910    pub type Sscnt = crate::EnumBitfieldStruct<u8, Sscnt_SPEC>;
1911    impl Sscnt {
1912        #[doc = "CTSUTRIMA.SUADJD + 0x00 (SDPSEL = 0) CTSUSUCLKx.SUADJDn + 0x00 (SDPSEL = 1)"]
1913        pub const _00: Self = Self::new(0);
1914
1915        #[doc = "CTSUTRIMA.SUADJD + 0x10 (SDPSEL = 0) CTSUSUCLKx.SUADJDn + 0x20 (SDPSEL = 1)"]
1916        pub const _01: Self = Self::new(1);
1917
1918        #[doc = "CTSUTRIMA.SUADJD + 0x20 (SDPSEL = 0) CTSUSUCLKx.SUADJDn + 0x40 (SDPSEL = 1)"]
1919        pub const _10: Self = Self::new(2);
1920
1921        #[doc = "CTSUTRIMA.SUADJD + 0x30 (SDPSEL = 0) CTSUSUCLKx.SUADJDn + 0x40 (SDPSEL = 1)"]
1922        pub const _11: Self = Self::new(3);
1923    }
1924}
1925#[doc(hidden)]
1926#[derive(Copy, Clone, Eq, PartialEq)]
1927pub struct Ctsucrbl_SPEC;
1928impl crate::sealed::RegSpec for Ctsucrbl_SPEC {
1929    type DataType = u16;
1930}
1931
1932#[doc = "CTSU Control Register B"]
1933pub type Ctsucrbl = crate::RegValueT<Ctsucrbl_SPEC>;
1934
1935impl NoBitfieldReg<Ctsucrbl_SPEC> for Ctsucrbl {}
1936impl ::core::default::Default for Ctsucrbl {
1937    #[inline(always)]
1938    fn default() -> Ctsucrbl {
1939        <crate::RegValueT<Ctsucrbl_SPEC> as RegisterValue<_>>::new(0)
1940    }
1941}
1942
1943#[doc(hidden)]
1944#[derive(Copy, Clone, Eq, PartialEq)]
1945pub struct Ctsusdprs_SPEC;
1946impl crate::sealed::RegSpec for Ctsusdprs_SPEC {
1947    type DataType = u8;
1948}
1949
1950#[doc = "CTSU Control Register B"]
1951pub type Ctsusdprs = crate::RegValueT<Ctsusdprs_SPEC>;
1952
1953impl NoBitfieldReg<Ctsusdprs_SPEC> for Ctsusdprs {}
1954impl ::core::default::Default for Ctsusdprs {
1955    #[inline(always)]
1956    fn default() -> Ctsusdprs {
1957        <crate::RegValueT<Ctsusdprs_SPEC> as RegisterValue<_>>::new(0)
1958    }
1959}
1960
1961#[doc(hidden)]
1962#[derive(Copy, Clone, Eq, PartialEq)]
1963pub struct Ctsusst_SPEC;
1964impl crate::sealed::RegSpec for Ctsusst_SPEC {
1965    type DataType = u8;
1966}
1967
1968#[doc = "CTSU Control Register B"]
1969pub type Ctsusst = crate::RegValueT<Ctsusst_SPEC>;
1970
1971impl NoBitfieldReg<Ctsusst_SPEC> for Ctsusst {}
1972impl ::core::default::Default for Ctsusst {
1973    #[inline(always)]
1974    fn default() -> Ctsusst {
1975        <crate::RegValueT<Ctsusst_SPEC> as RegisterValue<_>>::new(0)
1976    }
1977}
1978
1979#[doc(hidden)]
1980#[derive(Copy, Clone, Eq, PartialEq)]
1981pub struct Ctsucrbh_SPEC;
1982impl crate::sealed::RegSpec for Ctsucrbh_SPEC {
1983    type DataType = u16;
1984}
1985
1986#[doc = "CTSU Control Register B"]
1987pub type Ctsucrbh = crate::RegValueT<Ctsucrbh_SPEC>;
1988
1989impl NoBitfieldReg<Ctsucrbh_SPEC> for Ctsucrbh {}
1990impl ::core::default::Default for Ctsucrbh {
1991    #[inline(always)]
1992    fn default() -> Ctsucrbh {
1993        <crate::RegValueT<Ctsucrbh_SPEC> as RegisterValue<_>>::new(0)
1994    }
1995}
1996
1997#[doc(hidden)]
1998#[derive(Copy, Clone, Eq, PartialEq)]
1999pub struct Ctsudclkc_SPEC;
2000impl crate::sealed::RegSpec for Ctsudclkc_SPEC {
2001    type DataType = u8;
2002}
2003
2004#[doc = "CTSU Control Register B"]
2005pub type Ctsudclkc = crate::RegValueT<Ctsudclkc_SPEC>;
2006
2007impl NoBitfieldReg<Ctsudclkc_SPEC> for Ctsudclkc {}
2008impl ::core::default::Default for Ctsudclkc {
2009    #[inline(always)]
2010    fn default() -> Ctsudclkc {
2011        <crate::RegValueT<Ctsudclkc_SPEC> as RegisterValue<_>>::new(0)
2012    }
2013}
2014
2015#[doc(hidden)]
2016#[derive(Copy, Clone, Eq, PartialEq)]
2017pub struct Ctsumch_SPEC;
2018impl crate::sealed::RegSpec for Ctsumch_SPEC {
2019    type DataType = u32;
2020}
2021
2022#[doc = "CTSU Measurement Channel Register"]
2023pub type Ctsumch = crate::RegValueT<Ctsumch_SPEC>;
2024
2025impl Ctsumch {
2026    #[doc = "CTSU Measurement Channel 0"]
2027    #[inline(always)]
2028    pub fn mch0(
2029        self,
2030    ) -> crate::common::RegisterField<
2031        0,
2032        0x3f,
2033        1,
2034        0,
2035        ctsumch::Mch0,
2036        ctsumch::Mch0,
2037        Ctsumch_SPEC,
2038        crate::common::RW,
2039    > {
2040        crate::common::RegisterField::<
2041            0,
2042            0x3f,
2043            1,
2044            0,
2045            ctsumch::Mch0,
2046            ctsumch::Mch0,
2047            Ctsumch_SPEC,
2048            crate::common::RW,
2049        >::from_register(self, 0)
2050    }
2051
2052    #[doc = "CTSU Measurement Channel 1"]
2053    #[inline(always)]
2054    pub fn mch1(
2055        self,
2056    ) -> crate::common::RegisterField<
2057        8,
2058        0x3f,
2059        1,
2060        0,
2061        ctsumch::Mch1,
2062        ctsumch::Mch1,
2063        Ctsumch_SPEC,
2064        crate::common::RW,
2065    > {
2066        crate::common::RegisterField::<
2067            8,
2068            0x3f,
2069            1,
2070            0,
2071            ctsumch::Mch1,
2072            ctsumch::Mch1,
2073            Ctsumch_SPEC,
2074            crate::common::RW,
2075        >::from_register(self, 0)
2076    }
2077
2078    #[doc = "Multiple Clocks Control"]
2079    #[inline(always)]
2080    pub fn mca0(
2081        self,
2082    ) -> crate::common::RegisterField<
2083        16,
2084        0x1,
2085        1,
2086        0,
2087        ctsumch::Mca0,
2088        ctsumch::Mca0,
2089        Ctsumch_SPEC,
2090        crate::common::RW,
2091    > {
2092        crate::common::RegisterField::<
2093            16,
2094            0x1,
2095            1,
2096            0,
2097            ctsumch::Mca0,
2098            ctsumch::Mca0,
2099            Ctsumch_SPEC,
2100            crate::common::RW,
2101        >::from_register(self, 0)
2102    }
2103
2104    #[doc = "Multiple Clocks Control"]
2105    #[inline(always)]
2106    pub fn mca1(
2107        self,
2108    ) -> crate::common::RegisterField<
2109        17,
2110        0x1,
2111        1,
2112        0,
2113        ctsumch::Mca1,
2114        ctsumch::Mca1,
2115        Ctsumch_SPEC,
2116        crate::common::RW,
2117    > {
2118        crate::common::RegisterField::<
2119            17,
2120            0x1,
2121            1,
2122            0,
2123            ctsumch::Mca1,
2124            ctsumch::Mca1,
2125            Ctsumch_SPEC,
2126            crate::common::RW,
2127        >::from_register(self, 0)
2128    }
2129
2130    #[doc = "Multiple Clocks Control"]
2131    #[inline(always)]
2132    pub fn mca2(
2133        self,
2134    ) -> crate::common::RegisterField<
2135        18,
2136        0x1,
2137        1,
2138        0,
2139        ctsumch::Mca2,
2140        ctsumch::Mca2,
2141        Ctsumch_SPEC,
2142        crate::common::RW,
2143    > {
2144        crate::common::RegisterField::<
2145            18,
2146            0x1,
2147            1,
2148            0,
2149            ctsumch::Mca2,
2150            ctsumch::Mca2,
2151            Ctsumch_SPEC,
2152            crate::common::RW,
2153        >::from_register(self, 0)
2154    }
2155
2156    #[doc = "Multiple Clocks Control"]
2157    #[inline(always)]
2158    pub fn mca3(
2159        self,
2160    ) -> crate::common::RegisterField<
2161        19,
2162        0x1,
2163        1,
2164        0,
2165        ctsumch::Mca3,
2166        ctsumch::Mca3,
2167        Ctsumch_SPEC,
2168        crate::common::RW,
2169    > {
2170        crate::common::RegisterField::<
2171            19,
2172            0x1,
2173            1,
2174            0,
2175            ctsumch::Mca3,
2176            ctsumch::Mca3,
2177            Ctsumch_SPEC,
2178            crate::common::RW,
2179        >::from_register(self, 0)
2180    }
2181}
2182impl ::core::default::Default for Ctsumch {
2183    #[inline(always)]
2184    fn default() -> Ctsumch {
2185        <crate::RegValueT<Ctsumch_SPEC> as RegisterValue<_>>::new(16191)
2186    }
2187}
2188pub mod ctsumch {
2189
2190    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2191    pub struct Mch0_SPEC;
2192    pub type Mch0 = crate::EnumBitfieldStruct<u8, Mch0_SPEC>;
2193    impl Mch0 {
2194        #[doc = "TS00"]
2195        pub const _0_X_00: Self = Self::new(0);
2196
2197        #[doc = "TS02"]
2198        pub const _0_X_02: Self = Self::new(2);
2199
2200        #[doc = "TS04"]
2201        pub const _0_X_04: Self = Self::new(4);
2202
2203        #[doc = "TS05"]
2204        pub const _0_X_05: Self = Self::new(5);
2205
2206        #[doc = "TS06"]
2207        pub const _0_X_06: Self = Self::new(6);
2208
2209        #[doc = "TS07"]
2210        pub const _0_X_07: Self = Self::new(7);
2211
2212        #[doc = "TS08"]
2213        pub const _0_X_08: Self = Self::new(8);
2214
2215        #[doc = "TS09"]
2216        pub const _0_X_09: Self = Self::new(9);
2217
2218        #[doc = "TS10"]
2219        pub const _0_X_0_A: Self = Self::new(10);
2220
2221        #[doc = "TS11"]
2222        pub const _0_X_0_B: Self = Self::new(11);
2223
2224        #[doc = "TS12"]
2225        pub const _0_X_0_C: Self = Self::new(12);
2226
2227        #[doc = "TS13"]
2228        pub const _0_X_0_D: Self = Self::new(13);
2229
2230        #[doc = "TS14"]
2231        pub const _0_X_0_E: Self = Self::new(14);
2232
2233        #[doc = "TS15"]
2234        pub const _0_X_0_F: Self = Self::new(15);
2235
2236        #[doc = "TS16"]
2237        pub const _0_X_10: Self = Self::new(16);
2238
2239        #[doc = "TS17"]
2240        pub const _0_X_11: Self = Self::new(17);
2241
2242        #[doc = "TS18"]
2243        pub const _0_X_12: Self = Self::new(18);
2244
2245        #[doc = "TS21"]
2246        pub const _0_X_15: Self = Self::new(21);
2247
2248        #[doc = "TS22"]
2249        pub const _0_X_16: Self = Self::new(22);
2250
2251        #[doc = "TS23"]
2252        pub const _0_X_17: Self = Self::new(23);
2253
2254        #[doc = "TS24"]
2255        pub const _0_X_18: Self = Self::new(24);
2256
2257        #[doc = "TS25"]
2258        pub const _0_X_19: Self = Self::new(25);
2259
2260        #[doc = "TS26"]
2261        pub const _0_X_1_A: Self = Self::new(26);
2262
2263        #[doc = "TS27"]
2264        pub const _0_X_1_B: Self = Self::new(27);
2265
2266        #[doc = "TS28"]
2267        pub const _0_X_1_C: Self = Self::new(28);
2268
2269        #[doc = "TS29"]
2270        pub const _0_X_1_D: Self = Self::new(29);
2271
2272        #[doc = "TS30"]
2273        pub const _0_X_1_E: Self = Self::new(30);
2274
2275        #[doc = "TS31"]
2276        pub const _0_X_1_F: Self = Self::new(31);
2277
2278        #[doc = "TS32"]
2279        pub const _0_X_20: Self = Self::new(32);
2280
2281        #[doc = "TS33"]
2282        pub const _0_X_21: Self = Self::new(33);
2283
2284        #[doc = "TS34"]
2285        pub const _0_X_22: Self = Self::new(34);
2286
2287        #[doc = "TS35"]
2288        pub const _0_X_23: Self = Self::new(35);
2289
2290        #[doc = "Measurement is being stopped."]
2291        pub const _0_X_3_F: Self = Self::new(63);
2292    }
2293    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2294    pub struct Mch1_SPEC;
2295    pub type Mch1 = crate::EnumBitfieldStruct<u8, Mch1_SPEC>;
2296    impl Mch1 {
2297        #[doc = "TS00"]
2298        pub const _0_X_00: Self = Self::new(0);
2299
2300        #[doc = "TS02"]
2301        pub const _0_X_02: Self = Self::new(2);
2302
2303        #[doc = "TS04"]
2304        pub const _0_X_04: Self = Self::new(4);
2305
2306        #[doc = "TS05"]
2307        pub const _0_X_05: Self = Self::new(5);
2308
2309        #[doc = "TS06"]
2310        pub const _0_X_06: Self = Self::new(6);
2311
2312        #[doc = "TS07"]
2313        pub const _0_X_07: Self = Self::new(7);
2314
2315        #[doc = "TS08"]
2316        pub const _0_X_08: Self = Self::new(8);
2317
2318        #[doc = "TS09"]
2319        pub const _0_X_09: Self = Self::new(9);
2320
2321        #[doc = "TS10"]
2322        pub const _0_X_0_A: Self = Self::new(10);
2323
2324        #[doc = "TS11"]
2325        pub const _0_X_0_B: Self = Self::new(11);
2326
2327        #[doc = "TS12"]
2328        pub const _0_X_0_C: Self = Self::new(12);
2329
2330        #[doc = "TS13"]
2331        pub const _0_X_0_D: Self = Self::new(13);
2332
2333        #[doc = "TS14"]
2334        pub const _0_X_0_E: Self = Self::new(14);
2335
2336        #[doc = "TS15"]
2337        pub const _0_X_0_F: Self = Self::new(15);
2338
2339        #[doc = "TS16"]
2340        pub const _0_X_10: Self = Self::new(16);
2341
2342        #[doc = "TS17"]
2343        pub const _0_X_11: Self = Self::new(17);
2344
2345        #[doc = "TS18"]
2346        pub const _0_X_12: Self = Self::new(18);
2347
2348        #[doc = "TS21"]
2349        pub const _0_X_15: Self = Self::new(21);
2350
2351        #[doc = "TS22"]
2352        pub const _0_X_16: Self = Self::new(22);
2353
2354        #[doc = "TS23"]
2355        pub const _0_X_17: Self = Self::new(23);
2356
2357        #[doc = "TS24"]
2358        pub const _0_X_18: Self = Self::new(24);
2359
2360        #[doc = "TS25"]
2361        pub const _0_X_19: Self = Self::new(25);
2362
2363        #[doc = "TS26"]
2364        pub const _0_X_1_A: Self = Self::new(26);
2365
2366        #[doc = "TS27"]
2367        pub const _0_X_1_B: Self = Self::new(27);
2368
2369        #[doc = "TS28"]
2370        pub const _0_X_1_C: Self = Self::new(28);
2371
2372        #[doc = "TS29"]
2373        pub const _0_X_1_D: Self = Self::new(29);
2374
2375        #[doc = "TS30"]
2376        pub const _0_X_1_E: Self = Self::new(30);
2377
2378        #[doc = "TS31"]
2379        pub const _0_X_1_F: Self = Self::new(31);
2380
2381        #[doc = "TS32"]
2382        pub const _0_X_20: Self = Self::new(32);
2383
2384        #[doc = "TS33"]
2385        pub const _0_X_21: Self = Self::new(33);
2386
2387        #[doc = "TS34"]
2388        pub const _0_X_22: Self = Self::new(34);
2389
2390        #[doc = "TS35"]
2391        pub const _0_X_23: Self = Self::new(35);
2392
2393        #[doc = "Measurement is being stopped."]
2394        pub const _0_X_3_F: Self = Self::new(63);
2395    }
2396    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2397    pub struct Mca0_SPEC;
2398    pub type Mca0 = crate::EnumBitfieldStruct<u8, Mca0_SPEC>;
2399    impl Mca0 {
2400        #[doc = "Disable"]
2401        pub const _0: Self = Self::new(0);
2402
2403        #[doc = "Enable"]
2404        pub const _1: Self = Self::new(1);
2405    }
2406    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2407    pub struct Mca1_SPEC;
2408    pub type Mca1 = crate::EnumBitfieldStruct<u8, Mca1_SPEC>;
2409    impl Mca1 {
2410        #[doc = "Disable"]
2411        pub const _0: Self = Self::new(0);
2412
2413        #[doc = "Enable"]
2414        pub const _1: Self = Self::new(1);
2415    }
2416    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2417    pub struct Mca2_SPEC;
2418    pub type Mca2 = crate::EnumBitfieldStruct<u8, Mca2_SPEC>;
2419    impl Mca2 {
2420        #[doc = "Disable"]
2421        pub const _0: Self = Self::new(0);
2422
2423        #[doc = "Enable"]
2424        pub const _1: Self = Self::new(1);
2425    }
2426    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2427    pub struct Mca3_SPEC;
2428    pub type Mca3 = crate::EnumBitfieldStruct<u8, Mca3_SPEC>;
2429    impl Mca3 {
2430        #[doc = "Disable"]
2431        pub const _0: Self = Self::new(0);
2432
2433        #[doc = "Enable"]
2434        pub const _1: Self = Self::new(1);
2435    }
2436}
2437#[doc(hidden)]
2438#[derive(Copy, Clone, Eq, PartialEq)]
2439pub struct Ctsumchl_SPEC;
2440impl crate::sealed::RegSpec for Ctsumchl_SPEC {
2441    type DataType = u16;
2442}
2443
2444#[doc = "CTSU Measurement Channel Register"]
2445pub type Ctsumchl = crate::RegValueT<Ctsumchl_SPEC>;
2446
2447impl NoBitfieldReg<Ctsumchl_SPEC> for Ctsumchl {}
2448impl ::core::default::Default for Ctsumchl {
2449    #[inline(always)]
2450    fn default() -> Ctsumchl {
2451        <crate::RegValueT<Ctsumchl_SPEC> as RegisterValue<_>>::new(0)
2452    }
2453}
2454
2455#[doc(hidden)]
2456#[derive(Copy, Clone, Eq, PartialEq)]
2457pub struct Ctsumch0_SPEC;
2458impl crate::sealed::RegSpec for Ctsumch0_SPEC {
2459    type DataType = u8;
2460}
2461
2462#[doc = "CTSU Measurement Channel Register"]
2463pub type Ctsumch0 = crate::RegValueT<Ctsumch0_SPEC>;
2464
2465impl NoBitfieldReg<Ctsumch0_SPEC> for Ctsumch0 {}
2466impl ::core::default::Default for Ctsumch0 {
2467    #[inline(always)]
2468    fn default() -> Ctsumch0 {
2469        <crate::RegValueT<Ctsumch0_SPEC> as RegisterValue<_>>::new(0)
2470    }
2471}
2472
2473#[doc(hidden)]
2474#[derive(Copy, Clone, Eq, PartialEq)]
2475pub struct Ctsumch1_SPEC;
2476impl crate::sealed::RegSpec for Ctsumch1_SPEC {
2477    type DataType = u8;
2478}
2479
2480#[doc = "CTSU Measurement Channel Register"]
2481pub type Ctsumch1 = crate::RegValueT<Ctsumch1_SPEC>;
2482
2483impl NoBitfieldReg<Ctsumch1_SPEC> for Ctsumch1 {}
2484impl ::core::default::Default for Ctsumch1 {
2485    #[inline(always)]
2486    fn default() -> Ctsumch1 {
2487        <crate::RegValueT<Ctsumch1_SPEC> as RegisterValue<_>>::new(0)
2488    }
2489}
2490
2491#[doc(hidden)]
2492#[derive(Copy, Clone, Eq, PartialEq)]
2493pub struct Ctsumchh_SPEC;
2494impl crate::sealed::RegSpec for Ctsumchh_SPEC {
2495    type DataType = u16;
2496}
2497
2498#[doc = "CTSU Measurement Channel Register"]
2499pub type Ctsumchh = crate::RegValueT<Ctsumchh_SPEC>;
2500
2501impl NoBitfieldReg<Ctsumchh_SPEC> for Ctsumchh {}
2502impl ::core::default::Default for Ctsumchh {
2503    #[inline(always)]
2504    fn default() -> Ctsumchh {
2505        <crate::RegValueT<Ctsumchh_SPEC> as RegisterValue<_>>::new(16191)
2506    }
2507}
2508
2509#[doc(hidden)]
2510#[derive(Copy, Clone, Eq, PartialEq)]
2511pub struct Ctsumfaf_SPEC;
2512impl crate::sealed::RegSpec for Ctsumfaf_SPEC {
2513    type DataType = u8;
2514}
2515
2516#[doc = "CTSU Measurement Channel Register"]
2517pub type Ctsumfaf = crate::RegValueT<Ctsumfaf_SPEC>;
2518
2519impl NoBitfieldReg<Ctsumfaf_SPEC> for Ctsumfaf {}
2520impl ::core::default::Default for Ctsumfaf {
2521    #[inline(always)]
2522    fn default() -> Ctsumfaf {
2523        <crate::RegValueT<Ctsumfaf_SPEC> as RegisterValue<_>>::new(63)
2524    }
2525}
2526
2527#[doc(hidden)]
2528#[derive(Copy, Clone, Eq, PartialEq)]
2529pub struct Ctsuchaca_SPEC;
2530impl crate::sealed::RegSpec for Ctsuchaca_SPEC {
2531    type DataType = u32;
2532}
2533
2534#[doc = "CTSU Channel Enable Control Register A"]
2535pub type Ctsuchaca = crate::RegValueT<Ctsuchaca_SPEC>;
2536
2537impl Ctsuchaca {
2538    #[doc = "CTSU Channel Enable Control A"]
2539    #[inline(always)]
2540    pub fn chac00(
2541        self,
2542    ) -> crate::common::RegisterField<
2543        0,
2544        0x1,
2545        1,
2546        0,
2547        ctsuchaca::Chac00,
2548        ctsuchaca::Chac00,
2549        Ctsuchaca_SPEC,
2550        crate::common::RW,
2551    > {
2552        crate::common::RegisterField::<
2553            0,
2554            0x1,
2555            1,
2556            0,
2557            ctsuchaca::Chac00,
2558            ctsuchaca::Chac00,
2559            Ctsuchaca_SPEC,
2560            crate::common::RW,
2561        >::from_register(self, 0)
2562    }
2563
2564    #[doc = "CTSU Channel Enable Control A"]
2565    #[inline(always)]
2566    pub fn chac02(
2567        self,
2568    ) -> crate::common::RegisterField<
2569        2,
2570        0x1,
2571        1,
2572        0,
2573        ctsuchaca::Chac02,
2574        ctsuchaca::Chac02,
2575        Ctsuchaca_SPEC,
2576        crate::common::RW,
2577    > {
2578        crate::common::RegisterField::<
2579            2,
2580            0x1,
2581            1,
2582            0,
2583            ctsuchaca::Chac02,
2584            ctsuchaca::Chac02,
2585            Ctsuchaca_SPEC,
2586            crate::common::RW,
2587        >::from_register(self, 0)
2588    }
2589
2590    #[doc = "CTSU Channel Enable Control A"]
2591    #[inline(always)]
2592    pub fn chac04(
2593        self,
2594    ) -> crate::common::RegisterField<
2595        4,
2596        0x1,
2597        1,
2598        0,
2599        ctsuchaca::Chac04,
2600        ctsuchaca::Chac04,
2601        Ctsuchaca_SPEC,
2602        crate::common::RW,
2603    > {
2604        crate::common::RegisterField::<
2605            4,
2606            0x1,
2607            1,
2608            0,
2609            ctsuchaca::Chac04,
2610            ctsuchaca::Chac04,
2611            Ctsuchaca_SPEC,
2612            crate::common::RW,
2613        >::from_register(self, 0)
2614    }
2615
2616    #[doc = "CTSU Channel Enable Control A"]
2617    #[inline(always)]
2618    pub fn chac05(
2619        self,
2620    ) -> crate::common::RegisterField<
2621        5,
2622        0x1,
2623        1,
2624        0,
2625        ctsuchaca::Chac05,
2626        ctsuchaca::Chac05,
2627        Ctsuchaca_SPEC,
2628        crate::common::RW,
2629    > {
2630        crate::common::RegisterField::<
2631            5,
2632            0x1,
2633            1,
2634            0,
2635            ctsuchaca::Chac05,
2636            ctsuchaca::Chac05,
2637            Ctsuchaca_SPEC,
2638            crate::common::RW,
2639        >::from_register(self, 0)
2640    }
2641
2642    #[doc = "CTSU Channel Enable Control A"]
2643    #[inline(always)]
2644    pub fn chac06(
2645        self,
2646    ) -> crate::common::RegisterField<
2647        6,
2648        0x1,
2649        1,
2650        0,
2651        ctsuchaca::Chac06,
2652        ctsuchaca::Chac06,
2653        Ctsuchaca_SPEC,
2654        crate::common::RW,
2655    > {
2656        crate::common::RegisterField::<
2657            6,
2658            0x1,
2659            1,
2660            0,
2661            ctsuchaca::Chac06,
2662            ctsuchaca::Chac06,
2663            Ctsuchaca_SPEC,
2664            crate::common::RW,
2665        >::from_register(self, 0)
2666    }
2667
2668    #[doc = "CTSU Channel Enable Control A"]
2669    #[inline(always)]
2670    pub fn chac07(
2671        self,
2672    ) -> crate::common::RegisterField<
2673        7,
2674        0x1,
2675        1,
2676        0,
2677        ctsuchaca::Chac07,
2678        ctsuchaca::Chac07,
2679        Ctsuchaca_SPEC,
2680        crate::common::RW,
2681    > {
2682        crate::common::RegisterField::<
2683            7,
2684            0x1,
2685            1,
2686            0,
2687            ctsuchaca::Chac07,
2688            ctsuchaca::Chac07,
2689            Ctsuchaca_SPEC,
2690            crate::common::RW,
2691        >::from_register(self, 0)
2692    }
2693
2694    #[doc = "CTSU Channel Enable Control A"]
2695    #[inline(always)]
2696    pub fn chac08(
2697        self,
2698    ) -> crate::common::RegisterField<
2699        8,
2700        0x1,
2701        1,
2702        0,
2703        ctsuchaca::Chac08,
2704        ctsuchaca::Chac08,
2705        Ctsuchaca_SPEC,
2706        crate::common::RW,
2707    > {
2708        crate::common::RegisterField::<
2709            8,
2710            0x1,
2711            1,
2712            0,
2713            ctsuchaca::Chac08,
2714            ctsuchaca::Chac08,
2715            Ctsuchaca_SPEC,
2716            crate::common::RW,
2717        >::from_register(self, 0)
2718    }
2719
2720    #[doc = "CTSU Channel Enable Control A"]
2721    #[inline(always)]
2722    pub fn chac09(
2723        self,
2724    ) -> crate::common::RegisterField<
2725        9,
2726        0x1,
2727        1,
2728        0,
2729        ctsuchaca::Chac09,
2730        ctsuchaca::Chac09,
2731        Ctsuchaca_SPEC,
2732        crate::common::RW,
2733    > {
2734        crate::common::RegisterField::<
2735            9,
2736            0x1,
2737            1,
2738            0,
2739            ctsuchaca::Chac09,
2740            ctsuchaca::Chac09,
2741            Ctsuchaca_SPEC,
2742            crate::common::RW,
2743        >::from_register(self, 0)
2744    }
2745
2746    #[doc = "CTSU Channel Enable Control A"]
2747    #[inline(always)]
2748    pub fn chac10(
2749        self,
2750    ) -> crate::common::RegisterField<
2751        10,
2752        0x1,
2753        1,
2754        0,
2755        ctsuchaca::Chac10,
2756        ctsuchaca::Chac10,
2757        Ctsuchaca_SPEC,
2758        crate::common::RW,
2759    > {
2760        crate::common::RegisterField::<
2761            10,
2762            0x1,
2763            1,
2764            0,
2765            ctsuchaca::Chac10,
2766            ctsuchaca::Chac10,
2767            Ctsuchaca_SPEC,
2768            crate::common::RW,
2769        >::from_register(self, 0)
2770    }
2771
2772    #[doc = "CTSU Channel Enable Control A"]
2773    #[inline(always)]
2774    pub fn chac11(
2775        self,
2776    ) -> crate::common::RegisterField<
2777        11,
2778        0x1,
2779        1,
2780        0,
2781        ctsuchaca::Chac11,
2782        ctsuchaca::Chac11,
2783        Ctsuchaca_SPEC,
2784        crate::common::RW,
2785    > {
2786        crate::common::RegisterField::<
2787            11,
2788            0x1,
2789            1,
2790            0,
2791            ctsuchaca::Chac11,
2792            ctsuchaca::Chac11,
2793            Ctsuchaca_SPEC,
2794            crate::common::RW,
2795        >::from_register(self, 0)
2796    }
2797
2798    #[doc = "CTSU Channel Enable Control A"]
2799    #[inline(always)]
2800    pub fn chac12(
2801        self,
2802    ) -> crate::common::RegisterField<
2803        12,
2804        0x1,
2805        1,
2806        0,
2807        ctsuchaca::Chac12,
2808        ctsuchaca::Chac12,
2809        Ctsuchaca_SPEC,
2810        crate::common::RW,
2811    > {
2812        crate::common::RegisterField::<
2813            12,
2814            0x1,
2815            1,
2816            0,
2817            ctsuchaca::Chac12,
2818            ctsuchaca::Chac12,
2819            Ctsuchaca_SPEC,
2820            crate::common::RW,
2821        >::from_register(self, 0)
2822    }
2823
2824    #[doc = "CTSU Channel Enable Control A"]
2825    #[inline(always)]
2826    pub fn chac13(
2827        self,
2828    ) -> crate::common::RegisterField<
2829        13,
2830        0x1,
2831        1,
2832        0,
2833        ctsuchaca::Chac13,
2834        ctsuchaca::Chac13,
2835        Ctsuchaca_SPEC,
2836        crate::common::RW,
2837    > {
2838        crate::common::RegisterField::<
2839            13,
2840            0x1,
2841            1,
2842            0,
2843            ctsuchaca::Chac13,
2844            ctsuchaca::Chac13,
2845            Ctsuchaca_SPEC,
2846            crate::common::RW,
2847        >::from_register(self, 0)
2848    }
2849
2850    #[doc = "CTSU Channel Enable Control A"]
2851    #[inline(always)]
2852    pub fn chac14(
2853        self,
2854    ) -> crate::common::RegisterField<
2855        14,
2856        0x1,
2857        1,
2858        0,
2859        ctsuchaca::Chac14,
2860        ctsuchaca::Chac14,
2861        Ctsuchaca_SPEC,
2862        crate::common::RW,
2863    > {
2864        crate::common::RegisterField::<
2865            14,
2866            0x1,
2867            1,
2868            0,
2869            ctsuchaca::Chac14,
2870            ctsuchaca::Chac14,
2871            Ctsuchaca_SPEC,
2872            crate::common::RW,
2873        >::from_register(self, 0)
2874    }
2875
2876    #[doc = "CTSU Channel Enable Control A"]
2877    #[inline(always)]
2878    pub fn chac15(
2879        self,
2880    ) -> crate::common::RegisterField<
2881        15,
2882        0x1,
2883        1,
2884        0,
2885        ctsuchaca::Chac15,
2886        ctsuchaca::Chac15,
2887        Ctsuchaca_SPEC,
2888        crate::common::RW,
2889    > {
2890        crate::common::RegisterField::<
2891            15,
2892            0x1,
2893            1,
2894            0,
2895            ctsuchaca::Chac15,
2896            ctsuchaca::Chac15,
2897            Ctsuchaca_SPEC,
2898            crate::common::RW,
2899        >::from_register(self, 0)
2900    }
2901
2902    #[doc = "CTSU Channel Enable Control A"]
2903    #[inline(always)]
2904    pub fn chac16(
2905        self,
2906    ) -> crate::common::RegisterField<
2907        16,
2908        0x1,
2909        1,
2910        0,
2911        ctsuchaca::Chac16,
2912        ctsuchaca::Chac16,
2913        Ctsuchaca_SPEC,
2914        crate::common::RW,
2915    > {
2916        crate::common::RegisterField::<
2917            16,
2918            0x1,
2919            1,
2920            0,
2921            ctsuchaca::Chac16,
2922            ctsuchaca::Chac16,
2923            Ctsuchaca_SPEC,
2924            crate::common::RW,
2925        >::from_register(self, 0)
2926    }
2927
2928    #[doc = "CTSU Channel Enable Control A"]
2929    #[inline(always)]
2930    pub fn chac17(
2931        self,
2932    ) -> crate::common::RegisterField<
2933        17,
2934        0x1,
2935        1,
2936        0,
2937        ctsuchaca::Chac17,
2938        ctsuchaca::Chac17,
2939        Ctsuchaca_SPEC,
2940        crate::common::RW,
2941    > {
2942        crate::common::RegisterField::<
2943            17,
2944            0x1,
2945            1,
2946            0,
2947            ctsuchaca::Chac17,
2948            ctsuchaca::Chac17,
2949            Ctsuchaca_SPEC,
2950            crate::common::RW,
2951        >::from_register(self, 0)
2952    }
2953
2954    #[doc = "CTSU Channel Enable Control A"]
2955    #[inline(always)]
2956    pub fn chac18(
2957        self,
2958    ) -> crate::common::RegisterField<
2959        18,
2960        0x1,
2961        1,
2962        0,
2963        ctsuchaca::Chac18,
2964        ctsuchaca::Chac18,
2965        Ctsuchaca_SPEC,
2966        crate::common::RW,
2967    > {
2968        crate::common::RegisterField::<
2969            18,
2970            0x1,
2971            1,
2972            0,
2973            ctsuchaca::Chac18,
2974            ctsuchaca::Chac18,
2975            Ctsuchaca_SPEC,
2976            crate::common::RW,
2977        >::from_register(self, 0)
2978    }
2979
2980    #[doc = "CTSU Channel Enable Control A"]
2981    #[inline(always)]
2982    pub fn chac21(
2983        self,
2984    ) -> crate::common::RegisterField<
2985        21,
2986        0x1,
2987        1,
2988        0,
2989        ctsuchaca::Chac21,
2990        ctsuchaca::Chac21,
2991        Ctsuchaca_SPEC,
2992        crate::common::RW,
2993    > {
2994        crate::common::RegisterField::<
2995            21,
2996            0x1,
2997            1,
2998            0,
2999            ctsuchaca::Chac21,
3000            ctsuchaca::Chac21,
3001            Ctsuchaca_SPEC,
3002            crate::common::RW,
3003        >::from_register(self, 0)
3004    }
3005
3006    #[doc = "CTSU Channel Enable Control A"]
3007    #[inline(always)]
3008    pub fn chac22(
3009        self,
3010    ) -> crate::common::RegisterField<
3011        22,
3012        0x1,
3013        1,
3014        0,
3015        ctsuchaca::Chac22,
3016        ctsuchaca::Chac22,
3017        Ctsuchaca_SPEC,
3018        crate::common::RW,
3019    > {
3020        crate::common::RegisterField::<
3021            22,
3022            0x1,
3023            1,
3024            0,
3025            ctsuchaca::Chac22,
3026            ctsuchaca::Chac22,
3027            Ctsuchaca_SPEC,
3028            crate::common::RW,
3029        >::from_register(self, 0)
3030    }
3031
3032    #[doc = "CTSU Channel Enable Control A"]
3033    #[inline(always)]
3034    pub fn chac23(
3035        self,
3036    ) -> crate::common::RegisterField<
3037        23,
3038        0x1,
3039        1,
3040        0,
3041        ctsuchaca::Chac23,
3042        ctsuchaca::Chac23,
3043        Ctsuchaca_SPEC,
3044        crate::common::RW,
3045    > {
3046        crate::common::RegisterField::<
3047            23,
3048            0x1,
3049            1,
3050            0,
3051            ctsuchaca::Chac23,
3052            ctsuchaca::Chac23,
3053            Ctsuchaca_SPEC,
3054            crate::common::RW,
3055        >::from_register(self, 0)
3056    }
3057
3058    #[doc = "CTSU Channel Enable Control A"]
3059    #[inline(always)]
3060    pub fn chac24(
3061        self,
3062    ) -> crate::common::RegisterField<
3063        24,
3064        0x1,
3065        1,
3066        0,
3067        ctsuchaca::Chac24,
3068        ctsuchaca::Chac24,
3069        Ctsuchaca_SPEC,
3070        crate::common::RW,
3071    > {
3072        crate::common::RegisterField::<
3073            24,
3074            0x1,
3075            1,
3076            0,
3077            ctsuchaca::Chac24,
3078            ctsuchaca::Chac24,
3079            Ctsuchaca_SPEC,
3080            crate::common::RW,
3081        >::from_register(self, 0)
3082    }
3083
3084    #[doc = "CTSU Channel Enable Control A"]
3085    #[inline(always)]
3086    pub fn chac25(
3087        self,
3088    ) -> crate::common::RegisterField<
3089        25,
3090        0x1,
3091        1,
3092        0,
3093        ctsuchaca::Chac25,
3094        ctsuchaca::Chac25,
3095        Ctsuchaca_SPEC,
3096        crate::common::RW,
3097    > {
3098        crate::common::RegisterField::<
3099            25,
3100            0x1,
3101            1,
3102            0,
3103            ctsuchaca::Chac25,
3104            ctsuchaca::Chac25,
3105            Ctsuchaca_SPEC,
3106            crate::common::RW,
3107        >::from_register(self, 0)
3108    }
3109
3110    #[doc = "CTSU Channel Enable Control A"]
3111    #[inline(always)]
3112    pub fn chac26(
3113        self,
3114    ) -> crate::common::RegisterField<
3115        26,
3116        0x1,
3117        1,
3118        0,
3119        ctsuchaca::Chac26,
3120        ctsuchaca::Chac26,
3121        Ctsuchaca_SPEC,
3122        crate::common::RW,
3123    > {
3124        crate::common::RegisterField::<
3125            26,
3126            0x1,
3127            1,
3128            0,
3129            ctsuchaca::Chac26,
3130            ctsuchaca::Chac26,
3131            Ctsuchaca_SPEC,
3132            crate::common::RW,
3133        >::from_register(self, 0)
3134    }
3135
3136    #[doc = "CTSU Channel Enable Control A"]
3137    #[inline(always)]
3138    pub fn chac27(
3139        self,
3140    ) -> crate::common::RegisterField<
3141        27,
3142        0x1,
3143        1,
3144        0,
3145        ctsuchaca::Chac27,
3146        ctsuchaca::Chac27,
3147        Ctsuchaca_SPEC,
3148        crate::common::RW,
3149    > {
3150        crate::common::RegisterField::<
3151            27,
3152            0x1,
3153            1,
3154            0,
3155            ctsuchaca::Chac27,
3156            ctsuchaca::Chac27,
3157            Ctsuchaca_SPEC,
3158            crate::common::RW,
3159        >::from_register(self, 0)
3160    }
3161
3162    #[doc = "CTSU Channel Enable Control A"]
3163    #[inline(always)]
3164    pub fn chac28(
3165        self,
3166    ) -> crate::common::RegisterField<
3167        28,
3168        0x1,
3169        1,
3170        0,
3171        ctsuchaca::Chac28,
3172        ctsuchaca::Chac28,
3173        Ctsuchaca_SPEC,
3174        crate::common::RW,
3175    > {
3176        crate::common::RegisterField::<
3177            28,
3178            0x1,
3179            1,
3180            0,
3181            ctsuchaca::Chac28,
3182            ctsuchaca::Chac28,
3183            Ctsuchaca_SPEC,
3184            crate::common::RW,
3185        >::from_register(self, 0)
3186    }
3187
3188    #[doc = "CTSU Channel Enable Control A"]
3189    #[inline(always)]
3190    pub fn chac29(
3191        self,
3192    ) -> crate::common::RegisterField<
3193        29,
3194        0x1,
3195        1,
3196        0,
3197        ctsuchaca::Chac29,
3198        ctsuchaca::Chac29,
3199        Ctsuchaca_SPEC,
3200        crate::common::RW,
3201    > {
3202        crate::common::RegisterField::<
3203            29,
3204            0x1,
3205            1,
3206            0,
3207            ctsuchaca::Chac29,
3208            ctsuchaca::Chac29,
3209            Ctsuchaca_SPEC,
3210            crate::common::RW,
3211        >::from_register(self, 0)
3212    }
3213
3214    #[doc = "CTSU Channel Enable Control A"]
3215    #[inline(always)]
3216    pub fn chac30(
3217        self,
3218    ) -> crate::common::RegisterField<
3219        30,
3220        0x1,
3221        1,
3222        0,
3223        ctsuchaca::Chac30,
3224        ctsuchaca::Chac30,
3225        Ctsuchaca_SPEC,
3226        crate::common::RW,
3227    > {
3228        crate::common::RegisterField::<
3229            30,
3230            0x1,
3231            1,
3232            0,
3233            ctsuchaca::Chac30,
3234            ctsuchaca::Chac30,
3235            Ctsuchaca_SPEC,
3236            crate::common::RW,
3237        >::from_register(self, 0)
3238    }
3239
3240    #[doc = "CTSU Channel Enable Control A"]
3241    #[inline(always)]
3242    pub fn chac31(
3243        self,
3244    ) -> crate::common::RegisterField<
3245        31,
3246        0x1,
3247        1,
3248        0,
3249        ctsuchaca::Chac31,
3250        ctsuchaca::Chac31,
3251        Ctsuchaca_SPEC,
3252        crate::common::RW,
3253    > {
3254        crate::common::RegisterField::<
3255            31,
3256            0x1,
3257            1,
3258            0,
3259            ctsuchaca::Chac31,
3260            ctsuchaca::Chac31,
3261            Ctsuchaca_SPEC,
3262            crate::common::RW,
3263        >::from_register(self, 0)
3264    }
3265}
3266impl ::core::default::Default for Ctsuchaca {
3267    #[inline(always)]
3268    fn default() -> Ctsuchaca {
3269        <crate::RegValueT<Ctsuchaca_SPEC> as RegisterValue<_>>::new(0)
3270    }
3271}
3272pub mod ctsuchaca {
3273
3274    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3275    pub struct Chac00_SPEC;
3276    pub type Chac00 = crate::EnumBitfieldStruct<u8, Chac00_SPEC>;
3277    impl Chac00 {
3278        #[doc = "Do not measure."]
3279        pub const _0: Self = Self::new(0);
3280
3281        #[doc = "Measure."]
3282        pub const _1: Self = Self::new(1);
3283    }
3284    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3285    pub struct Chac02_SPEC;
3286    pub type Chac02 = crate::EnumBitfieldStruct<u8, Chac02_SPEC>;
3287    impl Chac02 {
3288        #[doc = "Do not measure."]
3289        pub const _0: Self = Self::new(0);
3290
3291        #[doc = "Measure."]
3292        pub const _1: Self = Self::new(1);
3293    }
3294    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3295    pub struct Chac04_SPEC;
3296    pub type Chac04 = crate::EnumBitfieldStruct<u8, Chac04_SPEC>;
3297    impl Chac04 {
3298        #[doc = "Do not measure."]
3299        pub const _0: Self = Self::new(0);
3300
3301        #[doc = "Measure."]
3302        pub const _1: Self = Self::new(1);
3303    }
3304    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3305    pub struct Chac05_SPEC;
3306    pub type Chac05 = crate::EnumBitfieldStruct<u8, Chac05_SPEC>;
3307    impl Chac05 {
3308        #[doc = "Do not measure."]
3309        pub const _0: Self = Self::new(0);
3310
3311        #[doc = "Measure."]
3312        pub const _1: Self = Self::new(1);
3313    }
3314    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3315    pub struct Chac06_SPEC;
3316    pub type Chac06 = crate::EnumBitfieldStruct<u8, Chac06_SPEC>;
3317    impl Chac06 {
3318        #[doc = "Do not measure."]
3319        pub const _0: Self = Self::new(0);
3320
3321        #[doc = "Measure."]
3322        pub const _1: Self = Self::new(1);
3323    }
3324    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3325    pub struct Chac07_SPEC;
3326    pub type Chac07 = crate::EnumBitfieldStruct<u8, Chac07_SPEC>;
3327    impl Chac07 {
3328        #[doc = "Do not measure."]
3329        pub const _0: Self = Self::new(0);
3330
3331        #[doc = "Measure."]
3332        pub const _1: Self = Self::new(1);
3333    }
3334    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3335    pub struct Chac08_SPEC;
3336    pub type Chac08 = crate::EnumBitfieldStruct<u8, Chac08_SPEC>;
3337    impl Chac08 {
3338        #[doc = "Do not measure."]
3339        pub const _0: Self = Self::new(0);
3340
3341        #[doc = "Measure."]
3342        pub const _1: Self = Self::new(1);
3343    }
3344    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3345    pub struct Chac09_SPEC;
3346    pub type Chac09 = crate::EnumBitfieldStruct<u8, Chac09_SPEC>;
3347    impl Chac09 {
3348        #[doc = "Do not measure."]
3349        pub const _0: Self = Self::new(0);
3350
3351        #[doc = "Measure."]
3352        pub const _1: Self = Self::new(1);
3353    }
3354    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3355    pub struct Chac10_SPEC;
3356    pub type Chac10 = crate::EnumBitfieldStruct<u8, Chac10_SPEC>;
3357    impl Chac10 {
3358        #[doc = "Do not measure."]
3359        pub const _0: Self = Self::new(0);
3360
3361        #[doc = "Measure."]
3362        pub const _1: Self = Self::new(1);
3363    }
3364    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3365    pub struct Chac11_SPEC;
3366    pub type Chac11 = crate::EnumBitfieldStruct<u8, Chac11_SPEC>;
3367    impl Chac11 {
3368        #[doc = "Do not measure."]
3369        pub const _0: Self = Self::new(0);
3370
3371        #[doc = "Measure."]
3372        pub const _1: Self = Self::new(1);
3373    }
3374    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3375    pub struct Chac12_SPEC;
3376    pub type Chac12 = crate::EnumBitfieldStruct<u8, Chac12_SPEC>;
3377    impl Chac12 {
3378        #[doc = "Do not measure."]
3379        pub const _0: Self = Self::new(0);
3380
3381        #[doc = "Measure."]
3382        pub const _1: Self = Self::new(1);
3383    }
3384    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3385    pub struct Chac13_SPEC;
3386    pub type Chac13 = crate::EnumBitfieldStruct<u8, Chac13_SPEC>;
3387    impl Chac13 {
3388        #[doc = "Do not measure."]
3389        pub const _0: Self = Self::new(0);
3390
3391        #[doc = "Measure."]
3392        pub const _1: Self = Self::new(1);
3393    }
3394    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3395    pub struct Chac14_SPEC;
3396    pub type Chac14 = crate::EnumBitfieldStruct<u8, Chac14_SPEC>;
3397    impl Chac14 {
3398        #[doc = "Do not measure."]
3399        pub const _0: Self = Self::new(0);
3400
3401        #[doc = "Measure."]
3402        pub const _1: Self = Self::new(1);
3403    }
3404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3405    pub struct Chac15_SPEC;
3406    pub type Chac15 = crate::EnumBitfieldStruct<u8, Chac15_SPEC>;
3407    impl Chac15 {
3408        #[doc = "Do not measure."]
3409        pub const _0: Self = Self::new(0);
3410
3411        #[doc = "Measure."]
3412        pub const _1: Self = Self::new(1);
3413    }
3414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3415    pub struct Chac16_SPEC;
3416    pub type Chac16 = crate::EnumBitfieldStruct<u8, Chac16_SPEC>;
3417    impl Chac16 {
3418        #[doc = "Do not measure."]
3419        pub const _0: Self = Self::new(0);
3420
3421        #[doc = "Measure."]
3422        pub const _1: Self = Self::new(1);
3423    }
3424    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3425    pub struct Chac17_SPEC;
3426    pub type Chac17 = crate::EnumBitfieldStruct<u8, Chac17_SPEC>;
3427    impl Chac17 {
3428        #[doc = "Do not measure."]
3429        pub const _0: Self = Self::new(0);
3430
3431        #[doc = "Measure."]
3432        pub const _1: Self = Self::new(1);
3433    }
3434    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3435    pub struct Chac18_SPEC;
3436    pub type Chac18 = crate::EnumBitfieldStruct<u8, Chac18_SPEC>;
3437    impl Chac18 {
3438        #[doc = "Do not measure."]
3439        pub const _0: Self = Self::new(0);
3440
3441        #[doc = "Measure."]
3442        pub const _1: Self = Self::new(1);
3443    }
3444    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3445    pub struct Chac21_SPEC;
3446    pub type Chac21 = crate::EnumBitfieldStruct<u8, Chac21_SPEC>;
3447    impl Chac21 {
3448        #[doc = "Do not measure."]
3449        pub const _0: Self = Self::new(0);
3450
3451        #[doc = "Measure."]
3452        pub const _1: Self = Self::new(1);
3453    }
3454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3455    pub struct Chac22_SPEC;
3456    pub type Chac22 = crate::EnumBitfieldStruct<u8, Chac22_SPEC>;
3457    impl Chac22 {
3458        #[doc = "Do not measure."]
3459        pub const _0: Self = Self::new(0);
3460
3461        #[doc = "Measure."]
3462        pub const _1: Self = Self::new(1);
3463    }
3464    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3465    pub struct Chac23_SPEC;
3466    pub type Chac23 = crate::EnumBitfieldStruct<u8, Chac23_SPEC>;
3467    impl Chac23 {
3468        #[doc = "Do not measure."]
3469        pub const _0: Self = Self::new(0);
3470
3471        #[doc = "Measure."]
3472        pub const _1: Self = Self::new(1);
3473    }
3474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3475    pub struct Chac24_SPEC;
3476    pub type Chac24 = crate::EnumBitfieldStruct<u8, Chac24_SPEC>;
3477    impl Chac24 {
3478        #[doc = "Do not measure."]
3479        pub const _0: Self = Self::new(0);
3480
3481        #[doc = "Measure."]
3482        pub const _1: Self = Self::new(1);
3483    }
3484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3485    pub struct Chac25_SPEC;
3486    pub type Chac25 = crate::EnumBitfieldStruct<u8, Chac25_SPEC>;
3487    impl Chac25 {
3488        #[doc = "Do not measure."]
3489        pub const _0: Self = Self::new(0);
3490
3491        #[doc = "Measure."]
3492        pub const _1: Self = Self::new(1);
3493    }
3494    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3495    pub struct Chac26_SPEC;
3496    pub type Chac26 = crate::EnumBitfieldStruct<u8, Chac26_SPEC>;
3497    impl Chac26 {
3498        #[doc = "Do not measure."]
3499        pub const _0: Self = Self::new(0);
3500
3501        #[doc = "Measure."]
3502        pub const _1: Self = Self::new(1);
3503    }
3504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3505    pub struct Chac27_SPEC;
3506    pub type Chac27 = crate::EnumBitfieldStruct<u8, Chac27_SPEC>;
3507    impl Chac27 {
3508        #[doc = "Do not measure."]
3509        pub const _0: Self = Self::new(0);
3510
3511        #[doc = "Measure."]
3512        pub const _1: Self = Self::new(1);
3513    }
3514    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3515    pub struct Chac28_SPEC;
3516    pub type Chac28 = crate::EnumBitfieldStruct<u8, Chac28_SPEC>;
3517    impl Chac28 {
3518        #[doc = "Do not measure."]
3519        pub const _0: Self = Self::new(0);
3520
3521        #[doc = "Measure."]
3522        pub const _1: Self = Self::new(1);
3523    }
3524    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3525    pub struct Chac29_SPEC;
3526    pub type Chac29 = crate::EnumBitfieldStruct<u8, Chac29_SPEC>;
3527    impl Chac29 {
3528        #[doc = "Do not measure."]
3529        pub const _0: Self = Self::new(0);
3530
3531        #[doc = "Measure."]
3532        pub const _1: Self = Self::new(1);
3533    }
3534    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3535    pub struct Chac30_SPEC;
3536    pub type Chac30 = crate::EnumBitfieldStruct<u8, Chac30_SPEC>;
3537    impl Chac30 {
3538        #[doc = "Do not measure."]
3539        pub const _0: Self = Self::new(0);
3540
3541        #[doc = "Measure."]
3542        pub const _1: Self = Self::new(1);
3543    }
3544    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3545    pub struct Chac31_SPEC;
3546    pub type Chac31 = crate::EnumBitfieldStruct<u8, Chac31_SPEC>;
3547    impl Chac31 {
3548        #[doc = "Do not measure."]
3549        pub const _0: Self = Self::new(0);
3550
3551        #[doc = "Measure."]
3552        pub const _1: Self = Self::new(1);
3553    }
3554}
3555#[doc(hidden)]
3556#[derive(Copy, Clone, Eq, PartialEq)]
3557pub struct Ctsuchacal_SPEC;
3558impl crate::sealed::RegSpec for Ctsuchacal_SPEC {
3559    type DataType = u16;
3560}
3561
3562#[doc = "CTSU Channel Enable Control Register A"]
3563pub type Ctsuchacal = crate::RegValueT<Ctsuchacal_SPEC>;
3564
3565impl NoBitfieldReg<Ctsuchacal_SPEC> for Ctsuchacal {}
3566impl ::core::default::Default for Ctsuchacal {
3567    #[inline(always)]
3568    fn default() -> Ctsuchacal {
3569        <crate::RegValueT<Ctsuchacal_SPEC> as RegisterValue<_>>::new(0)
3570    }
3571}
3572
3573#[doc(hidden)]
3574#[derive(Copy, Clone, Eq, PartialEq)]
3575pub struct Ctsuchac0_SPEC;
3576impl crate::sealed::RegSpec for Ctsuchac0_SPEC {
3577    type DataType = u8;
3578}
3579
3580#[doc = "CTSU Channel Enable Control Register A"]
3581pub type Ctsuchac0 = crate::RegValueT<Ctsuchac0_SPEC>;
3582
3583impl NoBitfieldReg<Ctsuchac0_SPEC> for Ctsuchac0 {}
3584impl ::core::default::Default for Ctsuchac0 {
3585    #[inline(always)]
3586    fn default() -> Ctsuchac0 {
3587        <crate::RegValueT<Ctsuchac0_SPEC> as RegisterValue<_>>::new(0)
3588    }
3589}
3590
3591#[doc(hidden)]
3592#[derive(Copy, Clone, Eq, PartialEq)]
3593pub struct Ctsuchac1_SPEC;
3594impl crate::sealed::RegSpec for Ctsuchac1_SPEC {
3595    type DataType = u8;
3596}
3597
3598#[doc = "CTSU Channel Enable Control Register A"]
3599pub type Ctsuchac1 = crate::RegValueT<Ctsuchac1_SPEC>;
3600
3601impl NoBitfieldReg<Ctsuchac1_SPEC> for Ctsuchac1 {}
3602impl ::core::default::Default for Ctsuchac1 {
3603    #[inline(always)]
3604    fn default() -> Ctsuchac1 {
3605        <crate::RegValueT<Ctsuchac1_SPEC> as RegisterValue<_>>::new(0)
3606    }
3607}
3608
3609#[doc(hidden)]
3610#[derive(Copy, Clone, Eq, PartialEq)]
3611pub struct Ctsuchacah_SPEC;
3612impl crate::sealed::RegSpec for Ctsuchacah_SPEC {
3613    type DataType = u16;
3614}
3615
3616#[doc = "CTSU Channel Enable Control Register A"]
3617pub type Ctsuchacah = crate::RegValueT<Ctsuchacah_SPEC>;
3618
3619impl NoBitfieldReg<Ctsuchacah_SPEC> for Ctsuchacah {}
3620impl ::core::default::Default for Ctsuchacah {
3621    #[inline(always)]
3622    fn default() -> Ctsuchacah {
3623        <crate::RegValueT<Ctsuchacah_SPEC> as RegisterValue<_>>::new(0)
3624    }
3625}
3626
3627#[doc(hidden)]
3628#[derive(Copy, Clone, Eq, PartialEq)]
3629pub struct Ctsuchac2_SPEC;
3630impl crate::sealed::RegSpec for Ctsuchac2_SPEC {
3631    type DataType = u8;
3632}
3633
3634#[doc = "CTSU Channel Enable Control Register A"]
3635pub type Ctsuchac2 = crate::RegValueT<Ctsuchac2_SPEC>;
3636
3637impl NoBitfieldReg<Ctsuchac2_SPEC> for Ctsuchac2 {}
3638impl ::core::default::Default for Ctsuchac2 {
3639    #[inline(always)]
3640    fn default() -> Ctsuchac2 {
3641        <crate::RegValueT<Ctsuchac2_SPEC> as RegisterValue<_>>::new(0)
3642    }
3643}
3644
3645#[doc(hidden)]
3646#[derive(Copy, Clone, Eq, PartialEq)]
3647pub struct Ctsuchac3_SPEC;
3648impl crate::sealed::RegSpec for Ctsuchac3_SPEC {
3649    type DataType = u8;
3650}
3651
3652#[doc = "CTSU Channel Enable Control Register A"]
3653pub type Ctsuchac3 = crate::RegValueT<Ctsuchac3_SPEC>;
3654
3655impl NoBitfieldReg<Ctsuchac3_SPEC> for Ctsuchac3 {}
3656impl ::core::default::Default for Ctsuchac3 {
3657    #[inline(always)]
3658    fn default() -> Ctsuchac3 {
3659        <crate::RegValueT<Ctsuchac3_SPEC> as RegisterValue<_>>::new(0)
3660    }
3661}
3662
3663#[doc(hidden)]
3664#[derive(Copy, Clone, Eq, PartialEq)]
3665pub struct Ctsuchacb_SPEC;
3666impl crate::sealed::RegSpec for Ctsuchacb_SPEC {
3667    type DataType = u32;
3668}
3669
3670#[doc = "CTSU Channel Enable Control Register B"]
3671pub type Ctsuchacb = crate::RegValueT<Ctsuchacb_SPEC>;
3672
3673impl Ctsuchacb {
3674    #[doc = "CTSU Channel Enable Control B"]
3675    #[inline(always)]
3676    pub fn chac32(
3677        self,
3678    ) -> crate::common::RegisterField<
3679        0,
3680        0x1,
3681        1,
3682        0,
3683        ctsuchacb::Chac32,
3684        ctsuchacb::Chac32,
3685        Ctsuchacb_SPEC,
3686        crate::common::RW,
3687    > {
3688        crate::common::RegisterField::<
3689            0,
3690            0x1,
3691            1,
3692            0,
3693            ctsuchacb::Chac32,
3694            ctsuchacb::Chac32,
3695            Ctsuchacb_SPEC,
3696            crate::common::RW,
3697        >::from_register(self, 0)
3698    }
3699
3700    #[doc = "CTSU Channel Enable Control B"]
3701    #[inline(always)]
3702    pub fn chac33(
3703        self,
3704    ) -> crate::common::RegisterField<
3705        1,
3706        0x1,
3707        1,
3708        0,
3709        ctsuchacb::Chac33,
3710        ctsuchacb::Chac33,
3711        Ctsuchacb_SPEC,
3712        crate::common::RW,
3713    > {
3714        crate::common::RegisterField::<
3715            1,
3716            0x1,
3717            1,
3718            0,
3719            ctsuchacb::Chac33,
3720            ctsuchacb::Chac33,
3721            Ctsuchacb_SPEC,
3722            crate::common::RW,
3723        >::from_register(self, 0)
3724    }
3725
3726    #[doc = "CTSU Channel Enable Control B"]
3727    #[inline(always)]
3728    pub fn chac34(
3729        self,
3730    ) -> crate::common::RegisterField<
3731        2,
3732        0x1,
3733        1,
3734        0,
3735        ctsuchacb::Chac34,
3736        ctsuchacb::Chac34,
3737        Ctsuchacb_SPEC,
3738        crate::common::RW,
3739    > {
3740        crate::common::RegisterField::<
3741            2,
3742            0x1,
3743            1,
3744            0,
3745            ctsuchacb::Chac34,
3746            ctsuchacb::Chac34,
3747            Ctsuchacb_SPEC,
3748            crate::common::RW,
3749        >::from_register(self, 0)
3750    }
3751
3752    #[doc = "CTSU Channel Enable Control B"]
3753    #[inline(always)]
3754    pub fn chac35(
3755        self,
3756    ) -> crate::common::RegisterField<
3757        3,
3758        0x1,
3759        1,
3760        0,
3761        ctsuchacb::Chac35,
3762        ctsuchacb::Chac35,
3763        Ctsuchacb_SPEC,
3764        crate::common::RW,
3765    > {
3766        crate::common::RegisterField::<
3767            3,
3768            0x1,
3769            1,
3770            0,
3771            ctsuchacb::Chac35,
3772            ctsuchacb::Chac35,
3773            Ctsuchacb_SPEC,
3774            crate::common::RW,
3775        >::from_register(self, 0)
3776    }
3777}
3778impl ::core::default::Default for Ctsuchacb {
3779    #[inline(always)]
3780    fn default() -> Ctsuchacb {
3781        <crate::RegValueT<Ctsuchacb_SPEC> as RegisterValue<_>>::new(0)
3782    }
3783}
3784pub mod ctsuchacb {
3785
3786    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3787    pub struct Chac32_SPEC;
3788    pub type Chac32 = crate::EnumBitfieldStruct<u8, Chac32_SPEC>;
3789    impl Chac32 {
3790        #[doc = "Do not measure."]
3791        pub const _0: Self = Self::new(0);
3792
3793        #[doc = "Measure."]
3794        pub const _1: Self = Self::new(1);
3795    }
3796    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3797    pub struct Chac33_SPEC;
3798    pub type Chac33 = crate::EnumBitfieldStruct<u8, Chac33_SPEC>;
3799    impl Chac33 {
3800        #[doc = "Do not measure."]
3801        pub const _0: Self = Self::new(0);
3802
3803        #[doc = "Measure."]
3804        pub const _1: Self = Self::new(1);
3805    }
3806    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3807    pub struct Chac34_SPEC;
3808    pub type Chac34 = crate::EnumBitfieldStruct<u8, Chac34_SPEC>;
3809    impl Chac34 {
3810        #[doc = "Do not measure."]
3811        pub const _0: Self = Self::new(0);
3812
3813        #[doc = "Measure."]
3814        pub const _1: Self = Self::new(1);
3815    }
3816    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3817    pub struct Chac35_SPEC;
3818    pub type Chac35 = crate::EnumBitfieldStruct<u8, Chac35_SPEC>;
3819    impl Chac35 {
3820        #[doc = "Do not measure."]
3821        pub const _0: Self = Self::new(0);
3822
3823        #[doc = "Measure."]
3824        pub const _1: Self = Self::new(1);
3825    }
3826}
3827#[doc(hidden)]
3828#[derive(Copy, Clone, Eq, PartialEq)]
3829pub struct Ctsuchacbl_SPEC;
3830impl crate::sealed::RegSpec for Ctsuchacbl_SPEC {
3831    type DataType = u16;
3832}
3833
3834#[doc = "CTSU Channel Enable Control Register B"]
3835pub type Ctsuchacbl = crate::RegValueT<Ctsuchacbl_SPEC>;
3836
3837impl NoBitfieldReg<Ctsuchacbl_SPEC> for Ctsuchacbl {}
3838impl ::core::default::Default for Ctsuchacbl {
3839    #[inline(always)]
3840    fn default() -> Ctsuchacbl {
3841        <crate::RegValueT<Ctsuchacbl_SPEC> as RegisterValue<_>>::new(0)
3842    }
3843}
3844
3845#[doc(hidden)]
3846#[derive(Copy, Clone, Eq, PartialEq)]
3847pub struct Ctsuchac4_SPEC;
3848impl crate::sealed::RegSpec for Ctsuchac4_SPEC {
3849    type DataType = u8;
3850}
3851
3852#[doc = "CTSU Channel Enable Control Register B"]
3853pub type Ctsuchac4 = crate::RegValueT<Ctsuchac4_SPEC>;
3854
3855impl NoBitfieldReg<Ctsuchac4_SPEC> for Ctsuchac4 {}
3856impl ::core::default::Default for Ctsuchac4 {
3857    #[inline(always)]
3858    fn default() -> Ctsuchac4 {
3859        <crate::RegValueT<Ctsuchac4_SPEC> as RegisterValue<_>>::new(0)
3860    }
3861}
3862
3863#[doc(hidden)]
3864#[derive(Copy, Clone, Eq, PartialEq)]
3865pub struct Ctsuchtrca_SPEC;
3866impl crate::sealed::RegSpec for Ctsuchtrca_SPEC {
3867    type DataType = u32;
3868}
3869
3870#[doc = "CTSU Channel Transmit/Receive Control Register A"]
3871pub type Ctsuchtrca = crate::RegValueT<Ctsuchtrca_SPEC>;
3872
3873impl Ctsuchtrca {
3874    #[doc = "CTSU Channel Transmit/Receive Control A"]
3875    #[inline(always)]
3876    pub fn chtrc00(
3877        self,
3878    ) -> crate::common::RegisterField<
3879        0,
3880        0x1,
3881        1,
3882        0,
3883        ctsuchtrca::Chtrc00,
3884        ctsuchtrca::Chtrc00,
3885        Ctsuchtrca_SPEC,
3886        crate::common::RW,
3887    > {
3888        crate::common::RegisterField::<
3889            0,
3890            0x1,
3891            1,
3892            0,
3893            ctsuchtrca::Chtrc00,
3894            ctsuchtrca::Chtrc00,
3895            Ctsuchtrca_SPEC,
3896            crate::common::RW,
3897        >::from_register(self, 0)
3898    }
3899
3900    #[doc = "CTSU Channel Transmit/Receive Control A"]
3901    #[inline(always)]
3902    pub fn chtrc02(
3903        self,
3904    ) -> crate::common::RegisterField<
3905        2,
3906        0x1,
3907        1,
3908        0,
3909        ctsuchtrca::Chtrc02,
3910        ctsuchtrca::Chtrc02,
3911        Ctsuchtrca_SPEC,
3912        crate::common::RW,
3913    > {
3914        crate::common::RegisterField::<
3915            2,
3916            0x1,
3917            1,
3918            0,
3919            ctsuchtrca::Chtrc02,
3920            ctsuchtrca::Chtrc02,
3921            Ctsuchtrca_SPEC,
3922            crate::common::RW,
3923        >::from_register(self, 0)
3924    }
3925
3926    #[doc = "CTSU Channel Transmit/Receive Control A"]
3927    #[inline(always)]
3928    pub fn chtrc04(
3929        self,
3930    ) -> crate::common::RegisterField<
3931        4,
3932        0x1,
3933        1,
3934        0,
3935        ctsuchtrca::Chtrc04,
3936        ctsuchtrca::Chtrc04,
3937        Ctsuchtrca_SPEC,
3938        crate::common::RW,
3939    > {
3940        crate::common::RegisterField::<
3941            4,
3942            0x1,
3943            1,
3944            0,
3945            ctsuchtrca::Chtrc04,
3946            ctsuchtrca::Chtrc04,
3947            Ctsuchtrca_SPEC,
3948            crate::common::RW,
3949        >::from_register(self, 0)
3950    }
3951
3952    #[doc = "CTSU Channel Transmit/Receive Control A"]
3953    #[inline(always)]
3954    pub fn chtrc05(
3955        self,
3956    ) -> crate::common::RegisterField<
3957        5,
3958        0x1,
3959        1,
3960        0,
3961        ctsuchtrca::Chtrc05,
3962        ctsuchtrca::Chtrc05,
3963        Ctsuchtrca_SPEC,
3964        crate::common::RW,
3965    > {
3966        crate::common::RegisterField::<
3967            5,
3968            0x1,
3969            1,
3970            0,
3971            ctsuchtrca::Chtrc05,
3972            ctsuchtrca::Chtrc05,
3973            Ctsuchtrca_SPEC,
3974            crate::common::RW,
3975        >::from_register(self, 0)
3976    }
3977
3978    #[doc = "CTSU Channel Transmit/Receive Control A"]
3979    #[inline(always)]
3980    pub fn chtrc06(
3981        self,
3982    ) -> crate::common::RegisterField<
3983        6,
3984        0x1,
3985        1,
3986        0,
3987        ctsuchtrca::Chtrc06,
3988        ctsuchtrca::Chtrc06,
3989        Ctsuchtrca_SPEC,
3990        crate::common::RW,
3991    > {
3992        crate::common::RegisterField::<
3993            6,
3994            0x1,
3995            1,
3996            0,
3997            ctsuchtrca::Chtrc06,
3998            ctsuchtrca::Chtrc06,
3999            Ctsuchtrca_SPEC,
4000            crate::common::RW,
4001        >::from_register(self, 0)
4002    }
4003
4004    #[doc = "CTSU Channel Transmit/Receive Control A"]
4005    #[inline(always)]
4006    pub fn chtrc07(
4007        self,
4008    ) -> crate::common::RegisterField<
4009        7,
4010        0x1,
4011        1,
4012        0,
4013        ctsuchtrca::Chtrc07,
4014        ctsuchtrca::Chtrc07,
4015        Ctsuchtrca_SPEC,
4016        crate::common::RW,
4017    > {
4018        crate::common::RegisterField::<
4019            7,
4020            0x1,
4021            1,
4022            0,
4023            ctsuchtrca::Chtrc07,
4024            ctsuchtrca::Chtrc07,
4025            Ctsuchtrca_SPEC,
4026            crate::common::RW,
4027        >::from_register(self, 0)
4028    }
4029
4030    #[doc = "CTSU Channel Transmit/Receive Control A"]
4031    #[inline(always)]
4032    pub fn chtrc08(
4033        self,
4034    ) -> crate::common::RegisterField<
4035        8,
4036        0x1,
4037        1,
4038        0,
4039        ctsuchtrca::Chtrc08,
4040        ctsuchtrca::Chtrc08,
4041        Ctsuchtrca_SPEC,
4042        crate::common::RW,
4043    > {
4044        crate::common::RegisterField::<
4045            8,
4046            0x1,
4047            1,
4048            0,
4049            ctsuchtrca::Chtrc08,
4050            ctsuchtrca::Chtrc08,
4051            Ctsuchtrca_SPEC,
4052            crate::common::RW,
4053        >::from_register(self, 0)
4054    }
4055
4056    #[doc = "CTSU Channel Transmit/Receive Control A"]
4057    #[inline(always)]
4058    pub fn chtrc09(
4059        self,
4060    ) -> crate::common::RegisterField<
4061        9,
4062        0x1,
4063        1,
4064        0,
4065        ctsuchtrca::Chtrc09,
4066        ctsuchtrca::Chtrc09,
4067        Ctsuchtrca_SPEC,
4068        crate::common::RW,
4069    > {
4070        crate::common::RegisterField::<
4071            9,
4072            0x1,
4073            1,
4074            0,
4075            ctsuchtrca::Chtrc09,
4076            ctsuchtrca::Chtrc09,
4077            Ctsuchtrca_SPEC,
4078            crate::common::RW,
4079        >::from_register(self, 0)
4080    }
4081
4082    #[doc = "CTSU Channel Transmit/Receive Control A"]
4083    #[inline(always)]
4084    pub fn chtrc10(
4085        self,
4086    ) -> crate::common::RegisterField<
4087        10,
4088        0x1,
4089        1,
4090        0,
4091        ctsuchtrca::Chtrc10,
4092        ctsuchtrca::Chtrc10,
4093        Ctsuchtrca_SPEC,
4094        crate::common::RW,
4095    > {
4096        crate::common::RegisterField::<
4097            10,
4098            0x1,
4099            1,
4100            0,
4101            ctsuchtrca::Chtrc10,
4102            ctsuchtrca::Chtrc10,
4103            Ctsuchtrca_SPEC,
4104            crate::common::RW,
4105        >::from_register(self, 0)
4106    }
4107
4108    #[doc = "CTSU Channel Transmit/Receive Control A"]
4109    #[inline(always)]
4110    pub fn chtrc11(
4111        self,
4112    ) -> crate::common::RegisterField<
4113        11,
4114        0x1,
4115        1,
4116        0,
4117        ctsuchtrca::Chtrc11,
4118        ctsuchtrca::Chtrc11,
4119        Ctsuchtrca_SPEC,
4120        crate::common::RW,
4121    > {
4122        crate::common::RegisterField::<
4123            11,
4124            0x1,
4125            1,
4126            0,
4127            ctsuchtrca::Chtrc11,
4128            ctsuchtrca::Chtrc11,
4129            Ctsuchtrca_SPEC,
4130            crate::common::RW,
4131        >::from_register(self, 0)
4132    }
4133
4134    #[doc = "CTSU Channel Transmit/Receive Control A"]
4135    #[inline(always)]
4136    pub fn chtrc12(
4137        self,
4138    ) -> crate::common::RegisterField<
4139        12,
4140        0x1,
4141        1,
4142        0,
4143        ctsuchtrca::Chtrc12,
4144        ctsuchtrca::Chtrc12,
4145        Ctsuchtrca_SPEC,
4146        crate::common::RW,
4147    > {
4148        crate::common::RegisterField::<
4149            12,
4150            0x1,
4151            1,
4152            0,
4153            ctsuchtrca::Chtrc12,
4154            ctsuchtrca::Chtrc12,
4155            Ctsuchtrca_SPEC,
4156            crate::common::RW,
4157        >::from_register(self, 0)
4158    }
4159
4160    #[doc = "CTSU Channel Transmit/Receive Control A"]
4161    #[inline(always)]
4162    pub fn chtrc13(
4163        self,
4164    ) -> crate::common::RegisterField<
4165        13,
4166        0x1,
4167        1,
4168        0,
4169        ctsuchtrca::Chtrc13,
4170        ctsuchtrca::Chtrc13,
4171        Ctsuchtrca_SPEC,
4172        crate::common::RW,
4173    > {
4174        crate::common::RegisterField::<
4175            13,
4176            0x1,
4177            1,
4178            0,
4179            ctsuchtrca::Chtrc13,
4180            ctsuchtrca::Chtrc13,
4181            Ctsuchtrca_SPEC,
4182            crate::common::RW,
4183        >::from_register(self, 0)
4184    }
4185
4186    #[doc = "CTSU Channel Transmit/Receive Control A"]
4187    #[inline(always)]
4188    pub fn chtrc14(
4189        self,
4190    ) -> crate::common::RegisterField<
4191        14,
4192        0x1,
4193        1,
4194        0,
4195        ctsuchtrca::Chtrc14,
4196        ctsuchtrca::Chtrc14,
4197        Ctsuchtrca_SPEC,
4198        crate::common::RW,
4199    > {
4200        crate::common::RegisterField::<
4201            14,
4202            0x1,
4203            1,
4204            0,
4205            ctsuchtrca::Chtrc14,
4206            ctsuchtrca::Chtrc14,
4207            Ctsuchtrca_SPEC,
4208            crate::common::RW,
4209        >::from_register(self, 0)
4210    }
4211
4212    #[doc = "CTSU Channel Transmit/Receive Control A"]
4213    #[inline(always)]
4214    pub fn chtrc15(
4215        self,
4216    ) -> crate::common::RegisterField<
4217        15,
4218        0x1,
4219        1,
4220        0,
4221        ctsuchtrca::Chtrc15,
4222        ctsuchtrca::Chtrc15,
4223        Ctsuchtrca_SPEC,
4224        crate::common::RW,
4225    > {
4226        crate::common::RegisterField::<
4227            15,
4228            0x1,
4229            1,
4230            0,
4231            ctsuchtrca::Chtrc15,
4232            ctsuchtrca::Chtrc15,
4233            Ctsuchtrca_SPEC,
4234            crate::common::RW,
4235        >::from_register(self, 0)
4236    }
4237
4238    #[doc = "CTSU Channel Transmit/Receive Control A"]
4239    #[inline(always)]
4240    pub fn chtrc16(
4241        self,
4242    ) -> crate::common::RegisterField<
4243        16,
4244        0x1,
4245        1,
4246        0,
4247        ctsuchtrca::Chtrc16,
4248        ctsuchtrca::Chtrc16,
4249        Ctsuchtrca_SPEC,
4250        crate::common::RW,
4251    > {
4252        crate::common::RegisterField::<
4253            16,
4254            0x1,
4255            1,
4256            0,
4257            ctsuchtrca::Chtrc16,
4258            ctsuchtrca::Chtrc16,
4259            Ctsuchtrca_SPEC,
4260            crate::common::RW,
4261        >::from_register(self, 0)
4262    }
4263
4264    #[doc = "CTSU Channel Transmit/Receive Control A"]
4265    #[inline(always)]
4266    pub fn chtrc17(
4267        self,
4268    ) -> crate::common::RegisterField<
4269        17,
4270        0x1,
4271        1,
4272        0,
4273        ctsuchtrca::Chtrc17,
4274        ctsuchtrca::Chtrc17,
4275        Ctsuchtrca_SPEC,
4276        crate::common::RW,
4277    > {
4278        crate::common::RegisterField::<
4279            17,
4280            0x1,
4281            1,
4282            0,
4283            ctsuchtrca::Chtrc17,
4284            ctsuchtrca::Chtrc17,
4285            Ctsuchtrca_SPEC,
4286            crate::common::RW,
4287        >::from_register(self, 0)
4288    }
4289
4290    #[doc = "CTSU Channel Transmit/Receive Control A"]
4291    #[inline(always)]
4292    pub fn chtrc18(
4293        self,
4294    ) -> crate::common::RegisterField<
4295        18,
4296        0x1,
4297        1,
4298        0,
4299        ctsuchtrca::Chtrc18,
4300        ctsuchtrca::Chtrc18,
4301        Ctsuchtrca_SPEC,
4302        crate::common::RW,
4303    > {
4304        crate::common::RegisterField::<
4305            18,
4306            0x1,
4307            1,
4308            0,
4309            ctsuchtrca::Chtrc18,
4310            ctsuchtrca::Chtrc18,
4311            Ctsuchtrca_SPEC,
4312            crate::common::RW,
4313        >::from_register(self, 0)
4314    }
4315
4316    #[doc = "CTSU Channel Transmit/Receive Control A"]
4317    #[inline(always)]
4318    pub fn chtrc21(
4319        self,
4320    ) -> crate::common::RegisterField<
4321        21,
4322        0x1,
4323        1,
4324        0,
4325        ctsuchtrca::Chtrc21,
4326        ctsuchtrca::Chtrc21,
4327        Ctsuchtrca_SPEC,
4328        crate::common::RW,
4329    > {
4330        crate::common::RegisterField::<
4331            21,
4332            0x1,
4333            1,
4334            0,
4335            ctsuchtrca::Chtrc21,
4336            ctsuchtrca::Chtrc21,
4337            Ctsuchtrca_SPEC,
4338            crate::common::RW,
4339        >::from_register(self, 0)
4340    }
4341
4342    #[doc = "CTSU Channel Transmit/Receive Control A"]
4343    #[inline(always)]
4344    pub fn chtrc22(
4345        self,
4346    ) -> crate::common::RegisterField<
4347        22,
4348        0x1,
4349        1,
4350        0,
4351        ctsuchtrca::Chtrc22,
4352        ctsuchtrca::Chtrc22,
4353        Ctsuchtrca_SPEC,
4354        crate::common::RW,
4355    > {
4356        crate::common::RegisterField::<
4357            22,
4358            0x1,
4359            1,
4360            0,
4361            ctsuchtrca::Chtrc22,
4362            ctsuchtrca::Chtrc22,
4363            Ctsuchtrca_SPEC,
4364            crate::common::RW,
4365        >::from_register(self, 0)
4366    }
4367
4368    #[doc = "CTSU Channel Transmit/Receive Control A"]
4369    #[inline(always)]
4370    pub fn chtrc23(
4371        self,
4372    ) -> crate::common::RegisterField<
4373        23,
4374        0x1,
4375        1,
4376        0,
4377        ctsuchtrca::Chtrc23,
4378        ctsuchtrca::Chtrc23,
4379        Ctsuchtrca_SPEC,
4380        crate::common::RW,
4381    > {
4382        crate::common::RegisterField::<
4383            23,
4384            0x1,
4385            1,
4386            0,
4387            ctsuchtrca::Chtrc23,
4388            ctsuchtrca::Chtrc23,
4389            Ctsuchtrca_SPEC,
4390            crate::common::RW,
4391        >::from_register(self, 0)
4392    }
4393
4394    #[doc = "CTSU Channel Transmit/Receive Control A"]
4395    #[inline(always)]
4396    pub fn chtrc24(
4397        self,
4398    ) -> crate::common::RegisterField<
4399        24,
4400        0x1,
4401        1,
4402        0,
4403        ctsuchtrca::Chtrc24,
4404        ctsuchtrca::Chtrc24,
4405        Ctsuchtrca_SPEC,
4406        crate::common::RW,
4407    > {
4408        crate::common::RegisterField::<
4409            24,
4410            0x1,
4411            1,
4412            0,
4413            ctsuchtrca::Chtrc24,
4414            ctsuchtrca::Chtrc24,
4415            Ctsuchtrca_SPEC,
4416            crate::common::RW,
4417        >::from_register(self, 0)
4418    }
4419
4420    #[doc = "CTSU Channel Transmit/Receive Control A"]
4421    #[inline(always)]
4422    pub fn chtrc25(
4423        self,
4424    ) -> crate::common::RegisterField<
4425        25,
4426        0x1,
4427        1,
4428        0,
4429        ctsuchtrca::Chtrc25,
4430        ctsuchtrca::Chtrc25,
4431        Ctsuchtrca_SPEC,
4432        crate::common::RW,
4433    > {
4434        crate::common::RegisterField::<
4435            25,
4436            0x1,
4437            1,
4438            0,
4439            ctsuchtrca::Chtrc25,
4440            ctsuchtrca::Chtrc25,
4441            Ctsuchtrca_SPEC,
4442            crate::common::RW,
4443        >::from_register(self, 0)
4444    }
4445
4446    #[doc = "CTSU Channel Transmit/Receive Control A"]
4447    #[inline(always)]
4448    pub fn chtrc26(
4449        self,
4450    ) -> crate::common::RegisterField<
4451        26,
4452        0x1,
4453        1,
4454        0,
4455        ctsuchtrca::Chtrc26,
4456        ctsuchtrca::Chtrc26,
4457        Ctsuchtrca_SPEC,
4458        crate::common::RW,
4459    > {
4460        crate::common::RegisterField::<
4461            26,
4462            0x1,
4463            1,
4464            0,
4465            ctsuchtrca::Chtrc26,
4466            ctsuchtrca::Chtrc26,
4467            Ctsuchtrca_SPEC,
4468            crate::common::RW,
4469        >::from_register(self, 0)
4470    }
4471
4472    #[doc = "CTSU Channel Transmit/Receive Control A"]
4473    #[inline(always)]
4474    pub fn chtrc27(
4475        self,
4476    ) -> crate::common::RegisterField<
4477        27,
4478        0x1,
4479        1,
4480        0,
4481        ctsuchtrca::Chtrc27,
4482        ctsuchtrca::Chtrc27,
4483        Ctsuchtrca_SPEC,
4484        crate::common::RW,
4485    > {
4486        crate::common::RegisterField::<
4487            27,
4488            0x1,
4489            1,
4490            0,
4491            ctsuchtrca::Chtrc27,
4492            ctsuchtrca::Chtrc27,
4493            Ctsuchtrca_SPEC,
4494            crate::common::RW,
4495        >::from_register(self, 0)
4496    }
4497
4498    #[doc = "CTSU Channel Transmit/Receive Control A"]
4499    #[inline(always)]
4500    pub fn chtrc28(
4501        self,
4502    ) -> crate::common::RegisterField<
4503        28,
4504        0x1,
4505        1,
4506        0,
4507        ctsuchtrca::Chtrc28,
4508        ctsuchtrca::Chtrc28,
4509        Ctsuchtrca_SPEC,
4510        crate::common::RW,
4511    > {
4512        crate::common::RegisterField::<
4513            28,
4514            0x1,
4515            1,
4516            0,
4517            ctsuchtrca::Chtrc28,
4518            ctsuchtrca::Chtrc28,
4519            Ctsuchtrca_SPEC,
4520            crate::common::RW,
4521        >::from_register(self, 0)
4522    }
4523
4524    #[doc = "CTSU Channel Transmit/Receive Control A"]
4525    #[inline(always)]
4526    pub fn chtrc29(
4527        self,
4528    ) -> crate::common::RegisterField<
4529        29,
4530        0x1,
4531        1,
4532        0,
4533        ctsuchtrca::Chtrc29,
4534        ctsuchtrca::Chtrc29,
4535        Ctsuchtrca_SPEC,
4536        crate::common::RW,
4537    > {
4538        crate::common::RegisterField::<
4539            29,
4540            0x1,
4541            1,
4542            0,
4543            ctsuchtrca::Chtrc29,
4544            ctsuchtrca::Chtrc29,
4545            Ctsuchtrca_SPEC,
4546            crate::common::RW,
4547        >::from_register(self, 0)
4548    }
4549
4550    #[doc = "CTSU Channel Transmit/Receive Control A"]
4551    #[inline(always)]
4552    pub fn chtrc30(
4553        self,
4554    ) -> crate::common::RegisterField<
4555        30,
4556        0x1,
4557        1,
4558        0,
4559        ctsuchtrca::Chtrc30,
4560        ctsuchtrca::Chtrc30,
4561        Ctsuchtrca_SPEC,
4562        crate::common::RW,
4563    > {
4564        crate::common::RegisterField::<
4565            30,
4566            0x1,
4567            1,
4568            0,
4569            ctsuchtrca::Chtrc30,
4570            ctsuchtrca::Chtrc30,
4571            Ctsuchtrca_SPEC,
4572            crate::common::RW,
4573        >::from_register(self, 0)
4574    }
4575
4576    #[doc = "CTSU Channel Transmit/Receive Control A"]
4577    #[inline(always)]
4578    pub fn chtrc31(
4579        self,
4580    ) -> crate::common::RegisterField<
4581        31,
4582        0x1,
4583        1,
4584        0,
4585        ctsuchtrca::Chtrc31,
4586        ctsuchtrca::Chtrc31,
4587        Ctsuchtrca_SPEC,
4588        crate::common::RW,
4589    > {
4590        crate::common::RegisterField::<
4591            31,
4592            0x1,
4593            1,
4594            0,
4595            ctsuchtrca::Chtrc31,
4596            ctsuchtrca::Chtrc31,
4597            Ctsuchtrca_SPEC,
4598            crate::common::RW,
4599        >::from_register(self, 0)
4600    }
4601}
4602impl ::core::default::Default for Ctsuchtrca {
4603    #[inline(always)]
4604    fn default() -> Ctsuchtrca {
4605        <crate::RegValueT<Ctsuchtrca_SPEC> as RegisterValue<_>>::new(0)
4606    }
4607}
4608pub mod ctsuchtrca {
4609
4610    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4611    pub struct Chtrc00_SPEC;
4612    pub type Chtrc00 = crate::EnumBitfieldStruct<u8, Chtrc00_SPEC>;
4613    impl Chtrc00 {
4614        #[doc = "Reception"]
4615        pub const _0: Self = Self::new(0);
4616
4617        #[doc = "Transmission"]
4618        pub const _1: Self = Self::new(1);
4619    }
4620    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4621    pub struct Chtrc02_SPEC;
4622    pub type Chtrc02 = crate::EnumBitfieldStruct<u8, Chtrc02_SPEC>;
4623    impl Chtrc02 {
4624        #[doc = "Reception"]
4625        pub const _0: Self = Self::new(0);
4626
4627        #[doc = "Transmission"]
4628        pub const _1: Self = Self::new(1);
4629    }
4630    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4631    pub struct Chtrc04_SPEC;
4632    pub type Chtrc04 = crate::EnumBitfieldStruct<u8, Chtrc04_SPEC>;
4633    impl Chtrc04 {
4634        #[doc = "Reception"]
4635        pub const _0: Self = Self::new(0);
4636
4637        #[doc = "Transmission"]
4638        pub const _1: Self = Self::new(1);
4639    }
4640    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4641    pub struct Chtrc05_SPEC;
4642    pub type Chtrc05 = crate::EnumBitfieldStruct<u8, Chtrc05_SPEC>;
4643    impl Chtrc05 {
4644        #[doc = "Reception"]
4645        pub const _0: Self = Self::new(0);
4646
4647        #[doc = "Transmission"]
4648        pub const _1: Self = Self::new(1);
4649    }
4650    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4651    pub struct Chtrc06_SPEC;
4652    pub type Chtrc06 = crate::EnumBitfieldStruct<u8, Chtrc06_SPEC>;
4653    impl Chtrc06 {
4654        #[doc = "Reception"]
4655        pub const _0: Self = Self::new(0);
4656
4657        #[doc = "Transmission"]
4658        pub const _1: Self = Self::new(1);
4659    }
4660    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4661    pub struct Chtrc07_SPEC;
4662    pub type Chtrc07 = crate::EnumBitfieldStruct<u8, Chtrc07_SPEC>;
4663    impl Chtrc07 {
4664        #[doc = "Reception"]
4665        pub const _0: Self = Self::new(0);
4666
4667        #[doc = "Transmission"]
4668        pub const _1: Self = Self::new(1);
4669    }
4670    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4671    pub struct Chtrc08_SPEC;
4672    pub type Chtrc08 = crate::EnumBitfieldStruct<u8, Chtrc08_SPEC>;
4673    impl Chtrc08 {
4674        #[doc = "Reception"]
4675        pub const _0: Self = Self::new(0);
4676
4677        #[doc = "Transmission"]
4678        pub const _1: Self = Self::new(1);
4679    }
4680    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4681    pub struct Chtrc09_SPEC;
4682    pub type Chtrc09 = crate::EnumBitfieldStruct<u8, Chtrc09_SPEC>;
4683    impl Chtrc09 {
4684        #[doc = "Reception"]
4685        pub const _0: Self = Self::new(0);
4686
4687        #[doc = "Transmission"]
4688        pub const _1: Self = Self::new(1);
4689    }
4690    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4691    pub struct Chtrc10_SPEC;
4692    pub type Chtrc10 = crate::EnumBitfieldStruct<u8, Chtrc10_SPEC>;
4693    impl Chtrc10 {
4694        #[doc = "Reception"]
4695        pub const _0: Self = Self::new(0);
4696
4697        #[doc = "Transmission"]
4698        pub const _1: Self = Self::new(1);
4699    }
4700    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4701    pub struct Chtrc11_SPEC;
4702    pub type Chtrc11 = crate::EnumBitfieldStruct<u8, Chtrc11_SPEC>;
4703    impl Chtrc11 {
4704        #[doc = "Reception"]
4705        pub const _0: Self = Self::new(0);
4706
4707        #[doc = "Transmission"]
4708        pub const _1: Self = Self::new(1);
4709    }
4710    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4711    pub struct Chtrc12_SPEC;
4712    pub type Chtrc12 = crate::EnumBitfieldStruct<u8, Chtrc12_SPEC>;
4713    impl Chtrc12 {
4714        #[doc = "Reception"]
4715        pub const _0: Self = Self::new(0);
4716
4717        #[doc = "Transmission"]
4718        pub const _1: Self = Self::new(1);
4719    }
4720    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4721    pub struct Chtrc13_SPEC;
4722    pub type Chtrc13 = crate::EnumBitfieldStruct<u8, Chtrc13_SPEC>;
4723    impl Chtrc13 {
4724        #[doc = "Reception"]
4725        pub const _0: Self = Self::new(0);
4726
4727        #[doc = "Transmission"]
4728        pub const _1: Self = Self::new(1);
4729    }
4730    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4731    pub struct Chtrc14_SPEC;
4732    pub type Chtrc14 = crate::EnumBitfieldStruct<u8, Chtrc14_SPEC>;
4733    impl Chtrc14 {
4734        #[doc = "Reception"]
4735        pub const _0: Self = Self::new(0);
4736
4737        #[doc = "Transmission"]
4738        pub const _1: Self = Self::new(1);
4739    }
4740    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4741    pub struct Chtrc15_SPEC;
4742    pub type Chtrc15 = crate::EnumBitfieldStruct<u8, Chtrc15_SPEC>;
4743    impl Chtrc15 {
4744        #[doc = "Reception"]
4745        pub const _0: Self = Self::new(0);
4746
4747        #[doc = "Transmission"]
4748        pub const _1: Self = Self::new(1);
4749    }
4750    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4751    pub struct Chtrc16_SPEC;
4752    pub type Chtrc16 = crate::EnumBitfieldStruct<u8, Chtrc16_SPEC>;
4753    impl Chtrc16 {
4754        #[doc = "Reception"]
4755        pub const _0: Self = Self::new(0);
4756
4757        #[doc = "Transmission"]
4758        pub const _1: Self = Self::new(1);
4759    }
4760    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4761    pub struct Chtrc17_SPEC;
4762    pub type Chtrc17 = crate::EnumBitfieldStruct<u8, Chtrc17_SPEC>;
4763    impl Chtrc17 {
4764        #[doc = "Reception"]
4765        pub const _0: Self = Self::new(0);
4766
4767        #[doc = "Transmission"]
4768        pub const _1: Self = Self::new(1);
4769    }
4770    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4771    pub struct Chtrc18_SPEC;
4772    pub type Chtrc18 = crate::EnumBitfieldStruct<u8, Chtrc18_SPEC>;
4773    impl Chtrc18 {
4774        #[doc = "Reception"]
4775        pub const _0: Self = Self::new(0);
4776
4777        #[doc = "Transmission"]
4778        pub const _1: Self = Self::new(1);
4779    }
4780    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4781    pub struct Chtrc21_SPEC;
4782    pub type Chtrc21 = crate::EnumBitfieldStruct<u8, Chtrc21_SPEC>;
4783    impl Chtrc21 {
4784        #[doc = "Reception"]
4785        pub const _0: Self = Self::new(0);
4786
4787        #[doc = "Transmission"]
4788        pub const _1: Self = Self::new(1);
4789    }
4790    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4791    pub struct Chtrc22_SPEC;
4792    pub type Chtrc22 = crate::EnumBitfieldStruct<u8, Chtrc22_SPEC>;
4793    impl Chtrc22 {
4794        #[doc = "Reception"]
4795        pub const _0: Self = Self::new(0);
4796
4797        #[doc = "Transmission"]
4798        pub const _1: Self = Self::new(1);
4799    }
4800    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4801    pub struct Chtrc23_SPEC;
4802    pub type Chtrc23 = crate::EnumBitfieldStruct<u8, Chtrc23_SPEC>;
4803    impl Chtrc23 {
4804        #[doc = "Reception"]
4805        pub const _0: Self = Self::new(0);
4806
4807        #[doc = "Transmission"]
4808        pub const _1: Self = Self::new(1);
4809    }
4810    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4811    pub struct Chtrc24_SPEC;
4812    pub type Chtrc24 = crate::EnumBitfieldStruct<u8, Chtrc24_SPEC>;
4813    impl Chtrc24 {
4814        #[doc = "Reception"]
4815        pub const _0: Self = Self::new(0);
4816
4817        #[doc = "Transmission"]
4818        pub const _1: Self = Self::new(1);
4819    }
4820    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4821    pub struct Chtrc25_SPEC;
4822    pub type Chtrc25 = crate::EnumBitfieldStruct<u8, Chtrc25_SPEC>;
4823    impl Chtrc25 {
4824        #[doc = "Reception"]
4825        pub const _0: Self = Self::new(0);
4826
4827        #[doc = "Transmission"]
4828        pub const _1: Self = Self::new(1);
4829    }
4830    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4831    pub struct Chtrc26_SPEC;
4832    pub type Chtrc26 = crate::EnumBitfieldStruct<u8, Chtrc26_SPEC>;
4833    impl Chtrc26 {
4834        #[doc = "Reception"]
4835        pub const _0: Self = Self::new(0);
4836
4837        #[doc = "Transmission"]
4838        pub const _1: Self = Self::new(1);
4839    }
4840    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4841    pub struct Chtrc27_SPEC;
4842    pub type Chtrc27 = crate::EnumBitfieldStruct<u8, Chtrc27_SPEC>;
4843    impl Chtrc27 {
4844        #[doc = "Reception"]
4845        pub const _0: Self = Self::new(0);
4846
4847        #[doc = "Transmission"]
4848        pub const _1: Self = Self::new(1);
4849    }
4850    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4851    pub struct Chtrc28_SPEC;
4852    pub type Chtrc28 = crate::EnumBitfieldStruct<u8, Chtrc28_SPEC>;
4853    impl Chtrc28 {
4854        #[doc = "Reception"]
4855        pub const _0: Self = Self::new(0);
4856
4857        #[doc = "Transmission"]
4858        pub const _1: Self = Self::new(1);
4859    }
4860    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4861    pub struct Chtrc29_SPEC;
4862    pub type Chtrc29 = crate::EnumBitfieldStruct<u8, Chtrc29_SPEC>;
4863    impl Chtrc29 {
4864        #[doc = "Reception"]
4865        pub const _0: Self = Self::new(0);
4866
4867        #[doc = "Transmission"]
4868        pub const _1: Self = Self::new(1);
4869    }
4870    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4871    pub struct Chtrc30_SPEC;
4872    pub type Chtrc30 = crate::EnumBitfieldStruct<u8, Chtrc30_SPEC>;
4873    impl Chtrc30 {
4874        #[doc = "Reception"]
4875        pub const _0: Self = Self::new(0);
4876
4877        #[doc = "Transmission"]
4878        pub const _1: Self = Self::new(1);
4879    }
4880    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4881    pub struct Chtrc31_SPEC;
4882    pub type Chtrc31 = crate::EnumBitfieldStruct<u8, Chtrc31_SPEC>;
4883    impl Chtrc31 {
4884        #[doc = "Reception"]
4885        pub const _0: Self = Self::new(0);
4886
4887        #[doc = "Transmission"]
4888        pub const _1: Self = Self::new(1);
4889    }
4890}
4891#[doc(hidden)]
4892#[derive(Copy, Clone, Eq, PartialEq)]
4893pub struct Ctsuchtrcal_SPEC;
4894impl crate::sealed::RegSpec for Ctsuchtrcal_SPEC {
4895    type DataType = u16;
4896}
4897
4898#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4899pub type Ctsuchtrcal = crate::RegValueT<Ctsuchtrcal_SPEC>;
4900
4901impl NoBitfieldReg<Ctsuchtrcal_SPEC> for Ctsuchtrcal {}
4902impl ::core::default::Default for Ctsuchtrcal {
4903    #[inline(always)]
4904    fn default() -> Ctsuchtrcal {
4905        <crate::RegValueT<Ctsuchtrcal_SPEC> as RegisterValue<_>>::new(0)
4906    }
4907}
4908
4909#[doc(hidden)]
4910#[derive(Copy, Clone, Eq, PartialEq)]
4911pub struct Ctsuchtrc0_SPEC;
4912impl crate::sealed::RegSpec for Ctsuchtrc0_SPEC {
4913    type DataType = u8;
4914}
4915
4916#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4917pub type Ctsuchtrc0 = crate::RegValueT<Ctsuchtrc0_SPEC>;
4918
4919impl NoBitfieldReg<Ctsuchtrc0_SPEC> for Ctsuchtrc0 {}
4920impl ::core::default::Default for Ctsuchtrc0 {
4921    #[inline(always)]
4922    fn default() -> Ctsuchtrc0 {
4923        <crate::RegValueT<Ctsuchtrc0_SPEC> as RegisterValue<_>>::new(0)
4924    }
4925}
4926
4927#[doc(hidden)]
4928#[derive(Copy, Clone, Eq, PartialEq)]
4929pub struct Ctsuchtrc1_SPEC;
4930impl crate::sealed::RegSpec for Ctsuchtrc1_SPEC {
4931    type DataType = u8;
4932}
4933
4934#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4935pub type Ctsuchtrc1 = crate::RegValueT<Ctsuchtrc1_SPEC>;
4936
4937impl NoBitfieldReg<Ctsuchtrc1_SPEC> for Ctsuchtrc1 {}
4938impl ::core::default::Default for Ctsuchtrc1 {
4939    #[inline(always)]
4940    fn default() -> Ctsuchtrc1 {
4941        <crate::RegValueT<Ctsuchtrc1_SPEC> as RegisterValue<_>>::new(0)
4942    }
4943}
4944
4945#[doc(hidden)]
4946#[derive(Copy, Clone, Eq, PartialEq)]
4947pub struct Ctsuchtrcah_SPEC;
4948impl crate::sealed::RegSpec for Ctsuchtrcah_SPEC {
4949    type DataType = u16;
4950}
4951
4952#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4953pub type Ctsuchtrcah = crate::RegValueT<Ctsuchtrcah_SPEC>;
4954
4955impl NoBitfieldReg<Ctsuchtrcah_SPEC> for Ctsuchtrcah {}
4956impl ::core::default::Default for Ctsuchtrcah {
4957    #[inline(always)]
4958    fn default() -> Ctsuchtrcah {
4959        <crate::RegValueT<Ctsuchtrcah_SPEC> as RegisterValue<_>>::new(0)
4960    }
4961}
4962
4963#[doc(hidden)]
4964#[derive(Copy, Clone, Eq, PartialEq)]
4965pub struct Ctsuchtrc2_SPEC;
4966impl crate::sealed::RegSpec for Ctsuchtrc2_SPEC {
4967    type DataType = u8;
4968}
4969
4970#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4971pub type Ctsuchtrc2 = crate::RegValueT<Ctsuchtrc2_SPEC>;
4972
4973impl NoBitfieldReg<Ctsuchtrc2_SPEC> for Ctsuchtrc2 {}
4974impl ::core::default::Default for Ctsuchtrc2 {
4975    #[inline(always)]
4976    fn default() -> Ctsuchtrc2 {
4977        <crate::RegValueT<Ctsuchtrc2_SPEC> as RegisterValue<_>>::new(0)
4978    }
4979}
4980
4981#[doc(hidden)]
4982#[derive(Copy, Clone, Eq, PartialEq)]
4983pub struct Ctsuchtrc3_SPEC;
4984impl crate::sealed::RegSpec for Ctsuchtrc3_SPEC {
4985    type DataType = u8;
4986}
4987
4988#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4989pub type Ctsuchtrc3 = crate::RegValueT<Ctsuchtrc3_SPEC>;
4990
4991impl NoBitfieldReg<Ctsuchtrc3_SPEC> for Ctsuchtrc3 {}
4992impl ::core::default::Default for Ctsuchtrc3 {
4993    #[inline(always)]
4994    fn default() -> Ctsuchtrc3 {
4995        <crate::RegValueT<Ctsuchtrc3_SPEC> as RegisterValue<_>>::new(0)
4996    }
4997}
4998
4999#[doc(hidden)]
5000#[derive(Copy, Clone, Eq, PartialEq)]
5001pub struct Ctsuchtrcb_SPEC;
5002impl crate::sealed::RegSpec for Ctsuchtrcb_SPEC {
5003    type DataType = u32;
5004}
5005
5006#[doc = "CTSU Channel Transmit/Receive Control Register B"]
5007pub type Ctsuchtrcb = crate::RegValueT<Ctsuchtrcb_SPEC>;
5008
5009impl Ctsuchtrcb {
5010    #[doc = "CTSU Channel Transmit/Receive Control B"]
5011    #[inline(always)]
5012    pub fn chtrc32(
5013        self,
5014    ) -> crate::common::RegisterField<
5015        0,
5016        0x1,
5017        1,
5018        0,
5019        ctsuchtrcb::Chtrc32,
5020        ctsuchtrcb::Chtrc32,
5021        Ctsuchtrcb_SPEC,
5022        crate::common::RW,
5023    > {
5024        crate::common::RegisterField::<
5025            0,
5026            0x1,
5027            1,
5028            0,
5029            ctsuchtrcb::Chtrc32,
5030            ctsuchtrcb::Chtrc32,
5031            Ctsuchtrcb_SPEC,
5032            crate::common::RW,
5033        >::from_register(self, 0)
5034    }
5035
5036    #[doc = "CTSU Channel Transmit/Receive Control B"]
5037    #[inline(always)]
5038    pub fn chtrc33(
5039        self,
5040    ) -> crate::common::RegisterField<
5041        1,
5042        0x1,
5043        1,
5044        0,
5045        ctsuchtrcb::Chtrc33,
5046        ctsuchtrcb::Chtrc33,
5047        Ctsuchtrcb_SPEC,
5048        crate::common::RW,
5049    > {
5050        crate::common::RegisterField::<
5051            1,
5052            0x1,
5053            1,
5054            0,
5055            ctsuchtrcb::Chtrc33,
5056            ctsuchtrcb::Chtrc33,
5057            Ctsuchtrcb_SPEC,
5058            crate::common::RW,
5059        >::from_register(self, 0)
5060    }
5061
5062    #[doc = "CTSU Channel Transmit/Receive Control B"]
5063    #[inline(always)]
5064    pub fn chtrc34(
5065        self,
5066    ) -> crate::common::RegisterField<
5067        2,
5068        0x1,
5069        1,
5070        0,
5071        ctsuchtrcb::Chtrc34,
5072        ctsuchtrcb::Chtrc34,
5073        Ctsuchtrcb_SPEC,
5074        crate::common::RW,
5075    > {
5076        crate::common::RegisterField::<
5077            2,
5078            0x1,
5079            1,
5080            0,
5081            ctsuchtrcb::Chtrc34,
5082            ctsuchtrcb::Chtrc34,
5083            Ctsuchtrcb_SPEC,
5084            crate::common::RW,
5085        >::from_register(self, 0)
5086    }
5087
5088    #[doc = "CTSU Channel Transmit/Receive Control B"]
5089    #[inline(always)]
5090    pub fn chtrc35(
5091        self,
5092    ) -> crate::common::RegisterField<
5093        3,
5094        0x1,
5095        1,
5096        0,
5097        ctsuchtrcb::Chtrc35,
5098        ctsuchtrcb::Chtrc35,
5099        Ctsuchtrcb_SPEC,
5100        crate::common::RW,
5101    > {
5102        crate::common::RegisterField::<
5103            3,
5104            0x1,
5105            1,
5106            0,
5107            ctsuchtrcb::Chtrc35,
5108            ctsuchtrcb::Chtrc35,
5109            Ctsuchtrcb_SPEC,
5110            crate::common::RW,
5111        >::from_register(self, 0)
5112    }
5113}
5114impl ::core::default::Default for Ctsuchtrcb {
5115    #[inline(always)]
5116    fn default() -> Ctsuchtrcb {
5117        <crate::RegValueT<Ctsuchtrcb_SPEC> as RegisterValue<_>>::new(0)
5118    }
5119}
5120pub mod ctsuchtrcb {
5121
5122    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5123    pub struct Chtrc32_SPEC;
5124    pub type Chtrc32 = crate::EnumBitfieldStruct<u8, Chtrc32_SPEC>;
5125    impl Chtrc32 {
5126        #[doc = "Reception"]
5127        pub const _0: Self = Self::new(0);
5128
5129        #[doc = "Transmission"]
5130        pub const _1: Self = Self::new(1);
5131    }
5132    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5133    pub struct Chtrc33_SPEC;
5134    pub type Chtrc33 = crate::EnumBitfieldStruct<u8, Chtrc33_SPEC>;
5135    impl Chtrc33 {
5136        #[doc = "Reception"]
5137        pub const _0: Self = Self::new(0);
5138
5139        #[doc = "Transmission"]
5140        pub const _1: Self = Self::new(1);
5141    }
5142    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5143    pub struct Chtrc34_SPEC;
5144    pub type Chtrc34 = crate::EnumBitfieldStruct<u8, Chtrc34_SPEC>;
5145    impl Chtrc34 {
5146        #[doc = "Reception"]
5147        pub const _0: Self = Self::new(0);
5148
5149        #[doc = "Transmission"]
5150        pub const _1: Self = Self::new(1);
5151    }
5152    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5153    pub struct Chtrc35_SPEC;
5154    pub type Chtrc35 = crate::EnumBitfieldStruct<u8, Chtrc35_SPEC>;
5155    impl Chtrc35 {
5156        #[doc = "Reception"]
5157        pub const _0: Self = Self::new(0);
5158
5159        #[doc = "Transmission"]
5160        pub const _1: Self = Self::new(1);
5161    }
5162}
5163#[doc(hidden)]
5164#[derive(Copy, Clone, Eq, PartialEq)]
5165pub struct Ctsuchtrcbl_SPEC;
5166impl crate::sealed::RegSpec for Ctsuchtrcbl_SPEC {
5167    type DataType = u16;
5168}
5169
5170#[doc = "CTSU Channel Transmit/Receive Control Register B"]
5171pub type Ctsuchtrcbl = crate::RegValueT<Ctsuchtrcbl_SPEC>;
5172
5173impl NoBitfieldReg<Ctsuchtrcbl_SPEC> for Ctsuchtrcbl {}
5174impl ::core::default::Default for Ctsuchtrcbl {
5175    #[inline(always)]
5176    fn default() -> Ctsuchtrcbl {
5177        <crate::RegValueT<Ctsuchtrcbl_SPEC> as RegisterValue<_>>::new(0)
5178    }
5179}
5180
5181#[doc(hidden)]
5182#[derive(Copy, Clone, Eq, PartialEq)]
5183pub struct Ctsuchtrc4_SPEC;
5184impl crate::sealed::RegSpec for Ctsuchtrc4_SPEC {
5185    type DataType = u8;
5186}
5187
5188#[doc = "CTSU Channel Transmit/Receive Control Register B"]
5189pub type Ctsuchtrc4 = crate::RegValueT<Ctsuchtrc4_SPEC>;
5190
5191impl NoBitfieldReg<Ctsuchtrc4_SPEC> for Ctsuchtrc4 {}
5192impl ::core::default::Default for Ctsuchtrc4 {
5193    #[inline(always)]
5194    fn default() -> Ctsuchtrc4 {
5195        <crate::RegValueT<Ctsuchtrc4_SPEC> as RegisterValue<_>>::new(0)
5196    }
5197}
5198
5199#[doc(hidden)]
5200#[derive(Copy, Clone, Eq, PartialEq)]
5201pub struct Ctsusr_SPEC;
5202impl crate::sealed::RegSpec for Ctsusr_SPEC {
5203    type DataType = u32;
5204}
5205
5206#[doc = "CTSU Status Register"]
5207pub type Ctsusr = crate::RegValueT<Ctsusr_SPEC>;
5208
5209impl Ctsusr {
5210    #[doc = "CTSU Multi-Clock Counter"]
5211    #[inline(always)]
5212    pub fn mfc(
5213        self,
5214    ) -> crate::common::RegisterField<
5215        0,
5216        0x3,
5217        1,
5218        0,
5219        ctsusr::Mfc,
5220        ctsusr::Mfc,
5221        Ctsusr_SPEC,
5222        crate::common::RW,
5223    > {
5224        crate::common::RegisterField::<
5225            0,
5226            0x3,
5227            1,
5228            0,
5229            ctsusr::Mfc,
5230            ctsusr::Mfc,
5231            Ctsusr_SPEC,
5232            crate::common::RW,
5233        >::from_register(self, 0)
5234    }
5235
5236    #[doc = "CTSU CTSUICOMP1 Flag Reset"]
5237    #[inline(always)]
5238    pub fn icomprst(
5239        self,
5240    ) -> crate::common::RegisterFieldBool<5, 1, 0, Ctsusr_SPEC, crate::common::W> {
5241        crate::common::RegisterFieldBool::<5, 1, 0, Ctsusr_SPEC, crate::common::W>::from_register(
5242            self, 0,
5243        )
5244    }
5245
5246    #[doc = "CTSU Sense Current Error Monitor"]
5247    #[inline(always)]
5248    pub fn icomp1(
5249        self,
5250    ) -> crate::common::RegisterField<
5251        6,
5252        0x1,
5253        1,
5254        0,
5255        ctsusr::Icomp1,
5256        ctsusr::Icomp1,
5257        Ctsusr_SPEC,
5258        crate::common::R,
5259    > {
5260        crate::common::RegisterField::<
5261            6,
5262            0x1,
5263            1,
5264            0,
5265            ctsusr::Icomp1,
5266            ctsusr::Icomp1,
5267            Ctsusr_SPEC,
5268            crate::common::R,
5269        >::from_register(self, 0)
5270    }
5271
5272    #[doc = "TSCAP Voltage Error Monitor"]
5273    #[inline(always)]
5274    pub fn icomp0(
5275        self,
5276    ) -> crate::common::RegisterField<
5277        7,
5278        0x1,
5279        1,
5280        0,
5281        ctsusr::Icomp0,
5282        ctsusr::Icomp0,
5283        Ctsusr_SPEC,
5284        crate::common::R,
5285    > {
5286        crate::common::RegisterField::<
5287            7,
5288            0x1,
5289            1,
5290            0,
5291            ctsusr::Icomp0,
5292            ctsusr::Icomp0,
5293            Ctsusr_SPEC,
5294            crate::common::R,
5295        >::from_register(self, 0)
5296    }
5297
5298    #[doc = "CTSU Measurement Status Counter"]
5299    #[inline(always)]
5300    pub fn stc(
5301        self,
5302    ) -> crate::common::RegisterField<
5303        8,
5304        0x7,
5305        1,
5306        0,
5307        ctsusr::Stc,
5308        ctsusr::Stc,
5309        Ctsusr_SPEC,
5310        crate::common::R,
5311    > {
5312        crate::common::RegisterField::<
5313            8,
5314            0x7,
5315            1,
5316            0,
5317            ctsusr::Stc,
5318            ctsusr::Stc,
5319            Ctsusr_SPEC,
5320            crate::common::R,
5321        >::from_register(self, 0)
5322    }
5323
5324    #[doc = "CTSU Data Transfer Status Flag"]
5325    #[inline(always)]
5326    pub fn dtsr(
5327        self,
5328    ) -> crate::common::RegisterField<
5329        12,
5330        0x1,
5331        1,
5332        0,
5333        ctsusr::Dtsr,
5334        ctsusr::Dtsr,
5335        Ctsusr_SPEC,
5336        crate::common::R,
5337    > {
5338        crate::common::RegisterField::<
5339            12,
5340            0x1,
5341            1,
5342            0,
5343            ctsusr::Dtsr,
5344            ctsusr::Dtsr,
5345            Ctsusr_SPEC,
5346            crate::common::R,
5347        >::from_register(self, 0)
5348    }
5349
5350    #[doc = "CTSU Sensor Counter Overflow Flag"]
5351    #[inline(always)]
5352    pub fn sensovf(
5353        self,
5354    ) -> crate::common::RegisterField<
5355        13,
5356        0x1,
5357        1,
5358        0,
5359        ctsusr::Sensovf,
5360        ctsusr::Sensovf,
5361        Ctsusr_SPEC,
5362        crate::common::RW,
5363    > {
5364        crate::common::RegisterField::<
5365            13,
5366            0x1,
5367            1,
5368            0,
5369            ctsusr::Sensovf,
5370            ctsusr::Sensovf,
5371            Ctsusr_SPEC,
5372            crate::common::RW,
5373        >::from_register(self, 0)
5374    }
5375
5376    #[doc = "CTSU SUCLK Counter Overflow Flag"]
5377    #[inline(always)]
5378    pub fn suovf(
5379        self,
5380    ) -> crate::common::RegisterField<
5381        14,
5382        0x1,
5383        1,
5384        0,
5385        ctsusr::Suovf,
5386        ctsusr::Suovf,
5387        Ctsusr_SPEC,
5388        crate::common::RW,
5389    > {
5390        crate::common::RegisterField::<
5391            14,
5392            0x1,
5393            1,
5394            0,
5395            ctsusr::Suovf,
5396            ctsusr::Suovf,
5397            Ctsusr_SPEC,
5398            crate::common::RW,
5399        >::from_register(self, 0)
5400    }
5401
5402    #[doc = "CTSU Mutual Capacitance Status Flag"]
5403    #[inline(always)]
5404    pub fn ps(
5405        self,
5406    ) -> crate::common::RegisterField<
5407        15,
5408        0x1,
5409        1,
5410        0,
5411        ctsusr::Ps,
5412        ctsusr::Ps,
5413        Ctsusr_SPEC,
5414        crate::common::R,
5415    > {
5416        crate::common::RegisterField::<
5417            15,
5418            0x1,
5419            1,
5420            0,
5421            ctsusr::Ps,
5422            ctsusr::Ps,
5423            Ctsusr_SPEC,
5424            crate::common::R,
5425        >::from_register(self, 0)
5426    }
5427
5428    #[doc = "CTSU CFC Read Channel Select"]
5429    #[inline(always)]
5430    pub fn cfcrdch(
5431        self,
5432    ) -> crate::common::RegisterField<
5433        16,
5434        0x3f,
5435        1,
5436        0,
5437        ctsusr::Cfcrdch,
5438        ctsusr::Cfcrdch,
5439        Ctsusr_SPEC,
5440        crate::common::RW,
5441    > {
5442        crate::common::RegisterField::<
5443            16,
5444            0x3f,
5445            1,
5446            0,
5447            ctsusr::Cfcrdch,
5448            ctsusr::Cfcrdch,
5449            Ctsusr_SPEC,
5450            crate::common::RW,
5451        >::from_register(self, 0)
5452    }
5453}
5454impl ::core::default::Default for Ctsusr {
5455    #[inline(always)]
5456    fn default() -> Ctsusr {
5457        <crate::RegValueT<Ctsusr_SPEC> as RegisterValue<_>>::new(0)
5458    }
5459}
5460pub mod ctsusr {
5461
5462    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5463    pub struct Mfc_SPEC;
5464    pub type Mfc = crate::EnumBitfieldStruct<u8, Mfc_SPEC>;
5465    impl Mfc {
5466        #[doc = "Multi-clock 0"]
5467        pub const _00: Self = Self::new(0);
5468
5469        #[doc = "Multi-clock 1"]
5470        pub const _01: Self = Self::new(1);
5471
5472        #[doc = "Multi-clock 2"]
5473        pub const _10: Self = Self::new(2);
5474
5475        #[doc = "Multi-clock 3"]
5476        pub const _11: Self = Self::new(3);
5477    }
5478    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5479    pub struct Icomp1_SPEC;
5480    pub type Icomp1 = crate::EnumBitfieldStruct<u8, Icomp1_SPEC>;
5481    impl Icomp1 {
5482        #[doc = "Normal sensor current"]
5483        pub const _0: Self = Self::new(0);
5484
5485        #[doc = "Abnormal sensor current"]
5486        pub const _1: Self = Self::new(1);
5487    }
5488    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5489    pub struct Icomp0_SPEC;
5490    pub type Icomp0 = crate::EnumBitfieldStruct<u8, Icomp0_SPEC>;
5491    impl Icomp0 {
5492        #[doc = "Normal TSCAP voltage"]
5493        pub const _0: Self = Self::new(0);
5494
5495        #[doc = "Abnormal TSCAP voltage"]
5496        pub const _1: Self = Self::new(1);
5497    }
5498    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5499    pub struct Stc_SPEC;
5500    pub type Stc = crate::EnumBitfieldStruct<u8, Stc_SPEC>;
5501    impl Stc {
5502        #[doc = "Status 0"]
5503        pub const _000: Self = Self::new(0);
5504
5505        #[doc = "Status 1"]
5506        pub const _001: Self = Self::new(1);
5507
5508        #[doc = "Status 2"]
5509        pub const _010: Self = Self::new(2);
5510
5511        #[doc = "Status 3"]
5512        pub const _011: Self = Self::new(3);
5513
5514        #[doc = "Status 4"]
5515        pub const _100: Self = Self::new(4);
5516
5517        #[doc = "Status 5"]
5518        pub const _101: Self = Self::new(5);
5519    }
5520    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5521    pub struct Dtsr_SPEC;
5522    pub type Dtsr = crate::EnumBitfieldStruct<u8, Dtsr_SPEC>;
5523    impl Dtsr {
5524        #[doc = "Read"]
5525        pub const _0: Self = Self::new(0);
5526
5527        #[doc = "Not read"]
5528        pub const _1: Self = Self::new(1);
5529    }
5530    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5531    pub struct Sensovf_SPEC;
5532    pub type Sensovf = crate::EnumBitfieldStruct<u8, Sensovf_SPEC>;
5533    impl Sensovf {
5534        #[doc = "No overflow occurred"]
5535        pub const _0: Self = Self::new(0);
5536
5537        #[doc = "Overflow occurred"]
5538        pub const _1: Self = Self::new(1);
5539    }
5540    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5541    pub struct Suovf_SPEC;
5542    pub type Suovf = crate::EnumBitfieldStruct<u8, Suovf_SPEC>;
5543    impl Suovf {
5544        #[doc = "No overflow occurred"]
5545        pub const _0: Self = Self::new(0);
5546
5547        #[doc = "Overflow occurred"]
5548        pub const _1: Self = Self::new(1);
5549    }
5550    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5551    pub struct Ps_SPEC;
5552    pub type Ps = crate::EnumBitfieldStruct<u8, Ps_SPEC>;
5553    impl Ps {
5554        #[doc = "First measurement"]
5555        pub const _0: Self = Self::new(0);
5556
5557        #[doc = "Second measurement"]
5558        pub const _1: Self = Self::new(1);
5559    }
5560    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5561    pub struct Cfcrdch_SPEC;
5562    pub type Cfcrdch = crate::EnumBitfieldStruct<u8, Cfcrdch_SPEC>;
5563    impl Cfcrdch {
5564        #[doc = "TS00"]
5565        pub const _0_X_00: Self = Self::new(0);
5566
5567        #[doc = "TS02 (CFC)"]
5568        pub const _0_X_02: Self = Self::new(2);
5569
5570        #[doc = "TS04"]
5571        pub const _0_X_04: Self = Self::new(4);
5572
5573        #[doc = "TS05"]
5574        pub const _0_X_05: Self = Self::new(5);
5575
5576        #[doc = "TS06"]
5577        pub const _0_X_06: Self = Self::new(6);
5578
5579        #[doc = "TS07"]
5580        pub const _0_X_07: Self = Self::new(7);
5581
5582        #[doc = "TS08 (CFC)"]
5583        pub const _0_X_08: Self = Self::new(8);
5584
5585        #[doc = "TS09 (CFC)"]
5586        pub const _0_X_09: Self = Self::new(9);
5587
5588        #[doc = "TS10 (CFC)"]
5589        pub const _0_X_0_A: Self = Self::new(10);
5590
5591        #[doc = "TS11 (CFC)"]
5592        pub const _0_X_0_B: Self = Self::new(11);
5593
5594        #[doc = "TS12 (CFC)"]
5595        pub const _0_X_0_C: Self = Self::new(12);
5596
5597        #[doc = "TS13 (CFC)"]
5598        pub const _0_X_0_D: Self = Self::new(13);
5599
5600        #[doc = "TS14 (CFC)"]
5601        pub const _0_X_0_E: Self = Self::new(14);
5602
5603        #[doc = "TS15 (CFC)"]
5604        pub const _0_X_0_F: Self = Self::new(15);
5605
5606        #[doc = "TS16 (CFC)"]
5607        pub const _0_X_10: Self = Self::new(16);
5608
5609        #[doc = "TS17"]
5610        pub const _0_X_11: Self = Self::new(17);
5611
5612        #[doc = "TS18"]
5613        pub const _0_X_12: Self = Self::new(18);
5614
5615        #[doc = "TS21"]
5616        pub const _0_X_15: Self = Self::new(21);
5617
5618        #[doc = "TS22"]
5619        pub const _0_X_16: Self = Self::new(22);
5620
5621        #[doc = "TS23"]
5622        pub const _0_X_17: Self = Self::new(23);
5623
5624        #[doc = "TS24"]
5625        pub const _0_X_18: Self = Self::new(24);
5626
5627        #[doc = "TS25"]
5628        pub const _0_X_19: Self = Self::new(25);
5629
5630        #[doc = "TS26 (CFC)"]
5631        pub const _0_X_1_A: Self = Self::new(26);
5632
5633        #[doc = "TS27 (CFC)"]
5634        pub const _0_X_1_B: Self = Self::new(27);
5635
5636        #[doc = "TS28 (CFC)"]
5637        pub const _0_X_1_C: Self = Self::new(28);
5638
5639        #[doc = "TS29 (CFC)"]
5640        pub const _0_X_1_D: Self = Self::new(29);
5641
5642        #[doc = "TS30 (CFC)"]
5643        pub const _0_X_1_E: Self = Self::new(30);
5644
5645        #[doc = "TS31 (CFC)"]
5646        pub const _0_X_1_F: Self = Self::new(31);
5647
5648        #[doc = "TS32 (CFC)"]
5649        pub const _0_X_20: Self = Self::new(32);
5650
5651        #[doc = "TS33 (CFC)"]
5652        pub const _0_X_21: Self = Self::new(33);
5653
5654        #[doc = "TS34 (CFC)"]
5655        pub const _0_X_22: Self = Self::new(34);
5656
5657        #[doc = "TS35 (CFC)"]
5658        pub const _0_X_23: Self = Self::new(35);
5659    }
5660}
5661#[doc(hidden)]
5662#[derive(Copy, Clone, Eq, PartialEq)]
5663pub struct Ctsusrl_SPEC;
5664impl crate::sealed::RegSpec for Ctsusrl_SPEC {
5665    type DataType = u16;
5666}
5667
5668#[doc = "CTSU Status Register"]
5669pub type Ctsusrl = crate::RegValueT<Ctsusrl_SPEC>;
5670
5671impl NoBitfieldReg<Ctsusrl_SPEC> for Ctsusrl {}
5672impl ::core::default::Default for Ctsusrl {
5673    #[inline(always)]
5674    fn default() -> Ctsusrl {
5675        <crate::RegValueT<Ctsusrl_SPEC> as RegisterValue<_>>::new(0)
5676    }
5677}
5678
5679#[doc(hidden)]
5680#[derive(Copy, Clone, Eq, PartialEq)]
5681pub struct Ctsusr0_SPEC;
5682impl crate::sealed::RegSpec for Ctsusr0_SPEC {
5683    type DataType = u8;
5684}
5685
5686#[doc = "CTSU Status Register"]
5687pub type Ctsusr0 = crate::RegValueT<Ctsusr0_SPEC>;
5688
5689impl NoBitfieldReg<Ctsusr0_SPEC> for Ctsusr0 {}
5690impl ::core::default::Default for Ctsusr0 {
5691    #[inline(always)]
5692    fn default() -> Ctsusr0 {
5693        <crate::RegValueT<Ctsusr0_SPEC> as RegisterValue<_>>::new(0)
5694    }
5695}
5696
5697#[doc(hidden)]
5698#[derive(Copy, Clone, Eq, PartialEq)]
5699pub struct Ctsust_SPEC;
5700impl crate::sealed::RegSpec for Ctsust_SPEC {
5701    type DataType = u8;
5702}
5703
5704#[doc = "CTSU Status Register"]
5705pub type Ctsust = crate::RegValueT<Ctsust_SPEC>;
5706
5707impl NoBitfieldReg<Ctsust_SPEC> for Ctsust {}
5708impl ::core::default::Default for Ctsust {
5709    #[inline(always)]
5710    fn default() -> Ctsust {
5711        <crate::RegValueT<Ctsust_SPEC> as RegisterValue<_>>::new(0)
5712    }
5713}
5714
5715#[doc(hidden)]
5716#[derive(Copy, Clone, Eq, PartialEq)]
5717pub struct Ctsusrh_SPEC;
5718impl crate::sealed::RegSpec for Ctsusrh_SPEC {
5719    type DataType = u16;
5720}
5721
5722#[doc = "CTSU Status Register"]
5723pub type Ctsusrh = crate::RegValueT<Ctsusrh_SPEC>;
5724
5725impl NoBitfieldReg<Ctsusrh_SPEC> for Ctsusrh {}
5726impl ::core::default::Default for Ctsusrh {
5727    #[inline(always)]
5728    fn default() -> Ctsusrh {
5729        <crate::RegValueT<Ctsusrh_SPEC> as RegisterValue<_>>::new(0)
5730    }
5731}
5732
5733#[doc(hidden)]
5734#[derive(Copy, Clone, Eq, PartialEq)]
5735pub struct Ctsusr2_SPEC;
5736impl crate::sealed::RegSpec for Ctsusr2_SPEC {
5737    type DataType = u8;
5738}
5739
5740#[doc = "CTSU Status Register"]
5741pub type Ctsusr2 = crate::RegValueT<Ctsusr2_SPEC>;
5742
5743impl NoBitfieldReg<Ctsusr2_SPEC> for Ctsusr2 {}
5744impl ::core::default::Default for Ctsusr2 {
5745    #[inline(always)]
5746    fn default() -> Ctsusr2 {
5747        <crate::RegValueT<Ctsusr2_SPEC> as RegisterValue<_>>::new(0)
5748    }
5749}
5750
5751#[doc(hidden)]
5752#[derive(Copy, Clone, Eq, PartialEq)]
5753pub struct Ctsuso_SPEC;
5754impl crate::sealed::RegSpec for Ctsuso_SPEC {
5755    type DataType = u32;
5756}
5757
5758#[doc = "CTSU Sensor Offset Register"]
5759pub type Ctsuso = crate::RegValueT<Ctsuso_SPEC>;
5760
5761impl Ctsuso {
5762    #[doc = "CTSU Sensor Offset Adjustment"]
5763    #[inline(always)]
5764    pub fn so(
5765        self,
5766    ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Ctsuso_SPEC, crate::common::RW>
5767    {
5768        crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Ctsuso_SPEC,crate::common::RW>::from_register(self,0)
5769    }
5770
5771    #[doc = "CTSU Measurement Count Setting"]
5772    #[inline(always)]
5773    pub fn snum(
5774        self,
5775    ) -> crate::common::RegisterField<10, 0xff, 1, 0, u8, u8, Ctsuso_SPEC, crate::common::RW> {
5776        crate::common::RegisterField::<10,0xff,1,0,u8,u8,Ctsuso_SPEC,crate::common::RW>::from_register(self,0)
5777    }
5778
5779    #[doc = "Spread Spectrum Frequency"]
5780    #[inline(always)]
5781    pub fn ssdiv(
5782        self,
5783    ) -> crate::common::RegisterField<20, 0xf, 1, 0, u8, u8, Ctsuso_SPEC, crate::common::RW> {
5784        crate::common::RegisterField::<20,0xf,1,0,u8,u8,Ctsuso_SPEC,crate::common::RW>::from_register(self,0)
5785    }
5786
5787    #[doc = "CTSU Base Clock Setting"]
5788    #[inline(always)]
5789    pub fn sdpa(
5790        self,
5791    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ctsuso_SPEC, crate::common::RW> {
5792        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ctsuso_SPEC,crate::common::RW>::from_register(self,0)
5793    }
5794}
5795impl ::core::default::Default for Ctsuso {
5796    #[inline(always)]
5797    fn default() -> Ctsuso {
5798        <crate::RegValueT<Ctsuso_SPEC> as RegisterValue<_>>::new(0)
5799    }
5800}
5801
5802#[doc(hidden)]
5803#[derive(Copy, Clone, Eq, PartialEq)]
5804pub struct Ctsuso0_SPEC;
5805impl crate::sealed::RegSpec for Ctsuso0_SPEC {
5806    type DataType = u16;
5807}
5808
5809#[doc = "CTSU Sensor Offset Register"]
5810pub type Ctsuso0 = crate::RegValueT<Ctsuso0_SPEC>;
5811
5812impl NoBitfieldReg<Ctsuso0_SPEC> for Ctsuso0 {}
5813impl ::core::default::Default for Ctsuso0 {
5814    #[inline(always)]
5815    fn default() -> Ctsuso0 {
5816        <crate::RegValueT<Ctsuso0_SPEC> as RegisterValue<_>>::new(0)
5817    }
5818}
5819
5820#[doc(hidden)]
5821#[derive(Copy, Clone, Eq, PartialEq)]
5822pub struct Ctsuso1_SPEC;
5823impl crate::sealed::RegSpec for Ctsuso1_SPEC {
5824    type DataType = u16;
5825}
5826
5827#[doc = "CTSU Sensor Offset Register"]
5828pub type Ctsuso1 = crate::RegValueT<Ctsuso1_SPEC>;
5829
5830impl NoBitfieldReg<Ctsuso1_SPEC> for Ctsuso1 {}
5831impl ::core::default::Default for Ctsuso1 {
5832    #[inline(always)]
5833    fn default() -> Ctsuso1 {
5834        <crate::RegValueT<Ctsuso1_SPEC> as RegisterValue<_>>::new(0)
5835    }
5836}
5837
5838#[doc(hidden)]
5839#[derive(Copy, Clone, Eq, PartialEq)]
5840pub struct Ctsuscnt_SPEC;
5841impl crate::sealed::RegSpec for Ctsuscnt_SPEC {
5842    type DataType = u32;
5843}
5844
5845#[doc = "CTSU Sensor Counter Register"]
5846pub type Ctsuscnt = crate::RegValueT<Ctsuscnt_SPEC>;
5847
5848impl Ctsuscnt {
5849    #[doc = "CTSU Sensor Counter"]
5850    #[inline(always)]
5851    pub fn senscnt(
5852        self,
5853    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Ctsuscnt_SPEC, crate::common::R>
5854    {
5855        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Ctsuscnt_SPEC,crate::common::R>::from_register(self,0)
5856    }
5857
5858    #[doc = "CTSU SUCLK Counter"]
5859    #[inline(always)]
5860    pub fn suckcnt(
5861        self,
5862    ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, u16, Ctsuscnt_SPEC, crate::common::R>
5863    {
5864        crate::common::RegisterField::<16,0xffff,1,0,u16,u16,Ctsuscnt_SPEC,crate::common::R>::from_register(self,0)
5865    }
5866}
5867impl ::core::default::Default for Ctsuscnt {
5868    #[inline(always)]
5869    fn default() -> Ctsuscnt {
5870        <crate::RegValueT<Ctsuscnt_SPEC> as RegisterValue<_>>::new(0)
5871    }
5872}
5873
5874#[doc(hidden)]
5875#[derive(Copy, Clone, Eq, PartialEq)]
5876pub struct Ctsusc_SPEC;
5877impl crate::sealed::RegSpec for Ctsusc_SPEC {
5878    type DataType = u16;
5879}
5880
5881#[doc = "CTSU Sensor Counter Register"]
5882pub type Ctsusc = crate::RegValueT<Ctsusc_SPEC>;
5883
5884impl NoBitfieldReg<Ctsusc_SPEC> for Ctsusc {}
5885impl ::core::default::Default for Ctsusc {
5886    #[inline(always)]
5887    fn default() -> Ctsusc {
5888        <crate::RegValueT<Ctsusc_SPEC> as RegisterValue<_>>::new(0)
5889    }
5890}
5891
5892#[doc(hidden)]
5893#[derive(Copy, Clone, Eq, PartialEq)]
5894pub struct Ctsucalib_SPEC;
5895impl crate::sealed::RegSpec for Ctsucalib_SPEC {
5896    type DataType = u32;
5897}
5898
5899#[doc = "CTSU Calibration Register"]
5900pub type Ctsucalib = crate::RegValueT<Ctsucalib_SPEC>;
5901
5902impl Ctsucalib {
5903    #[doc = "TS Pin Fixed Output"]
5904    #[inline(always)]
5905    pub fn tsod(
5906        self,
5907    ) -> crate::common::RegisterField<
5908        2,
5909        0x1,
5910        1,
5911        0,
5912        ctsucalib::Tsod,
5913        ctsucalib::Tsod,
5914        Ctsucalib_SPEC,
5915        crate::common::RW,
5916    > {
5917        crate::common::RegisterField::<
5918            2,
5919            0x1,
5920            1,
5921            0,
5922            ctsucalib::Tsod,
5923            ctsucalib::Tsod,
5924            Ctsucalib_SPEC,
5925            crate::common::RW,
5926        >::from_register(self, 0)
5927    }
5928
5929    #[doc = "Power Supply Calibration Select"]
5930    #[inline(always)]
5931    pub fn drv(
5932        self,
5933    ) -> crate::common::RegisterField<
5934        3,
5935        0x1,
5936        1,
5937        0,
5938        ctsucalib::Drv,
5939        ctsucalib::Drv,
5940        Ctsucalib_SPEC,
5941        crate::common::RW,
5942    > {
5943        crate::common::RegisterField::<
5944            3,
5945            0x1,
5946            1,
5947            0,
5948            ctsucalib::Drv,
5949            ctsucalib::Drv,
5950            Ctsucalib_SPEC,
5951            crate::common::RW,
5952        >::from_register(self, 0)
5953    }
5954
5955    #[doc = "Observation Clock Select"]
5956    #[inline(always)]
5957    pub fn clksel(
5958        self,
5959    ) -> crate::common::RegisterField<
5960        4,
5961        0x3,
5962        1,
5963        0,
5964        ctsucalib::Clksel,
5965        ctsucalib::Clksel,
5966        Ctsucalib_SPEC,
5967        crate::common::RW,
5968    > {
5969        crate::common::RegisterField::<
5970            4,
5971            0x3,
5972            1,
5973            0,
5974            ctsucalib::Clksel,
5975            ctsucalib::Clksel,
5976            Ctsucalib_SPEC,
5977            crate::common::RW,
5978        >::from_register(self, 0)
5979    }
5980
5981    #[doc = "SUCLK Forced Oscillation Control"]
5982    #[inline(always)]
5983    pub fn suclken(
5984        self,
5985    ) -> crate::common::RegisterField<
5986        6,
5987        0x1,
5988        1,
5989        0,
5990        ctsucalib::Suclken,
5991        ctsucalib::Suclken,
5992        Ctsucalib_SPEC,
5993        crate::common::RW,
5994    > {
5995        crate::common::RegisterField::<
5996            6,
5997            0x1,
5998            1,
5999            0,
6000            ctsucalib::Suclken,
6001            ctsucalib::Suclken,
6002            Ctsucalib_SPEC,
6003            crate::common::RW,
6004        >::from_register(self, 0)
6005    }
6006
6007    #[doc = "Switched Capacitor Operation Calibration Select Bit"]
6008    #[inline(always)]
6009    pub fn tsoc(
6010        self,
6011    ) -> crate::common::RegisterField<
6012        7,
6013        0x1,
6014        1,
6015        0,
6016        ctsucalib::Tsoc,
6017        ctsucalib::Tsoc,
6018        Ctsucalib_SPEC,
6019        crate::common::RW,
6020    > {
6021        crate::common::RegisterField::<
6022            7,
6023            0x1,
6024            1,
6025            0,
6026            ctsucalib::Tsoc,
6027            ctsucalib::Tsoc,
6028            Ctsucalib_SPEC,
6029            crate::common::RW,
6030        >::from_register(self, 0)
6031    }
6032
6033    #[doc = "Read Count Select of Sensor Counter"]
6034    #[inline(always)]
6035    pub fn cntrdsel(
6036        self,
6037    ) -> crate::common::RegisterField<
6038        8,
6039        0x1,
6040        1,
6041        0,
6042        ctsucalib::Cntrdsel,
6043        ctsucalib::Cntrdsel,
6044        Ctsucalib_SPEC,
6045        crate::common::RW,
6046    > {
6047        crate::common::RegisterField::<
6048            8,
6049            0x1,
6050            1,
6051            0,
6052            ctsucalib::Cntrdsel,
6053            ctsucalib::Cntrdsel,
6054            Ctsucalib_SPEC,
6055            crate::common::RW,
6056        >::from_register(self, 0)
6057    }
6058
6059    #[doc = "TS Pin Fixed Output Value Set"]
6060    #[inline(always)]
6061    pub fn ioc(
6062        self,
6063    ) -> crate::common::RegisterField<
6064        9,
6065        0x1,
6066        1,
6067        0,
6068        ctsucalib::Ioc,
6069        ctsucalib::Ioc,
6070        Ctsucalib_SPEC,
6071        crate::common::RW,
6072    > {
6073        crate::common::RegisterField::<
6074            9,
6075            0x1,
6076            1,
6077            0,
6078            ctsucalib::Ioc,
6079            ctsucalib::Ioc,
6080            Ctsucalib_SPEC,
6081            crate::common::RW,
6082        >::from_register(self, 0)
6083    }
6084
6085    #[doc = "CFC Counter Read Mode Select"]
6086    #[inline(always)]
6087    pub fn cfcrdmd(
6088        self,
6089    ) -> crate::common::RegisterField<
6090        10,
6091        0x1,
6092        1,
6093        0,
6094        ctsucalib::Cfcrdmd,
6095        ctsucalib::Cfcrdmd,
6096        Ctsucalib_SPEC,
6097        crate::common::RW,
6098    > {
6099        crate::common::RegisterField::<
6100            10,
6101            0x1,
6102            1,
6103            0,
6104            ctsucalib::Cfcrdmd,
6105            ctsucalib::Cfcrdmd,
6106            Ctsucalib_SPEC,
6107            crate::common::RW,
6108        >::from_register(self, 0)
6109    }
6110
6111    #[doc = "Down Converter Control"]
6112    #[inline(always)]
6113    pub fn dcoff(
6114        self,
6115    ) -> crate::common::RegisterField<
6116        11,
6117        0x1,
6118        1,
6119        0,
6120        ctsucalib::Dcoff,
6121        ctsucalib::Dcoff,
6122        Ctsucalib_SPEC,
6123        crate::common::RW,
6124    > {
6125        crate::common::RegisterField::<
6126            11,
6127            0x1,
6128            1,
6129            0,
6130            ctsucalib::Dcoff,
6131            ctsucalib::Dcoff,
6132            Ctsucalib_SPEC,
6133            crate::common::RW,
6134        >::from_register(self, 0)
6135    }
6136
6137    #[doc = "Observation CFC Clock Select"]
6138    #[inline(always)]
6139    pub fn cfcsel(
6140        self,
6141    ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, Ctsucalib_SPEC, crate::common::RW>
6142    {
6143        crate::common::RegisterField::<16,0x3f,1,0,u8,u8,Ctsucalib_SPEC,crate::common::RW>::from_register(self,0)
6144    }
6145
6146    #[doc = "CFC Oscillator Calibration Mode Select"]
6147    #[inline(always)]
6148    pub fn cfcmode(
6149        self,
6150    ) -> crate::common::RegisterField<
6151        22,
6152        0x1,
6153        1,
6154        0,
6155        ctsucalib::Cfcmode,
6156        ctsucalib::Cfcmode,
6157        Ctsucalib_SPEC,
6158        crate::common::RW,
6159    > {
6160        crate::common::RegisterField::<
6161            22,
6162            0x1,
6163            1,
6164            0,
6165            ctsucalib::Cfcmode,
6166            ctsucalib::Cfcmode,
6167            Ctsucalib_SPEC,
6168            crate::common::RW,
6169        >::from_register(self, 0)
6170    }
6171
6172    #[doc = "Current Offset DAC Current Matrix Calibration Select"]
6173    #[inline(always)]
6174    pub fn dacmsel(
6175        self,
6176    ) -> crate::common::RegisterField<
6177        24,
6178        0x1,
6179        1,
6180        0,
6181        ctsucalib::Dacmsel,
6182        ctsucalib::Dacmsel,
6183        Ctsucalib_SPEC,
6184        crate::common::RW,
6185    > {
6186        crate::common::RegisterField::<
6187            24,
6188            0x1,
6189            1,
6190            0,
6191            ctsucalib::Dacmsel,
6192            ctsucalib::Dacmsel,
6193            Ctsucalib_SPEC,
6194            crate::common::RW,
6195        >::from_register(self, 0)
6196    }
6197
6198    #[doc = "Offset Current Adjustment for Calibration"]
6199    #[inline(always)]
6200    pub fn daccarry(
6201        self,
6202    ) -> crate::common::RegisterField<
6203        25,
6204        0x1,
6205        1,
6206        0,
6207        ctsucalib::Daccarry,
6208        ctsucalib::Daccarry,
6209        Ctsucalib_SPEC,
6210        crate::common::RW,
6211    > {
6212        crate::common::RegisterField::<
6213            25,
6214            0x1,
6215            1,
6216            0,
6217            ctsucalib::Daccarry,
6218            ctsucalib::Daccarry,
6219            Ctsucalib_SPEC,
6220            crate::common::RW,
6221        >::from_register(self, 0)
6222    }
6223
6224    #[doc = "Current Control Oscillator Input Current Matrix Calibration Select"]
6225    #[inline(always)]
6226    pub fn sumsel(
6227        self,
6228    ) -> crate::common::RegisterField<
6229        26,
6230        0x1,
6231        1,
6232        0,
6233        ctsucalib::Sumsel,
6234        ctsucalib::Sumsel,
6235        Ctsucalib_SPEC,
6236        crate::common::RW,
6237    > {
6238        crate::common::RegisterField::<
6239            26,
6240            0x1,
6241            1,
6242            0,
6243            ctsucalib::Sumsel,
6244            ctsucalib::Sumsel,
6245            Ctsucalib_SPEC,
6246            crate::common::RW,
6247        >::from_register(self, 0)
6248    }
6249
6250    #[doc = "Current Control Oscillator Input Current Adjustment for SUCLK"]
6251    #[inline(always)]
6252    pub fn sucarry(
6253        self,
6254    ) -> crate::common::RegisterField<
6255        27,
6256        0x1,
6257        1,
6258        0,
6259        ctsucalib::Sucarry,
6260        ctsucalib::Sucarry,
6261        Ctsucalib_SPEC,
6262        crate::common::RW,
6263    > {
6264        crate::common::RegisterField::<
6265            27,
6266            0x1,
6267            1,
6268            0,
6269            ctsucalib::Sucarry,
6270            ctsucalib::Sucarry,
6271            Ctsucalib_SPEC,
6272            crate::common::RW,
6273        >::from_register(self, 0)
6274    }
6275
6276    #[doc = "Modulation Clock Select for Offset Current Circuits"]
6277    #[inline(always)]
6278    pub fn dacclk(
6279        self,
6280    ) -> crate::common::RegisterField<
6281        28,
6282        0x1,
6283        1,
6284        0,
6285        ctsucalib::Dacclk,
6286        ctsucalib::Dacclk,
6287        Ctsucalib_SPEC,
6288        crate::common::RW,
6289    > {
6290        crate::common::RegisterField::<
6291            28,
6292            0x1,
6293            1,
6294            0,
6295            ctsucalib::Dacclk,
6296            ctsucalib::Dacclk,
6297            Ctsucalib_SPEC,
6298            crate::common::RW,
6299        >::from_register(self, 0)
6300    }
6301
6302    #[doc = "Modulation Clock Select for Current Controlled Oscillator Input Current of SUCLK"]
6303    #[inline(always)]
6304    pub fn ccoclk(
6305        self,
6306    ) -> crate::common::RegisterField<
6307        29,
6308        0x1,
6309        1,
6310        0,
6311        ctsucalib::Ccoclk,
6312        ctsucalib::Ccoclk,
6313        Ctsucalib_SPEC,
6314        crate::common::RW,
6315    > {
6316        crate::common::RegisterField::<
6317            29,
6318            0x1,
6319            1,
6320            0,
6321            ctsucalib::Ccoclk,
6322            ctsucalib::Ccoclk,
6323            Ctsucalib_SPEC,
6324            crate::common::RW,
6325        >::from_register(self, 0)
6326    }
6327
6328    #[doc = "Calibration Selection of Current Controlled Oscillator for Measurement"]
6329    #[inline(always)]
6330    pub fn ccocalib(
6331        self,
6332    ) -> crate::common::RegisterField<
6333        30,
6334        0x1,
6335        1,
6336        0,
6337        ctsucalib::Ccocalib,
6338        ctsucalib::Ccocalib,
6339        Ctsucalib_SPEC,
6340        crate::common::RW,
6341    > {
6342        crate::common::RegisterField::<
6343            30,
6344            0x1,
6345            1,
6346            0,
6347            ctsucalib::Ccocalib,
6348            ctsucalib::Ccocalib,
6349            Ctsucalib_SPEC,
6350            crate::common::RW,
6351        >::from_register(self, 0)
6352    }
6353
6354    #[doc = "Transmit Pin Inverted Output"]
6355    #[inline(always)]
6356    pub fn txrev(
6357        self,
6358    ) -> crate::common::RegisterField<
6359        31,
6360        0x1,
6361        1,
6362        0,
6363        ctsucalib::Txrev,
6364        ctsucalib::Txrev,
6365        Ctsucalib_SPEC,
6366        crate::common::RW,
6367    > {
6368        crate::common::RegisterField::<
6369            31,
6370            0x1,
6371            1,
6372            0,
6373            ctsucalib::Txrev,
6374            ctsucalib::Txrev,
6375            Ctsucalib_SPEC,
6376            crate::common::RW,
6377        >::from_register(self, 0)
6378    }
6379}
6380impl ::core::default::Default for Ctsucalib {
6381    #[inline(always)]
6382    fn default() -> Ctsucalib {
6383        <crate::RegValueT<Ctsucalib_SPEC> as RegisterValue<_>>::new(0)
6384    }
6385}
6386pub mod ctsucalib {
6387
6388    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6389    pub struct Tsod_SPEC;
6390    pub type Tsod = crate::EnumBitfieldStruct<u8, Tsod_SPEC>;
6391    impl Tsod {
6392        #[doc = "Capacitance measurement mode"]
6393        pub const _0: Self = Self::new(0);
6394
6395        #[doc = "Output high or low from TS terminals (controlling by the IOC bit)"]
6396        pub const _1: Self = Self::new(1);
6397    }
6398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6399    pub struct Drv_SPEC;
6400    pub type Drv = crate::EnumBitfieldStruct<u8, Drv_SPEC>;
6401    impl Drv {
6402        #[doc = "Capacitance measurement mode"]
6403        pub const _0: Self = Self::new(0);
6404
6405        #[doc = "Power supply calibration mode"]
6406        pub const _1: Self = Self::new(1);
6407    }
6408    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6409    pub struct Clksel_SPEC;
6410    pub type Clksel = crate::EnumBitfieldStruct<u8, Clksel_SPEC>;
6411    impl Clksel {
6412        #[doc = "Not selected (L fixed output)"]
6413        pub const _00: Self = Self::new(0);
6414
6415        #[doc = "Measurement clock (divided by 8)"]
6416        pub const _01: Self = Self::new(1);
6417
6418        #[doc = "CFC clock (divided by 8)"]
6419        pub const _10: Self = Self::new(2);
6420
6421        #[doc = "SUCLK (divided by 8)"]
6422        pub const _11: Self = Self::new(3);
6423    }
6424    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6425    pub struct Suclken_SPEC;
6426    pub type Suclken = crate::EnumBitfieldStruct<u8, Suclken_SPEC>;
6427    impl Suclken {
6428        #[doc = "SUCLK oscillation only during measurement"]
6429        pub const _0: Self = Self::new(0);
6430
6431        #[doc = "SUCLK always oscillates"]
6432        pub const _1: Self = Self::new(1);
6433    }
6434    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6435    pub struct Tsoc_SPEC;
6436    pub type Tsoc = crate::EnumBitfieldStruct<u8, Tsoc_SPEC>;
6437    impl Tsoc {
6438        #[doc = "Capacitance measurement mode"]
6439        pub const _0: Self = Self::new(0);
6440
6441        #[doc = "Switched capacitor operation calibration mode"]
6442        pub const _1: Self = Self::new(1);
6443    }
6444    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6445    pub struct Cntrdsel_SPEC;
6446    pub type Cntrdsel = crate::EnumBitfieldStruct<u8, Cntrdsel_SPEC>;
6447    impl Cntrdsel {
6448        #[doc = "Read once"]
6449        pub const _0: Self = Self::new(0);
6450
6451        #[doc = "Read twice"]
6452        pub const _1: Self = Self::new(1);
6453    }
6454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6455    pub struct Ioc_SPEC;
6456    pub type Ioc = crate::EnumBitfieldStruct<u8, Ioc_SPEC>;
6457    impl Ioc {
6458        #[doc = "Low level"]
6459        pub const _0: Self = Self::new(0);
6460
6461        #[doc = "High level"]
6462        pub const _1: Self = Self::new(1);
6463    }
6464    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6465    pub struct Cfcrdmd_SPEC;
6466    pub type Cfcrdmd = crate::EnumBitfieldStruct<u8, Cfcrdmd_SPEC>;
6467    impl Cfcrdmd {
6468        #[doc = "Except for mutual capacitance parallel measurement mode"]
6469        pub const _0: Self = Self::new(0);
6470
6471        #[doc = "Mutual capacitance parallel measurement mode"]
6472        pub const _1: Self = Self::new(1);
6473    }
6474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6475    pub struct Dcoff_SPEC;
6476    pub type Dcoff = crate::EnumBitfieldStruct<u8, Dcoff_SPEC>;
6477    impl Dcoff {
6478        #[doc = "Voltage down converter operation (TSCAP voltage generation)"]
6479        pub const _0: Self = Self::new(0);
6480
6481        #[doc = "The voltage down converter is off"]
6482        pub const _1: Self = Self::new(1);
6483    }
6484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6485    pub struct Cfcmode_SPEC;
6486    pub type Cfcmode = crate::EnumBitfieldStruct<u8, Cfcmode_SPEC>;
6487    impl Cfcmode {
6488        #[doc = "CFC current measurement (Capacitance measurement mode)"]
6489        pub const _0: Self = Self::new(0);
6490
6491        #[doc = "External current measurement for calibration"]
6492        pub const _1: Self = Self::new(1);
6493    }
6494    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6495    pub struct Dacmsel_SPEC;
6496    pub type Dacmsel = crate::EnumBitfieldStruct<u8, Dacmsel_SPEC>;
6497    impl Dacmsel {
6498        #[doc = "Capacitance measurement mode"]
6499        pub const _0: Self = Self::new(0);
6500
6501        #[doc = "Current offset DAC current Calibration mode"]
6502        pub const _1: Self = Self::new(1);
6503    }
6504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6505    pub struct Daccarry_SPEC;
6506    pub type Daccarry = crate::EnumBitfieldStruct<u8, Daccarry_SPEC>;
6507    impl Daccarry {
6508        #[doc = "Normal operation"]
6509        pub const _0: Self = Self::new(0);
6510
6511        #[doc = "All current sources can be turned on"]
6512        pub const _1: Self = Self::new(1);
6513    }
6514    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6515    pub struct Sumsel_SPEC;
6516    pub type Sumsel = crate::EnumBitfieldStruct<u8, Sumsel_SPEC>;
6517    impl Sumsel {
6518        #[doc = "Capacitance measurement mode"]
6519        pub const _0: Self = Self::new(0);
6520
6521        #[doc = "Current control oscillator input current matrix calibration mode"]
6522        pub const _1: Self = Self::new(1);
6523    }
6524    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6525    pub struct Sucarry_SPEC;
6526    pub type Sucarry = crate::EnumBitfieldStruct<u8, Sucarry_SPEC>;
6527    impl Sucarry {
6528        #[doc = "Normal operation"]
6529        pub const _0: Self = Self::new(0);
6530
6531        #[doc = "All current sources can be turned on"]
6532        pub const _1: Self = Self::new(1);
6533    }
6534    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6535    pub struct Dacclk_SPEC;
6536    pub type Dacclk = crate::EnumBitfieldStruct<u8, Dacclk_SPEC>;
6537    impl Dacclk {
6538        #[doc = "Operating clock selected by CTSUCRA.CLK \\[1:0\\]"]
6539        pub const _0: Self = Self::new(0);
6540
6541        #[doc = "SUCLK"]
6542        pub const _1: Self = Self::new(1);
6543    }
6544    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6545    pub struct Ccoclk_SPEC;
6546    pub type Ccoclk = crate::EnumBitfieldStruct<u8, Ccoclk_SPEC>;
6547    impl Ccoclk {
6548        #[doc = "Operating clock selected by CTSUCRA.CLK \\[1:0\\]"]
6549        pub const _0: Self = Self::new(0);
6550
6551        #[doc = "SUCLK"]
6552        pub const _1: Self = Self::new(1);
6553    }
6554    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6555    pub struct Ccocalib_SPEC;
6556    pub type Ccocalib = crate::EnumBitfieldStruct<u8, Ccocalib_SPEC>;
6557    impl Ccocalib {
6558        #[doc = "Capacitance measurement mode"]
6559        pub const _0: Self = Self::new(0);
6560
6561        #[doc = "Oscillator calibration mode"]
6562        pub const _1: Self = Self::new(1);
6563    }
6564    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6565    pub struct Txrev_SPEC;
6566    pub type Txrev = crate::EnumBitfieldStruct<u8, Txrev_SPEC>;
6567    impl Txrev {
6568        #[doc = "Normal"]
6569        pub const _0: Self = Self::new(0);
6570
6571        #[doc = "Invert"]
6572        pub const _1: Self = Self::new(1);
6573    }
6574}
6575#[doc(hidden)]
6576#[derive(Copy, Clone, Eq, PartialEq)]
6577pub struct Ctsudbgr0_SPEC;
6578impl crate::sealed::RegSpec for Ctsudbgr0_SPEC {
6579    type DataType = u16;
6580}
6581
6582#[doc = "CTSU Calibration Register"]
6583pub type Ctsudbgr0 = crate::RegValueT<Ctsudbgr0_SPEC>;
6584
6585impl NoBitfieldReg<Ctsudbgr0_SPEC> for Ctsudbgr0 {}
6586impl ::core::default::Default for Ctsudbgr0 {
6587    #[inline(always)]
6588    fn default() -> Ctsudbgr0 {
6589        <crate::RegValueT<Ctsudbgr0_SPEC> as RegisterValue<_>>::new(0)
6590    }
6591}
6592
6593#[doc(hidden)]
6594#[derive(Copy, Clone, Eq, PartialEq)]
6595pub struct Ctsudbgr1_SPEC;
6596impl crate::sealed::RegSpec for Ctsudbgr1_SPEC {
6597    type DataType = u16;
6598}
6599
6600#[doc = "CTSU Calibration Register"]
6601pub type Ctsudbgr1 = crate::RegValueT<Ctsudbgr1_SPEC>;
6602
6603impl NoBitfieldReg<Ctsudbgr1_SPEC> for Ctsudbgr1 {}
6604impl ::core::default::Default for Ctsudbgr1 {
6605    #[inline(always)]
6606    fn default() -> Ctsudbgr1 {
6607        <crate::RegValueT<Ctsudbgr1_SPEC> as RegisterValue<_>>::new(0)
6608    }
6609}
6610
6611#[doc(hidden)]
6612#[derive(Copy, Clone, Eq, PartialEq)]
6613pub struct Ctsusuclka_SPEC;
6614impl crate::sealed::RegSpec for Ctsusuclka_SPEC {
6615    type DataType = u32;
6616}
6617
6618#[doc = "CTSU Sensor Unit Clock Control Register A"]
6619pub type Ctsusuclka = crate::RegValueT<Ctsusuclka_SPEC>;
6620
6621impl NoBitfieldReg<Ctsusuclka_SPEC> for Ctsusuclka {}
6622impl ::core::default::Default for Ctsusuclka {
6623    #[inline(always)]
6624    fn default() -> Ctsusuclka {
6625        <crate::RegValueT<Ctsusuclka_SPEC> as RegisterValue<_>>::new(0)
6626    }
6627}
6628
6629#[doc(hidden)]
6630#[derive(Copy, Clone, Eq, PartialEq)]
6631pub struct Ctsusuclk0_SPEC;
6632impl crate::sealed::RegSpec for Ctsusuclk0_SPEC {
6633    type DataType = u16;
6634}
6635
6636#[doc = "CTSU Sensor Unit Clock Control Register A"]
6637pub type Ctsusuclk0 = crate::RegValueT<Ctsusuclk0_SPEC>;
6638
6639impl NoBitfieldReg<Ctsusuclk0_SPEC> for Ctsusuclk0 {}
6640impl ::core::default::Default for Ctsusuclk0 {
6641    #[inline(always)]
6642    fn default() -> Ctsusuclk0 {
6643        <crate::RegValueT<Ctsusuclk0_SPEC> as RegisterValue<_>>::new(0)
6644    }
6645}
6646
6647#[doc(hidden)]
6648#[derive(Copy, Clone, Eq, PartialEq)]
6649pub struct Ctsusuclk1_SPEC;
6650impl crate::sealed::RegSpec for Ctsusuclk1_SPEC {
6651    type DataType = u16;
6652}
6653
6654#[doc = "CTSU Sensor Unit Clock Control Register A"]
6655pub type Ctsusuclk1 = crate::RegValueT<Ctsusuclk1_SPEC>;
6656
6657impl NoBitfieldReg<Ctsusuclk1_SPEC> for Ctsusuclk1 {}
6658impl ::core::default::Default for Ctsusuclk1 {
6659    #[inline(always)]
6660    fn default() -> Ctsusuclk1 {
6661        <crate::RegValueT<Ctsusuclk1_SPEC> as RegisterValue<_>>::new(0)
6662    }
6663}
6664
6665#[doc(hidden)]
6666#[derive(Copy, Clone, Eq, PartialEq)]
6667pub struct Ctsusuclkb_SPEC;
6668impl crate::sealed::RegSpec for Ctsusuclkb_SPEC {
6669    type DataType = u32;
6670}
6671
6672#[doc = "CTSU Sensor Unit Clock Control Register B"]
6673pub type Ctsusuclkb = crate::RegValueT<Ctsusuclkb_SPEC>;
6674
6675impl Ctsusuclkb {
6676    #[doc = "CTSU SUCLK Frequency Adjustment"]
6677    #[inline(always)]
6678    pub fn suadj2(
6679        self,
6680    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsusuclkb_SPEC, crate::common::RW>
6681    {
6682        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsusuclkb_SPEC,crate::common::RW>::from_register(self,0)
6683    }
6684
6685    #[doc = "CTSU SUCLK Multiplier Rate Setting"]
6686    #[inline(always)]
6687    pub fn sumulti2(
6688        self,
6689    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ctsusuclkb_SPEC, crate::common::RW>
6690    {
6691        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ctsusuclkb_SPEC,crate::common::RW>::from_register(self,0)
6692    }
6693
6694    #[doc = "CTSU SUCLK Frequency Adjustment"]
6695    #[inline(always)]
6696    pub fn suadj3(
6697        self,
6698    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ctsusuclkb_SPEC, crate::common::RW>
6699    {
6700        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ctsusuclkb_SPEC,crate::common::RW>::from_register(self,0)
6701    }
6702
6703    #[doc = "CTSU SUCLK Multiplier Rate Setting"]
6704    #[inline(always)]
6705    pub fn sumulti3(
6706        self,
6707    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ctsusuclkb_SPEC, crate::common::RW>
6708    {
6709        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ctsusuclkb_SPEC,crate::common::RW>::from_register(self,0)
6710    }
6711}
6712impl ::core::default::Default for Ctsusuclkb {
6713    #[inline(always)]
6714    fn default() -> Ctsusuclkb {
6715        <crate::RegValueT<Ctsusuclkb_SPEC> as RegisterValue<_>>::new(0)
6716    }
6717}
6718
6719#[doc(hidden)]
6720#[derive(Copy, Clone, Eq, PartialEq)]
6721pub struct Ctsusuclk2_SPEC;
6722impl crate::sealed::RegSpec for Ctsusuclk2_SPEC {
6723    type DataType = u16;
6724}
6725
6726#[doc = "CTSU Sensor Unit Clock Control Register B"]
6727pub type Ctsusuclk2 = crate::RegValueT<Ctsusuclk2_SPEC>;
6728
6729impl NoBitfieldReg<Ctsusuclk2_SPEC> for Ctsusuclk2 {}
6730impl ::core::default::Default for Ctsusuclk2 {
6731    #[inline(always)]
6732    fn default() -> Ctsusuclk2 {
6733        <crate::RegValueT<Ctsusuclk2_SPEC> as RegisterValue<_>>::new(0)
6734    }
6735}
6736
6737#[doc(hidden)]
6738#[derive(Copy, Clone, Eq, PartialEq)]
6739pub struct Ctsusuclk3_SPEC;
6740impl crate::sealed::RegSpec for Ctsusuclk3_SPEC {
6741    type DataType = u16;
6742}
6743
6744#[doc = "CTSU Sensor Unit Clock Control Register B"]
6745pub type Ctsusuclk3 = crate::RegValueT<Ctsusuclk3_SPEC>;
6746
6747impl NoBitfieldReg<Ctsusuclk3_SPEC> for Ctsusuclk3 {}
6748impl ::core::default::Default for Ctsusuclk3 {
6749    #[inline(always)]
6750    fn default() -> Ctsusuclk3 {
6751        <crate::RegValueT<Ctsusuclk3_SPEC> as RegisterValue<_>>::new(0)
6752    }
6753}
6754
6755#[doc(hidden)]
6756#[derive(Copy, Clone, Eq, PartialEq)]
6757pub struct Ctsucfccnt_SPEC;
6758impl crate::sealed::RegSpec for Ctsucfccnt_SPEC {
6759    type DataType = u32;
6760}
6761
6762#[doc = "CTSU CFC Counter Register"]
6763pub type Ctsucfccnt = crate::RegValueT<Ctsucfccnt_SPEC>;
6764
6765impl Ctsucfccnt {
6766    #[doc = "CTSU CFC Counter"]
6767    #[inline(always)]
6768    pub fn cfccnt(
6769        self,
6770    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Ctsucfccnt_SPEC, crate::common::R>
6771    {
6772        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Ctsucfccnt_SPEC,crate::common::R>::from_register(self,0)
6773    }
6774}
6775impl ::core::default::Default for Ctsucfccnt {
6776    #[inline(always)]
6777    fn default() -> Ctsucfccnt {
6778        <crate::RegValueT<Ctsucfccnt_SPEC> as RegisterValue<_>>::new(0)
6779    }
6780}
6781
6782#[doc(hidden)]
6783#[derive(Copy, Clone, Eq, PartialEq)]
6784pub struct Ctsucfccntl_SPEC;
6785impl crate::sealed::RegSpec for Ctsucfccntl_SPEC {
6786    type DataType = u16;
6787}
6788
6789#[doc = "CTSU CFC Counter Register"]
6790pub type Ctsucfccntl = crate::RegValueT<Ctsucfccntl_SPEC>;
6791
6792impl NoBitfieldReg<Ctsucfccntl_SPEC> for Ctsucfccntl {}
6793impl ::core::default::Default for Ctsucfccntl {
6794    #[inline(always)]
6795    fn default() -> Ctsucfccntl {
6796        <crate::RegValueT<Ctsucfccntl_SPEC> as RegisterValue<_>>::new(0)
6797    }
6798}