Crate ra2l1

Crate ra2l1 

Source
Expand description

Peripheral access API for R7FA2L1AB microcontrollers (generated using svd2rust v0.28.0 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports§

pub use self::port1 as port2;
pub use self::port0 as port3;
pub use self::port0 as port4;
pub use self::port0 as port5;
pub use self::port0 as port6;
pub use self::port0 as port7;
pub use self::port0 as port8;
pub use self::iic0 as iic1;
pub use self::sci1 as sci2;
pub use self::sci1 as sci3;
pub use self::sci1 as sci9;
pub use self::spi0 as spi1;
pub use self::gpt320 as gpt321;
pub use self::gpt320 as gpt322;
pub use self::gpt320 as gpt323;
pub use self::gpt164 as gpt165;
pub use self::gpt164 as gpt166;
pub use self::gpt164 as gpt167;
pub use self::gpt164 as gpt168;
pub use self::gpt164 as gpt169;
pub use self::agt0 as agt1;

Modules§

acmplp
Low-Power Analog Comparator
adc120
12-bit A/D Converter
agt0
Low Power Asynchronous General Purpose Timer 0
bus
BUS Control
cac
Clock Frequency Accuracy Measurement Circuit
can0
Controller Area Network
crc
Cyclic Redundancy Check Calculator
ctsu
Capacitive Touch Sensing Unit
dac12
12-bit D/A converter
dbg
Debug Function
doc
Data Operation Circuit
dtc
Data Transfer Controller
elc
Event Link Controller
flcn
Flash I/O Registers
generic
Common register and bit access and modify traits
gpt164
General PWM 16-bit Timer 4
gpt320
General PWM 32-bit Timer 0
gpt_ops
Output Phase Switching Controller
icu
ICU for CPU
iic0
Inter-Integrated Circuit 0
iic0wu
Inter-Integrated Circuit 0 Wake-up Unit
iwdt
Independent Watchdog Timer
kint
Key Interrupt Function
mstp
Module Stop Control B, C, D
pfs
Pmn Pin Function Control Register
poeg
Port Output Enable Module for GPT
port0
Port 0 Control Registers
port1
Port 1 Control Registers
rmpu
Renesas Memory Protection Unit
rtc
Realtime Clock
sci0
Serial Communication Interface 0
sci1
Serial Communication Interface 0
spi0
Serial Peripheral Interface 0
sram
SRAM Control
sysc
System Control
wdt
Watchdog Timer

Structs§

ACMPLP
Low-Power Analog Comparator
ADC120
12-bit A/D Converter
AGT0
Low Power Asynchronous General Purpose Timer 0
AGT1
Low Power Asynchronous General Purpose Timer 1
BUS
BUS Control
CAC
Clock Frequency Accuracy Measurement Circuit
CAN0
Controller Area Network
CBP
Cache and branch predictor maintenance operations
CPUID
CPUID
CRC
Cyclic Redundancy Check Calculator
CTSU
Capacitive Touch Sensing Unit
CorePeripherals
Core peripherals
DAC12
12-bit D/A converter
DBG
Debug Function
DCB
Debug Control Block
DOC
Data Operation Circuit
DTC
Data Transfer Controller
DWT
Data Watchpoint and Trace unit
ELC
Event Link Controller
FLCN
Flash I/O Registers
FPB
Flash Patch and Breakpoint unit
GPT164
General PWM 16-bit Timer 4
GPT165
General PWM 16-bit Timer 5
GPT166
General PWM 16-bit Timer 6
GPT167
General PWM 16-bit Timer 7
GPT168
General PWM 16-bit Timer 8
GPT169
General PWM 16-bit Timer 9
GPT320
General PWM 32-bit Timer 0
GPT321
General PWM 32-bit Timer 1
GPT322
General PWM 32-bit Timer 2
GPT323
General PWM 32-bit Timer 3
GPT_OPS
Output Phase Switching Controller
ICU
ICU for CPU
IIC0
Inter-Integrated Circuit 0
IIC0WU
Inter-Integrated Circuit 0 Wake-up Unit
IIC1
Inter-Integrated Circuit 1
ITM
Instrumentation Trace Macrocell
IWDT
Independent Watchdog Timer
KINT
Key Interrupt Function
MPU
Memory Protection Unit
MSTP
Module Stop Control B, C, D
NVIC
Nested Vector Interrupt Controller
PFS
Pmn Pin Function Control Register
POEG
Port Output Enable Module for GPT
PORT0
Port 0 Control Registers
PORT1
Port 1 Control Registers
PORT2
Port 2 Control Registers
PORT3
Port 3 Control Registers
PORT4
Port 4 Control Registers
PORT5
Port 5 Control Registers
PORT6
Port 6 Control Registers
PORT7
Port 7 Control Registers
PORT8
Port 8 Control Registers
Peripherals
All the peripherals.
RMPU
Renesas Memory Protection Unit
RTC
Realtime Clock
SCB
System Control Block
SCI0
Serial Communication Interface 0
SCI1
Serial Communication Interface 0
SCI2
Serial Communication Interface 0
SCI3
Serial Communication Interface 0
SCI9
Serial Communication Interface 0
SPI0
Serial Peripheral Interface 0
SPI1
Serial Peripheral Interface 1
SRAM
SRAM Control
SYSC
System Control
SYST
SysTick: System Timer
TPIU
Trace Port Interface Unit
WDT
Watchdog Timer

Enums§

Interrupt
Enumeration of all the interrupts.

Constants§

NVIC_PRIO_BITS
Number available in the NVIC for configuring priority