ra2e3_pac/
rmpu.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:02:40 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Renesas Memory Protection Unit"]
28unsafe impl ::core::marker::Send for super::Rmpu {}
29unsafe impl ::core::marker::Sync for super::Rmpu {}
30impl super::Rmpu {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Bus Master MPU Control Register"]
38    #[inline(always)]
39    pub const fn mmpuctla(
40        &self,
41    ) -> &'static crate::common::Reg<self::Mmpuctla_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Mmpuctla_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "Group A Protection of Register"]
50    #[inline(always)]
51    pub const fn mmpupta(
52        &self,
53    ) -> &'static crate::common::Reg<self::Mmpupta_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Mmpupta_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(258usize),
57            )
58        }
59    }
60
61    #[doc = "Group A Region %s access control register"]
62    #[inline(always)]
63    pub const fn mmpuaca(
64        &self,
65    ) -> &'static crate::common::ClusterRegisterArray<
66        crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW>,
67        4,
68        0x10,
69    > {
70        unsafe {
71            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x200usize))
72        }
73    }
74    #[inline(always)]
75    pub const fn mmpuaca0(
76        &self,
77    ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(0x200usize),
81            )
82        }
83    }
84    #[inline(always)]
85    pub const fn mmpuaca1(
86        &self,
87    ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(0x210usize),
91            )
92        }
93    }
94    #[inline(always)]
95    pub const fn mmpuaca2(
96        &self,
97    ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(0x220usize),
101            )
102        }
103    }
104    #[inline(always)]
105    pub const fn mmpuaca3(
106        &self,
107    ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
108        unsafe {
109            crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
110                self._svd2pac_as_ptr().add(0x230usize),
111            )
112        }
113    }
114
115    #[doc = "Group A Region %s Start Address Register"]
116    #[inline(always)]
117    pub const fn mmpusa(
118        &self,
119    ) -> &'static crate::common::ClusterRegisterArray<
120        crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW>,
121        4,
122        0x10,
123    > {
124        unsafe {
125            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x204usize))
126        }
127    }
128    #[inline(always)]
129    pub const fn mmpusa0(
130        &self,
131    ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
132        unsafe {
133            crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
134                self._svd2pac_as_ptr().add(0x204usize),
135            )
136        }
137    }
138    #[inline(always)]
139    pub const fn mmpusa1(
140        &self,
141    ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
142        unsafe {
143            crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
144                self._svd2pac_as_ptr().add(0x214usize),
145            )
146        }
147    }
148    #[inline(always)]
149    pub const fn mmpusa2(
150        &self,
151    ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
152        unsafe {
153            crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
154                self._svd2pac_as_ptr().add(0x224usize),
155            )
156        }
157    }
158    #[inline(always)]
159    pub const fn mmpusa3(
160        &self,
161    ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
162        unsafe {
163            crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
164                self._svd2pac_as_ptr().add(0x234usize),
165            )
166        }
167    }
168
169    #[doc = "Group A Region %s End Address Register"]
170    #[inline(always)]
171    pub const fn mmpuea(
172        &self,
173    ) -> &'static crate::common::ClusterRegisterArray<
174        crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW>,
175        4,
176        0x10,
177    > {
178        unsafe {
179            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x208usize))
180        }
181    }
182    #[inline(always)]
183    pub const fn mmpuea0(
184        &self,
185    ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
186        unsafe {
187            crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
188                self._svd2pac_as_ptr().add(0x208usize),
189            )
190        }
191    }
192    #[inline(always)]
193    pub const fn mmpuea1(
194        &self,
195    ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
196        unsafe {
197            crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
198                self._svd2pac_as_ptr().add(0x218usize),
199            )
200        }
201    }
202    #[inline(always)]
203    pub const fn mmpuea2(
204        &self,
205    ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
206        unsafe {
207            crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
208                self._svd2pac_as_ptr().add(0x228usize),
209            )
210        }
211    }
212    #[inline(always)]
213    pub const fn mmpuea3(
214        &self,
215    ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
216        unsafe {
217            crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
218                self._svd2pac_as_ptr().add(0x238usize),
219            )
220        }
221    }
222
223    #[doc = "Slave MPU Control Register"]
224    #[inline(always)]
225    pub const fn smpuctl(
226        &self,
227    ) -> &'static crate::common::Reg<self::Smpuctl_SPEC, crate::common::RW> {
228        unsafe {
229            crate::common::Reg::<self::Smpuctl_SPEC, crate::common::RW>::from_ptr(
230                self._svd2pac_as_ptr().add(3072usize),
231            )
232        }
233    }
234
235    #[doc = "Access Control Register for Memory Bus 1"]
236    #[inline(always)]
237    pub const fn smpumbiu(
238        &self,
239    ) -> &'static crate::common::Reg<self::Smpumbiu_SPEC, crate::common::RW> {
240        unsafe {
241            crate::common::Reg::<self::Smpumbiu_SPEC, crate::common::RW>::from_ptr(
242                self._svd2pac_as_ptr().add(3088usize),
243            )
244        }
245    }
246
247    #[doc = "Access Control Register for Internal Peripheral Bus 9"]
248    #[inline(always)]
249    pub const fn smpufbiu(
250        &self,
251    ) -> &'static crate::common::Reg<self::Smpufbiu_SPEC, crate::common::RW> {
252        unsafe {
253            crate::common::Reg::<self::Smpufbiu_SPEC, crate::common::RW>::from_ptr(
254                self._svd2pac_as_ptr().add(3092usize),
255            )
256        }
257    }
258
259    #[doc = "Access Control Register for Memory Bus 4"]
260    #[inline(always)]
261    pub const fn smpusram0(
262        &self,
263    ) -> &'static crate::common::Reg<self::Smpusram0_SPEC, crate::common::RW> {
264        unsafe {
265            crate::common::Reg::<self::Smpusram0_SPEC, crate::common::RW>::from_ptr(
266                self._svd2pac_as_ptr().add(3096usize),
267            )
268        }
269    }
270
271    #[doc = "Access Control Register for Internal Peripheral Bus 1"]
272    #[inline(always)]
273    pub const fn smpup0biu(
274        &self,
275    ) -> &'static crate::common::Reg<self::Smpup0Biu_SPEC, crate::common::RW> {
276        unsafe {
277            crate::common::Reg::<self::Smpup0Biu_SPEC, crate::common::RW>::from_ptr(
278                self._svd2pac_as_ptr().add(3104usize),
279            )
280        }
281    }
282
283    #[doc = "Access Control Register for Internal Peripheral Bus 3"]
284    #[inline(always)]
285    pub const fn smpup2biu(
286        &self,
287    ) -> &'static crate::common::Reg<self::Smpup2Biu_SPEC, crate::common::RW> {
288        unsafe {
289            crate::common::Reg::<self::Smpup2Biu_SPEC, crate::common::RW>::from_ptr(
290                self._svd2pac_as_ptr().add(3108usize),
291            )
292        }
293    }
294
295    #[doc = "Stack Pointer Monitor Operation After Detection Register"]
296    #[inline(always)]
297    pub const fn mspmpuoad(
298        &self,
299    ) -> &'static crate::common::Reg<self::Mspmpuoad_SPEC, crate::common::RW> {
300        unsafe {
301            crate::common::Reg::<self::Mspmpuoad_SPEC, crate::common::RW>::from_ptr(
302                self._svd2pac_as_ptr().add(3328usize),
303            )
304        }
305    }
306
307    #[doc = "Stack Pointer Monitor Access Control Register"]
308    #[inline(always)]
309    pub const fn mspmpuctl(
310        &self,
311    ) -> &'static crate::common::Reg<self::Mspmpuctl_SPEC, crate::common::RW> {
312        unsafe {
313            crate::common::Reg::<self::Mspmpuctl_SPEC, crate::common::RW>::from_ptr(
314                self._svd2pac_as_ptr().add(3332usize),
315            )
316        }
317    }
318
319    #[doc = "Stack Pointer Monitor Protection Register"]
320    #[inline(always)]
321    pub const fn mspmpupt(
322        &self,
323    ) -> &'static crate::common::Reg<self::Mspmpupt_SPEC, crate::common::RW> {
324        unsafe {
325            crate::common::Reg::<self::Mspmpupt_SPEC, crate::common::RW>::from_ptr(
326                self._svd2pac_as_ptr().add(3334usize),
327            )
328        }
329    }
330
331    #[doc = "Main Stack Pointer (MSP) Monitor Start Address Register"]
332    #[inline(always)]
333    pub const fn mspmpusa(
334        &self,
335    ) -> &'static crate::common::Reg<self::Mspmpusa_SPEC, crate::common::RW> {
336        unsafe {
337            crate::common::Reg::<self::Mspmpusa_SPEC, crate::common::RW>::from_ptr(
338                self._svd2pac_as_ptr().add(3336usize),
339            )
340        }
341    }
342
343    #[doc = "Main Stack Pointer (MSP) Monitor End Address Register"]
344    #[inline(always)]
345    pub const fn mspmpuea(
346        &self,
347    ) -> &'static crate::common::Reg<self::Mspmpuea_SPEC, crate::common::RW> {
348        unsafe {
349            crate::common::Reg::<self::Mspmpuea_SPEC, crate::common::RW>::from_ptr(
350                self._svd2pac_as_ptr().add(3340usize),
351            )
352        }
353    }
354
355    #[doc = "Stack Pointer Monitor Operation After Detection Register"]
356    #[inline(always)]
357    pub const fn pspmpuoad(
358        &self,
359    ) -> &'static crate::common::Reg<self::Pspmpuoad_SPEC, crate::common::RW> {
360        unsafe {
361            crate::common::Reg::<self::Pspmpuoad_SPEC, crate::common::RW>::from_ptr(
362                self._svd2pac_as_ptr().add(3344usize),
363            )
364        }
365    }
366
367    #[doc = "Stack Pointer Monitor Access Control Register"]
368    #[inline(always)]
369    pub const fn pspmpuctl(
370        &self,
371    ) -> &'static crate::common::Reg<self::Pspmpuctl_SPEC, crate::common::RW> {
372        unsafe {
373            crate::common::Reg::<self::Pspmpuctl_SPEC, crate::common::RW>::from_ptr(
374                self._svd2pac_as_ptr().add(3348usize),
375            )
376        }
377    }
378
379    #[doc = "Stack Pointer Monitor Protection Register"]
380    #[inline(always)]
381    pub const fn pspmpupt(
382        &self,
383    ) -> &'static crate::common::Reg<self::Pspmpupt_SPEC, crate::common::RW> {
384        unsafe {
385            crate::common::Reg::<self::Pspmpupt_SPEC, crate::common::RW>::from_ptr(
386                self._svd2pac_as_ptr().add(3350usize),
387            )
388        }
389    }
390
391    #[doc = "Process Stack Pointer (PSP) Monitor Start Address Register"]
392    #[inline(always)]
393    pub const fn pspmpusa(
394        &self,
395    ) -> &'static crate::common::Reg<self::Pspmpusa_SPEC, crate::common::RW> {
396        unsafe {
397            crate::common::Reg::<self::Pspmpusa_SPEC, crate::common::RW>::from_ptr(
398                self._svd2pac_as_ptr().add(3352usize),
399            )
400        }
401    }
402
403    #[doc = "Process Stack Pointer (PSP) Monitor End Address Register"]
404    #[inline(always)]
405    pub const fn pspmpuea(
406        &self,
407    ) -> &'static crate::common::Reg<self::Pspmpuea_SPEC, crate::common::RW> {
408        unsafe {
409            crate::common::Reg::<self::Pspmpuea_SPEC, crate::common::RW>::from_ptr(
410                self._svd2pac_as_ptr().add(3356usize),
411            )
412        }
413    }
414}
415#[doc(hidden)]
416#[derive(Copy, Clone, Eq, PartialEq)]
417pub struct Mmpuctla_SPEC;
418impl crate::sealed::RegSpec for Mmpuctla_SPEC {
419    type DataType = u16;
420}
421
422#[doc = "Bus Master MPU Control Register"]
423pub type Mmpuctla = crate::RegValueT<Mmpuctla_SPEC>;
424
425impl Mmpuctla {
426    #[doc = "Master Group Enable"]
427    #[inline(always)]
428    pub fn enable(
429        self,
430    ) -> crate::common::RegisterField<
431        0,
432        0x1,
433        1,
434        0,
435        mmpuctla::Enable,
436        mmpuctla::Enable,
437        Mmpuctla_SPEC,
438        crate::common::RW,
439    > {
440        crate::common::RegisterField::<
441            0,
442            0x1,
443            1,
444            0,
445            mmpuctla::Enable,
446            mmpuctla::Enable,
447            Mmpuctla_SPEC,
448            crate::common::RW,
449        >::from_register(self, 0)
450    }
451
452    #[doc = "Operation After Detection"]
453    #[inline(always)]
454    pub fn oad(
455        self,
456    ) -> crate::common::RegisterField<
457        1,
458        0x1,
459        1,
460        0,
461        mmpuctla::Oad,
462        mmpuctla::Oad,
463        Mmpuctla_SPEC,
464        crate::common::RW,
465    > {
466        crate::common::RegisterField::<
467            1,
468            0x1,
469            1,
470            0,
471            mmpuctla::Oad,
472            mmpuctla::Oad,
473            Mmpuctla_SPEC,
474            crate::common::RW,
475        >::from_register(self, 0)
476    }
477
478    #[doc = "Key Code"]
479    #[inline(always)]
480    pub fn key(
481        self,
482    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuctla_SPEC, crate::common::RW> {
483        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuctla_SPEC,crate::common::RW>::from_register(self,0)
484    }
485}
486impl ::core::default::Default for Mmpuctla {
487    #[inline(always)]
488    fn default() -> Mmpuctla {
489        <crate::RegValueT<Mmpuctla_SPEC> as RegisterValue<_>>::new(0)
490    }
491}
492pub mod mmpuctla {
493
494    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
495    pub struct Enable_SPEC;
496    pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
497    impl Enable {
498        #[doc = "Master group A disabled"]
499        pub const _0: Self = Self::new(0);
500
501        #[doc = "Master group A enabled"]
502        pub const _1: Self = Self::new(1);
503    }
504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
505    pub struct Oad_SPEC;
506    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
507    impl Oad {
508        #[doc = "Non-maskable interrupt"]
509        pub const _0: Self = Self::new(0);
510
511        #[doc = "Reset"]
512        pub const _1: Self = Self::new(1);
513    }
514}
515#[doc(hidden)]
516#[derive(Copy, Clone, Eq, PartialEq)]
517pub struct Mmpupta_SPEC;
518impl crate::sealed::RegSpec for Mmpupta_SPEC {
519    type DataType = u16;
520}
521
522#[doc = "Group A Protection of Register"]
523pub type Mmpupta = crate::RegValueT<Mmpupta_SPEC>;
524
525impl Mmpupta {
526    #[doc = "Protection of Register"]
527    #[inline(always)]
528    pub fn protect(
529        self,
530    ) -> crate::common::RegisterField<
531        0,
532        0x1,
533        1,
534        0,
535        mmpupta::Protect,
536        mmpupta::Protect,
537        Mmpupta_SPEC,
538        crate::common::RW,
539    > {
540        crate::common::RegisterField::<
541            0,
542            0x1,
543            1,
544            0,
545            mmpupta::Protect,
546            mmpupta::Protect,
547            Mmpupta_SPEC,
548            crate::common::RW,
549        >::from_register(self, 0)
550    }
551
552    #[doc = "Key Code"]
553    #[inline(always)]
554    pub fn key(
555        self,
556    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpupta_SPEC, crate::common::RW> {
557        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpupta_SPEC,crate::common::RW>::from_register(self,0)
558    }
559}
560impl ::core::default::Default for Mmpupta {
561    #[inline(always)]
562    fn default() -> Mmpupta {
563        <crate::RegValueT<Mmpupta_SPEC> as RegisterValue<_>>::new(0)
564    }
565}
566pub mod mmpupta {
567
568    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
569    pub struct Protect_SPEC;
570    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
571    impl Protect {
572        #[doc = "All bus master MPU group A register writes are permitted."]
573        pub const _0: Self = Self::new(0);
574
575        #[doc = "All bus master MPU group A register writes are protected. Reads are permitted."]
576        pub const _1: Self = Self::new(1);
577    }
578}
579#[doc(hidden)]
580#[derive(Copy, Clone, Eq, PartialEq)]
581pub struct Mmpuaca_SPEC;
582impl crate::sealed::RegSpec for Mmpuaca_SPEC {
583    type DataType = u16;
584}
585
586#[doc = "Group A Region %s access control register"]
587pub type Mmpuaca = crate::RegValueT<Mmpuaca_SPEC>;
588
589impl Mmpuaca {
590    #[doc = "Region Enable"]
591    #[inline(always)]
592    pub fn enable(
593        self,
594    ) -> crate::common::RegisterField<
595        0,
596        0x1,
597        1,
598        0,
599        mmpuaca::Enable,
600        mmpuaca::Enable,
601        Mmpuaca_SPEC,
602        crate::common::RW,
603    > {
604        crate::common::RegisterField::<
605            0,
606            0x1,
607            1,
608            0,
609            mmpuaca::Enable,
610            mmpuaca::Enable,
611            Mmpuaca_SPEC,
612            crate::common::RW,
613        >::from_register(self, 0)
614    }
615
616    #[doc = "Read Protection"]
617    #[inline(always)]
618    pub fn rp(
619        self,
620    ) -> crate::common::RegisterField<
621        1,
622        0x1,
623        1,
624        0,
625        mmpuaca::Rp,
626        mmpuaca::Rp,
627        Mmpuaca_SPEC,
628        crate::common::RW,
629    > {
630        crate::common::RegisterField::<
631            1,
632            0x1,
633            1,
634            0,
635            mmpuaca::Rp,
636            mmpuaca::Rp,
637            Mmpuaca_SPEC,
638            crate::common::RW,
639        >::from_register(self, 0)
640    }
641
642    #[doc = "Write Protection"]
643    #[inline(always)]
644    pub fn wp(
645        self,
646    ) -> crate::common::RegisterField<
647        2,
648        0x1,
649        1,
650        0,
651        mmpuaca::Wp,
652        mmpuaca::Wp,
653        Mmpuaca_SPEC,
654        crate::common::RW,
655    > {
656        crate::common::RegisterField::<
657            2,
658            0x1,
659            1,
660            0,
661            mmpuaca::Wp,
662            mmpuaca::Wp,
663            Mmpuaca_SPEC,
664            crate::common::RW,
665        >::from_register(self, 0)
666    }
667}
668impl ::core::default::Default for Mmpuaca {
669    #[inline(always)]
670    fn default() -> Mmpuaca {
671        <crate::RegValueT<Mmpuaca_SPEC> as RegisterValue<_>>::new(0)
672    }
673}
674pub mod mmpuaca {
675
676    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
677    pub struct Enable_SPEC;
678    pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
679    impl Enable {
680        #[doc = "Group A region n disabled"]
681        pub const _0: Self = Self::new(0);
682
683        #[doc = "Group A region n enabled"]
684        pub const _1: Self = Self::new(1);
685    }
686    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
687    pub struct Rp_SPEC;
688    pub type Rp = crate::EnumBitfieldStruct<u8, Rp_SPEC>;
689    impl Rp {
690        #[doc = "Read permission"]
691        pub const _0: Self = Self::new(0);
692
693        #[doc = "Read protection"]
694        pub const _1: Self = Self::new(1);
695    }
696    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
697    pub struct Wp_SPEC;
698    pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
699    impl Wp {
700        #[doc = "Write permission"]
701        pub const _0: Self = Self::new(0);
702
703        #[doc = "Write protection"]
704        pub const _1: Self = Self::new(1);
705    }
706}
707#[doc(hidden)]
708#[derive(Copy, Clone, Eq, PartialEq)]
709pub struct Mmpusa_SPEC;
710impl crate::sealed::RegSpec for Mmpusa_SPEC {
711    type DataType = u32;
712}
713
714#[doc = "Group A Region %s Start Address Register"]
715pub type Mmpusa = crate::RegValueT<Mmpusa_SPEC>;
716
717impl Mmpusa {
718    #[doc = "Region Start Address"]
719    #[inline(always)]
720    pub fn mmpusa(
721        self,
722    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mmpusa_SPEC, crate::common::RW>
723    {
724        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Mmpusa_SPEC,crate::common::RW>::from_register(self,0)
725    }
726}
727impl ::core::default::Default for Mmpusa {
728    #[inline(always)]
729    fn default() -> Mmpusa {
730        <crate::RegValueT<Mmpusa_SPEC> as RegisterValue<_>>::new(0)
731    }
732}
733
734#[doc(hidden)]
735#[derive(Copy, Clone, Eq, PartialEq)]
736pub struct Mmpuea_SPEC;
737impl crate::sealed::RegSpec for Mmpuea_SPEC {
738    type DataType = u32;
739}
740
741#[doc = "Group A Region %s End Address Register"]
742pub type Mmpuea = crate::RegValueT<Mmpuea_SPEC>;
743
744impl Mmpuea {
745    #[doc = "Region End Address"]
746    #[inline(always)]
747    pub fn mmpuea(
748        self,
749    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mmpuea_SPEC, crate::common::RW>
750    {
751        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Mmpuea_SPEC,crate::common::RW>::from_register(self,0)
752    }
753}
754impl ::core::default::Default for Mmpuea {
755    #[inline(always)]
756    fn default() -> Mmpuea {
757        <crate::RegValueT<Mmpuea_SPEC> as RegisterValue<_>>::new(3)
758    }
759}
760
761#[doc(hidden)]
762#[derive(Copy, Clone, Eq, PartialEq)]
763pub struct Smpuctl_SPEC;
764impl crate::sealed::RegSpec for Smpuctl_SPEC {
765    type DataType = u16;
766}
767
768#[doc = "Slave MPU Control Register"]
769pub type Smpuctl = crate::RegValueT<Smpuctl_SPEC>;
770
771impl Smpuctl {
772    #[doc = "Operation After Detection"]
773    #[inline(always)]
774    pub fn oad(
775        self,
776    ) -> crate::common::RegisterField<
777        0,
778        0x1,
779        1,
780        0,
781        smpuctl::Oad,
782        smpuctl::Oad,
783        Smpuctl_SPEC,
784        crate::common::RW,
785    > {
786        crate::common::RegisterField::<
787            0,
788            0x1,
789            1,
790            0,
791            smpuctl::Oad,
792            smpuctl::Oad,
793            Smpuctl_SPEC,
794            crate::common::RW,
795        >::from_register(self, 0)
796    }
797
798    #[doc = "Protection of Register"]
799    #[inline(always)]
800    pub fn protect(
801        self,
802    ) -> crate::common::RegisterField<
803        1,
804        0x1,
805        1,
806        0,
807        smpuctl::Protect,
808        smpuctl::Protect,
809        Smpuctl_SPEC,
810        crate::common::RW,
811    > {
812        crate::common::RegisterField::<
813            1,
814            0x1,
815            1,
816            0,
817            smpuctl::Protect,
818            smpuctl::Protect,
819            Smpuctl_SPEC,
820            crate::common::RW,
821        >::from_register(self, 0)
822    }
823
824    #[doc = "Key Code"]
825    #[inline(always)]
826    pub fn key(
827        self,
828    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Smpuctl_SPEC, crate::common::RW> {
829        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Smpuctl_SPEC,crate::common::RW>::from_register(self,0)
830    }
831}
832impl ::core::default::Default for Smpuctl {
833    #[inline(always)]
834    fn default() -> Smpuctl {
835        <crate::RegValueT<Smpuctl_SPEC> as RegisterValue<_>>::new(0)
836    }
837}
838pub mod smpuctl {
839
840    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
841    pub struct Oad_SPEC;
842    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
843    impl Oad {
844        #[doc = "Non-maskable interrupt"]
845        pub const _0: Self = Self::new(0);
846
847        #[doc = "Reset"]
848        pub const _1: Self = Self::new(1);
849    }
850    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
851    pub struct Protect_SPEC;
852    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
853    impl Protect {
854        #[doc = "All bus slave register writes are permitted"]
855        pub const _0: Self = Self::new(0);
856
857        #[doc = "All bus slave register writes are protected. Reads are permitted"]
858        pub const _1: Self = Self::new(1);
859    }
860}
861#[doc(hidden)]
862#[derive(Copy, Clone, Eq, PartialEq)]
863pub struct Smpumbiu_SPEC;
864impl crate::sealed::RegSpec for Smpumbiu_SPEC {
865    type DataType = u16;
866}
867
868#[doc = "Access Control Register for Memory Bus 1"]
869pub type Smpumbiu = crate::RegValueT<Smpumbiu_SPEC>;
870
871impl Smpumbiu {
872    #[doc = "Master MPU Group A Read Protection"]
873    #[inline(always)]
874    pub fn rpgrpa(
875        self,
876    ) -> crate::common::RegisterField<
877        2,
878        0x1,
879        1,
880        0,
881        smpumbiu::Rpgrpa,
882        smpumbiu::Rpgrpa,
883        Smpumbiu_SPEC,
884        crate::common::RW,
885    > {
886        crate::common::RegisterField::<
887            2,
888            0x1,
889            1,
890            0,
891            smpumbiu::Rpgrpa,
892            smpumbiu::Rpgrpa,
893            Smpumbiu_SPEC,
894            crate::common::RW,
895        >::from_register(self, 0)
896    }
897
898    #[doc = "Master MPU Group A Write Protection"]
899    #[inline(always)]
900    pub fn wpgrpa(
901        self,
902    ) -> crate::common::RegisterField<
903        3,
904        0x1,
905        1,
906        0,
907        smpumbiu::Wpgrpa,
908        smpumbiu::Wpgrpa,
909        Smpumbiu_SPEC,
910        crate::common::RW,
911    > {
912        crate::common::RegisterField::<
913            3,
914            0x1,
915            1,
916            0,
917            smpumbiu::Wpgrpa,
918            smpumbiu::Wpgrpa,
919            Smpumbiu_SPEC,
920            crate::common::RW,
921        >::from_register(self, 0)
922    }
923}
924impl ::core::default::Default for Smpumbiu {
925    #[inline(always)]
926    fn default() -> Smpumbiu {
927        <crate::RegValueT<Smpumbiu_SPEC> as RegisterValue<_>>::new(0)
928    }
929}
930pub mod smpumbiu {
931
932    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
933    pub struct Rpgrpa_SPEC;
934    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
935    impl Rpgrpa {
936        #[doc = "Memory protection read for master MPU group A disabled"]
937        pub const _0: Self = Self::new(0);
938
939        #[doc = "Memory protection read for master MPU group A enabled"]
940        pub const _1: Self = Self::new(1);
941    }
942    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
943    pub struct Wpgrpa_SPEC;
944    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
945    impl Wpgrpa {
946        #[doc = "Memory protection write for master MPU group A disabled"]
947        pub const _0: Self = Self::new(0);
948
949        #[doc = "Memory protection write for master MPU group A enabled"]
950        pub const _1: Self = Self::new(1);
951    }
952}
953#[doc(hidden)]
954#[derive(Copy, Clone, Eq, PartialEq)]
955pub struct Smpufbiu_SPEC;
956impl crate::sealed::RegSpec for Smpufbiu_SPEC {
957    type DataType = u16;
958}
959
960#[doc = "Access Control Register for Internal Peripheral Bus 9"]
961pub type Smpufbiu = crate::RegValueT<Smpufbiu_SPEC>;
962
963impl Smpufbiu {
964    #[doc = "CPU Read Protection"]
965    #[inline(always)]
966    pub fn rpcpu(
967        self,
968    ) -> crate::common::RegisterField<
969        0,
970        0x1,
971        1,
972        0,
973        smpufbiu::Rpcpu,
974        smpufbiu::Rpcpu,
975        Smpufbiu_SPEC,
976        crate::common::RW,
977    > {
978        crate::common::RegisterField::<
979            0,
980            0x1,
981            1,
982            0,
983            smpufbiu::Rpcpu,
984            smpufbiu::Rpcpu,
985            Smpufbiu_SPEC,
986            crate::common::RW,
987        >::from_register(self, 0)
988    }
989
990    #[doc = "CPU Write Protection"]
991    #[inline(always)]
992    pub fn wpcpu(
993        self,
994    ) -> crate::common::RegisterField<
995        1,
996        0x1,
997        1,
998        0,
999        smpufbiu::Wpcpu,
1000        smpufbiu::Wpcpu,
1001        Smpufbiu_SPEC,
1002        crate::common::RW,
1003    > {
1004        crate::common::RegisterField::<
1005            1,
1006            0x1,
1007            1,
1008            0,
1009            smpufbiu::Wpcpu,
1010            smpufbiu::Wpcpu,
1011            Smpufbiu_SPEC,
1012            crate::common::RW,
1013        >::from_register(self, 0)
1014    }
1015
1016    #[doc = "Master MPU Group A Read Protection"]
1017    #[inline(always)]
1018    pub fn rpgrpa(
1019        self,
1020    ) -> crate::common::RegisterField<
1021        2,
1022        0x1,
1023        1,
1024        0,
1025        smpufbiu::Rpgrpa,
1026        smpufbiu::Rpgrpa,
1027        Smpufbiu_SPEC,
1028        crate::common::RW,
1029    > {
1030        crate::common::RegisterField::<
1031            2,
1032            0x1,
1033            1,
1034            0,
1035            smpufbiu::Rpgrpa,
1036            smpufbiu::Rpgrpa,
1037            Smpufbiu_SPEC,
1038            crate::common::RW,
1039        >::from_register(self, 0)
1040    }
1041
1042    #[doc = "Master MPU Group A Write Protection"]
1043    #[inline(always)]
1044    pub fn wpgrpa(
1045        self,
1046    ) -> crate::common::RegisterField<
1047        3,
1048        0x1,
1049        1,
1050        0,
1051        smpufbiu::Wpgrpa,
1052        smpufbiu::Wpgrpa,
1053        Smpufbiu_SPEC,
1054        crate::common::RW,
1055    > {
1056        crate::common::RegisterField::<
1057            3,
1058            0x1,
1059            1,
1060            0,
1061            smpufbiu::Wpgrpa,
1062            smpufbiu::Wpgrpa,
1063            Smpufbiu_SPEC,
1064            crate::common::RW,
1065        >::from_register(self, 0)
1066    }
1067}
1068impl ::core::default::Default for Smpufbiu {
1069    #[inline(always)]
1070    fn default() -> Smpufbiu {
1071        <crate::RegValueT<Smpufbiu_SPEC> as RegisterValue<_>>::new(0)
1072    }
1073}
1074pub mod smpufbiu {
1075
1076    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1077    pub struct Rpcpu_SPEC;
1078    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
1079    impl Rpcpu {
1080        #[doc = "Memory protection for CPU read disabled"]
1081        pub const _0: Self = Self::new(0);
1082
1083        #[doc = "Memory protection for CPU read enabled"]
1084        pub const _1: Self = Self::new(1);
1085    }
1086    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1087    pub struct Wpcpu_SPEC;
1088    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
1089    impl Wpcpu {
1090        #[doc = "Memory protection for CPU write disabled"]
1091        pub const _0: Self = Self::new(0);
1092
1093        #[doc = "Memory protection for CPU write enabled"]
1094        pub const _1: Self = Self::new(1);
1095    }
1096    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1097    pub struct Rpgrpa_SPEC;
1098    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
1099    impl Rpgrpa {
1100        #[doc = "Memory protection for master MPU group A read disabled"]
1101        pub const _0: Self = Self::new(0);
1102
1103        #[doc = "Memory protection for master MPU group A read enabled"]
1104        pub const _1: Self = Self::new(1);
1105    }
1106    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1107    pub struct Wpgrpa_SPEC;
1108    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
1109    impl Wpgrpa {
1110        #[doc = "Memory protection for master MPU group A write disabled"]
1111        pub const _0: Self = Self::new(0);
1112
1113        #[doc = "Memory protection for master MPU group A write enabled"]
1114        pub const _1: Self = Self::new(1);
1115    }
1116}
1117#[doc(hidden)]
1118#[derive(Copy, Clone, Eq, PartialEq)]
1119pub struct Smpusram0_SPEC;
1120impl crate::sealed::RegSpec for Smpusram0_SPEC {
1121    type DataType = u16;
1122}
1123
1124#[doc = "Access Control Register for Memory Bus 4"]
1125pub type Smpusram0 = crate::RegValueT<Smpusram0_SPEC>;
1126
1127impl Smpusram0 {
1128    #[doc = "CPU Read Protection"]
1129    #[inline(always)]
1130    pub fn rpcpu(
1131        self,
1132    ) -> crate::common::RegisterField<
1133        0,
1134        0x1,
1135        1,
1136        0,
1137        smpusram0::Rpcpu,
1138        smpusram0::Rpcpu,
1139        Smpusram0_SPEC,
1140        crate::common::RW,
1141    > {
1142        crate::common::RegisterField::<
1143            0,
1144            0x1,
1145            1,
1146            0,
1147            smpusram0::Rpcpu,
1148            smpusram0::Rpcpu,
1149            Smpusram0_SPEC,
1150            crate::common::RW,
1151        >::from_register(self, 0)
1152    }
1153
1154    #[doc = "CPU Write Protection"]
1155    #[inline(always)]
1156    pub fn wpcpu(
1157        self,
1158    ) -> crate::common::RegisterField<
1159        1,
1160        0x1,
1161        1,
1162        0,
1163        smpusram0::Wpcpu,
1164        smpusram0::Wpcpu,
1165        Smpusram0_SPEC,
1166        crate::common::RW,
1167    > {
1168        crate::common::RegisterField::<
1169            1,
1170            0x1,
1171            1,
1172            0,
1173            smpusram0::Wpcpu,
1174            smpusram0::Wpcpu,
1175            Smpusram0_SPEC,
1176            crate::common::RW,
1177        >::from_register(self, 0)
1178    }
1179
1180    #[doc = "Master MPU Group A Read Protection"]
1181    #[inline(always)]
1182    pub fn rpgrpa(
1183        self,
1184    ) -> crate::common::RegisterField<
1185        2,
1186        0x1,
1187        1,
1188        0,
1189        smpusram0::Rpgrpa,
1190        smpusram0::Rpgrpa,
1191        Smpusram0_SPEC,
1192        crate::common::RW,
1193    > {
1194        crate::common::RegisterField::<
1195            2,
1196            0x1,
1197            1,
1198            0,
1199            smpusram0::Rpgrpa,
1200            smpusram0::Rpgrpa,
1201            Smpusram0_SPEC,
1202            crate::common::RW,
1203        >::from_register(self, 0)
1204    }
1205
1206    #[doc = "Master MPU Group A Write Protection"]
1207    #[inline(always)]
1208    pub fn wpgrpa(
1209        self,
1210    ) -> crate::common::RegisterField<
1211        3,
1212        0x1,
1213        1,
1214        0,
1215        smpusram0::Wpgrpa,
1216        smpusram0::Wpgrpa,
1217        Smpusram0_SPEC,
1218        crate::common::RW,
1219    > {
1220        crate::common::RegisterField::<
1221            3,
1222            0x1,
1223            1,
1224            0,
1225            smpusram0::Wpgrpa,
1226            smpusram0::Wpgrpa,
1227            Smpusram0_SPEC,
1228            crate::common::RW,
1229        >::from_register(self, 0)
1230    }
1231}
1232impl ::core::default::Default for Smpusram0 {
1233    #[inline(always)]
1234    fn default() -> Smpusram0 {
1235        <crate::RegValueT<Smpusram0_SPEC> as RegisterValue<_>>::new(0)
1236    }
1237}
1238pub mod smpusram0 {
1239
1240    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1241    pub struct Rpcpu_SPEC;
1242    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
1243    impl Rpcpu {
1244        #[doc = "Memory protection for CPU read disabled"]
1245        pub const _0: Self = Self::new(0);
1246
1247        #[doc = "Memory protection for CPU read enabled"]
1248        pub const _1: Self = Self::new(1);
1249    }
1250    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1251    pub struct Wpcpu_SPEC;
1252    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
1253    impl Wpcpu {
1254        #[doc = "Memory protection for CPU write disabled"]
1255        pub const _0: Self = Self::new(0);
1256
1257        #[doc = "Memory protection for CPU write enabled"]
1258        pub const _1: Self = Self::new(1);
1259    }
1260    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1261    pub struct Rpgrpa_SPEC;
1262    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
1263    impl Rpgrpa {
1264        #[doc = "Memory protection for master MPU group A read disabled"]
1265        pub const _0: Self = Self::new(0);
1266
1267        #[doc = "Memory protection for master MPU group A read enabled"]
1268        pub const _1: Self = Self::new(1);
1269    }
1270    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1271    pub struct Wpgrpa_SPEC;
1272    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
1273    impl Wpgrpa {
1274        #[doc = "Memory protection for master MPU group A write disabled"]
1275        pub const _0: Self = Self::new(0);
1276
1277        #[doc = "Memory protection for master MPU group A write enabled"]
1278        pub const _1: Self = Self::new(1);
1279    }
1280}
1281#[doc(hidden)]
1282#[derive(Copy, Clone, Eq, PartialEq)]
1283pub struct Smpup0Biu_SPEC;
1284impl crate::sealed::RegSpec for Smpup0Biu_SPEC {
1285    type DataType = u16;
1286}
1287
1288#[doc = "Access Control Register for Internal Peripheral Bus 1"]
1289pub type Smpup0Biu = crate::RegValueT<Smpup0Biu_SPEC>;
1290
1291impl Smpup0Biu {
1292    #[doc = "CPU Read Protection"]
1293    #[inline(always)]
1294    pub fn rpcpu(
1295        self,
1296    ) -> crate::common::RegisterField<
1297        0,
1298        0x1,
1299        1,
1300        0,
1301        smpup0biu::Rpcpu,
1302        smpup0biu::Rpcpu,
1303        Smpup0Biu_SPEC,
1304        crate::common::RW,
1305    > {
1306        crate::common::RegisterField::<
1307            0,
1308            0x1,
1309            1,
1310            0,
1311            smpup0biu::Rpcpu,
1312            smpup0biu::Rpcpu,
1313            Smpup0Biu_SPEC,
1314            crate::common::RW,
1315        >::from_register(self, 0)
1316    }
1317
1318    #[doc = "CPU Write Protection"]
1319    #[inline(always)]
1320    pub fn wpcpu(
1321        self,
1322    ) -> crate::common::RegisterField<
1323        1,
1324        0x1,
1325        1,
1326        0,
1327        smpup0biu::Wpcpu,
1328        smpup0biu::Wpcpu,
1329        Smpup0Biu_SPEC,
1330        crate::common::RW,
1331    > {
1332        crate::common::RegisterField::<
1333            1,
1334            0x1,
1335            1,
1336            0,
1337            smpup0biu::Wpcpu,
1338            smpup0biu::Wpcpu,
1339            Smpup0Biu_SPEC,
1340            crate::common::RW,
1341        >::from_register(self, 0)
1342    }
1343
1344    #[doc = "Master MPU Group A Read Protection"]
1345    #[inline(always)]
1346    pub fn rpgrpa(
1347        self,
1348    ) -> crate::common::RegisterField<
1349        2,
1350        0x1,
1351        1,
1352        0,
1353        smpup0biu::Rpgrpa,
1354        smpup0biu::Rpgrpa,
1355        Smpup0Biu_SPEC,
1356        crate::common::RW,
1357    > {
1358        crate::common::RegisterField::<
1359            2,
1360            0x1,
1361            1,
1362            0,
1363            smpup0biu::Rpgrpa,
1364            smpup0biu::Rpgrpa,
1365            Smpup0Biu_SPEC,
1366            crate::common::RW,
1367        >::from_register(self, 0)
1368    }
1369
1370    #[doc = "Master MPU Group A Write Protection"]
1371    #[inline(always)]
1372    pub fn wpgrpa(
1373        self,
1374    ) -> crate::common::RegisterField<
1375        3,
1376        0x1,
1377        1,
1378        0,
1379        smpup0biu::Wpgrpa,
1380        smpup0biu::Wpgrpa,
1381        Smpup0Biu_SPEC,
1382        crate::common::RW,
1383    > {
1384        crate::common::RegisterField::<
1385            3,
1386            0x1,
1387            1,
1388            0,
1389            smpup0biu::Wpgrpa,
1390            smpup0biu::Wpgrpa,
1391            Smpup0Biu_SPEC,
1392            crate::common::RW,
1393        >::from_register(self, 0)
1394    }
1395}
1396impl ::core::default::Default for Smpup0Biu {
1397    #[inline(always)]
1398    fn default() -> Smpup0Biu {
1399        <crate::RegValueT<Smpup0Biu_SPEC> as RegisterValue<_>>::new(0)
1400    }
1401}
1402pub mod smpup0biu {
1403
1404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1405    pub struct Rpcpu_SPEC;
1406    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
1407    impl Rpcpu {
1408        #[doc = "Memory protection for CPU read disabled"]
1409        pub const _0: Self = Self::new(0);
1410
1411        #[doc = "Memory protection for CPU read enabled"]
1412        pub const _1: Self = Self::new(1);
1413    }
1414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1415    pub struct Wpcpu_SPEC;
1416    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
1417    impl Wpcpu {
1418        #[doc = "Memory protection for CPU write disabled"]
1419        pub const _0: Self = Self::new(0);
1420
1421        #[doc = "Memory protection for CPU write enabled"]
1422        pub const _1: Self = Self::new(1);
1423    }
1424    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1425    pub struct Rpgrpa_SPEC;
1426    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
1427    impl Rpgrpa {
1428        #[doc = "Memory protection for master MPU group A read disabled"]
1429        pub const _0: Self = Self::new(0);
1430
1431        #[doc = "Memory protection for master MPU group A read enabled"]
1432        pub const _1: Self = Self::new(1);
1433    }
1434    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1435    pub struct Wpgrpa_SPEC;
1436    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
1437    impl Wpgrpa {
1438        #[doc = "Memory protection for master MPU group A write disabled"]
1439        pub const _0: Self = Self::new(0);
1440
1441        #[doc = "Memory protection for master MPU group A write enabled"]
1442        pub const _1: Self = Self::new(1);
1443    }
1444}
1445#[doc(hidden)]
1446#[derive(Copy, Clone, Eq, PartialEq)]
1447pub struct Smpup2Biu_SPEC;
1448impl crate::sealed::RegSpec for Smpup2Biu_SPEC {
1449    type DataType = u16;
1450}
1451
1452#[doc = "Access Control Register for Internal Peripheral Bus 3"]
1453pub type Smpup2Biu = crate::RegValueT<Smpup2Biu_SPEC>;
1454
1455impl Smpup2Biu {
1456    #[doc = "CPU Read Protection"]
1457    #[inline(always)]
1458    pub fn rpcpu(
1459        self,
1460    ) -> crate::common::RegisterField<
1461        0,
1462        0x1,
1463        1,
1464        0,
1465        smpup2biu::Rpcpu,
1466        smpup2biu::Rpcpu,
1467        Smpup2Biu_SPEC,
1468        crate::common::RW,
1469    > {
1470        crate::common::RegisterField::<
1471            0,
1472            0x1,
1473            1,
1474            0,
1475            smpup2biu::Rpcpu,
1476            smpup2biu::Rpcpu,
1477            Smpup2Biu_SPEC,
1478            crate::common::RW,
1479        >::from_register(self, 0)
1480    }
1481
1482    #[doc = "CPU Write Protection"]
1483    #[inline(always)]
1484    pub fn wpcpu(
1485        self,
1486    ) -> crate::common::RegisterField<
1487        1,
1488        0x1,
1489        1,
1490        0,
1491        smpup2biu::Wpcpu,
1492        smpup2biu::Wpcpu,
1493        Smpup2Biu_SPEC,
1494        crate::common::RW,
1495    > {
1496        crate::common::RegisterField::<
1497            1,
1498            0x1,
1499            1,
1500            0,
1501            smpup2biu::Wpcpu,
1502            smpup2biu::Wpcpu,
1503            Smpup2Biu_SPEC,
1504            crate::common::RW,
1505        >::from_register(self, 0)
1506    }
1507
1508    #[doc = "Master MPU Group A Read Protection"]
1509    #[inline(always)]
1510    pub fn rpgrpa(
1511        self,
1512    ) -> crate::common::RegisterField<
1513        2,
1514        0x1,
1515        1,
1516        0,
1517        smpup2biu::Rpgrpa,
1518        smpup2biu::Rpgrpa,
1519        Smpup2Biu_SPEC,
1520        crate::common::RW,
1521    > {
1522        crate::common::RegisterField::<
1523            2,
1524            0x1,
1525            1,
1526            0,
1527            smpup2biu::Rpgrpa,
1528            smpup2biu::Rpgrpa,
1529            Smpup2Biu_SPEC,
1530            crate::common::RW,
1531        >::from_register(self, 0)
1532    }
1533
1534    #[doc = "Master MPU Group A Write Protection"]
1535    #[inline(always)]
1536    pub fn wpgrpa(
1537        self,
1538    ) -> crate::common::RegisterField<
1539        3,
1540        0x1,
1541        1,
1542        0,
1543        smpup2biu::Wpgrpa,
1544        smpup2biu::Wpgrpa,
1545        Smpup2Biu_SPEC,
1546        crate::common::RW,
1547    > {
1548        crate::common::RegisterField::<
1549            3,
1550            0x1,
1551            1,
1552            0,
1553            smpup2biu::Wpgrpa,
1554            smpup2biu::Wpgrpa,
1555            Smpup2Biu_SPEC,
1556            crate::common::RW,
1557        >::from_register(self, 0)
1558    }
1559}
1560impl ::core::default::Default for Smpup2Biu {
1561    #[inline(always)]
1562    fn default() -> Smpup2Biu {
1563        <crate::RegValueT<Smpup2Biu_SPEC> as RegisterValue<_>>::new(0)
1564    }
1565}
1566pub mod smpup2biu {
1567
1568    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1569    pub struct Rpcpu_SPEC;
1570    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
1571    impl Rpcpu {
1572        #[doc = "Memory protection for CPU read disabled"]
1573        pub const _0: Self = Self::new(0);
1574
1575        #[doc = "Memory protection for CPU read enabled"]
1576        pub const _1: Self = Self::new(1);
1577    }
1578    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1579    pub struct Wpcpu_SPEC;
1580    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
1581    impl Wpcpu {
1582        #[doc = "Memory protection for CPU write disabled"]
1583        pub const _0: Self = Self::new(0);
1584
1585        #[doc = "Memory protection for CPU write enabled"]
1586        pub const _1: Self = Self::new(1);
1587    }
1588    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1589    pub struct Rpgrpa_SPEC;
1590    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
1591    impl Rpgrpa {
1592        #[doc = "Memory protection for master MPU group A read disabled"]
1593        pub const _0: Self = Self::new(0);
1594
1595        #[doc = "Memory protection for master MPU group A read enabled"]
1596        pub const _1: Self = Self::new(1);
1597    }
1598    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1599    pub struct Wpgrpa_SPEC;
1600    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
1601    impl Wpgrpa {
1602        #[doc = "Memory protection for master MPU group A write disabled"]
1603        pub const _0: Self = Self::new(0);
1604
1605        #[doc = "Memory protection for master MPU group A write enabled"]
1606        pub const _1: Self = Self::new(1);
1607    }
1608}
1609#[doc(hidden)]
1610#[derive(Copy, Clone, Eq, PartialEq)]
1611pub struct Mspmpuoad_SPEC;
1612impl crate::sealed::RegSpec for Mspmpuoad_SPEC {
1613    type DataType = u16;
1614}
1615
1616#[doc = "Stack Pointer Monitor Operation After Detection Register"]
1617pub type Mspmpuoad = crate::RegValueT<Mspmpuoad_SPEC>;
1618
1619impl Mspmpuoad {
1620    #[doc = "Operation after Detection"]
1621    #[inline(always)]
1622    pub fn oad(
1623        self,
1624    ) -> crate::common::RegisterField<
1625        0,
1626        0x1,
1627        1,
1628        0,
1629        mspmpuoad::Oad,
1630        mspmpuoad::Oad,
1631        Mspmpuoad_SPEC,
1632        crate::common::RW,
1633    > {
1634        crate::common::RegisterField::<
1635            0,
1636            0x1,
1637            1,
1638            0,
1639            mspmpuoad::Oad,
1640            mspmpuoad::Oad,
1641            Mspmpuoad_SPEC,
1642            crate::common::RW,
1643        >::from_register(self, 0)
1644    }
1645
1646    #[doc = "Key Code"]
1647    #[inline(always)]
1648    pub fn key(
1649        self,
1650    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mspmpuoad_SPEC, crate::common::RW>
1651    {
1652        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mspmpuoad_SPEC,crate::common::RW>::from_register(self,0)
1653    }
1654}
1655impl ::core::default::Default for Mspmpuoad {
1656    #[inline(always)]
1657    fn default() -> Mspmpuoad {
1658        <crate::RegValueT<Mspmpuoad_SPEC> as RegisterValue<_>>::new(0)
1659    }
1660}
1661pub mod mspmpuoad {
1662
1663    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1664    pub struct Oad_SPEC;
1665    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
1666    impl Oad {
1667        #[doc = "Non-maskable interrupt"]
1668        pub const _0: Self = Self::new(0);
1669
1670        #[doc = "Reset"]
1671        pub const _1: Self = Self::new(1);
1672    }
1673}
1674#[doc(hidden)]
1675#[derive(Copy, Clone, Eq, PartialEq)]
1676pub struct Mspmpuctl_SPEC;
1677impl crate::sealed::RegSpec for Mspmpuctl_SPEC {
1678    type DataType = u16;
1679}
1680
1681#[doc = "Stack Pointer Monitor Access Control Register"]
1682pub type Mspmpuctl = crate::RegValueT<Mspmpuctl_SPEC>;
1683
1684impl Mspmpuctl {
1685    #[doc = "Stack Pointer Monitor Enable"]
1686    #[inline(always)]
1687    pub fn enable(
1688        self,
1689    ) -> crate::common::RegisterField<
1690        0,
1691        0x1,
1692        1,
1693        0,
1694        mspmpuctl::Enable,
1695        mspmpuctl::Enable,
1696        Mspmpuctl_SPEC,
1697        crate::common::RW,
1698    > {
1699        crate::common::RegisterField::<
1700            0,
1701            0x1,
1702            1,
1703            0,
1704            mspmpuctl::Enable,
1705            mspmpuctl::Enable,
1706            Mspmpuctl_SPEC,
1707            crate::common::RW,
1708        >::from_register(self, 0)
1709    }
1710
1711    #[doc = "Stack Pointer Monitor Error Flag"]
1712    #[inline(always)]
1713    pub fn error(
1714        self,
1715    ) -> crate::common::RegisterField<
1716        8,
1717        0x1,
1718        1,
1719        0,
1720        mspmpuctl::Error,
1721        mspmpuctl::Error,
1722        Mspmpuctl_SPEC,
1723        crate::common::RW,
1724    > {
1725        crate::common::RegisterField::<
1726            8,
1727            0x1,
1728            1,
1729            0,
1730            mspmpuctl::Error,
1731            mspmpuctl::Error,
1732            Mspmpuctl_SPEC,
1733            crate::common::RW,
1734        >::from_register(self, 0)
1735    }
1736}
1737impl ::core::default::Default for Mspmpuctl {
1738    #[inline(always)]
1739    fn default() -> Mspmpuctl {
1740        <crate::RegValueT<Mspmpuctl_SPEC> as RegisterValue<_>>::new(0)
1741    }
1742}
1743pub mod mspmpuctl {
1744
1745    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1746    pub struct Enable_SPEC;
1747    pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
1748    impl Enable {
1749        #[doc = "Stack pointer monitor is disabled"]
1750        pub const _0: Self = Self::new(0);
1751
1752        #[doc = "Stack pointer monitor is enabled"]
1753        pub const _1: Self = Self::new(1);
1754    }
1755    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1756    pub struct Error_SPEC;
1757    pub type Error = crate::EnumBitfieldStruct<u8, Error_SPEC>;
1758    impl Error {
1759        #[doc = "Stack pointer has not overflowed or underflowed"]
1760        pub const _0: Self = Self::new(0);
1761
1762        #[doc = "Stack pointer has overflowed or underflowed"]
1763        pub const _1: Self = Self::new(1);
1764    }
1765}
1766#[doc(hidden)]
1767#[derive(Copy, Clone, Eq, PartialEq)]
1768pub struct Mspmpupt_SPEC;
1769impl crate::sealed::RegSpec for Mspmpupt_SPEC {
1770    type DataType = u16;
1771}
1772
1773#[doc = "Stack Pointer Monitor Protection Register"]
1774pub type Mspmpupt = crate::RegValueT<Mspmpupt_SPEC>;
1775
1776impl Mspmpupt {
1777    #[doc = "Protection of Register"]
1778    #[inline(always)]
1779    pub fn protect(
1780        self,
1781    ) -> crate::common::RegisterField<
1782        0,
1783        0x1,
1784        1,
1785        0,
1786        mspmpupt::Protect,
1787        mspmpupt::Protect,
1788        Mspmpupt_SPEC,
1789        crate::common::RW,
1790    > {
1791        crate::common::RegisterField::<
1792            0,
1793            0x1,
1794            1,
1795            0,
1796            mspmpupt::Protect,
1797            mspmpupt::Protect,
1798            Mspmpupt_SPEC,
1799            crate::common::RW,
1800        >::from_register(self, 0)
1801    }
1802
1803    #[doc = "Key Code"]
1804    #[inline(always)]
1805    pub fn key(
1806        self,
1807    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mspmpupt_SPEC, crate::common::RW> {
1808        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mspmpupt_SPEC,crate::common::RW>::from_register(self,0)
1809    }
1810}
1811impl ::core::default::Default for Mspmpupt {
1812    #[inline(always)]
1813    fn default() -> Mspmpupt {
1814        <crate::RegValueT<Mspmpupt_SPEC> as RegisterValue<_>>::new(0)
1815    }
1816}
1817pub mod mspmpupt {
1818
1819    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1820    pub struct Protect_SPEC;
1821    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
1822    impl Protect {
1823        #[doc = "Stack pointer monitor register writes are permitted."]
1824        pub const _0: Self = Self::new(0);
1825
1826        #[doc = "Stack pointer monitor register writes are protected. Reads are permitted"]
1827        pub const _1: Self = Self::new(1);
1828    }
1829}
1830#[doc(hidden)]
1831#[derive(Copy, Clone, Eq, PartialEq)]
1832pub struct Mspmpusa_SPEC;
1833impl crate::sealed::RegSpec for Mspmpusa_SPEC {
1834    type DataType = u32;
1835}
1836
1837#[doc = "Main Stack Pointer (MSP) Monitor Start Address Register"]
1838pub type Mspmpusa = crate::RegValueT<Mspmpusa_SPEC>;
1839
1840impl Mspmpusa {
1841    #[doc = "Region Start Address"]
1842    #[inline(always)]
1843    pub fn mspmpusa(
1844        self,
1845    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mspmpusa_SPEC, crate::common::RW>
1846    {
1847        crate::common::RegisterField::<
1848            0,
1849            0xffffffff,
1850            1,
1851            0,
1852            u32,
1853            u32,
1854            Mspmpusa_SPEC,
1855            crate::common::RW,
1856        >::from_register(self, 0)
1857    }
1858}
1859impl ::core::default::Default for Mspmpusa {
1860    #[inline(always)]
1861    fn default() -> Mspmpusa {
1862        <crate::RegValueT<Mspmpusa_SPEC> as RegisterValue<_>>::new(0)
1863    }
1864}
1865
1866#[doc(hidden)]
1867#[derive(Copy, Clone, Eq, PartialEq)]
1868pub struct Mspmpuea_SPEC;
1869impl crate::sealed::RegSpec for Mspmpuea_SPEC {
1870    type DataType = u32;
1871}
1872
1873#[doc = "Main Stack Pointer (MSP) Monitor End Address Register"]
1874pub type Mspmpuea = crate::RegValueT<Mspmpuea_SPEC>;
1875
1876impl Mspmpuea {
1877    #[doc = "Region End Address"]
1878    #[inline(always)]
1879    pub fn mspmpuea(
1880        self,
1881    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mspmpuea_SPEC, crate::common::RW>
1882    {
1883        crate::common::RegisterField::<
1884            0,
1885            0xffffffff,
1886            1,
1887            0,
1888            u32,
1889            u32,
1890            Mspmpuea_SPEC,
1891            crate::common::RW,
1892        >::from_register(self, 0)
1893    }
1894}
1895impl ::core::default::Default for Mspmpuea {
1896    #[inline(always)]
1897    fn default() -> Mspmpuea {
1898        <crate::RegValueT<Mspmpuea_SPEC> as RegisterValue<_>>::new(0)
1899    }
1900}
1901
1902#[doc(hidden)]
1903#[derive(Copy, Clone, Eq, PartialEq)]
1904pub struct Pspmpuoad_SPEC;
1905impl crate::sealed::RegSpec for Pspmpuoad_SPEC {
1906    type DataType = u16;
1907}
1908
1909#[doc = "Stack Pointer Monitor Operation After Detection Register"]
1910pub type Pspmpuoad = crate::RegValueT<Pspmpuoad_SPEC>;
1911
1912impl Pspmpuoad {
1913    #[doc = "Operation after Detection"]
1914    #[inline(always)]
1915    pub fn oad(
1916        self,
1917    ) -> crate::common::RegisterField<
1918        0,
1919        0x1,
1920        1,
1921        0,
1922        pspmpuoad::Oad,
1923        pspmpuoad::Oad,
1924        Pspmpuoad_SPEC,
1925        crate::common::RW,
1926    > {
1927        crate::common::RegisterField::<
1928            0,
1929            0x1,
1930            1,
1931            0,
1932            pspmpuoad::Oad,
1933            pspmpuoad::Oad,
1934            Pspmpuoad_SPEC,
1935            crate::common::RW,
1936        >::from_register(self, 0)
1937    }
1938
1939    #[doc = "Key Code"]
1940    #[inline(always)]
1941    pub fn key(
1942        self,
1943    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Pspmpuoad_SPEC, crate::common::RW>
1944    {
1945        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Pspmpuoad_SPEC,crate::common::RW>::from_register(self,0)
1946    }
1947}
1948impl ::core::default::Default for Pspmpuoad {
1949    #[inline(always)]
1950    fn default() -> Pspmpuoad {
1951        <crate::RegValueT<Pspmpuoad_SPEC> as RegisterValue<_>>::new(0)
1952    }
1953}
1954pub mod pspmpuoad {
1955
1956    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1957    pub struct Oad_SPEC;
1958    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
1959    impl Oad {
1960        #[doc = "Non-maskable interrupt"]
1961        pub const _0: Self = Self::new(0);
1962
1963        #[doc = "Reset"]
1964        pub const _1: Self = Self::new(1);
1965    }
1966}
1967#[doc(hidden)]
1968#[derive(Copy, Clone, Eq, PartialEq)]
1969pub struct Pspmpuctl_SPEC;
1970impl crate::sealed::RegSpec for Pspmpuctl_SPEC {
1971    type DataType = u16;
1972}
1973
1974#[doc = "Stack Pointer Monitor Access Control Register"]
1975pub type Pspmpuctl = crate::RegValueT<Pspmpuctl_SPEC>;
1976
1977impl Pspmpuctl {
1978    #[doc = "Stack Pointer Monitor Enable"]
1979    #[inline(always)]
1980    pub fn enable(
1981        self,
1982    ) -> crate::common::RegisterField<
1983        0,
1984        0x1,
1985        1,
1986        0,
1987        pspmpuctl::Enable,
1988        pspmpuctl::Enable,
1989        Pspmpuctl_SPEC,
1990        crate::common::RW,
1991    > {
1992        crate::common::RegisterField::<
1993            0,
1994            0x1,
1995            1,
1996            0,
1997            pspmpuctl::Enable,
1998            pspmpuctl::Enable,
1999            Pspmpuctl_SPEC,
2000            crate::common::RW,
2001        >::from_register(self, 0)
2002    }
2003
2004    #[doc = "Stack Pointer Monitor Error Flag"]
2005    #[inline(always)]
2006    pub fn error(
2007        self,
2008    ) -> crate::common::RegisterField<
2009        8,
2010        0x1,
2011        1,
2012        0,
2013        pspmpuctl::Error,
2014        pspmpuctl::Error,
2015        Pspmpuctl_SPEC,
2016        crate::common::RW,
2017    > {
2018        crate::common::RegisterField::<
2019            8,
2020            0x1,
2021            1,
2022            0,
2023            pspmpuctl::Error,
2024            pspmpuctl::Error,
2025            Pspmpuctl_SPEC,
2026            crate::common::RW,
2027        >::from_register(self, 0)
2028    }
2029}
2030impl ::core::default::Default for Pspmpuctl {
2031    #[inline(always)]
2032    fn default() -> Pspmpuctl {
2033        <crate::RegValueT<Pspmpuctl_SPEC> as RegisterValue<_>>::new(0)
2034    }
2035}
2036pub mod pspmpuctl {
2037
2038    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2039    pub struct Enable_SPEC;
2040    pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
2041    impl Enable {
2042        #[doc = "Stack pointer monitor is disabled"]
2043        pub const _0: Self = Self::new(0);
2044
2045        #[doc = "Stack pointer monitor is enabled"]
2046        pub const _1: Self = Self::new(1);
2047    }
2048    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2049    pub struct Error_SPEC;
2050    pub type Error = crate::EnumBitfieldStruct<u8, Error_SPEC>;
2051    impl Error {
2052        #[doc = "Stack pointer has not overflowed or underflowed"]
2053        pub const _0: Self = Self::new(0);
2054
2055        #[doc = "Stack pointer has overflowed or underflowed"]
2056        pub const _1: Self = Self::new(1);
2057    }
2058}
2059#[doc(hidden)]
2060#[derive(Copy, Clone, Eq, PartialEq)]
2061pub struct Pspmpupt_SPEC;
2062impl crate::sealed::RegSpec for Pspmpupt_SPEC {
2063    type DataType = u16;
2064}
2065
2066#[doc = "Stack Pointer Monitor Protection Register"]
2067pub type Pspmpupt = crate::RegValueT<Pspmpupt_SPEC>;
2068
2069impl Pspmpupt {
2070    #[doc = "Protection of Register"]
2071    #[inline(always)]
2072    pub fn protect(
2073        self,
2074    ) -> crate::common::RegisterField<
2075        0,
2076        0x1,
2077        1,
2078        0,
2079        pspmpupt::Protect,
2080        pspmpupt::Protect,
2081        Pspmpupt_SPEC,
2082        crate::common::RW,
2083    > {
2084        crate::common::RegisterField::<
2085            0,
2086            0x1,
2087            1,
2088            0,
2089            pspmpupt::Protect,
2090            pspmpupt::Protect,
2091            Pspmpupt_SPEC,
2092            crate::common::RW,
2093        >::from_register(self, 0)
2094    }
2095
2096    #[doc = "Key Code"]
2097    #[inline(always)]
2098    pub fn key(
2099        self,
2100    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Pspmpupt_SPEC, crate::common::RW> {
2101        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Pspmpupt_SPEC,crate::common::RW>::from_register(self,0)
2102    }
2103}
2104impl ::core::default::Default for Pspmpupt {
2105    #[inline(always)]
2106    fn default() -> Pspmpupt {
2107        <crate::RegValueT<Pspmpupt_SPEC> as RegisterValue<_>>::new(0)
2108    }
2109}
2110pub mod pspmpupt {
2111
2112    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2113    pub struct Protect_SPEC;
2114    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
2115    impl Protect {
2116        #[doc = "Stack pointer monitor register writes are permitted."]
2117        pub const _0: Self = Self::new(0);
2118
2119        #[doc = "Stack pointer monitor register writes are protected. Reads are permitted"]
2120        pub const _1: Self = Self::new(1);
2121    }
2122}
2123#[doc(hidden)]
2124#[derive(Copy, Clone, Eq, PartialEq)]
2125pub struct Pspmpusa_SPEC;
2126impl crate::sealed::RegSpec for Pspmpusa_SPEC {
2127    type DataType = u32;
2128}
2129
2130#[doc = "Process Stack Pointer (PSP) Monitor Start Address Register"]
2131pub type Pspmpusa = crate::RegValueT<Pspmpusa_SPEC>;
2132
2133impl Pspmpusa {
2134    #[doc = "Region Start Address"]
2135    #[inline(always)]
2136    pub fn pspmpusa(
2137        self,
2138    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Pspmpusa_SPEC, crate::common::RW>
2139    {
2140        crate::common::RegisterField::<
2141            0,
2142            0xffffffff,
2143            1,
2144            0,
2145            u32,
2146            u32,
2147            Pspmpusa_SPEC,
2148            crate::common::RW,
2149        >::from_register(self, 0)
2150    }
2151}
2152impl ::core::default::Default for Pspmpusa {
2153    #[inline(always)]
2154    fn default() -> Pspmpusa {
2155        <crate::RegValueT<Pspmpusa_SPEC> as RegisterValue<_>>::new(0)
2156    }
2157}
2158
2159#[doc(hidden)]
2160#[derive(Copy, Clone, Eq, PartialEq)]
2161pub struct Pspmpuea_SPEC;
2162impl crate::sealed::RegSpec for Pspmpuea_SPEC {
2163    type DataType = u32;
2164}
2165
2166#[doc = "Process Stack Pointer (PSP) Monitor End Address Register"]
2167pub type Pspmpuea = crate::RegValueT<Pspmpuea_SPEC>;
2168
2169impl Pspmpuea {
2170    #[doc = "Region End Address"]
2171    #[inline(always)]
2172    pub fn pspmpuea(
2173        self,
2174    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Pspmpuea_SPEC, crate::common::RW>
2175    {
2176        crate::common::RegisterField::<
2177            0,
2178            0xffffffff,
2179            1,
2180            0,
2181            u32,
2182            u32,
2183            Pspmpuea_SPEC,
2184            crate::common::RW,
2185        >::from_register(self, 0)
2186    }
2187}
2188impl ::core::default::Default for Pspmpuea {
2189    #[inline(always)]
2190    fn default() -> Pspmpuea {
2191        <crate::RegValueT<Pspmpuea_SPEC> as RegisterValue<_>>::new(0)
2192    }
2193}
ra2e3_pac/rmpu.rs

ra2e3_pac/
rmpu.rs
