ra2e3_pac/
lib.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:46:50 +0000
19#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "Arm Cortex-M23 based Microcontroller RA2E1 device"]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "adc120")]
31pub mod adc120;
32#[cfg(feature = "agt0")]
33pub mod agt0;
34#[cfg(feature = "bus")]
35pub mod bus;
36#[cfg(feature = "cac")]
37pub mod cac;
38#[cfg(feature = "crc")]
39pub mod crc;
40#[cfg(feature = "dbg")]
41pub mod dbg;
42#[cfg(feature = "doc")]
43pub mod doc;
44#[cfg(feature = "dtc")]
45pub mod dtc;
46#[cfg(feature = "elc")]
47pub mod elc;
48#[cfg(feature = "flcn")]
49pub mod flcn;
50#[cfg(feature = "gpt164")]
51pub mod gpt164;
52#[cfg(feature = "gpt320")]
53pub mod gpt320;
54#[cfg(feature = "gpt_ops")]
55pub mod gpt_ops;
56#[cfg(feature = "icu")]
57pub mod icu;
58#[cfg(feature = "iic0")]
59pub mod iic0;
60#[cfg(feature = "iic0wu")]
61pub mod iic0wu;
62#[cfg(feature = "iwdt")]
63pub mod iwdt;
64#[cfg(feature = "kint")]
65pub mod kint;
66#[cfg(feature = "mstp")]
67pub mod mstp;
68#[cfg(feature = "pfs")]
69pub mod pfs;
70#[cfg(feature = "poeg")]
71pub mod poeg;
72#[cfg(feature = "port0")]
73pub mod port0;
74#[cfg(feature = "port1")]
75pub mod port1;
76#[cfg(feature = "rmpu")]
77pub mod rmpu;
78#[cfg(feature = "rtc")]
79pub mod rtc;
80#[cfg(feature = "sci0")]
81pub mod sci0;
82#[cfg(feature = "sci1")]
83pub mod sci1;
84#[cfg(feature = "spi0")]
85pub mod spi0;
86#[cfg(feature = "sram")]
87pub mod sram;
88#[cfg(feature = "sysc")]
89pub mod sysc;
90#[cfg(feature = "wdt")]
91pub mod wdt;
92
93#[cfg(feature = "rmpu")]
94#[derive(Copy, Clone, Eq, PartialEq)]
95pub struct Rmpu {
96    ptr: *mut u8,
97}
98#[cfg(feature = "rmpu")]
99pub const RMPU: self::Rmpu = self::Rmpu {
100    ptr: 0x40000000u32 as _,
101};
102#[cfg(feature = "sram")]
103#[derive(Copy, Clone, Eq, PartialEq)]
104pub struct Sram {
105    ptr: *mut u8,
106}
107#[cfg(feature = "sram")]
108pub const SRAM: self::Sram = self::Sram {
109    ptr: 0x40002000u32 as _,
110};
111#[cfg(feature = "bus")]
112#[derive(Copy, Clone, Eq, PartialEq)]
113pub struct Bus {
114    ptr: *mut u8,
115}
116#[cfg(feature = "bus")]
117pub const BUS: self::Bus = self::Bus {
118    ptr: 0x40003000u32 as _,
119};
120#[cfg(feature = "dtc")]
121#[derive(Copy, Clone, Eq, PartialEq)]
122pub struct Dtc {
123    ptr: *mut u8,
124}
125#[cfg(feature = "dtc")]
126pub const DTC: self::Dtc = self::Dtc {
127    ptr: 0x40005400u32 as _,
128};
129#[cfg(feature = "icu")]
130#[derive(Copy, Clone, Eq, PartialEq)]
131pub struct Icu {
132    ptr: *mut u8,
133}
134#[cfg(feature = "icu")]
135pub const ICU: self::Icu = self::Icu {
136    ptr: 0x40006000u32 as _,
137};
138#[cfg(feature = "dbg")]
139#[derive(Copy, Clone, Eq, PartialEq)]
140pub struct Dbg {
141    ptr: *mut u8,
142}
143#[cfg(feature = "dbg")]
144pub const DBG: self::Dbg = self::Dbg {
145    ptr: 0x4001b000u32 as _,
146};
147#[cfg(feature = "sysc")]
148#[derive(Copy, Clone, Eq, PartialEq)]
149pub struct Sysc {
150    ptr: *mut u8,
151}
152#[cfg(feature = "sysc")]
153pub const SYSC: self::Sysc = self::Sysc {
154    ptr: 0x4001e000u32 as _,
155};
156#[cfg(feature = "port0")]
157#[derive(Copy, Clone, Eq, PartialEq)]
158pub struct Port0 {
159    ptr: *mut u8,
160}
161#[cfg(feature = "port0")]
162pub const PORT0: self::Port0 = self::Port0 {
163    ptr: 0x40040000u32 as _,
164};
165#[cfg(feature = "port1")]
166#[derive(Copy, Clone, Eq, PartialEq)]
167pub struct Port1 {
168    ptr: *mut u8,
169}
170#[cfg(feature = "port1")]
171pub const PORT1: self::Port1 = self::Port1 {
172    ptr: 0x40040020u32 as _,
173};
174#[cfg(feature = "port2")]
175pub const PORT2: self::Port1 = self::Port1 {
176    ptr: 0x40040040u32 as _,
177};
178#[cfg(feature = "port3")]
179pub const PORT3: self::Port0 = self::Port0 {
180    ptr: 0x40040060u32 as _,
181};
182#[cfg(feature = "port4")]
183pub const PORT4: self::Port0 = self::Port0 {
184    ptr: 0x40040080u32 as _,
185};
186#[cfg(feature = "port5")]
187pub const PORT5: self::Port0 = self::Port0 {
188    ptr: 0x400400a0u32 as _,
189};
190#[cfg(feature = "port9")]
191pub const PORT9: self::Port0 = self::Port0 {
192    ptr: 0x40040120u32 as _,
193};
194#[cfg(feature = "pfs")]
195#[derive(Copy, Clone, Eq, PartialEq)]
196pub struct Pfs {
197    ptr: *mut u8,
198}
199#[cfg(feature = "pfs")]
200pub const PFS: self::Pfs = self::Pfs {
201    ptr: 0x40040800u32 as _,
202};
203#[cfg(feature = "elc")]
204#[derive(Copy, Clone, Eq, PartialEq)]
205pub struct Elc {
206    ptr: *mut u8,
207}
208#[cfg(feature = "elc")]
209pub const ELC: self::Elc = self::Elc {
210    ptr: 0x40041000u32 as _,
211};
212#[cfg(feature = "poeg")]
213#[derive(Copy, Clone, Eq, PartialEq)]
214pub struct Poeg {
215    ptr: *mut u8,
216}
217#[cfg(feature = "poeg")]
218pub const POEG: self::Poeg = self::Poeg {
219    ptr: 0x40042000u32 as _,
220};
221#[cfg(feature = "rtc")]
222#[derive(Copy, Clone, Eq, PartialEq)]
223pub struct Rtc {
224    ptr: *mut u8,
225}
226#[cfg(feature = "rtc")]
227pub const RTC: self::Rtc = self::Rtc {
228    ptr: 0x40044000u32 as _,
229};
230#[cfg(feature = "wdt")]
231#[derive(Copy, Clone, Eq, PartialEq)]
232pub struct Wdt {
233    ptr: *mut u8,
234}
235#[cfg(feature = "wdt")]
236pub const WDT: self::Wdt = self::Wdt {
237    ptr: 0x40044200u32 as _,
238};
239#[cfg(feature = "iwdt")]
240#[derive(Copy, Clone, Eq, PartialEq)]
241pub struct Iwdt {
242    ptr: *mut u8,
243}
244#[cfg(feature = "iwdt")]
245pub const IWDT: self::Iwdt = self::Iwdt {
246    ptr: 0x40044400u32 as _,
247};
248#[cfg(feature = "cac")]
249#[derive(Copy, Clone, Eq, PartialEq)]
250pub struct Cac {
251    ptr: *mut u8,
252}
253#[cfg(feature = "cac")]
254pub const CAC: self::Cac = self::Cac {
255    ptr: 0x40044600u32 as _,
256};
257#[cfg(feature = "mstp")]
258#[derive(Copy, Clone, Eq, PartialEq)]
259pub struct Mstp {
260    ptr: *mut u8,
261}
262#[cfg(feature = "mstp")]
263pub const MSTP: self::Mstp = self::Mstp {
264    ptr: 0x40047000u32 as _,
265};
266#[cfg(feature = "iic0")]
267#[derive(Copy, Clone, Eq, PartialEq)]
268pub struct Iic0 {
269    ptr: *mut u8,
270}
271#[cfg(feature = "iic0")]
272pub const IIC0: self::Iic0 = self::Iic0 {
273    ptr: 0x40053000u32 as _,
274};
275#[cfg(feature = "iic0wu")]
276#[derive(Copy, Clone, Eq, PartialEq)]
277pub struct Iic0Wu {
278    ptr: *mut u8,
279}
280#[cfg(feature = "iic0wu")]
281pub const IIC0WU: self::Iic0Wu = self::Iic0Wu {
282    ptr: 0x40053014u32 as _,
283};
284#[cfg(feature = "doc")]
285#[derive(Copy, Clone, Eq, PartialEq)]
286pub struct Doc {
287    ptr: *mut u8,
288}
289#[cfg(feature = "doc")]
290pub const DOC: self::Doc = self::Doc {
291    ptr: 0x40054100u32 as _,
292};
293#[cfg(feature = "adc120")]
294#[derive(Copy, Clone, Eq, PartialEq)]
295pub struct Adc120 {
296    ptr: *mut u8,
297}
298#[cfg(feature = "adc120")]
299pub const ADC120: self::Adc120 = self::Adc120 {
300    ptr: 0x4005c000u32 as _,
301};
302#[cfg(feature = "sci0")]
303#[derive(Copy, Clone, Eq, PartialEq)]
304pub struct Sci0 {
305    ptr: *mut u8,
306}
307#[cfg(feature = "sci0")]
308pub const SCI0: self::Sci0 = self::Sci0 {
309    ptr: 0x40070000u32 as _,
310};
311#[cfg(feature = "sci1")]
312#[derive(Copy, Clone, Eq, PartialEq)]
313pub struct Sci1 {
314    ptr: *mut u8,
315}
316#[cfg(feature = "sci1")]
317pub const SCI1: self::Sci1 = self::Sci1 {
318    ptr: 0x40070020u32 as _,
319};
320#[cfg(feature = "sci2")]
321pub const SCI2: self::Sci1 = self::Sci1 {
322    ptr: 0x40070040u32 as _,
323};
324#[cfg(feature = "sci9")]
325pub const SCI9: self::Sci1 = self::Sci1 {
326    ptr: 0x40070120u32 as _,
327};
328#[cfg(feature = "spi0")]
329#[derive(Copy, Clone, Eq, PartialEq)]
330pub struct Spi0 {
331    ptr: *mut u8,
332}
333#[cfg(feature = "spi0")]
334pub const SPI0: self::Spi0 = self::Spi0 {
335    ptr: 0x40072000u32 as _,
336};
337#[cfg(feature = "crc")]
338#[derive(Copy, Clone, Eq, PartialEq)]
339pub struct Crc {
340    ptr: *mut u8,
341}
342#[cfg(feature = "crc")]
343pub const CRC: self::Crc = self::Crc {
344    ptr: 0x40074000u32 as _,
345};
346#[cfg(feature = "gpt320")]
347#[derive(Copy, Clone, Eq, PartialEq)]
348pub struct Gpt320 {
349    ptr: *mut u8,
350}
351#[cfg(feature = "gpt320")]
352pub const GPT320: self::Gpt320 = self::Gpt320 {
353    ptr: 0x40078000u32 as _,
354};
355#[cfg(feature = "gpt164")]
356#[derive(Copy, Clone, Eq, PartialEq)]
357pub struct Gpt164 {
358    ptr: *mut u8,
359}
360#[cfg(feature = "gpt164")]
361pub const GPT164: self::Gpt164 = self::Gpt164 {
362    ptr: 0x40078400u32 as _,
363};
364#[cfg(feature = "gpt165")]
365pub const GPT165: self::Gpt164 = self::Gpt164 {
366    ptr: 0x40078500u32 as _,
367};
368#[cfg(feature = "gpt166")]
369pub const GPT166: self::Gpt164 = self::Gpt164 {
370    ptr: 0x40078600u32 as _,
371};
372#[cfg(feature = "gpt167")]
373pub const GPT167: self::Gpt164 = self::Gpt164 {
374    ptr: 0x40078700u32 as _,
375};
376#[cfg(feature = "gpt168")]
377pub const GPT168: self::Gpt164 = self::Gpt164 {
378    ptr: 0x40078800u32 as _,
379};
380#[cfg(feature = "gpt169")]
381pub const GPT169: self::Gpt164 = self::Gpt164 {
382    ptr: 0x40078900u32 as _,
383};
384#[cfg(feature = "gpt_ops")]
385#[derive(Copy, Clone, Eq, PartialEq)]
386pub struct GptOps {
387    ptr: *mut u8,
388}
389#[cfg(feature = "gpt_ops")]
390pub const GPT_OPS: self::GptOps = self::GptOps {
391    ptr: 0x40078ff0u32 as _,
392};
393#[cfg(feature = "kint")]
394#[derive(Copy, Clone, Eq, PartialEq)]
395pub struct Kint {
396    ptr: *mut u8,
397}
398#[cfg(feature = "kint")]
399pub const KINT: self::Kint = self::Kint {
400    ptr: 0x40080000u32 as _,
401};
402#[cfg(feature = "agt0")]
403#[derive(Copy, Clone, Eq, PartialEq)]
404pub struct Agt0 {
405    ptr: *mut u8,
406}
407#[cfg(feature = "agt0")]
408pub const AGT0: self::Agt0 = self::Agt0 {
409    ptr: 0x40084000u32 as _,
410};
411#[cfg(feature = "agt1")]
412pub const AGT1: self::Agt0 = self::Agt0 {
413    ptr: 0x40084100u32 as _,
414};
415#[cfg(feature = "flcn")]
416#[derive(Copy, Clone, Eq, PartialEq)]
417pub struct Flcn {
418    ptr: *mut u8,
419}
420#[cfg(feature = "flcn")]
421pub const FLCN: self::Flcn = self::Flcn {
422    ptr: 0x407ec000u32 as _,
423};
424
425pub use cortex_m::peripheral::Peripherals as CorePeripherals;
426pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, ITM, MPU, NVIC, SCB, SYST, TPIU};
427#[doc = "Number available in the NVIC for configuring priority"]
428pub const NVIC_PRIO_BITS: u8 = 2;
429#[doc(hidden)]
430pub union Vector {
431    _handler: unsafe extern "C" fn(),
432    _reserved: u32,
433}
434#[cfg(feature = "rt")]
435pub use self::Interrupt as interrupt;
436#[cfg(feature = "rt")]
437pub use cortex_m_rt::interrupt;
438#[cfg(feature = "rt")]
439pub mod interrupt_handlers {
440    unsafe extern "C" {
441        pub fn IEL0();
442        pub fn IEL1();
443        pub fn IEL2();
444        pub fn IEL3();
445        pub fn IEL4();
446        pub fn IEL5();
447        pub fn IEL6();
448        pub fn IEL7();
449        pub fn IEL8();
450        pub fn IEL9();
451        pub fn IEL10();
452        pub fn IEL11();
453        pub fn IEL12();
454        pub fn IEL13();
455        pub fn IEL14();
456        pub fn IEL15();
457        pub fn IEL16();
458        pub fn IEL17();
459        pub fn IEL18();
460        pub fn IEL19();
461        pub fn IEL20();
462        pub fn IEL21();
463        pub fn IEL22();
464        pub fn IEL23();
465        pub fn IEL24();
466        pub fn IEL25();
467        pub fn IEL26();
468        pub fn IEL27();
469        pub fn IEL28();
470        pub fn IEL29();
471        pub fn IEL30();
472        pub fn IEL31();
473    }
474}
475#[cfg(feature = "rt")]
476#[doc(hidden)]
477#[unsafe(link_section = ".vector_table.interrupts")]
478#[unsafe(no_mangle)]
479pub static __INTERRUPTS: [Vector; 32] = [
480    Vector {
481        _handler: interrupt_handlers::IEL0,
482    },
483    Vector {
484        _handler: interrupt_handlers::IEL1,
485    },
486    Vector {
487        _handler: interrupt_handlers::IEL2,
488    },
489    Vector {
490        _handler: interrupt_handlers::IEL3,
491    },
492    Vector {
493        _handler: interrupt_handlers::IEL4,
494    },
495    Vector {
496        _handler: interrupt_handlers::IEL5,
497    },
498    Vector {
499        _handler: interrupt_handlers::IEL6,
500    },
501    Vector {
502        _handler: interrupt_handlers::IEL7,
503    },
504    Vector {
505        _handler: interrupt_handlers::IEL8,
506    },
507    Vector {
508        _handler: interrupt_handlers::IEL9,
509    },
510    Vector {
511        _handler: interrupt_handlers::IEL10,
512    },
513    Vector {
514        _handler: interrupt_handlers::IEL11,
515    },
516    Vector {
517        _handler: interrupt_handlers::IEL12,
518    },
519    Vector {
520        _handler: interrupt_handlers::IEL13,
521    },
522    Vector {
523        _handler: interrupt_handlers::IEL14,
524    },
525    Vector {
526        _handler: interrupt_handlers::IEL15,
527    },
528    Vector {
529        _handler: interrupt_handlers::IEL16,
530    },
531    Vector {
532        _handler: interrupt_handlers::IEL17,
533    },
534    Vector {
535        _handler: interrupt_handlers::IEL18,
536    },
537    Vector {
538        _handler: interrupt_handlers::IEL19,
539    },
540    Vector {
541        _handler: interrupt_handlers::IEL20,
542    },
543    Vector {
544        _handler: interrupt_handlers::IEL21,
545    },
546    Vector {
547        _handler: interrupt_handlers::IEL22,
548    },
549    Vector {
550        _handler: interrupt_handlers::IEL23,
551    },
552    Vector {
553        _handler: interrupt_handlers::IEL24,
554    },
555    Vector {
556        _handler: interrupt_handlers::IEL25,
557    },
558    Vector {
559        _handler: interrupt_handlers::IEL26,
560    },
561    Vector {
562        _handler: interrupt_handlers::IEL27,
563    },
564    Vector {
565        _handler: interrupt_handlers::IEL28,
566    },
567    Vector {
568        _handler: interrupt_handlers::IEL29,
569    },
570    Vector {
571        _handler: interrupt_handlers::IEL30,
572    },
573    Vector {
574        _handler: interrupt_handlers::IEL31,
575    },
576];
577#[doc = "Enumeration of all the interrupts."]
578#[derive(Copy, Clone, Debug, PartialEq, Eq)]
579#[repr(u16)]
580pub enum Interrupt {
581    #[doc = "ICU Interrupt 0"]
582    IEL0 = 0,
583
584    #[doc = "ICU Interrupt 1"]
585    IEL1 = 1,
586
587    #[doc = "ICU Interrupt 2"]
588    IEL2 = 2,
589
590    #[doc = "ICU Interrupt 3"]
591    IEL3 = 3,
592
593    #[doc = "ICU Interrupt 4"]
594    IEL4 = 4,
595
596    #[doc = "ICU Interrupt 5"]
597    IEL5 = 5,
598
599    #[doc = "ICU Interrupt 6"]
600    IEL6 = 6,
601
602    #[doc = "ICU Interrupt 7"]
603    IEL7 = 7,
604
605    #[doc = "ICU Interrupt 8"]
606    IEL8 = 8,
607
608    #[doc = "ICU Interrupt 9"]
609    IEL9 = 9,
610
611    #[doc = "ICU Interrupt 10"]
612    IEL10 = 10,
613
614    #[doc = "ICU Interrupt 11"]
615    IEL11 = 11,
616
617    #[doc = "ICU Interrupt 12"]
618    IEL12 = 12,
619
620    #[doc = "ICU Interrupt 13"]
621    IEL13 = 13,
622
623    #[doc = "ICU Interrupt 14"]
624    IEL14 = 14,
625
626    #[doc = "ICU Interrupt 15"]
627    IEL15 = 15,
628
629    #[doc = "ICU Interrupt 16"]
630    IEL16 = 16,
631
632    #[doc = "ICU Interrupt 17"]
633    IEL17 = 17,
634
635    #[doc = "ICU Interrupt 18"]
636    IEL18 = 18,
637
638    #[doc = "ICU Interrupt 19"]
639    IEL19 = 19,
640
641    #[doc = "ICU Interrupt 20"]
642    IEL20 = 20,
643
644    #[doc = "ICU Interrupt 21"]
645    IEL21 = 21,
646
647    #[doc = "ICU Interrupt 22"]
648    IEL22 = 22,
649
650    #[doc = "ICU Interrupt 23"]
651    IEL23 = 23,
652
653    #[doc = "ICU Interrupt 24"]
654    IEL24 = 24,
655
656    #[doc = "ICU Interrupt 25"]
657    IEL25 = 25,
658
659    #[doc = "ICU Interrupt 26"]
660    IEL26 = 26,
661
662    #[doc = "ICU Interrupt 27"]
663    IEL27 = 27,
664
665    #[doc = "ICU Interrupt 28"]
666    IEL28 = 28,
667
668    #[doc = "ICU Interrupt 29"]
669    IEL29 = 29,
670
671    #[doc = "ICU Interrupt 30"]
672    IEL30 = 30,
673
674    #[doc = "ICU Interrupt 31"]
675    IEL31 = 31,
676}
677unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
678    #[inline(always)]
679    fn number(self) -> u16 {
680        self as u16
681    }
682}
683#[allow(non_snake_case)]
684/// Required for compatibility with RTIC and other frameworks
685pub struct Peripherals {
686    #[cfg(feature = "rmpu")]
687    pub RMPU: self::Rmpu,
688    #[cfg(feature = "sram")]
689    pub SRAM: self::Sram,
690    #[cfg(feature = "bus")]
691    pub BUS: self::Bus,
692    #[cfg(feature = "dtc")]
693    pub DTC: self::Dtc,
694    #[cfg(feature = "icu")]
695    pub ICU: self::Icu,
696    #[cfg(feature = "dbg")]
697    pub DBG: self::Dbg,
698    #[cfg(feature = "sysc")]
699    pub SYSC: self::Sysc,
700    #[cfg(feature = "port0")]
701    pub PORT0: self::Port0,
702    #[cfg(feature = "port1")]
703    pub PORT1: self::Port1,
704    #[cfg(feature = "port2")]
705    pub PORT2: self::Port1,
706    #[cfg(feature = "port3")]
707    pub PORT3: self::Port0,
708    #[cfg(feature = "port4")]
709    pub PORT4: self::Port0,
710    #[cfg(feature = "port5")]
711    pub PORT5: self::Port0,
712    #[cfg(feature = "port9")]
713    pub PORT9: self::Port0,
714    #[cfg(feature = "pfs")]
715    pub PFS: self::Pfs,
716    #[cfg(feature = "elc")]
717    pub ELC: self::Elc,
718    #[cfg(feature = "poeg")]
719    pub POEG: self::Poeg,
720    #[cfg(feature = "rtc")]
721    pub RTC: self::Rtc,
722    #[cfg(feature = "wdt")]
723    pub WDT: self::Wdt,
724    #[cfg(feature = "iwdt")]
725    pub IWDT: self::Iwdt,
726    #[cfg(feature = "cac")]
727    pub CAC: self::Cac,
728    #[cfg(feature = "mstp")]
729    pub MSTP: self::Mstp,
730    #[cfg(feature = "iic0")]
731    pub IIC0: self::Iic0,
732    #[cfg(feature = "iic0wu")]
733    pub IIC0WU: self::Iic0Wu,
734    #[cfg(feature = "doc")]
735    pub DOC: self::Doc,
736    #[cfg(feature = "adc120")]
737    pub ADC120: self::Adc120,
738    #[cfg(feature = "sci0")]
739    pub SCI0: self::Sci0,
740    #[cfg(feature = "sci1")]
741    pub SCI1: self::Sci1,
742    #[cfg(feature = "sci2")]
743    pub SCI2: self::Sci1,
744    #[cfg(feature = "sci9")]
745    pub SCI9: self::Sci1,
746    #[cfg(feature = "spi0")]
747    pub SPI0: self::Spi0,
748    #[cfg(feature = "crc")]
749    pub CRC: self::Crc,
750    #[cfg(feature = "gpt320")]
751    pub GPT320: self::Gpt320,
752    #[cfg(feature = "gpt164")]
753    pub GPT164: self::Gpt164,
754    #[cfg(feature = "gpt165")]
755    pub GPT165: self::Gpt164,
756    #[cfg(feature = "gpt166")]
757    pub GPT166: self::Gpt164,
758    #[cfg(feature = "gpt167")]
759    pub GPT167: self::Gpt164,
760    #[cfg(feature = "gpt168")]
761    pub GPT168: self::Gpt164,
762    #[cfg(feature = "gpt169")]
763    pub GPT169: self::Gpt164,
764    #[cfg(feature = "gpt_ops")]
765    pub GPT_OPS: self::GptOps,
766    #[cfg(feature = "kint")]
767    pub KINT: self::Kint,
768    #[cfg(feature = "agt0")]
769    pub AGT0: self::Agt0,
770    #[cfg(feature = "agt1")]
771    pub AGT1: self::Agt0,
772    #[cfg(feature = "flcn")]
773    pub FLCN: self::Flcn,
774}
775
776impl Peripherals {
777    /// Returns Peripheral struct multiple times
778    /// Required for compatibility with RTIC and other frameworks
779    #[inline]
780    pub fn take() -> Option<Self> {
781        Some(Self::steal())
782    }
783
784    /// Returns Peripheral struct multiple times
785    /// Required for compatibility with RTIC and other frameworks
786    #[inline]
787    pub fn steal() -> Self {
788        Peripherals {
789            #[cfg(feature = "rmpu")]
790            RMPU: crate::RMPU,
791            #[cfg(feature = "sram")]
792            SRAM: crate::SRAM,
793            #[cfg(feature = "bus")]
794            BUS: crate::BUS,
795            #[cfg(feature = "dtc")]
796            DTC: crate::DTC,
797            #[cfg(feature = "icu")]
798            ICU: crate::ICU,
799            #[cfg(feature = "dbg")]
800            DBG: crate::DBG,
801            #[cfg(feature = "sysc")]
802            SYSC: crate::SYSC,
803            #[cfg(feature = "port0")]
804            PORT0: crate::PORT0,
805            #[cfg(feature = "port1")]
806            PORT1: crate::PORT1,
807            #[cfg(feature = "port2")]
808            PORT2: crate::PORT2,
809            #[cfg(feature = "port3")]
810            PORT3: crate::PORT3,
811            #[cfg(feature = "port4")]
812            PORT4: crate::PORT4,
813            #[cfg(feature = "port5")]
814            PORT5: crate::PORT5,
815            #[cfg(feature = "port9")]
816            PORT9: crate::PORT9,
817            #[cfg(feature = "pfs")]
818            PFS: crate::PFS,
819            #[cfg(feature = "elc")]
820            ELC: crate::ELC,
821            #[cfg(feature = "poeg")]
822            POEG: crate::POEG,
823            #[cfg(feature = "rtc")]
824            RTC: crate::RTC,
825            #[cfg(feature = "wdt")]
826            WDT: crate::WDT,
827            #[cfg(feature = "iwdt")]
828            IWDT: crate::IWDT,
829            #[cfg(feature = "cac")]
830            CAC: crate::CAC,
831            #[cfg(feature = "mstp")]
832            MSTP: crate::MSTP,
833            #[cfg(feature = "iic0")]
834            IIC0: crate::IIC0,
835            #[cfg(feature = "iic0wu")]
836            IIC0WU: crate::IIC0WU,
837            #[cfg(feature = "doc")]
838            DOC: crate::DOC,
839            #[cfg(feature = "adc120")]
840            ADC120: crate::ADC120,
841            #[cfg(feature = "sci0")]
842            SCI0: crate::SCI0,
843            #[cfg(feature = "sci1")]
844            SCI1: crate::SCI1,
845            #[cfg(feature = "sci2")]
846            SCI2: crate::SCI2,
847            #[cfg(feature = "sci9")]
848            SCI9: crate::SCI9,
849            #[cfg(feature = "spi0")]
850            SPI0: crate::SPI0,
851            #[cfg(feature = "crc")]
852            CRC: crate::CRC,
853            #[cfg(feature = "gpt320")]
854            GPT320: crate::GPT320,
855            #[cfg(feature = "gpt164")]
856            GPT164: crate::GPT164,
857            #[cfg(feature = "gpt165")]
858            GPT165: crate::GPT165,
859            #[cfg(feature = "gpt166")]
860            GPT166: crate::GPT166,
861            #[cfg(feature = "gpt167")]
862            GPT167: crate::GPT167,
863            #[cfg(feature = "gpt168")]
864            GPT168: crate::GPT168,
865            #[cfg(feature = "gpt169")]
866            GPT169: crate::GPT169,
867            #[cfg(feature = "gpt_ops")]
868            GPT_OPS: crate::GPT_OPS,
869            #[cfg(feature = "kint")]
870            KINT: crate::KINT,
871            #[cfg(feature = "agt0")]
872            AGT0: crate::AGT0,
873            #[cfg(feature = "agt1")]
874            AGT1: crate::AGT1,
875            #[cfg(feature = "flcn")]
876            FLCN: crate::FLCN,
877        }
878    }
879}
ra2e3_pac/lib.rs

ra2e3_pac/
lib.rs
