1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Flash I/O Registers"]
28unsafe impl ::core::marker::Send for super::Flcn {}
29unsafe impl ::core::marker::Sync for super::Flcn {}
30impl super::Flcn {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Data Flash Control Register"]
38 #[inline(always)]
39 pub const fn dflctl(
40 &self,
41 ) -> &'static crate::common::Reg<self::Dflctl_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Dflctl_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(144usize),
45 )
46 }
47 }
48
49 #[doc = "Flash P/E Mode Control Register"]
50 #[inline(always)]
51 pub const fn fpmcr(&self) -> &'static crate::common::Reg<self::Fpmcr_SPEC, crate::common::RW> {
52 unsafe {
53 crate::common::Reg::<self::Fpmcr_SPEC, crate::common::RW>::from_ptr(
54 self._svd2pac_as_ptr().add(256usize),
55 )
56 }
57 }
58
59 #[doc = "Flash Area Select Register"]
60 #[inline(always)]
61 pub const fn fasr(&self) -> &'static crate::common::Reg<self::Fasr_SPEC, crate::common::RW> {
62 unsafe {
63 crate::common::Reg::<self::Fasr_SPEC, crate::common::RW>::from_ptr(
64 self._svd2pac_as_ptr().add(260usize),
65 )
66 }
67 }
68
69 #[doc = "Flash Processing Start Address Register L"]
70 #[inline(always)]
71 pub const fn fsarl(&self) -> &'static crate::common::Reg<self::Fsarl_SPEC, crate::common::RW> {
72 unsafe {
73 crate::common::Reg::<self::Fsarl_SPEC, crate::common::RW>::from_ptr(
74 self._svd2pac_as_ptr().add(264usize),
75 )
76 }
77 }
78
79 #[doc = "Flash Processing Start Address Register H"]
80 #[inline(always)]
81 pub const fn fsarh(&self) -> &'static crate::common::Reg<self::Fsarh_SPEC, crate::common::RW> {
82 unsafe {
83 crate::common::Reg::<self::Fsarh_SPEC, crate::common::RW>::from_ptr(
84 self._svd2pac_as_ptr().add(272usize),
85 )
86 }
87 }
88
89 #[doc = "Flash Control Register"]
90 #[inline(always)]
91 pub const fn fcr(&self) -> &'static crate::common::Reg<self::Fcr_SPEC, crate::common::RW> {
92 unsafe {
93 crate::common::Reg::<self::Fcr_SPEC, crate::common::RW>::from_ptr(
94 self._svd2pac_as_ptr().add(276usize),
95 )
96 }
97 }
98
99 #[doc = "Flash Processing End Address Register L"]
100 #[inline(always)]
101 pub const fn fearl(&self) -> &'static crate::common::Reg<self::Fearl_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::Fearl_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(280usize),
105 )
106 }
107 }
108
109 #[doc = "Flash Processing End Address Register H"]
110 #[inline(always)]
111 pub const fn fearh(&self) -> &'static crate::common::Reg<self::Fearh_SPEC, crate::common::RW> {
112 unsafe {
113 crate::common::Reg::<self::Fearh_SPEC, crate::common::RW>::from_ptr(
114 self._svd2pac_as_ptr().add(288usize),
115 )
116 }
117 }
118
119 #[doc = "Flash Reset Register"]
120 #[inline(always)]
121 pub const fn fresetr(
122 &self,
123 ) -> &'static crate::common::Reg<self::Fresetr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Fresetr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(292usize),
127 )
128 }
129 }
130
131 #[doc = "Flash Status Register 1"]
132 #[inline(always)]
133 pub const fn fstatr1(
134 &self,
135 ) -> &'static crate::common::Reg<self::Fstatr1_SPEC, crate::common::R> {
136 unsafe {
137 crate::common::Reg::<self::Fstatr1_SPEC, crate::common::R>::from_ptr(
138 self._svd2pac_as_ptr().add(300usize),
139 )
140 }
141 }
142
143 #[doc = "Flash Write Buffer Register L0"]
144 #[inline(always)]
145 pub const fn fwbl0(&self) -> &'static crate::common::Reg<self::Fwbl0_SPEC, crate::common::RW> {
146 unsafe {
147 crate::common::Reg::<self::Fwbl0_SPEC, crate::common::RW>::from_ptr(
148 self._svd2pac_as_ptr().add(304usize),
149 )
150 }
151 }
152
153 #[doc = "Flash Write Buffer Register H0"]
154 #[inline(always)]
155 pub const fn fwbh0(&self) -> &'static crate::common::Reg<self::Fwbh0_SPEC, crate::common::RW> {
156 unsafe {
157 crate::common::Reg::<self::Fwbh0_SPEC, crate::common::RW>::from_ptr(
158 self._svd2pac_as_ptr().add(312usize),
159 )
160 }
161 }
162
163 #[doc = "Protection Unlock Register"]
164 #[inline(always)]
165 pub const fn fpr(&self) -> &'static crate::common::Reg<self::Fpr_SPEC, crate::common::RW> {
166 unsafe {
167 crate::common::Reg::<self::Fpr_SPEC, crate::common::RW>::from_ptr(
168 self._svd2pac_as_ptr().add(384usize),
169 )
170 }
171 }
172
173 #[doc = "Protection Unlock Status Register"]
174 #[inline(always)]
175 pub const fn fpsr(&self) -> &'static crate::common::Reg<self::Fpsr_SPEC, crate::common::R> {
176 unsafe {
177 crate::common::Reg::<self::Fpsr_SPEC, crate::common::R>::from_ptr(
178 self._svd2pac_as_ptr().add(388usize),
179 )
180 }
181 }
182
183 #[doc = "Flash Read Buffer Register L0"]
184 #[inline(always)]
185 pub const fn frbl0(&self) -> &'static crate::common::Reg<self::Frbl0_SPEC, crate::common::R> {
186 unsafe {
187 crate::common::Reg::<self::Frbl0_SPEC, crate::common::R>::from_ptr(
188 self._svd2pac_as_ptr().add(392usize),
189 )
190 }
191 }
192
193 #[doc = "Flash Read Buffer Register H0"]
194 #[inline(always)]
195 pub const fn frbh0(&self) -> &'static crate::common::Reg<self::Frbh0_SPEC, crate::common::R> {
196 unsafe {
197 crate::common::Reg::<self::Frbh0_SPEC, crate::common::R>::from_ptr(
198 self._svd2pac_as_ptr().add(400usize),
199 )
200 }
201 }
202
203 #[doc = "Flash Start-Up Setting Monitor Register"]
204 #[inline(always)]
205 pub const fn fscmr(&self) -> &'static crate::common::Reg<self::Fscmr_SPEC, crate::common::R> {
206 unsafe {
207 crate::common::Reg::<self::Fscmr_SPEC, crate::common::R>::from_ptr(
208 self._svd2pac_as_ptr().add(448usize),
209 )
210 }
211 }
212
213 #[doc = "Flash Access Window Start Address Monitor Register"]
214 #[inline(always)]
215 pub const fn fawsmr(&self) -> &'static crate::common::Reg<self::Fawsmr_SPEC, crate::common::R> {
216 unsafe {
217 crate::common::Reg::<self::Fawsmr_SPEC, crate::common::R>::from_ptr(
218 self._svd2pac_as_ptr().add(456usize),
219 )
220 }
221 }
222
223 #[doc = "Flash Access Window End Address Monitor Register"]
224 #[inline(always)]
225 pub const fn fawemr(&self) -> &'static crate::common::Reg<self::Fawemr_SPEC, crate::common::R> {
226 unsafe {
227 crate::common::Reg::<self::Fawemr_SPEC, crate::common::R>::from_ptr(
228 self._svd2pac_as_ptr().add(464usize),
229 )
230 }
231 }
232
233 #[doc = "Flash Initial Setting Register"]
234 #[inline(always)]
235 pub const fn fisr(&self) -> &'static crate::common::Reg<self::Fisr_SPEC, crate::common::RW> {
236 unsafe {
237 crate::common::Reg::<self::Fisr_SPEC, crate::common::RW>::from_ptr(
238 self._svd2pac_as_ptr().add(472usize),
239 )
240 }
241 }
242
243 #[doc = "Flash Extra Area Control Register"]
244 #[inline(always)]
245 pub const fn fexcr(&self) -> &'static crate::common::Reg<self::Fexcr_SPEC, crate::common::RW> {
246 unsafe {
247 crate::common::Reg::<self::Fexcr_SPEC, crate::common::RW>::from_ptr(
248 self._svd2pac_as_ptr().add(476usize),
249 )
250 }
251 }
252
253 #[doc = "Flash Error Address Monitor Register L"]
254 #[inline(always)]
255 pub const fn feaml(&self) -> &'static crate::common::Reg<self::Feaml_SPEC, crate::common::RW> {
256 unsafe {
257 crate::common::Reg::<self::Feaml_SPEC, crate::common::RW>::from_ptr(
258 self._svd2pac_as_ptr().add(480usize),
259 )
260 }
261 }
262
263 #[doc = "Flash Error Address Monitor Register H"]
264 #[inline(always)]
265 pub const fn feamh(&self) -> &'static crate::common::Reg<self::Feamh_SPEC, crate::common::RW> {
266 unsafe {
267 crate::common::Reg::<self::Feamh_SPEC, crate::common::RW>::from_ptr(
268 self._svd2pac_as_ptr().add(488usize),
269 )
270 }
271 }
272
273 #[doc = "Flash Status Register 2"]
274 #[inline(always)]
275 pub const fn fstatr2(
276 &self,
277 ) -> &'static crate::common::Reg<self::Fstatr2_SPEC, crate::common::R> {
278 unsafe {
279 crate::common::Reg::<self::Fstatr2_SPEC, crate::common::R>::from_ptr(
280 self._svd2pac_as_ptr().add(496usize),
281 )
282 }
283 }
284
285 #[doc = "Temperature Sensor Calibration Data Register"]
286 #[inline(always)]
287 pub const fn tscdr(&self) -> &'static crate::common::Reg<self::Tscdr_SPEC, crate::common::R> {
288 unsafe {
289 crate::common::Reg::<self::Tscdr_SPEC, crate::common::R>::from_ptr(
290 self._svd2pac_as_ptr().add(552usize),
291 )
292 }
293 }
294
295 #[doc = "Flash P/E Mode Entry Register"]
296 #[inline(always)]
297 pub const fn fentryr(
298 &self,
299 ) -> &'static crate::common::Reg<self::Fentryr_SPEC, crate::common::RW> {
300 unsafe {
301 crate::common::Reg::<self::Fentryr_SPEC, crate::common::RW>::from_ptr(
302 self._svd2pac_as_ptr().add(16304usize),
303 )
304 }
305 }
306
307 #[doc = "Memory Wait Cycle Control Register for Data Flash"]
308 #[inline(always)]
309 pub const fn fldwaitr(
310 &self,
311 ) -> &'static crate::common::Reg<self::Fldwaitr_SPEC, crate::common::RW> {
312 unsafe {
313 crate::common::Reg::<self::Fldwaitr_SPEC, crate::common::RW>::from_ptr(
314 self._svd2pac_as_ptr().add(16324usize),
315 )
316 }
317 }
318
319 #[doc = "Prefetch Buffer Enable Register"]
320 #[inline(always)]
321 pub const fn pfber(&self) -> &'static crate::common::Reg<self::Pfber_SPEC, crate::common::RW> {
322 unsafe {
323 crate::common::Reg::<self::Pfber_SPEC, crate::common::RW>::from_ptr(
324 self._svd2pac_as_ptr().add(16328usize),
325 )
326 }
327 }
328}
329#[doc(hidden)]
330#[derive(Copy, Clone, Eq, PartialEq)]
331pub struct Dflctl_SPEC;
332impl crate::sealed::RegSpec for Dflctl_SPEC {
333 type DataType = u8;
334}
335
336#[doc = "Data Flash Control Register"]
337pub type Dflctl = crate::RegValueT<Dflctl_SPEC>;
338
339impl Dflctl {
340 #[doc = "Data Flash Access Enable"]
341 #[inline(always)]
342 pub fn dflen(
343 self,
344 ) -> crate::common::RegisterField<
345 0,
346 0x1,
347 1,
348 0,
349 dflctl::Dflen,
350 dflctl::Dflen,
351 Dflctl_SPEC,
352 crate::common::RW,
353 > {
354 crate::common::RegisterField::<
355 0,
356 0x1,
357 1,
358 0,
359 dflctl::Dflen,
360 dflctl::Dflen,
361 Dflctl_SPEC,
362 crate::common::RW,
363 >::from_register(self, 0)
364 }
365}
366impl ::core::default::Default for Dflctl {
367 #[inline(always)]
368 fn default() -> Dflctl {
369 <crate::RegValueT<Dflctl_SPEC> as RegisterValue<_>>::new(0)
370 }
371}
372pub mod dflctl {
373
374 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
375 pub struct Dflen_SPEC;
376 pub type Dflen = crate::EnumBitfieldStruct<u8, Dflen_SPEC>;
377 impl Dflen {
378 #[doc = "Access to the data flash is disabled"]
379 pub const _0: Self = Self::new(0);
380
381 #[doc = "Access to the data flash is enabled"]
382 pub const _1: Self = Self::new(1);
383 }
384}
385#[doc(hidden)]
386#[derive(Copy, Clone, Eq, PartialEq)]
387pub struct Fpmcr_SPEC;
388impl crate::sealed::RegSpec for Fpmcr_SPEC {
389 type DataType = u8;
390}
391
392#[doc = "Flash P/E Mode Control Register"]
393pub type Fpmcr = crate::RegValueT<Fpmcr_SPEC>;
394
395impl Fpmcr {
396 #[doc = "Flash Operating Mode Select 0"]
397 #[inline(always)]
398 pub fn fms0(
399 self,
400 ) -> crate::common::RegisterField<
401 1,
402 0x1,
403 1,
404 0,
405 fpmcr::Fms0,
406 fpmcr::Fms0,
407 Fpmcr_SPEC,
408 crate::common::RW,
409 > {
410 crate::common::RegisterField::<
411 1,
412 0x1,
413 1,
414 0,
415 fpmcr::Fms0,
416 fpmcr::Fms0,
417 Fpmcr_SPEC,
418 crate::common::RW,
419 >::from_register(self, 0)
420 }
421
422 #[doc = "Code Flash P/E Disable"]
423 #[inline(always)]
424 pub fn rpdis(
425 self,
426 ) -> crate::common::RegisterField<
427 3,
428 0x1,
429 1,
430 0,
431 fpmcr::Rpdis,
432 fpmcr::Rpdis,
433 Fpmcr_SPEC,
434 crate::common::RW,
435 > {
436 crate::common::RegisterField::<
437 3,
438 0x1,
439 1,
440 0,
441 fpmcr::Rpdis,
442 fpmcr::Rpdis,
443 Fpmcr_SPEC,
444 crate::common::RW,
445 >::from_register(self, 0)
446 }
447
448 #[doc = "Flash Operating Mode Select 1"]
449 #[inline(always)]
450 pub fn fms1(self) -> crate::common::RegisterFieldBool<4, 1, 0, Fpmcr_SPEC, crate::common::RW> {
451 crate::common::RegisterFieldBool::<4, 1, 0, Fpmcr_SPEC, crate::common::RW>::from_register(
452 self, 0,
453 )
454 }
455}
456impl ::core::default::Default for Fpmcr {
457 #[inline(always)]
458 fn default() -> Fpmcr {
459 <crate::RegValueT<Fpmcr_SPEC> as RegisterValue<_>>::new(8)
460 }
461}
462pub mod fpmcr {
463
464 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
465 pub struct Fms0_SPEC;
466 pub type Fms0 = crate::EnumBitfieldStruct<u8, Fms0_SPEC>;
467 impl Fms0 {
468 #[doc = "FMS1 = 0: Read mode FMS1 = 1: Data flash P/E mode."]
469 pub const _0: Self = Self::new(0);
470
471 #[doc = "FMS1 = 0: Code flash P/E mode FMS1 = 1: Setting prohibited."]
472 pub const _1: Self = Self::new(1);
473 }
474 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
475 pub struct Rpdis_SPEC;
476 pub type Rpdis = crate::EnumBitfieldStruct<u8, Rpdis_SPEC>;
477 impl Rpdis {
478 #[doc = "Programming of the code flash is enabled"]
479 pub const _0: Self = Self::new(0);
480
481 #[doc = "Programming of the code flash is disabled."]
482 pub const _1: Self = Self::new(1);
483 }
484}
485#[doc(hidden)]
486#[derive(Copy, Clone, Eq, PartialEq)]
487pub struct Fasr_SPEC;
488impl crate::sealed::RegSpec for Fasr_SPEC {
489 type DataType = u8;
490}
491
492#[doc = "Flash Area Select Register"]
493pub type Fasr = crate::RegValueT<Fasr_SPEC>;
494
495impl Fasr {
496 #[doc = "Extra Area Select"]
497 #[inline(always)]
498 pub fn exs(
499 self,
500 ) -> crate::common::RegisterField<
501 0,
502 0x1,
503 1,
504 0,
505 fasr::Exs,
506 fasr::Exs,
507 Fasr_SPEC,
508 crate::common::RW,
509 > {
510 crate::common::RegisterField::<
511 0,
512 0x1,
513 1,
514 0,
515 fasr::Exs,
516 fasr::Exs,
517 Fasr_SPEC,
518 crate::common::RW,
519 >::from_register(self, 0)
520 }
521}
522impl ::core::default::Default for Fasr {
523 #[inline(always)]
524 fn default() -> Fasr {
525 <crate::RegValueT<Fasr_SPEC> as RegisterValue<_>>::new(0)
526 }
527}
528pub mod fasr {
529
530 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
531 pub struct Exs_SPEC;
532 pub type Exs = crate::EnumBitfieldStruct<u8, Exs_SPEC>;
533 impl Exs {
534 #[doc = "User area or data area"]
535 pub const _0: Self = Self::new(0);
536
537 #[doc = "Extra area."]
538 pub const _1: Self = Self::new(1);
539 }
540}
541#[doc(hidden)]
542#[derive(Copy, Clone, Eq, PartialEq)]
543pub struct Fsarl_SPEC;
544impl crate::sealed::RegSpec for Fsarl_SPEC {
545 type DataType = u16;
546}
547
548#[doc = "Flash Processing Start Address Register L"]
549pub type Fsarl = crate::RegValueT<Fsarl_SPEC>;
550
551impl Fsarl {
552 #[doc = "Flash Processing Start Address L"]
553 #[inline(always)]
554 pub fn fsarl(
555 self,
556 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fsarl_SPEC, crate::common::RW>
557 {
558 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fsarl_SPEC,crate::common::RW>::from_register(self,0)
559 }
560}
561impl ::core::default::Default for Fsarl {
562 #[inline(always)]
563 fn default() -> Fsarl {
564 <crate::RegValueT<Fsarl_SPEC> as RegisterValue<_>>::new(0)
565 }
566}
567
568#[doc(hidden)]
569#[derive(Copy, Clone, Eq, PartialEq)]
570pub struct Fsarh_SPEC;
571impl crate::sealed::RegSpec for Fsarh_SPEC {
572 type DataType = u16;
573}
574
575#[doc = "Flash Processing Start Address Register H"]
576pub type Fsarh = crate::RegValueT<Fsarh_SPEC>;
577
578impl Fsarh {
579 #[doc = "Flash Processing Start Address H"]
580 #[inline(always)]
581 pub fn fsarh(
582 self,
583 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fsarh_SPEC, crate::common::RW>
584 {
585 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fsarh_SPEC,crate::common::RW>::from_register(self,0)
586 }
587}
588impl ::core::default::Default for Fsarh {
589 #[inline(always)]
590 fn default() -> Fsarh {
591 <crate::RegValueT<Fsarh_SPEC> as RegisterValue<_>>::new(0)
592 }
593}
594
595#[doc(hidden)]
596#[derive(Copy, Clone, Eq, PartialEq)]
597pub struct Fcr_SPEC;
598impl crate::sealed::RegSpec for Fcr_SPEC {
599 type DataType = u8;
600}
601
602#[doc = "Flash Control Register"]
603pub type Fcr = crate::RegValueT<Fcr_SPEC>;
604
605impl Fcr {
606 #[doc = "Software Command Setting"]
607 #[inline(always)]
608 pub fn cmd(
609 self,
610 ) -> crate::common::RegisterField<0, 0xf, 1, 0, fcr::Cmd, fcr::Cmd, Fcr_SPEC, crate::common::RW>
611 {
612 crate::common::RegisterField::<0,0xf,1,0,fcr::Cmd,fcr::Cmd,Fcr_SPEC,crate::common::RW>::from_register(self,0)
613 }
614
615 #[doc = "Data Read Completion"]
616 #[inline(always)]
617 pub fn drc(
618 self,
619 ) -> crate::common::RegisterField<4, 0x1, 1, 0, fcr::Drc, fcr::Drc, Fcr_SPEC, crate::common::RW>
620 {
621 crate::common::RegisterField::<4,0x1,1,0,fcr::Drc,fcr::Drc,Fcr_SPEC,crate::common::RW>::from_register(self,0)
622 }
623
624 #[doc = "Forced Processing Stop"]
625 #[inline(always)]
626 pub fn stop(self) -> crate::common::RegisterFieldBool<6, 1, 0, Fcr_SPEC, crate::common::RW> {
627 crate::common::RegisterFieldBool::<6, 1, 0, Fcr_SPEC, crate::common::RW>::from_register(
628 self, 0,
629 )
630 }
631
632 #[doc = "Processing Start"]
633 #[inline(always)]
634 pub fn opst(
635 self,
636 ) -> crate::common::RegisterField<7, 0x1, 1, 0, fcr::Opst, fcr::Opst, Fcr_SPEC, crate::common::RW>
637 {
638 crate::common::RegisterField::<
639 7,
640 0x1,
641 1,
642 0,
643 fcr::Opst,
644 fcr::Opst,
645 Fcr_SPEC,
646 crate::common::RW,
647 >::from_register(self, 0)
648 }
649}
650impl ::core::default::Default for Fcr {
651 #[inline(always)]
652 fn default() -> Fcr {
653 <crate::RegValueT<Fcr_SPEC> as RegisterValue<_>>::new(0)
654 }
655}
656pub mod fcr {
657
658 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
659 pub struct Cmd_SPEC;
660 pub type Cmd = crate::EnumBitfieldStruct<u8, Cmd_SPEC>;
661 impl Cmd {
662 #[doc = "Program"]
663 pub const _0_X_1: Self = Self::new(1);
664
665 #[doc = "Blank check (code flash)"]
666 pub const _0_X_3: Self = Self::new(3);
667
668 #[doc = "Block erase"]
669 pub const _0_X_4: Self = Self::new(4);
670
671 #[doc = "Consecutive read"]
672 pub const _0_X_5: Self = Self::new(5);
673
674 #[doc = "Chip erase"]
675 pub const _0_X_6: Self = Self::new(6);
676
677 #[doc = "Blank check (data flash)"]
678 pub const _0_X_B: Self = Self::new(11);
679 }
680 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
681 pub struct Drc_SPEC;
682 pub type Drc = crate::EnumBitfieldStruct<u8, Drc_SPEC>;
683 impl Drc {
684 #[doc = "Data is not read or next data is requested"]
685 pub const _0: Self = Self::new(0);
686
687 #[doc = "Data reading is complete."]
688 pub const _1: Self = Self::new(1);
689 }
690 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
691 pub struct Opst_SPEC;
692 pub type Opst = crate::EnumBitfieldStruct<u8, Opst_SPEC>;
693 impl Opst {
694 #[doc = "Processing stops"]
695 pub const _0: Self = Self::new(0);
696
697 #[doc = "Processing starts."]
698 pub const _1: Self = Self::new(1);
699 }
700}
701#[doc(hidden)]
702#[derive(Copy, Clone, Eq, PartialEq)]
703pub struct Fearl_SPEC;
704impl crate::sealed::RegSpec for Fearl_SPEC {
705 type DataType = u16;
706}
707
708#[doc = "Flash Processing End Address Register L"]
709pub type Fearl = crate::RegValueT<Fearl_SPEC>;
710
711impl Fearl {
712 #[doc = "Flash Processing End Address L"]
713 #[inline(always)]
714 pub fn fearl(
715 self,
716 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fearl_SPEC, crate::common::RW>
717 {
718 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fearl_SPEC,crate::common::RW>::from_register(self,0)
719 }
720}
721impl ::core::default::Default for Fearl {
722 #[inline(always)]
723 fn default() -> Fearl {
724 <crate::RegValueT<Fearl_SPEC> as RegisterValue<_>>::new(0)
725 }
726}
727
728#[doc(hidden)]
729#[derive(Copy, Clone, Eq, PartialEq)]
730pub struct Fearh_SPEC;
731impl crate::sealed::RegSpec for Fearh_SPEC {
732 type DataType = u16;
733}
734
735#[doc = "Flash Processing End Address Register H"]
736pub type Fearh = crate::RegValueT<Fearh_SPEC>;
737
738impl Fearh {
739 #[doc = "Flash Processing End Address H"]
740 #[inline(always)]
741 pub fn fearh(
742 self,
743 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fearh_SPEC, crate::common::RW>
744 {
745 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fearh_SPEC,crate::common::RW>::from_register(self,0)
746 }
747}
748impl ::core::default::Default for Fearh {
749 #[inline(always)]
750 fn default() -> Fearh {
751 <crate::RegValueT<Fearh_SPEC> as RegisterValue<_>>::new(0)
752 }
753}
754
755#[doc(hidden)]
756#[derive(Copy, Clone, Eq, PartialEq)]
757pub struct Fresetr_SPEC;
758impl crate::sealed::RegSpec for Fresetr_SPEC {
759 type DataType = u8;
760}
761
762#[doc = "Flash Reset Register"]
763pub type Fresetr = crate::RegValueT<Fresetr_SPEC>;
764
765impl Fresetr {
766 #[doc = "Software reset of the registers"]
767 #[inline(always)]
768 pub fn freset(
769 self,
770 ) -> crate::common::RegisterField<
771 0,
772 0x1,
773 1,
774 0,
775 fresetr::Freset,
776 fresetr::Freset,
777 Fresetr_SPEC,
778 crate::common::RW,
779 > {
780 crate::common::RegisterField::<
781 0,
782 0x1,
783 1,
784 0,
785 fresetr::Freset,
786 fresetr::Freset,
787 Fresetr_SPEC,
788 crate::common::RW,
789 >::from_register(self, 0)
790 }
791}
792impl ::core::default::Default for Fresetr {
793 #[inline(always)]
794 fn default() -> Fresetr {
795 <crate::RegValueT<Fresetr_SPEC> as RegisterValue<_>>::new(0)
796 }
797}
798pub mod fresetr {
799
800 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
801 pub struct Freset_SPEC;
802 pub type Freset = crate::EnumBitfieldStruct<u8, Freset_SPEC>;
803 impl Freset {
804 #[doc = "The registers related to the flash programming are not reset"]
805 pub const _0: Self = Self::new(0);
806
807 #[doc = "The registers related to the flash programming are reset."]
808 pub const _1: Self = Self::new(1);
809 }
810}
811#[doc(hidden)]
812#[derive(Copy, Clone, Eq, PartialEq)]
813pub struct Fstatr1_SPEC;
814impl crate::sealed::RegSpec for Fstatr1_SPEC {
815 type DataType = u8;
816}
817
818#[doc = "Flash Status Register 1"]
819pub type Fstatr1 = crate::RegValueT<Fstatr1_SPEC>;
820
821impl Fstatr1 {
822 #[doc = "Data Read Ready Flag"]
823 #[inline(always)]
824 pub fn drrdy(
825 self,
826 ) -> crate::common::RegisterField<
827 1,
828 0x1,
829 1,
830 0,
831 fstatr1::Drrdy,
832 fstatr1::Drrdy,
833 Fstatr1_SPEC,
834 crate::common::R,
835 > {
836 crate::common::RegisterField::<
837 1,
838 0x1,
839 1,
840 0,
841 fstatr1::Drrdy,
842 fstatr1::Drrdy,
843 Fstatr1_SPEC,
844 crate::common::R,
845 >::from_register(self, 0)
846 }
847
848 #[doc = "Flash Ready Flag"]
849 #[inline(always)]
850 pub fn frdy(
851 self,
852 ) -> crate::common::RegisterField<
853 6,
854 0x1,
855 1,
856 0,
857 fstatr1::Frdy,
858 fstatr1::Frdy,
859 Fstatr1_SPEC,
860 crate::common::R,
861 > {
862 crate::common::RegisterField::<
863 6,
864 0x1,
865 1,
866 0,
867 fstatr1::Frdy,
868 fstatr1::Frdy,
869 Fstatr1_SPEC,
870 crate::common::R,
871 >::from_register(self, 0)
872 }
873
874 #[doc = "Extra Area Ready Flag"]
875 #[inline(always)]
876 pub fn exrdy(
877 self,
878 ) -> crate::common::RegisterField<
879 7,
880 0x1,
881 1,
882 0,
883 fstatr1::Exrdy,
884 fstatr1::Exrdy,
885 Fstatr1_SPEC,
886 crate::common::R,
887 > {
888 crate::common::RegisterField::<
889 7,
890 0x1,
891 1,
892 0,
893 fstatr1::Exrdy,
894 fstatr1::Exrdy,
895 Fstatr1_SPEC,
896 crate::common::R,
897 >::from_register(self, 0)
898 }
899}
900impl ::core::default::Default for Fstatr1 {
901 #[inline(always)]
902 fn default() -> Fstatr1 {
903 <crate::RegValueT<Fstatr1_SPEC> as RegisterValue<_>>::new(4)
904 }
905}
906pub mod fstatr1 {
907
908 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
909 pub struct Drrdy_SPEC;
910 pub type Drrdy = crate::EnumBitfieldStruct<u8, Drrdy_SPEC>;
911 impl Drrdy {
912 #[doc = "The read processing of the consecutive read command at each address is not terminated."]
913 pub const _0: Self = Self::new(0);
914
915 #[doc = "The read processing of the consecutive read command at each address is terminated and read data is stored to the FRBH and FRBL registers."]
916 pub const _1: Self = Self::new(1);
917 }
918 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
919 pub struct Frdy_SPEC;
920 pub type Frdy = crate::EnumBitfieldStruct<u8, Frdy_SPEC>;
921 impl Frdy {
922 #[doc = "The software command of the FCR register is not terminated."]
923 pub const _0: Self = Self::new(0);
924
925 #[doc = "The software command of the FCR register is terminated."]
926 pub const _1: Self = Self::new(1);
927 }
928 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
929 pub struct Exrdy_SPEC;
930 pub type Exrdy = crate::EnumBitfieldStruct<u8, Exrdy_SPEC>;
931 impl Exrdy {
932 #[doc = "The software command of the FEXCR register is not terminated."]
933 pub const _0: Self = Self::new(0);
934
935 #[doc = "The software command of the FEXCR register is terminated."]
936 pub const _1: Self = Self::new(1);
937 }
938}
939#[doc(hidden)]
940#[derive(Copy, Clone, Eq, PartialEq)]
941pub struct Fwbl0_SPEC;
942impl crate::sealed::RegSpec for Fwbl0_SPEC {
943 type DataType = u16;
944}
945
946#[doc = "Flash Write Buffer Register L0"]
947pub type Fwbl0 = crate::RegValueT<Fwbl0_SPEC>;
948
949impl Fwbl0 {
950 #[doc = "Flash Write Buffer L0"]
951 #[inline(always)]
952 pub fn wdata(
953 self,
954 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fwbl0_SPEC, crate::common::RW>
955 {
956 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fwbl0_SPEC,crate::common::RW>::from_register(self,0)
957 }
958}
959impl ::core::default::Default for Fwbl0 {
960 #[inline(always)]
961 fn default() -> Fwbl0 {
962 <crate::RegValueT<Fwbl0_SPEC> as RegisterValue<_>>::new(0)
963 }
964}
965
966#[doc(hidden)]
967#[derive(Copy, Clone, Eq, PartialEq)]
968pub struct Fwbh0_SPEC;
969impl crate::sealed::RegSpec for Fwbh0_SPEC {
970 type DataType = u16;
971}
972
973#[doc = "Flash Write Buffer Register H0"]
974pub type Fwbh0 = crate::RegValueT<Fwbh0_SPEC>;
975
976impl Fwbh0 {
977 #[doc = "Flash Write Buffer H0"]
978 #[inline(always)]
979 pub fn wdata(
980 self,
981 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fwbh0_SPEC, crate::common::RW>
982 {
983 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fwbh0_SPEC,crate::common::RW>::from_register(self,0)
984 }
985}
986impl ::core::default::Default for Fwbh0 {
987 #[inline(always)]
988 fn default() -> Fwbh0 {
989 <crate::RegValueT<Fwbh0_SPEC> as RegisterValue<_>>::new(0)
990 }
991}
992
993#[doc(hidden)]
994#[derive(Copy, Clone, Eq, PartialEq)]
995pub struct Fpr_SPEC;
996impl crate::sealed::RegSpec for Fpr_SPEC {
997 type DataType = u8;
998}
999
1000#[doc = "Protection Unlock Register"]
1001pub type Fpr = crate::RegValueT<Fpr_SPEC>;
1002
1003impl Fpr {
1004 #[doc = "Protection Unlock"]
1005 #[inline(always)]
1006 pub fn fpr(
1007 self,
1008 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Fpr_SPEC, crate::common::RW> {
1009 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Fpr_SPEC,crate::common::RW>::from_register(self,0)
1010 }
1011}
1012impl ::core::default::Default for Fpr {
1013 #[inline(always)]
1014 fn default() -> Fpr {
1015 <crate::RegValueT<Fpr_SPEC> as RegisterValue<_>>::new(0)
1016 }
1017}
1018
1019#[doc(hidden)]
1020#[derive(Copy, Clone, Eq, PartialEq)]
1021pub struct Fpsr_SPEC;
1022impl crate::sealed::RegSpec for Fpsr_SPEC {
1023 type DataType = u8;
1024}
1025
1026#[doc = "Protection Unlock Status Register"]
1027pub type Fpsr = crate::RegValueT<Fpsr_SPEC>;
1028
1029impl Fpsr {
1030 #[doc = "Protect Error Flag"]
1031 #[inline(always)]
1032 pub fn perr(
1033 self,
1034 ) -> crate::common::RegisterField<
1035 0,
1036 0x1,
1037 1,
1038 0,
1039 fpsr::Perr,
1040 fpsr::Perr,
1041 Fpsr_SPEC,
1042 crate::common::R,
1043 > {
1044 crate::common::RegisterField::<
1045 0,
1046 0x1,
1047 1,
1048 0,
1049 fpsr::Perr,
1050 fpsr::Perr,
1051 Fpsr_SPEC,
1052 crate::common::R,
1053 >::from_register(self, 0)
1054 }
1055}
1056impl ::core::default::Default for Fpsr {
1057 #[inline(always)]
1058 fn default() -> Fpsr {
1059 <crate::RegValueT<Fpsr_SPEC> as RegisterValue<_>>::new(0)
1060 }
1061}
1062pub mod fpsr {
1063
1064 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1065 pub struct Perr_SPEC;
1066 pub type Perr = crate::EnumBitfieldStruct<u8, Perr_SPEC>;
1067 impl Perr {
1068 #[doc = "No error"]
1069 pub const _0: Self = Self::new(0);
1070
1071 #[doc = "An error occurs"]
1072 pub const _1: Self = Self::new(1);
1073 }
1074}
1075#[doc(hidden)]
1076#[derive(Copy, Clone, Eq, PartialEq)]
1077pub struct Frbl0_SPEC;
1078impl crate::sealed::RegSpec for Frbl0_SPEC {
1079 type DataType = u16;
1080}
1081
1082#[doc = "Flash Read Buffer Register L0"]
1083pub type Frbl0 = crate::RegValueT<Frbl0_SPEC>;
1084
1085impl Frbl0 {
1086 #[doc = "Flash Read Buffer L0"]
1087 #[inline(always)]
1088 pub fn rdata(
1089 self,
1090 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Frbl0_SPEC, crate::common::R> {
1091 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Frbl0_SPEC,crate::common::R>::from_register(self,0)
1092 }
1093}
1094impl ::core::default::Default for Frbl0 {
1095 #[inline(always)]
1096 fn default() -> Frbl0 {
1097 <crate::RegValueT<Frbl0_SPEC> as RegisterValue<_>>::new(0)
1098 }
1099}
1100
1101#[doc(hidden)]
1102#[derive(Copy, Clone, Eq, PartialEq)]
1103pub struct Frbh0_SPEC;
1104impl crate::sealed::RegSpec for Frbh0_SPEC {
1105 type DataType = u16;
1106}
1107
1108#[doc = "Flash Read Buffer Register H0"]
1109pub type Frbh0 = crate::RegValueT<Frbh0_SPEC>;
1110
1111impl Frbh0 {
1112 #[doc = "Flash Read Buffer H0"]
1113 #[inline(always)]
1114 pub fn rdata(
1115 self,
1116 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Frbh0_SPEC, crate::common::R> {
1117 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Frbh0_SPEC,crate::common::R>::from_register(self,0)
1118 }
1119}
1120impl ::core::default::Default for Frbh0 {
1121 #[inline(always)]
1122 fn default() -> Frbh0 {
1123 <crate::RegValueT<Frbh0_SPEC> as RegisterValue<_>>::new(0)
1124 }
1125}
1126
1127#[doc(hidden)]
1128#[derive(Copy, Clone, Eq, PartialEq)]
1129pub struct Fscmr_SPEC;
1130impl crate::sealed::RegSpec for Fscmr_SPEC {
1131 type DataType = u16;
1132}
1133
1134#[doc = "Flash Start-Up Setting Monitor Register"]
1135pub type Fscmr = crate::RegValueT<Fscmr_SPEC>;
1136
1137impl Fscmr {
1138 #[doc = "Startup Area Setting Monitor Flag"]
1139 #[inline(always)]
1140 pub fn sasmf(
1141 self,
1142 ) -> crate::common::RegisterField<
1143 8,
1144 0x1,
1145 1,
1146 0,
1147 fscmr::Sasmf,
1148 fscmr::Sasmf,
1149 Fscmr_SPEC,
1150 crate::common::R,
1151 > {
1152 crate::common::RegisterField::<
1153 8,
1154 0x1,
1155 1,
1156 0,
1157 fscmr::Sasmf,
1158 fscmr::Sasmf,
1159 Fscmr_SPEC,
1160 crate::common::R,
1161 >::from_register(self, 0)
1162 }
1163
1164 #[doc = "Access Window Protection Flag"]
1165 #[inline(always)]
1166 pub fn fspr(
1167 self,
1168 ) -> crate::common::RegisterField<
1169 14,
1170 0x1,
1171 1,
1172 0,
1173 fscmr::Fspr,
1174 fscmr::Fspr,
1175 Fscmr_SPEC,
1176 crate::common::R,
1177 > {
1178 crate::common::RegisterField::<
1179 14,
1180 0x1,
1181 1,
1182 0,
1183 fscmr::Fspr,
1184 fscmr::Fspr,
1185 Fscmr_SPEC,
1186 crate::common::R,
1187 >::from_register(self, 0)
1188 }
1189}
1190impl ::core::default::Default for Fscmr {
1191 #[inline(always)]
1192 fn default() -> Fscmr {
1193 <crate::RegValueT<Fscmr_SPEC> as RegisterValue<_>>::new(0)
1194 }
1195}
1196pub mod fscmr {
1197
1198 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1199 pub struct Sasmf_SPEC;
1200 pub type Sasmf = crate::EnumBitfieldStruct<u8, Sasmf_SPEC>;
1201 impl Sasmf {
1202 #[doc = "Setting to start up using the alternative area"]
1203 pub const _0: Self = Self::new(0);
1204
1205 #[doc = "Setting to start up using the default area"]
1206 pub const _1: Self = Self::new(1);
1207 }
1208 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1209 pub struct Fspr_SPEC;
1210 pub type Fspr = crate::EnumBitfieldStruct<u8, Fspr_SPEC>;
1211 impl Fspr {
1212 #[doc = "Access window setting disabled."]
1213 pub const _0: Self = Self::new(0);
1214
1215 #[doc = "Access window setting enabled."]
1216 pub const _1: Self = Self::new(1);
1217 }
1218}
1219#[doc(hidden)]
1220#[derive(Copy, Clone, Eq, PartialEq)]
1221pub struct Fawsmr_SPEC;
1222impl crate::sealed::RegSpec for Fawsmr_SPEC {
1223 type DataType = u16;
1224}
1225
1226#[doc = "Flash Access Window Start Address Monitor Register"]
1227pub type Fawsmr = crate::RegValueT<Fawsmr_SPEC>;
1228
1229impl Fawsmr {
1230 #[doc = "Access Window Start Address"]
1231 #[inline(always)]
1232 pub fn faws(
1233 self,
1234 ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fawsmr_SPEC, crate::common::R> {
1235 crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fawsmr_SPEC,crate::common::R>::from_register(self,0)
1236 }
1237
1238 #[doc = "Access Window Protection Flag"]
1239 #[inline(always)]
1240 pub fn fspr(self) -> crate::common::RegisterFieldBool<15, 1, 0, Fawsmr_SPEC, crate::common::R> {
1241 crate::common::RegisterFieldBool::<15, 1, 0, Fawsmr_SPEC, crate::common::R>::from_register(
1242 self, 0,
1243 )
1244 }
1245}
1246impl ::core::default::Default for Fawsmr {
1247 #[inline(always)]
1248 fn default() -> Fawsmr {
1249 <crate::RegValueT<Fawsmr_SPEC> as RegisterValue<_>>::new(0)
1250 }
1251}
1252
1253#[doc(hidden)]
1254#[derive(Copy, Clone, Eq, PartialEq)]
1255pub struct Fawemr_SPEC;
1256impl crate::sealed::RegSpec for Fawemr_SPEC {
1257 type DataType = u16;
1258}
1259
1260#[doc = "Flash Access Window End Address Monitor Register"]
1261pub type Fawemr = crate::RegValueT<Fawemr_SPEC>;
1262
1263impl Fawemr {
1264 #[doc = "Access Window End Address"]
1265 #[inline(always)]
1266 pub fn fawe(
1267 self,
1268 ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fawemr_SPEC, crate::common::R> {
1269 crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fawemr_SPEC,crate::common::R>::from_register(self,0)
1270 }
1271
1272 #[doc = "Startup Area Setting Monitor Flag"]
1273 #[inline(always)]
1274 pub fn sasmf(
1275 self,
1276 ) -> crate::common::RegisterFieldBool<15, 1, 0, Fawemr_SPEC, crate::common::R> {
1277 crate::common::RegisterFieldBool::<15, 1, 0, Fawemr_SPEC, crate::common::R>::from_register(
1278 self, 0,
1279 )
1280 }
1281}
1282impl ::core::default::Default for Fawemr {
1283 #[inline(always)]
1284 fn default() -> Fawemr {
1285 <crate::RegValueT<Fawemr_SPEC> as RegisterValue<_>>::new(0)
1286 }
1287}
1288
1289#[doc(hidden)]
1290#[derive(Copy, Clone, Eq, PartialEq)]
1291pub struct Fisr_SPEC;
1292impl crate::sealed::RegSpec for Fisr_SPEC {
1293 type DataType = u8;
1294}
1295
1296#[doc = "Flash Initial Setting Register"]
1297pub type Fisr = crate::RegValueT<Fisr_SPEC>;
1298
1299impl Fisr {
1300 #[doc = "Flash-IF Clock Notification"]
1301 #[inline(always)]
1302 pub fn pcka(
1303 self,
1304 ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Fisr_SPEC, crate::common::RW> {
1305 crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Fisr_SPEC,crate::common::RW>::from_register(self,0)
1306 }
1307
1308 #[doc = "Startup Area Select"]
1309 #[inline(always)]
1310 pub fn sas(
1311 self,
1312 ) -> crate::common::RegisterField<
1313 6,
1314 0x3,
1315 1,
1316 0,
1317 fisr::Sas,
1318 fisr::Sas,
1319 Fisr_SPEC,
1320 crate::common::RW,
1321 > {
1322 crate::common::RegisterField::<
1323 6,
1324 0x3,
1325 1,
1326 0,
1327 fisr::Sas,
1328 fisr::Sas,
1329 Fisr_SPEC,
1330 crate::common::RW,
1331 >::from_register(self, 0)
1332 }
1333}
1334impl ::core::default::Default for Fisr {
1335 #[inline(always)]
1336 fn default() -> Fisr {
1337 <crate::RegValueT<Fisr_SPEC> as RegisterValue<_>>::new(0)
1338 }
1339}
1340pub mod fisr {
1341
1342 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1343 pub struct Sas_SPEC;
1344 pub type Sas = crate::EnumBitfieldStruct<u8, Sas_SPEC>;
1345 impl Sas {
1346 #[doc = "The startup area is switched to the default area temporarily"]
1347 pub const _10: Self = Self::new(2);
1348
1349 #[doc = "The startup area is switched to the alternate area temporarily."]
1350 pub const _11: Self = Self::new(3);
1351 }
1352}
1353#[doc(hidden)]
1354#[derive(Copy, Clone, Eq, PartialEq)]
1355pub struct Fexcr_SPEC;
1356impl crate::sealed::RegSpec for Fexcr_SPEC {
1357 type DataType = u8;
1358}
1359
1360#[doc = "Flash Extra Area Control Register"]
1361pub type Fexcr = crate::RegValueT<Fexcr_SPEC>;
1362
1363impl Fexcr {
1364 #[doc = "Software Command Setting"]
1365 #[inline(always)]
1366 pub fn cmd(
1367 self,
1368 ) -> crate::common::RegisterField<
1369 0,
1370 0x7,
1371 1,
1372 0,
1373 fexcr::Cmd,
1374 fexcr::Cmd,
1375 Fexcr_SPEC,
1376 crate::common::RW,
1377 > {
1378 crate::common::RegisterField::<
1379 0,
1380 0x7,
1381 1,
1382 0,
1383 fexcr::Cmd,
1384 fexcr::Cmd,
1385 Fexcr_SPEC,
1386 crate::common::RW,
1387 >::from_register(self, 0)
1388 }
1389
1390 #[doc = "Processing Start"]
1391 #[inline(always)]
1392 pub fn opst(
1393 self,
1394 ) -> crate::common::RegisterField<
1395 7,
1396 0x1,
1397 1,
1398 0,
1399 fexcr::Opst,
1400 fexcr::Opst,
1401 Fexcr_SPEC,
1402 crate::common::RW,
1403 > {
1404 crate::common::RegisterField::<
1405 7,
1406 0x1,
1407 1,
1408 0,
1409 fexcr::Opst,
1410 fexcr::Opst,
1411 Fexcr_SPEC,
1412 crate::common::RW,
1413 >::from_register(self, 0)
1414 }
1415}
1416impl ::core::default::Default for Fexcr {
1417 #[inline(always)]
1418 fn default() -> Fexcr {
1419 <crate::RegValueT<Fexcr_SPEC> as RegisterValue<_>>::new(0)
1420 }
1421}
1422pub mod fexcr {
1423
1424 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1425 pub struct Cmd_SPEC;
1426 pub type Cmd = crate::EnumBitfieldStruct<u8, Cmd_SPEC>;
1427 impl Cmd {
1428 #[doc = "Access window information program Startup area selection and security setting"]
1429 pub const _010: Self = Self::new(2);
1430
1431 #[doc = "OCDID1 program"]
1432 pub const _011: Self = Self::new(3);
1433
1434 #[doc = "OCDID2 program"]
1435 pub const _100: Self = Self::new(4);
1436
1437 #[doc = "OCDID3 program"]
1438 pub const _101: Self = Self::new(5);
1439
1440 #[doc = "OCDID4 program"]
1441 pub const _110: Self = Self::new(6);
1442 }
1443 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1444 pub struct Opst_SPEC;
1445 pub type Opst = crate::EnumBitfieldStruct<u8, Opst_SPEC>;
1446 impl Opst {
1447 #[doc = "Processing stops"]
1448 pub const _0: Self = Self::new(0);
1449
1450 #[doc = "Processing starts."]
1451 pub const _1: Self = Self::new(1);
1452 }
1453}
1454#[doc(hidden)]
1455#[derive(Copy, Clone, Eq, PartialEq)]
1456pub struct Feaml_SPEC;
1457impl crate::sealed::RegSpec for Feaml_SPEC {
1458 type DataType = u16;
1459}
1460
1461#[doc = "Flash Error Address Monitor Register L"]
1462pub type Feaml = crate::RegValueT<Feaml_SPEC>;
1463
1464impl Feaml {
1465 #[doc = "Flash Error Address Monitor Register L"]
1466 #[inline(always)]
1467 pub fn feaml(
1468 self,
1469 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Feaml_SPEC, crate::common::RW>
1470 {
1471 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Feaml_SPEC,crate::common::RW>::from_register(self,0)
1472 }
1473}
1474impl ::core::default::Default for Feaml {
1475 #[inline(always)]
1476 fn default() -> Feaml {
1477 <crate::RegValueT<Feaml_SPEC> as RegisterValue<_>>::new(0)
1478 }
1479}
1480
1481#[doc(hidden)]
1482#[derive(Copy, Clone, Eq, PartialEq)]
1483pub struct Feamh_SPEC;
1484impl crate::sealed::RegSpec for Feamh_SPEC {
1485 type DataType = u16;
1486}
1487
1488#[doc = "Flash Error Address Monitor Register H"]
1489pub type Feamh = crate::RegValueT<Feamh_SPEC>;
1490
1491impl Feamh {
1492 #[doc = "Flash Error Address Monitor Register H"]
1493 #[inline(always)]
1494 pub fn feamh(
1495 self,
1496 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Feamh_SPEC, crate::common::RW>
1497 {
1498 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Feamh_SPEC,crate::common::RW>::from_register(self,0)
1499 }
1500}
1501impl ::core::default::Default for Feamh {
1502 #[inline(always)]
1503 fn default() -> Feamh {
1504 <crate::RegValueT<Feamh_SPEC> as RegisterValue<_>>::new(0)
1505 }
1506}
1507
1508#[doc(hidden)]
1509#[derive(Copy, Clone, Eq, PartialEq)]
1510pub struct Fstatr2_SPEC;
1511impl crate::sealed::RegSpec for Fstatr2_SPEC {
1512 type DataType = u16;
1513}
1514
1515#[doc = "Flash Status Register 2"]
1516pub type Fstatr2 = crate::RegValueT<Fstatr2_SPEC>;
1517
1518impl Fstatr2 {
1519 #[doc = "Erase Error Flag"]
1520 #[inline(always)]
1521 pub fn ererr(
1522 self,
1523 ) -> crate::common::RegisterField<
1524 0,
1525 0x1,
1526 1,
1527 0,
1528 fstatr2::Ererr,
1529 fstatr2::Ererr,
1530 Fstatr2_SPEC,
1531 crate::common::R,
1532 > {
1533 crate::common::RegisterField::<
1534 0,
1535 0x1,
1536 1,
1537 0,
1538 fstatr2::Ererr,
1539 fstatr2::Ererr,
1540 Fstatr2_SPEC,
1541 crate::common::R,
1542 >::from_register(self, 0)
1543 }
1544
1545 #[doc = "Program Error Flag"]
1546 #[inline(always)]
1547 pub fn prgerr(
1548 self,
1549 ) -> crate::common::RegisterField<
1550 1,
1551 0x1,
1552 1,
1553 0,
1554 fstatr2::Prgerr,
1555 fstatr2::Prgerr,
1556 Fstatr2_SPEC,
1557 crate::common::R,
1558 > {
1559 crate::common::RegisterField::<
1560 1,
1561 0x1,
1562 1,
1563 0,
1564 fstatr2::Prgerr,
1565 fstatr2::Prgerr,
1566 Fstatr2_SPEC,
1567 crate::common::R,
1568 >::from_register(self, 0)
1569 }
1570
1571 #[doc = "Program Error Flag 01"]
1572 #[inline(always)]
1573 pub fn prgerr01(
1574 self,
1575 ) -> crate::common::RegisterField<
1576 2,
1577 0x1,
1578 1,
1579 0,
1580 fstatr2::Prgerr01,
1581 fstatr2::Prgerr01,
1582 Fstatr2_SPEC,
1583 crate::common::R,
1584 > {
1585 crate::common::RegisterField::<
1586 2,
1587 0x1,
1588 1,
1589 0,
1590 fstatr2::Prgerr01,
1591 fstatr2::Prgerr01,
1592 Fstatr2_SPEC,
1593 crate::common::R,
1594 >::from_register(self, 0)
1595 }
1596
1597 #[doc = "Blank Check Error Flag"]
1598 #[inline(always)]
1599 pub fn bcerr(
1600 self,
1601 ) -> crate::common::RegisterField<
1602 3,
1603 0x1,
1604 1,
1605 0,
1606 fstatr2::Bcerr,
1607 fstatr2::Bcerr,
1608 Fstatr2_SPEC,
1609 crate::common::R,
1610 > {
1611 crate::common::RegisterField::<
1612 3,
1613 0x1,
1614 1,
1615 0,
1616 fstatr2::Bcerr,
1617 fstatr2::Bcerr,
1618 Fstatr2_SPEC,
1619 crate::common::R,
1620 >::from_register(self, 0)
1621 }
1622
1623 #[doc = "Illegal Command Error Flag"]
1624 #[inline(always)]
1625 pub fn ilglerr(
1626 self,
1627 ) -> crate::common::RegisterField<
1628 4,
1629 0x1,
1630 1,
1631 0,
1632 fstatr2::Ilglerr,
1633 fstatr2::Ilglerr,
1634 Fstatr2_SPEC,
1635 crate::common::R,
1636 > {
1637 crate::common::RegisterField::<
1638 4,
1639 0x1,
1640 1,
1641 0,
1642 fstatr2::Ilglerr,
1643 fstatr2::Ilglerr,
1644 Fstatr2_SPEC,
1645 crate::common::R,
1646 >::from_register(self, 0)
1647 }
1648
1649 #[doc = "Extra Area Illegal Command Error Flag"]
1650 #[inline(always)]
1651 pub fn eilglerr(
1652 self,
1653 ) -> crate::common::RegisterField<
1654 5,
1655 0x1,
1656 1,
1657 0,
1658 fstatr2::Eilglerr,
1659 fstatr2::Eilglerr,
1660 Fstatr2_SPEC,
1661 crate::common::R,
1662 > {
1663 crate::common::RegisterField::<
1664 5,
1665 0x1,
1666 1,
1667 0,
1668 fstatr2::Eilglerr,
1669 fstatr2::Eilglerr,
1670 Fstatr2_SPEC,
1671 crate::common::R,
1672 >::from_register(self, 0)
1673 }
1674}
1675impl ::core::default::Default for Fstatr2 {
1676 #[inline(always)]
1677 fn default() -> Fstatr2 {
1678 <crate::RegValueT<Fstatr2_SPEC> as RegisterValue<_>>::new(0)
1679 }
1680}
1681pub mod fstatr2 {
1682
1683 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1684 pub struct Ererr_SPEC;
1685 pub type Ererr = crate::EnumBitfieldStruct<u8, Ererr_SPEC>;
1686 impl Ererr {
1687 #[doc = "Erasure terminates normally"]
1688 pub const _0: Self = Self::new(0);
1689
1690 #[doc = "An error occurs during erasure"]
1691 pub const _1: Self = Self::new(1);
1692 }
1693 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1694 pub struct Prgerr_SPEC;
1695 pub type Prgerr = crate::EnumBitfieldStruct<u8, Prgerr_SPEC>;
1696 impl Prgerr {
1697 #[doc = "Programming terminates normally"]
1698 pub const _0: Self = Self::new(0);
1699
1700 #[doc = "An error occurs during programming."]
1701 pub const _1: Self = Self::new(1);
1702 }
1703 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1704 pub struct Prgerr01_SPEC;
1705 pub type Prgerr01 = crate::EnumBitfieldStruct<u8, Prgerr01_SPEC>;
1706 impl Prgerr01 {
1707 #[doc = "Programming by the FEXCR register terminates normally"]
1708 pub const _0: Self = Self::new(0);
1709
1710 #[doc = "An error occurs during programming."]
1711 pub const _1: Self = Self::new(1);
1712 }
1713 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1714 pub struct Bcerr_SPEC;
1715 pub type Bcerr = crate::EnumBitfieldStruct<u8, Bcerr_SPEC>;
1716 impl Bcerr {
1717 #[doc = "Blank checking terminates normally"]
1718 pub const _0: Self = Self::new(0);
1719
1720 #[doc = "An error occurs during blank checking."]
1721 pub const _1: Self = Self::new(1);
1722 }
1723 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1724 pub struct Ilglerr_SPEC;
1725 pub type Ilglerr = crate::EnumBitfieldStruct<u8, Ilglerr_SPEC>;
1726 impl Ilglerr {
1727 #[doc = "No illegal software command or illegal access is detected"]
1728 pub const _0: Self = Self::new(0);
1729
1730 #[doc = "An illegal command or illegal access is detected."]
1731 pub const _1: Self = Self::new(1);
1732 }
1733 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1734 pub struct Eilglerr_SPEC;
1735 pub type Eilglerr = crate::EnumBitfieldStruct<u8, Eilglerr_SPEC>;
1736 impl Eilglerr {
1737 #[doc = "No illegal command or illegal access to the extra area is detected"]
1738 pub const _0: Self = Self::new(0);
1739
1740 #[doc = "An illegal command or illegal access to the extra area is detected."]
1741 pub const _1: Self = Self::new(1);
1742 }
1743}
1744#[doc(hidden)]
1745#[derive(Copy, Clone, Eq, PartialEq)]
1746pub struct Tscdr_SPEC;
1747impl crate::sealed::RegSpec for Tscdr_SPEC {
1748 type DataType = u16;
1749}
1750
1751#[doc = "Temperature Sensor Calibration Data Register"]
1752pub type Tscdr = crate::RegValueT<Tscdr_SPEC>;
1753
1754impl Tscdr {
1755 #[doc = "Temperature Sensor Calibration Data"]
1756 #[inline(always)]
1757 pub fn tscdr(
1758 self,
1759 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Tscdr_SPEC, crate::common::R> {
1760 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Tscdr_SPEC,crate::common::R>::from_register(self,0)
1761 }
1762}
1763impl ::core::default::Default for Tscdr {
1764 #[inline(always)]
1765 fn default() -> Tscdr {
1766 <crate::RegValueT<Tscdr_SPEC> as RegisterValue<_>>::new(0)
1767 }
1768}
1769
1770#[doc(hidden)]
1771#[derive(Copy, Clone, Eq, PartialEq)]
1772pub struct Fentryr_SPEC;
1773impl crate::sealed::RegSpec for Fentryr_SPEC {
1774 type DataType = u16;
1775}
1776
1777#[doc = "Flash P/E Mode Entry Register"]
1778pub type Fentryr = crate::RegValueT<Fentryr_SPEC>;
1779
1780impl Fentryr {
1781 #[doc = "Code Flash P/E Mode Entry 0"]
1782 #[inline(always)]
1783 pub fn fentry0(
1784 self,
1785 ) -> crate::common::RegisterField<
1786 0,
1787 0x1,
1788 1,
1789 0,
1790 fentryr::Fentry0,
1791 fentryr::Fentry0,
1792 Fentryr_SPEC,
1793 crate::common::RW,
1794 > {
1795 crate::common::RegisterField::<
1796 0,
1797 0x1,
1798 1,
1799 0,
1800 fentryr::Fentry0,
1801 fentryr::Fentry0,
1802 Fentryr_SPEC,
1803 crate::common::RW,
1804 >::from_register(self, 0)
1805 }
1806
1807 #[doc = "Data Flash P/E Mode Entry"]
1808 #[inline(always)]
1809 pub fn fentryd(
1810 self,
1811 ) -> crate::common::RegisterField<
1812 7,
1813 0x1,
1814 1,
1815 0,
1816 fentryr::Fentryd,
1817 fentryr::Fentryd,
1818 Fentryr_SPEC,
1819 crate::common::RW,
1820 > {
1821 crate::common::RegisterField::<
1822 7,
1823 0x1,
1824 1,
1825 0,
1826 fentryr::Fentryd,
1827 fentryr::Fentryd,
1828 Fentryr_SPEC,
1829 crate::common::RW,
1830 >::from_register(self, 0)
1831 }
1832
1833 #[doc = "Key Code"]
1834 #[inline(always)]
1835 pub fn fekey(
1836 self,
1837 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fentryr_SPEC, crate::common::W> {
1838 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fentryr_SPEC,crate::common::W>::from_register(self,0)
1839 }
1840}
1841impl ::core::default::Default for Fentryr {
1842 #[inline(always)]
1843 fn default() -> Fentryr {
1844 <crate::RegValueT<Fentryr_SPEC> as RegisterValue<_>>::new(0)
1845 }
1846}
1847pub mod fentryr {
1848
1849 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1850 pub struct Fentry0_SPEC;
1851 pub type Fentry0 = crate::EnumBitfieldStruct<u8, Fentry0_SPEC>;
1852 impl Fentry0 {
1853 #[doc = "The code flash is the read mode"]
1854 pub const _0: Self = Self::new(0);
1855
1856 #[doc = "The code flash is the P/E mode."]
1857 pub const _1: Self = Self::new(1);
1858 }
1859 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1860 pub struct Fentryd_SPEC;
1861 pub type Fentryd = crate::EnumBitfieldStruct<u8, Fentryd_SPEC>;
1862 impl Fentryd {
1863 #[doc = "The data flash is the read mode"]
1864 pub const _0: Self = Self::new(0);
1865
1866 #[doc = "The data flash is the P/E mode."]
1867 pub const _1: Self = Self::new(1);
1868 }
1869}
1870#[doc(hidden)]
1871#[derive(Copy, Clone, Eq, PartialEq)]
1872pub struct Fldwaitr_SPEC;
1873impl crate::sealed::RegSpec for Fldwaitr_SPEC {
1874 type DataType = u8;
1875}
1876
1877#[doc = "Memory Wait Cycle Control Register for Data Flash"]
1878pub type Fldwaitr = crate::RegValueT<Fldwaitr_SPEC>;
1879
1880impl Fldwaitr {
1881 #[doc = "Memory Wait Cycle Select for Data Flash"]
1882 #[inline(always)]
1883 pub fn fldwait1(
1884 self,
1885 ) -> crate::common::RegisterField<
1886 0,
1887 0x1,
1888 1,
1889 0,
1890 fldwaitr::Fldwait1,
1891 fldwaitr::Fldwait1,
1892 Fldwaitr_SPEC,
1893 crate::common::RW,
1894 > {
1895 crate::common::RegisterField::<
1896 0,
1897 0x1,
1898 1,
1899 0,
1900 fldwaitr::Fldwait1,
1901 fldwaitr::Fldwait1,
1902 Fldwaitr_SPEC,
1903 crate::common::RW,
1904 >::from_register(self, 0)
1905 }
1906}
1907impl ::core::default::Default for Fldwaitr {
1908 #[inline(always)]
1909 fn default() -> Fldwaitr {
1910 <crate::RegValueT<Fldwaitr_SPEC> as RegisterValue<_>>::new(0)
1911 }
1912}
1913pub mod fldwaitr {
1914
1915 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1916 pub struct Fldwait1_SPEC;
1917 pub type Fldwait1 = crate::EnumBitfieldStruct<u8, Fldwait1_SPEC>;
1918 impl Fldwait1 {
1919 #[doc = "1 wait access (Default)"]
1920 pub const _0: Self = Self::new(0);
1921
1922 #[doc = "2 wait access"]
1923 pub const _1: Self = Self::new(1);
1924 }
1925}
1926#[doc(hidden)]
1927#[derive(Copy, Clone, Eq, PartialEq)]
1928pub struct Pfber_SPEC;
1929impl crate::sealed::RegSpec for Pfber_SPEC {
1930 type DataType = u8;
1931}
1932
1933#[doc = "Prefetch Buffer Enable Register"]
1934pub type Pfber = crate::RegValueT<Pfber_SPEC>;
1935
1936impl Pfber {
1937 #[doc = "Prefetch Buffer Enable bit"]
1938 #[inline(always)]
1939 pub fn pfbe(
1940 self,
1941 ) -> crate::common::RegisterField<
1942 0,
1943 0x1,
1944 1,
1945 0,
1946 pfber::Pfbe,
1947 pfber::Pfbe,
1948 Pfber_SPEC,
1949 crate::common::RW,
1950 > {
1951 crate::common::RegisterField::<
1952 0,
1953 0x1,
1954 1,
1955 0,
1956 pfber::Pfbe,
1957 pfber::Pfbe,
1958 Pfber_SPEC,
1959 crate::common::RW,
1960 >::from_register(self, 0)
1961 }
1962}
1963impl ::core::default::Default for Pfber {
1964 #[inline(always)]
1965 fn default() -> Pfber {
1966 <crate::RegValueT<Pfber_SPEC> as RegisterValue<_>>::new(0)
1967 }
1968}
1969pub mod pfber {
1970
1971 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1972 pub struct Pfbe_SPEC;
1973 pub type Pfbe = crate::EnumBitfieldStruct<u8, Pfbe_SPEC>;
1974 impl Pfbe {
1975 #[doc = "Prefetch buffer is disabled"]
1976 pub const _0: Self = Self::new(0);
1977
1978 #[doc = "Prefetch buffer is enabled"]
1979 pub const _1: Self = Self::new(1);
1980 }
1981}