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ra2e3_pac/
sysc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:02:40 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Standby Control Register"]
38    #[inline(always)]
39    pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(12usize),
43            )
44        }
45    }
46
47    #[doc = "Module Stop Control Register A"]
48    #[inline(always)]
49    pub const fn mstpcra(
50        &self,
51    ) -> &'static crate::common::Reg<self::Mstpcra_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Mstpcra_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(28usize),
55            )
56        }
57    }
58
59    #[doc = "System Clock Division Control Register"]
60    #[inline(always)]
61    pub const fn sckdivcr(
62        &self,
63    ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(32usize),
67            )
68        }
69    }
70
71    #[doc = "System Clock Source Control Register"]
72    #[inline(always)]
73    pub const fn sckscr(
74        &self,
75    ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(38usize),
79            )
80        }
81    }
82
83    #[doc = "Memory Wait Cycle Control Register for Code Flash"]
84    #[inline(always)]
85    pub const fn memwait(
86        &self,
87    ) -> &'static crate::common::Reg<self::Memwait_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::Memwait_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(49usize),
91            )
92        }
93    }
94
95    #[doc = "Main Clock Oscillator Control Register"]
96    #[inline(always)]
97    pub const fn mosccr(
98        &self,
99    ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(50usize),
103            )
104        }
105    }
106
107    #[doc = "High-Speed On-Chip Oscillator Control Register"]
108    #[inline(always)]
109    pub const fn hococr(
110        &self,
111    ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(54usize),
115            )
116        }
117    }
118
119    #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
120    #[inline(always)]
121    pub const fn mococr(
122        &self,
123    ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(56usize),
127            )
128        }
129    }
130
131    #[doc = "Oscillation Stabilization Flag Register"]
132    #[inline(always)]
133    pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
134        unsafe {
135            crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
136                self._svd2pac_as_ptr().add(60usize),
137            )
138        }
139    }
140
141    #[doc = "Clock Out Control Register"]
142    #[inline(always)]
143    pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
144        unsafe {
145            crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
146                self._svd2pac_as_ptr().add(62usize),
147            )
148        }
149    }
150
151    #[doc = "Oscillation Stop Detection Control Register"]
152    #[inline(always)]
153    pub const fn ostdcr(
154        &self,
155    ) -> &'static crate::common::Reg<self::Ostdcr_SPEC, crate::common::RW> {
156        unsafe {
157            crate::common::Reg::<self::Ostdcr_SPEC, crate::common::RW>::from_ptr(
158                self._svd2pac_as_ptr().add(64usize),
159            )
160        }
161    }
162
163    #[doc = "Oscillation Stop Detection Status Register"]
164    #[inline(always)]
165    pub const fn ostdsr(
166        &self,
167    ) -> &'static crate::common::Reg<self::Ostdsr_SPEC, crate::common::RW> {
168        unsafe {
169            crate::common::Reg::<self::Ostdsr_SPEC, crate::common::RW>::from_ptr(
170                self._svd2pac_as_ptr().add(65usize),
171            )
172        }
173    }
174
175    #[doc = "Lower Power Operation Control Register"]
176    #[inline(always)]
177    pub const fn lpopt(&self) -> &'static crate::common::Reg<self::Lpopt_SPEC, crate::common::RW> {
178        unsafe {
179            crate::common::Reg::<self::Lpopt_SPEC, crate::common::RW>::from_ptr(
180                self._svd2pac_as_ptr().add(76usize),
181            )
182        }
183    }
184
185    #[doc = "MOCO User Trimming Control Register"]
186    #[inline(always)]
187    pub const fn mocoutcr(
188        &self,
189    ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
190        unsafe {
191            crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
192                self._svd2pac_as_ptr().add(97usize),
193            )
194        }
195    }
196
197    #[doc = "HOCO User Trimming Control Register"]
198    #[inline(always)]
199    pub const fn hocoutcr(
200        &self,
201    ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(98usize),
205            )
206        }
207    }
208
209    #[doc = "Snooze Control Register"]
210    #[inline(always)]
211    pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
212        unsafe {
213            crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
214                self._svd2pac_as_ptr().add(146usize),
215            )
216        }
217    }
218
219    #[doc = "Snooze End Control Register 0"]
220    #[inline(always)]
221    pub const fn snzedcr0(
222        &self,
223    ) -> &'static crate::common::Reg<self::Snzedcr0_SPEC, crate::common::RW> {
224        unsafe {
225            crate::common::Reg::<self::Snzedcr0_SPEC, crate::common::RW>::from_ptr(
226                self._svd2pac_as_ptr().add(148usize),
227            )
228        }
229    }
230
231    #[doc = "Snooze Request Control Register 0"]
232    #[inline(always)]
233    pub const fn snzreqcr0(
234        &self,
235    ) -> &'static crate::common::Reg<self::Snzreqcr0_SPEC, crate::common::RW> {
236        unsafe {
237            crate::common::Reg::<self::Snzreqcr0_SPEC, crate::common::RW>::from_ptr(
238                self._svd2pac_as_ptr().add(152usize),
239            )
240        }
241    }
242
243    #[doc = "Power Save Memory Control Register"]
244    #[inline(always)]
245    pub const fn psmcr(&self) -> &'static crate::common::Reg<self::Psmcr_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::Psmcr_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(159usize),
249            )
250        }
251    }
252
253    #[doc = "Operating Power Control Register"]
254    #[inline(always)]
255    pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
256        unsafe {
257            crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
258                self._svd2pac_as_ptr().add(160usize),
259            )
260        }
261    }
262
263    #[doc = "Main Clock Oscillator Wait Control Register"]
264    #[inline(always)]
265    pub const fn moscwtcr(
266        &self,
267    ) -> &'static crate::common::Reg<self::Moscwtcr_SPEC, crate::common::RW> {
268        unsafe {
269            crate::common::Reg::<self::Moscwtcr_SPEC, crate::common::RW>::from_ptr(
270                self._svd2pac_as_ptr().add(162usize),
271            )
272        }
273    }
274
275    #[doc = "High-Speed On-Chip Oscillator Wait Control Register"]
276    #[inline(always)]
277    pub const fn hocowtcr(
278        &self,
279    ) -> &'static crate::common::Reg<self::Hocowtcr_SPEC, crate::common::RW> {
280        unsafe {
281            crate::common::Reg::<self::Hocowtcr_SPEC, crate::common::RW>::from_ptr(
282                self._svd2pac_as_ptr().add(165usize),
283            )
284        }
285    }
286
287    #[doc = "Sub Operating Power Control Register"]
288    #[inline(always)]
289    pub const fn sopccr(
290        &self,
291    ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
292        unsafe {
293            crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
294                self._svd2pac_as_ptr().add(170usize),
295            )
296        }
297    }
298
299    #[doc = "Reset Status Register 1"]
300    #[inline(always)]
301    pub const fn rstsr1(
302        &self,
303    ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
304        unsafe {
305            crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
306                self._svd2pac_as_ptr().add(192usize),
307            )
308        }
309    }
310
311    #[doc = "Voltage Monitor 1 Circuit Control Register"]
312    #[inline(always)]
313    pub const fn lvd1cr1(
314        &self,
315    ) -> &'static crate::common::Reg<self::Lvd1Cr1_SPEC, crate::common::RW> {
316        unsafe {
317            crate::common::Reg::<self::Lvd1Cr1_SPEC, crate::common::RW>::from_ptr(
318                self._svd2pac_as_ptr().add(224usize),
319            )
320        }
321    }
322
323    #[doc = "Voltage Monitor 1 Circuit Status Register"]
324    #[inline(always)]
325    pub const fn lvd1sr(
326        &self,
327    ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
328        unsafe {
329            crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
330                self._svd2pac_as_ptr().add(225usize),
331            )
332        }
333    }
334
335    #[doc = "Voltage Monitor 2 Circuit Control Register 1"]
336    #[inline(always)]
337    pub const fn lvd2cr1(
338        &self,
339    ) -> &'static crate::common::Reg<self::Lvd2Cr1_SPEC, crate::common::RW> {
340        unsafe {
341            crate::common::Reg::<self::Lvd2Cr1_SPEC, crate::common::RW>::from_ptr(
342                self._svd2pac_as_ptr().add(226usize),
343            )
344        }
345    }
346
347    #[doc = "Voltage Monitor 2 Circuit Status Register"]
348    #[inline(always)]
349    pub const fn lvd2sr(
350        &self,
351    ) -> &'static crate::common::Reg<self::Lvd2Sr_SPEC, crate::common::RW> {
352        unsafe {
353            crate::common::Reg::<self::Lvd2Sr_SPEC, crate::common::RW>::from_ptr(
354                self._svd2pac_as_ptr().add(227usize),
355            )
356        }
357    }
358
359    #[doc = "Protect Register"]
360    #[inline(always)]
361    pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
362        unsafe {
363            crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
364                self._svd2pac_as_ptr().add(1022usize),
365            )
366        }
367    }
368
369    #[doc = "System Control OCD Control Register"]
370    #[inline(always)]
371    pub const fn syocdcr(
372        &self,
373    ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
374        unsafe {
375            crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
376                self._svd2pac_as_ptr().add(1038usize),
377            )
378        }
379    }
380
381    #[doc = "Reset Status Register 0"]
382    #[inline(always)]
383    pub const fn rstsr0(
384        &self,
385    ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
386        unsafe {
387            crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
388                self._svd2pac_as_ptr().add(1040usize),
389            )
390        }
391    }
392
393    #[doc = "Reset Status Register 2"]
394    #[inline(always)]
395    pub const fn rstsr2(
396        &self,
397    ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
398        unsafe {
399            crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
400                self._svd2pac_as_ptr().add(1041usize),
401            )
402        }
403    }
404
405    #[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
406    #[inline(always)]
407    pub const fn momcr(&self) -> &'static crate::common::Reg<self::Momcr_SPEC, crate::common::RW> {
408        unsafe {
409            crate::common::Reg::<self::Momcr_SPEC, crate::common::RW>::from_ptr(
410                self._svd2pac_as_ptr().add(1043usize),
411            )
412        }
413    }
414
415    #[doc = "Voltage Monitor Circuit Control Register"]
416    #[inline(always)]
417    pub const fn lvcmpcr(
418        &self,
419    ) -> &'static crate::common::Reg<self::Lvcmpcr_SPEC, crate::common::RW> {
420        unsafe {
421            crate::common::Reg::<self::Lvcmpcr_SPEC, crate::common::RW>::from_ptr(
422                self._svd2pac_as_ptr().add(1047usize),
423            )
424        }
425    }
426
427    #[doc = "Voltage Detection Level Select Register"]
428    #[inline(always)]
429    pub const fn lvdlvlr(
430        &self,
431    ) -> &'static crate::common::Reg<self::Lvdlvlr_SPEC, crate::common::RW> {
432        unsafe {
433            crate::common::Reg::<self::Lvdlvlr_SPEC, crate::common::RW>::from_ptr(
434                self._svd2pac_as_ptr().add(1048usize),
435            )
436        }
437    }
438
439    #[doc = "Voltage Monitor 1 Circuit Control Register 0"]
440    #[inline(always)]
441    pub const fn lvd1cr0(
442        &self,
443    ) -> &'static crate::common::Reg<self::Lvd1Cr0_SPEC, crate::common::RW> {
444        unsafe {
445            crate::common::Reg::<self::Lvd1Cr0_SPEC, crate::common::RW>::from_ptr(
446                self._svd2pac_as_ptr().add(1050usize),
447            )
448        }
449    }
450
451    #[doc = "Voltage Monitor 2 Circuit Control Register 0"]
452    #[inline(always)]
453    pub const fn lvd2cr0(
454        &self,
455    ) -> &'static crate::common::Reg<self::Lvd2Cr0_SPEC, crate::common::RW> {
456        unsafe {
457            crate::common::Reg::<self::Lvd2Cr0_SPEC, crate::common::RW>::from_ptr(
458                self._svd2pac_as_ptr().add(1051usize),
459            )
460        }
461    }
462
463    #[doc = "Sub-Clock Oscillator Control Register"]
464    #[inline(always)]
465    pub const fn sosccr(
466        &self,
467    ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
468        unsafe {
469            crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
470                self._svd2pac_as_ptr().add(1152usize),
471            )
472        }
473    }
474
475    #[doc = "Sub-Clock Oscillator Mode Control Register"]
476    #[inline(always)]
477    pub const fn somcr(&self) -> &'static crate::common::Reg<self::Somcr_SPEC, crate::common::RW> {
478        unsafe {
479            crate::common::Reg::<self::Somcr_SPEC, crate::common::RW>::from_ptr(
480                self._svd2pac_as_ptr().add(1153usize),
481            )
482        }
483    }
484
485    #[doc = "Sub-Clock Oscillator Margin Check Register"]
486    #[inline(always)]
487    pub const fn somrg(&self) -> &'static crate::common::Reg<self::Somrg_SPEC, crate::common::RW> {
488        unsafe {
489            crate::common::Reg::<self::Somrg_SPEC, crate::common::RW>::from_ptr(
490                self._svd2pac_as_ptr().add(1154usize),
491            )
492        }
493    }
494
495    #[doc = "Low-Speed On-Chip Oscillator Control Register"]
496    #[inline(always)]
497    pub const fn lococr(
498        &self,
499    ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
500        unsafe {
501            crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
502                self._svd2pac_as_ptr().add(1168usize),
503            )
504        }
505    }
506
507    #[doc = "LOCO User Trimming Control Register"]
508    #[inline(always)]
509    pub const fn locoutcr(
510        &self,
511    ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
512        unsafe {
513            crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
514                self._svd2pac_as_ptr().add(1170usize),
515            )
516        }
517    }
518}
519#[doc(hidden)]
520#[derive(Copy, Clone, Eq, PartialEq)]
521pub struct Sbycr_SPEC;
522impl crate::sealed::RegSpec for Sbycr_SPEC {
523    type DataType = u16;
524}
525
526#[doc = "Standby Control Register"]
527pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
528
529impl Sbycr {
530    #[doc = "Software Standby Mode Select"]
531    #[inline(always)]
532    pub fn ssby(
533        self,
534    ) -> crate::common::RegisterField<
535        15,
536        0x1,
537        1,
538        0,
539        sbycr::Ssby,
540        sbycr::Ssby,
541        Sbycr_SPEC,
542        crate::common::RW,
543    > {
544        crate::common::RegisterField::<
545            15,
546            0x1,
547            1,
548            0,
549            sbycr::Ssby,
550            sbycr::Ssby,
551            Sbycr_SPEC,
552            crate::common::RW,
553        >::from_register(self, 0)
554    }
555}
556impl ::core::default::Default for Sbycr {
557    #[inline(always)]
558    fn default() -> Sbycr {
559        <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(0)
560    }
561}
562pub mod sbycr {
563
564    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
565    pub struct Ssby_SPEC;
566    pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
567    impl Ssby {
568        #[doc = "Sleep mode"]
569        pub const _0: Self = Self::new(0);
570
571        #[doc = "Software Standby mode."]
572        pub const _1: Self = Self::new(1);
573    }
574}
575#[doc(hidden)]
576#[derive(Copy, Clone, Eq, PartialEq)]
577pub struct Mstpcra_SPEC;
578impl crate::sealed::RegSpec for Mstpcra_SPEC {
579    type DataType = u32;
580}
581
582#[doc = "Module Stop Control Register A"]
583pub type Mstpcra = crate::RegValueT<Mstpcra_SPEC>;
584
585impl Mstpcra {
586    #[doc = "DTC Module Stop"]
587    #[inline(always)]
588    pub fn mstpa22(
589        self,
590    ) -> crate::common::RegisterField<
591        22,
592        0x1,
593        1,
594        0,
595        mstpcra::Mstpa22,
596        mstpcra::Mstpa22,
597        Mstpcra_SPEC,
598        crate::common::RW,
599    > {
600        crate::common::RegisterField::<
601            22,
602            0x1,
603            1,
604            0,
605            mstpcra::Mstpa22,
606            mstpcra::Mstpa22,
607            Mstpcra_SPEC,
608            crate::common::RW,
609        >::from_register(self, 0)
610    }
611}
612impl ::core::default::Default for Mstpcra {
613    #[inline(always)]
614    fn default() -> Mstpcra {
615        <crate::RegValueT<Mstpcra_SPEC> as RegisterValue<_>>::new(4290772991)
616    }
617}
618pub mod mstpcra {
619
620    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
621    pub struct Mstpa22_SPEC;
622    pub type Mstpa22 = crate::EnumBitfieldStruct<u8, Mstpa22_SPEC>;
623    impl Mstpa22 {
624        #[doc = "Cancel the module-stop state"]
625        pub const _0: Self = Self::new(0);
626
627        #[doc = "Enter the module-stop state"]
628        pub const _1: Self = Self::new(1);
629    }
630}
631#[doc(hidden)]
632#[derive(Copy, Clone, Eq, PartialEq)]
633pub struct Sckdivcr_SPEC;
634impl crate::sealed::RegSpec for Sckdivcr_SPEC {
635    type DataType = u32;
636}
637
638#[doc = "System Clock Division Control Register"]
639pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
640
641impl Sckdivcr {
642    #[doc = "Peripheral Module Clock D (PCLKD) Select"]
643    #[inline(always)]
644    pub fn pckd(
645        self,
646    ) -> crate::common::RegisterField<
647        0,
648        0x7,
649        1,
650        0,
651        sckdivcr::Pckd,
652        sckdivcr::Pckd,
653        Sckdivcr_SPEC,
654        crate::common::RW,
655    > {
656        crate::common::RegisterField::<
657            0,
658            0x7,
659            1,
660            0,
661            sckdivcr::Pckd,
662            sckdivcr::Pckd,
663            Sckdivcr_SPEC,
664            crate::common::RW,
665        >::from_register(self, 0)
666    }
667
668    #[doc = "Peripheral Module Clock B (PCLKB) Select"]
669    #[inline(always)]
670    pub fn pckb(
671        self,
672    ) -> crate::common::RegisterField<
673        8,
674        0x7,
675        1,
676        0,
677        sckdivcr::Pckb,
678        sckdivcr::Pckb,
679        Sckdivcr_SPEC,
680        crate::common::RW,
681    > {
682        crate::common::RegisterField::<
683            8,
684            0x7,
685            1,
686            0,
687            sckdivcr::Pckb,
688            sckdivcr::Pckb,
689            Sckdivcr_SPEC,
690            crate::common::RW,
691        >::from_register(self, 0)
692    }
693
694    #[doc = "System Clock (ICLK) Select"]
695    #[inline(always)]
696    pub fn ick(
697        self,
698    ) -> crate::common::RegisterField<
699        24,
700        0x7,
701        1,
702        0,
703        sckdivcr::Ick,
704        sckdivcr::Ick,
705        Sckdivcr_SPEC,
706        crate::common::RW,
707    > {
708        crate::common::RegisterField::<
709            24,
710            0x7,
711            1,
712            0,
713            sckdivcr::Ick,
714            sckdivcr::Ick,
715            Sckdivcr_SPEC,
716            crate::common::RW,
717        >::from_register(self, 0)
718    }
719}
720impl ::core::default::Default for Sckdivcr {
721    #[inline(always)]
722    fn default() -> Sckdivcr {
723        <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(67109892)
724    }
725}
726pub mod sckdivcr {
727
728    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
729    pub struct Pckd_SPEC;
730    pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
731    impl Pckd {
732        #[doc = "x 1/1"]
733        pub const _000: Self = Self::new(0);
734
735        #[doc = "x 1/2"]
736        pub const _001: Self = Self::new(1);
737
738        #[doc = "x 1/4"]
739        pub const _010: Self = Self::new(2);
740
741        #[doc = "x 1/8"]
742        pub const _011: Self = Self::new(3);
743
744        #[doc = "x 1/16"]
745        pub const _100: Self = Self::new(4);
746
747        #[doc = "x 1/32"]
748        pub const _101: Self = Self::new(5);
749
750        #[doc = "x 1/64"]
751        pub const _110: Self = Self::new(6);
752    }
753    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
754    pub struct Pckb_SPEC;
755    pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
756    impl Pckb {
757        #[doc = "x 1/1"]
758        pub const _000: Self = Self::new(0);
759
760        #[doc = "x 1/2"]
761        pub const _001: Self = Self::new(1);
762
763        #[doc = "x 1/4"]
764        pub const _010: Self = Self::new(2);
765
766        #[doc = "x 1/8"]
767        pub const _011: Self = Self::new(3);
768
769        #[doc = "x 1/16"]
770        pub const _100: Self = Self::new(4);
771
772        #[doc = "x 1/32"]
773        pub const _101: Self = Self::new(5);
774
775        #[doc = "x 1/64"]
776        pub const _110: Self = Self::new(6);
777    }
778    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
779    pub struct Ick_SPEC;
780    pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
781    impl Ick {
782        #[doc = "x 1/1"]
783        pub const _000: Self = Self::new(0);
784
785        #[doc = "x 1/2"]
786        pub const _001: Self = Self::new(1);
787
788        #[doc = "x 1/4"]
789        pub const _010: Self = Self::new(2);
790
791        #[doc = "x 1/8"]
792        pub const _011: Self = Self::new(3);
793
794        #[doc = "x 1/16"]
795        pub const _100: Self = Self::new(4);
796
797        #[doc = "x 1/32"]
798        pub const _101: Self = Self::new(5);
799
800        #[doc = "x 1/64"]
801        pub const _110: Self = Self::new(6);
802    }
803}
804#[doc(hidden)]
805#[derive(Copy, Clone, Eq, PartialEq)]
806pub struct Sckscr_SPEC;
807impl crate::sealed::RegSpec for Sckscr_SPEC {
808    type DataType = u8;
809}
810
811#[doc = "System Clock Source Control Register"]
812pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
813
814impl Sckscr {
815    #[doc = "Clock Source Select"]
816    #[inline(always)]
817    pub fn cksel(
818        self,
819    ) -> crate::common::RegisterField<
820        0,
821        0x7,
822        1,
823        0,
824        sckscr::Cksel,
825        sckscr::Cksel,
826        Sckscr_SPEC,
827        crate::common::RW,
828    > {
829        crate::common::RegisterField::<
830            0,
831            0x7,
832            1,
833            0,
834            sckscr::Cksel,
835            sckscr::Cksel,
836            Sckscr_SPEC,
837            crate::common::RW,
838        >::from_register(self, 0)
839    }
840}
841impl ::core::default::Default for Sckscr {
842    #[inline(always)]
843    fn default() -> Sckscr {
844        <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
845    }
846}
847pub mod sckscr {
848
849    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
850    pub struct Cksel_SPEC;
851    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
852    impl Cksel {
853        #[doc = "HOCO"]
854        pub const _000: Self = Self::new(0);
855
856        #[doc = "MOCO"]
857        pub const _001: Self = Self::new(1);
858
859        #[doc = "LOCO"]
860        pub const _010: Self = Self::new(2);
861
862        #[doc = "Main clock oscillator (MOSC)"]
863        pub const _011: Self = Self::new(3);
864
865        #[doc = "Sub-clock oscillator (SOSC)"]
866        pub const _100: Self = Self::new(4);
867
868        #[doc = "Setting prohibited"]
869        pub const _101: Self = Self::new(5);
870
871        #[doc = "Setting prohibited"]
872        pub const _110: Self = Self::new(6);
873
874        #[doc = "Setting prohibited"]
875        pub const _111: Self = Self::new(7);
876    }
877}
878#[doc(hidden)]
879#[derive(Copy, Clone, Eq, PartialEq)]
880pub struct Memwait_SPEC;
881impl crate::sealed::RegSpec for Memwait_SPEC {
882    type DataType = u8;
883}
884
885#[doc = "Memory Wait Cycle Control Register for Code Flash"]
886pub type Memwait = crate::RegValueT<Memwait_SPEC>;
887
888impl Memwait {
889    #[doc = "Memory Wait Cycle Select for Code Flash"]
890    #[inline(always)]
891    pub fn memwait(
892        self,
893    ) -> crate::common::RegisterField<
894        0,
895        0x1,
896        1,
897        0,
898        memwait::Memwait,
899        memwait::Memwait,
900        Memwait_SPEC,
901        crate::common::RW,
902    > {
903        crate::common::RegisterField::<
904            0,
905            0x1,
906            1,
907            0,
908            memwait::Memwait,
909            memwait::Memwait,
910            Memwait_SPEC,
911            crate::common::RW,
912        >::from_register(self, 0)
913    }
914}
915impl ::core::default::Default for Memwait {
916    #[inline(always)]
917    fn default() -> Memwait {
918        <crate::RegValueT<Memwait_SPEC> as RegisterValue<_>>::new(0)
919    }
920}
921pub mod memwait {
922
923    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
924    pub struct Memwait_SPEC;
925    pub type Memwait = crate::EnumBitfieldStruct<u8, Memwait_SPEC>;
926    impl Memwait {
927        #[doc = "No wait"]
928        pub const _0: Self = Self::new(0);
929
930        #[doc = "Wait"]
931        pub const _1: Self = Self::new(1);
932    }
933}
934#[doc(hidden)]
935#[derive(Copy, Clone, Eq, PartialEq)]
936pub struct Mosccr_SPEC;
937impl crate::sealed::RegSpec for Mosccr_SPEC {
938    type DataType = u8;
939}
940
941#[doc = "Main Clock Oscillator Control Register"]
942pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
943
944impl Mosccr {
945    #[doc = "Main Clock Oscillator Stop"]
946    #[inline(always)]
947    pub fn mostp(
948        self,
949    ) -> crate::common::RegisterField<
950        0,
951        0x1,
952        1,
953        0,
954        mosccr::Mostp,
955        mosccr::Mostp,
956        Mosccr_SPEC,
957        crate::common::RW,
958    > {
959        crate::common::RegisterField::<
960            0,
961            0x1,
962            1,
963            0,
964            mosccr::Mostp,
965            mosccr::Mostp,
966            Mosccr_SPEC,
967            crate::common::RW,
968        >::from_register(self, 0)
969    }
970}
971impl ::core::default::Default for Mosccr {
972    #[inline(always)]
973    fn default() -> Mosccr {
974        <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
975    }
976}
977pub mod mosccr {
978
979    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
980    pub struct Mostp_SPEC;
981    pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
982    impl Mostp {
983        #[doc = "Operate the main clock oscillator"]
984        pub const _0: Self = Self::new(0);
985
986        #[doc = "Stop the main clock oscillator"]
987        pub const _1: Self = Self::new(1);
988    }
989}
990#[doc(hidden)]
991#[derive(Copy, Clone, Eq, PartialEq)]
992pub struct Hococr_SPEC;
993impl crate::sealed::RegSpec for Hococr_SPEC {
994    type DataType = u8;
995}
996
997#[doc = "High-Speed On-Chip Oscillator Control Register"]
998pub type Hococr = crate::RegValueT<Hococr_SPEC>;
999
1000impl Hococr {
1001    #[doc = "HOCO Stop"]
1002    #[inline(always)]
1003    pub fn hcstp(
1004        self,
1005    ) -> crate::common::RegisterField<
1006        0,
1007        0x1,
1008        1,
1009        0,
1010        hococr::Hcstp,
1011        hococr::Hcstp,
1012        Hococr_SPEC,
1013        crate::common::RW,
1014    > {
1015        crate::common::RegisterField::<
1016            0,
1017            0x1,
1018            1,
1019            0,
1020            hococr::Hcstp,
1021            hococr::Hcstp,
1022            Hococr_SPEC,
1023            crate::common::RW,
1024        >::from_register(self, 0)
1025    }
1026}
1027impl ::core::default::Default for Hococr {
1028    #[inline(always)]
1029    fn default() -> Hococr {
1030        <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
1031    }
1032}
1033pub mod hococr {
1034
1035    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1036    pub struct Hcstp_SPEC;
1037    pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
1038    impl Hcstp {
1039        #[doc = "Operate the HOCO clock"]
1040        pub const _0: Self = Self::new(0);
1041
1042        #[doc = "Stop the HOCO clock"]
1043        pub const _1: Self = Self::new(1);
1044    }
1045}
1046#[doc(hidden)]
1047#[derive(Copy, Clone, Eq, PartialEq)]
1048pub struct Mococr_SPEC;
1049impl crate::sealed::RegSpec for Mococr_SPEC {
1050    type DataType = u8;
1051}
1052
1053#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
1054pub type Mococr = crate::RegValueT<Mococr_SPEC>;
1055
1056impl Mococr {
1057    #[doc = "MOCO Stop"]
1058    #[inline(always)]
1059    pub fn mcstp(
1060        self,
1061    ) -> crate::common::RegisterField<
1062        0,
1063        0x1,
1064        1,
1065        0,
1066        mococr::Mcstp,
1067        mococr::Mcstp,
1068        Mococr_SPEC,
1069        crate::common::RW,
1070    > {
1071        crate::common::RegisterField::<
1072            0,
1073            0x1,
1074            1,
1075            0,
1076            mococr::Mcstp,
1077            mococr::Mcstp,
1078            Mococr_SPEC,
1079            crate::common::RW,
1080        >::from_register(self, 0)
1081    }
1082}
1083impl ::core::default::Default for Mococr {
1084    #[inline(always)]
1085    fn default() -> Mococr {
1086        <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
1087    }
1088}
1089pub mod mococr {
1090
1091    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1092    pub struct Mcstp_SPEC;
1093    pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
1094    impl Mcstp {
1095        #[doc = "MOCO clock is operating"]
1096        pub const _0: Self = Self::new(0);
1097
1098        #[doc = "MOCO clock is stopped"]
1099        pub const _1: Self = Self::new(1);
1100    }
1101}
1102#[doc(hidden)]
1103#[derive(Copy, Clone, Eq, PartialEq)]
1104pub struct Oscsf_SPEC;
1105impl crate::sealed::RegSpec for Oscsf_SPEC {
1106    type DataType = u8;
1107}
1108
1109#[doc = "Oscillation Stabilization Flag Register"]
1110pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
1111
1112impl Oscsf {
1113    #[doc = "HOCO Clock Oscillation Stabilization Flag"]
1114    #[inline(always)]
1115    pub fn hocosf(
1116        self,
1117    ) -> crate::common::RegisterField<
1118        0,
1119        0x1,
1120        1,
1121        0,
1122        oscsf::Hocosf,
1123        oscsf::Hocosf,
1124        Oscsf_SPEC,
1125        crate::common::R,
1126    > {
1127        crate::common::RegisterField::<
1128            0,
1129            0x1,
1130            1,
1131            0,
1132            oscsf::Hocosf,
1133            oscsf::Hocosf,
1134            Oscsf_SPEC,
1135            crate::common::R,
1136        >::from_register(self, 0)
1137    }
1138
1139    #[doc = "Main Clock Oscillation Stabilization Flag"]
1140    #[inline(always)]
1141    pub fn moscsf(
1142        self,
1143    ) -> crate::common::RegisterField<
1144        3,
1145        0x1,
1146        1,
1147        0,
1148        oscsf::Moscsf,
1149        oscsf::Moscsf,
1150        Oscsf_SPEC,
1151        crate::common::R,
1152    > {
1153        crate::common::RegisterField::<
1154            3,
1155            0x1,
1156            1,
1157            0,
1158            oscsf::Moscsf,
1159            oscsf::Moscsf,
1160            Oscsf_SPEC,
1161            crate::common::R,
1162        >::from_register(self, 0)
1163    }
1164}
1165impl ::core::default::Default for Oscsf {
1166    #[inline(always)]
1167    fn default() -> Oscsf {
1168        <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
1169    }
1170}
1171pub mod oscsf {
1172
1173    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1174    pub struct Hocosf_SPEC;
1175    pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
1176    impl Hocosf {
1177        #[doc = "The HOCO clock is stopped or is not yet stable"]
1178        pub const _0: Self = Self::new(0);
1179
1180        #[doc = "The HOCO clock is stable, so is available for use as the system clock"]
1181        pub const _1: Self = Self::new(1);
1182    }
1183    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1184    pub struct Moscsf_SPEC;
1185    pub type Moscsf = crate::EnumBitfieldStruct<u8, Moscsf_SPEC>;
1186    impl Moscsf {
1187        #[doc = "The main clock oscillator is stopped (MOSTP = 1) or is not yet stable"]
1188        pub const _0: Self = Self::new(0);
1189
1190        #[doc = "The main clock oscillator is stable, so is available for use as the system clock"]
1191        pub const _1: Self = Self::new(1);
1192    }
1193}
1194#[doc(hidden)]
1195#[derive(Copy, Clone, Eq, PartialEq)]
1196pub struct Ckocr_SPEC;
1197impl crate::sealed::RegSpec for Ckocr_SPEC {
1198    type DataType = u8;
1199}
1200
1201#[doc = "Clock Out Control Register"]
1202pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
1203
1204impl Ckocr {
1205    #[doc = "Clock Out Source Select"]
1206    #[inline(always)]
1207    pub fn ckosel(
1208        self,
1209    ) -> crate::common::RegisterField<
1210        0,
1211        0x7,
1212        1,
1213        0,
1214        ckocr::Ckosel,
1215        ckocr::Ckosel,
1216        Ckocr_SPEC,
1217        crate::common::RW,
1218    > {
1219        crate::common::RegisterField::<
1220            0,
1221            0x7,
1222            1,
1223            0,
1224            ckocr::Ckosel,
1225            ckocr::Ckosel,
1226            Ckocr_SPEC,
1227            crate::common::RW,
1228        >::from_register(self, 0)
1229    }
1230
1231    #[doc = "Clock Output Frequency Division Ratio"]
1232    #[inline(always)]
1233    pub fn ckodiv(
1234        self,
1235    ) -> crate::common::RegisterField<
1236        4,
1237        0x7,
1238        1,
1239        0,
1240        ckocr::Ckodiv,
1241        ckocr::Ckodiv,
1242        Ckocr_SPEC,
1243        crate::common::RW,
1244    > {
1245        crate::common::RegisterField::<
1246            4,
1247            0x7,
1248            1,
1249            0,
1250            ckocr::Ckodiv,
1251            ckocr::Ckodiv,
1252            Ckocr_SPEC,
1253            crate::common::RW,
1254        >::from_register(self, 0)
1255    }
1256
1257    #[doc = "Clock Out Enable"]
1258    #[inline(always)]
1259    pub fn ckoen(
1260        self,
1261    ) -> crate::common::RegisterField<
1262        7,
1263        0x1,
1264        1,
1265        0,
1266        ckocr::Ckoen,
1267        ckocr::Ckoen,
1268        Ckocr_SPEC,
1269        crate::common::RW,
1270    > {
1271        crate::common::RegisterField::<
1272            7,
1273            0x1,
1274            1,
1275            0,
1276            ckocr::Ckoen,
1277            ckocr::Ckoen,
1278            Ckocr_SPEC,
1279            crate::common::RW,
1280        >::from_register(self, 0)
1281    }
1282}
1283impl ::core::default::Default for Ckocr {
1284    #[inline(always)]
1285    fn default() -> Ckocr {
1286        <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
1287    }
1288}
1289pub mod ckocr {
1290
1291    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1292    pub struct Ckosel_SPEC;
1293    pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
1294    impl Ckosel {
1295        #[doc = "HOCO (value after reset)"]
1296        pub const _000: Self = Self::new(0);
1297
1298        #[doc = "MOCO"]
1299        pub const _001: Self = Self::new(1);
1300
1301        #[doc = "LOCO"]
1302        pub const _010: Self = Self::new(2);
1303
1304        #[doc = "MOSC"]
1305        pub const _011: Self = Self::new(3);
1306
1307        #[doc = "SOSC"]
1308        pub const _100: Self = Self::new(4);
1309
1310        #[doc = "Setting prohibited"]
1311        pub const _101: Self = Self::new(5);
1312    }
1313    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1314    pub struct Ckodiv_SPEC;
1315    pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
1316    impl Ckodiv {
1317        #[doc = "x 1/1"]
1318        pub const _000: Self = Self::new(0);
1319
1320        #[doc = "x 1/2"]
1321        pub const _001: Self = Self::new(1);
1322
1323        #[doc = "x 1/4"]
1324        pub const _010: Self = Self::new(2);
1325
1326        #[doc = "x 1/8"]
1327        pub const _011: Self = Self::new(3);
1328
1329        #[doc = "x 1/16"]
1330        pub const _100: Self = Self::new(4);
1331
1332        #[doc = "x 1/32"]
1333        pub const _101: Self = Self::new(5);
1334
1335        #[doc = "x 1/64"]
1336        pub const _110: Self = Self::new(6);
1337
1338        #[doc = "x 1/128"]
1339        pub const _111: Self = Self::new(7);
1340    }
1341    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1342    pub struct Ckoen_SPEC;
1343    pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
1344    impl Ckoen {
1345        #[doc = "Disable clock out"]
1346        pub const _0: Self = Self::new(0);
1347
1348        #[doc = "Enable clock out"]
1349        pub const _1: Self = Self::new(1);
1350    }
1351}
1352#[doc(hidden)]
1353#[derive(Copy, Clone, Eq, PartialEq)]
1354pub struct Ostdcr_SPEC;
1355impl crate::sealed::RegSpec for Ostdcr_SPEC {
1356    type DataType = u8;
1357}
1358
1359#[doc = "Oscillation Stop Detection Control Register"]
1360pub type Ostdcr = crate::RegValueT<Ostdcr_SPEC>;
1361
1362impl Ostdcr {
1363    #[doc = "Oscillation Stop Detection Interrupt Enable"]
1364    #[inline(always)]
1365    pub fn ostdie(
1366        self,
1367    ) -> crate::common::RegisterField<
1368        0,
1369        0x1,
1370        1,
1371        0,
1372        ostdcr::Ostdie,
1373        ostdcr::Ostdie,
1374        Ostdcr_SPEC,
1375        crate::common::RW,
1376    > {
1377        crate::common::RegisterField::<
1378            0,
1379            0x1,
1380            1,
1381            0,
1382            ostdcr::Ostdie,
1383            ostdcr::Ostdie,
1384            Ostdcr_SPEC,
1385            crate::common::RW,
1386        >::from_register(self, 0)
1387    }
1388
1389    #[doc = "Oscillation Stop Detection Function Enable"]
1390    #[inline(always)]
1391    pub fn ostde(
1392        self,
1393    ) -> crate::common::RegisterField<
1394        7,
1395        0x1,
1396        1,
1397        0,
1398        ostdcr::Ostde,
1399        ostdcr::Ostde,
1400        Ostdcr_SPEC,
1401        crate::common::RW,
1402    > {
1403        crate::common::RegisterField::<
1404            7,
1405            0x1,
1406            1,
1407            0,
1408            ostdcr::Ostde,
1409            ostdcr::Ostde,
1410            Ostdcr_SPEC,
1411            crate::common::RW,
1412        >::from_register(self, 0)
1413    }
1414}
1415impl ::core::default::Default for Ostdcr {
1416    #[inline(always)]
1417    fn default() -> Ostdcr {
1418        <crate::RegValueT<Ostdcr_SPEC> as RegisterValue<_>>::new(0)
1419    }
1420}
1421pub mod ostdcr {
1422
1423    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1424    pub struct Ostdie_SPEC;
1425    pub type Ostdie = crate::EnumBitfieldStruct<u8, Ostdie_SPEC>;
1426    impl Ostdie {
1427        #[doc = "Disable oscillation stop detection interrupt (do not notify the POEG)"]
1428        pub const _0: Self = Self::new(0);
1429
1430        #[doc = "Enable oscillation stop detection interrupt (notify the POEG)"]
1431        pub const _1: Self = Self::new(1);
1432    }
1433    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1434    pub struct Ostde_SPEC;
1435    pub type Ostde = crate::EnumBitfieldStruct<u8, Ostde_SPEC>;
1436    impl Ostde {
1437        #[doc = "Disable oscillation stop detection function"]
1438        pub const _0: Self = Self::new(0);
1439
1440        #[doc = "Enable oscillation stop detection function"]
1441        pub const _1: Self = Self::new(1);
1442    }
1443}
1444#[doc(hidden)]
1445#[derive(Copy, Clone, Eq, PartialEq)]
1446pub struct Ostdsr_SPEC;
1447impl crate::sealed::RegSpec for Ostdsr_SPEC {
1448    type DataType = u8;
1449}
1450
1451#[doc = "Oscillation Stop Detection Status Register"]
1452pub type Ostdsr = crate::RegValueT<Ostdsr_SPEC>;
1453
1454impl Ostdsr {
1455    #[doc = "Oscillation Stop Detection Flag"]
1456    #[inline(always)]
1457    pub fn ostdf(
1458        self,
1459    ) -> crate::common::RegisterField<
1460        0,
1461        0x1,
1462        1,
1463        0,
1464        ostdsr::Ostdf,
1465        ostdsr::Ostdf,
1466        Ostdsr_SPEC,
1467        crate::common::RW,
1468    > {
1469        crate::common::RegisterField::<
1470            0,
1471            0x1,
1472            1,
1473            0,
1474            ostdsr::Ostdf,
1475            ostdsr::Ostdf,
1476            Ostdsr_SPEC,
1477            crate::common::RW,
1478        >::from_register(self, 0)
1479    }
1480}
1481impl ::core::default::Default for Ostdsr {
1482    #[inline(always)]
1483    fn default() -> Ostdsr {
1484        <crate::RegValueT<Ostdsr_SPEC> as RegisterValue<_>>::new(0)
1485    }
1486}
1487pub mod ostdsr {
1488
1489    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1490    pub struct Ostdf_SPEC;
1491    pub type Ostdf = crate::EnumBitfieldStruct<u8, Ostdf_SPEC>;
1492    impl Ostdf {
1493        #[doc = "Main clock oscillation stop not detected"]
1494        pub const _0: Self = Self::new(0);
1495
1496        #[doc = "Main clock oscillation stop detected"]
1497        pub const _1: Self = Self::new(1);
1498    }
1499}
1500#[doc(hidden)]
1501#[derive(Copy, Clone, Eq, PartialEq)]
1502pub struct Lpopt_SPEC;
1503impl crate::sealed::RegSpec for Lpopt_SPEC {
1504    type DataType = u8;
1505}
1506
1507#[doc = "Lower Power Operation Control Register"]
1508pub type Lpopt = crate::RegValueT<Lpopt_SPEC>;
1509
1510impl Lpopt {
1511    #[doc = "MPU Clock Disable Control"]
1512    #[inline(always)]
1513    pub fn mpudis(
1514        self,
1515    ) -> crate::common::RegisterField<
1516        0,
1517        0x1,
1518        1,
1519        0,
1520        lpopt::Mpudis,
1521        lpopt::Mpudis,
1522        Lpopt_SPEC,
1523        crate::common::RW,
1524    > {
1525        crate::common::RegisterField::<
1526            0,
1527            0x1,
1528            1,
1529            0,
1530            lpopt::Mpudis,
1531            lpopt::Mpudis,
1532            Lpopt_SPEC,
1533            crate::common::RW,
1534        >::from_register(self, 0)
1535    }
1536
1537    #[doc = "Debug Clock Disable Control"]
1538    #[inline(always)]
1539    pub fn dclkdis(
1540        self,
1541    ) -> crate::common::RegisterField<
1542        1,
1543        0x3,
1544        1,
1545        0,
1546        lpopt::Dclkdis,
1547        lpopt::Dclkdis,
1548        Lpopt_SPEC,
1549        crate::common::RW,
1550    > {
1551        crate::common::RegisterField::<
1552            1,
1553            0x3,
1554            1,
1555            0,
1556            lpopt::Dclkdis,
1557            lpopt::Dclkdis,
1558            Lpopt_SPEC,
1559            crate::common::RW,
1560        >::from_register(self, 0)
1561    }
1562
1563    #[doc = "BPF Clock Disable Control"]
1564    #[inline(always)]
1565    pub fn bpfclkdis(
1566        self,
1567    ) -> crate::common::RegisterField<
1568        3,
1569        0x1,
1570        1,
1571        0,
1572        lpopt::Bpfclkdis,
1573        lpopt::Bpfclkdis,
1574        Lpopt_SPEC,
1575        crate::common::RW,
1576    > {
1577        crate::common::RegisterField::<
1578            3,
1579            0x1,
1580            1,
1581            0,
1582            lpopt::Bpfclkdis,
1583            lpopt::Bpfclkdis,
1584            Lpopt_SPEC,
1585            crate::common::RW,
1586        >::from_register(self, 0)
1587    }
1588
1589    #[doc = "Lower Power Operation Enable"]
1590    #[inline(always)]
1591    pub fn lpopten(
1592        self,
1593    ) -> crate::common::RegisterField<
1594        7,
1595        0x1,
1596        1,
1597        0,
1598        lpopt::Lpopten,
1599        lpopt::Lpopten,
1600        Lpopt_SPEC,
1601        crate::common::RW,
1602    > {
1603        crate::common::RegisterField::<
1604            7,
1605            0x1,
1606            1,
1607            0,
1608            lpopt::Lpopten,
1609            lpopt::Lpopten,
1610            Lpopt_SPEC,
1611            crate::common::RW,
1612        >::from_register(self, 0)
1613    }
1614}
1615impl ::core::default::Default for Lpopt {
1616    #[inline(always)]
1617    fn default() -> Lpopt {
1618        <crate::RegValueT<Lpopt_SPEC> as RegisterValue<_>>::new(64)
1619    }
1620}
1621pub mod lpopt {
1622
1623    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1624    pub struct Mpudis_SPEC;
1625    pub type Mpudis = crate::EnumBitfieldStruct<u8, Mpudis_SPEC>;
1626    impl Mpudis {
1627        #[doc = "MPU operates as normal"]
1628        pub const _0: Self = Self::new(0);
1629
1630        #[doc = "MPU operate clock stops (MPU function disable)."]
1631        pub const _1: Self = Self::new(1);
1632    }
1633    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1634    pub struct Dclkdis_SPEC;
1635    pub type Dclkdis = crate::EnumBitfieldStruct<u8, Dclkdis_SPEC>;
1636    impl Dclkdis {
1637        #[doc = "Debug clock does not stop"]
1638        pub const _00: Self = Self::new(0);
1639    }
1640    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1641    pub struct Bpfclkdis_SPEC;
1642    pub type Bpfclkdis = crate::EnumBitfieldStruct<u8, Bpfclkdis_SPEC>;
1643    impl Bpfclkdis {
1644        #[doc = "Flash register R/W clock operates as normal"]
1645        pub const _0: Self = Self::new(0);
1646
1647        #[doc = "Flash register R/W clock stops."]
1648        pub const _1: Self = Self::new(1);
1649    }
1650    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1651    pub struct Lpopten_SPEC;
1652    pub type Lpopten = crate::EnumBitfieldStruct<u8, Lpopten_SPEC>;
1653    impl Lpopten {
1654        #[doc = "All lower power counter measure disable"]
1655        pub const _0: Self = Self::new(0);
1656
1657        #[doc = "All lower power counter measure enable"]
1658        pub const _1: Self = Self::new(1);
1659    }
1660}
1661#[doc(hidden)]
1662#[derive(Copy, Clone, Eq, PartialEq)]
1663pub struct Mocoutcr_SPEC;
1664impl crate::sealed::RegSpec for Mocoutcr_SPEC {
1665    type DataType = u8;
1666}
1667
1668#[doc = "MOCO User Trimming Control Register"]
1669pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
1670
1671impl Mocoutcr {
1672    #[doc = "MOCO User Trimming"]
1673    #[inline(always)]
1674    pub fn mocoutrm(
1675        self,
1676    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
1677        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
1678    }
1679}
1680impl ::core::default::Default for Mocoutcr {
1681    #[inline(always)]
1682    fn default() -> Mocoutcr {
1683        <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
1684    }
1685}
1686
1687#[doc(hidden)]
1688#[derive(Copy, Clone, Eq, PartialEq)]
1689pub struct Hocoutcr_SPEC;
1690impl crate::sealed::RegSpec for Hocoutcr_SPEC {
1691    type DataType = u8;
1692}
1693
1694#[doc = "HOCO User Trimming Control Register"]
1695pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
1696
1697impl Hocoutcr {
1698    #[doc = "HOCO User Trimming"]
1699    #[inline(always)]
1700    pub fn hocoutrm(
1701        self,
1702    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
1703        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
1704    }
1705}
1706impl ::core::default::Default for Hocoutcr {
1707    #[inline(always)]
1708    fn default() -> Hocoutcr {
1709        <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
1710    }
1711}
1712
1713#[doc(hidden)]
1714#[derive(Copy, Clone, Eq, PartialEq)]
1715pub struct Snzcr_SPEC;
1716impl crate::sealed::RegSpec for Snzcr_SPEC {
1717    type DataType = u8;
1718}
1719
1720#[doc = "Snooze Control Register"]
1721pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
1722
1723impl Snzcr {
1724    #[doc = "RXD0 Snooze Request Enable"]
1725    #[inline(always)]
1726    pub fn rxdreqen(
1727        self,
1728    ) -> crate::common::RegisterField<
1729        0,
1730        0x1,
1731        1,
1732        0,
1733        snzcr::Rxdreqen,
1734        snzcr::Rxdreqen,
1735        Snzcr_SPEC,
1736        crate::common::RW,
1737    > {
1738        crate::common::RegisterField::<
1739            0,
1740            0x1,
1741            1,
1742            0,
1743            snzcr::Rxdreqen,
1744            snzcr::Rxdreqen,
1745            Snzcr_SPEC,
1746            crate::common::RW,
1747        >::from_register(self, 0)
1748    }
1749
1750    #[doc = "DTC Enable in Snooze mode"]
1751    #[inline(always)]
1752    pub fn snzdtcen(
1753        self,
1754    ) -> crate::common::RegisterField<
1755        1,
1756        0x1,
1757        1,
1758        0,
1759        snzcr::Snzdtcen,
1760        snzcr::Snzdtcen,
1761        Snzcr_SPEC,
1762        crate::common::RW,
1763    > {
1764        crate::common::RegisterField::<
1765            1,
1766            0x1,
1767            1,
1768            0,
1769            snzcr::Snzdtcen,
1770            snzcr::Snzdtcen,
1771            Snzcr_SPEC,
1772            crate::common::RW,
1773        >::from_register(self, 0)
1774    }
1775
1776    #[doc = "Snooze mode Enable"]
1777    #[inline(always)]
1778    pub fn snze(
1779        self,
1780    ) -> crate::common::RegisterField<
1781        7,
1782        0x1,
1783        1,
1784        0,
1785        snzcr::Snze,
1786        snzcr::Snze,
1787        Snzcr_SPEC,
1788        crate::common::RW,
1789    > {
1790        crate::common::RegisterField::<
1791            7,
1792            0x1,
1793            1,
1794            0,
1795            snzcr::Snze,
1796            snzcr::Snze,
1797            Snzcr_SPEC,
1798            crate::common::RW,
1799        >::from_register(self, 0)
1800    }
1801}
1802impl ::core::default::Default for Snzcr {
1803    #[inline(always)]
1804    fn default() -> Snzcr {
1805        <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
1806    }
1807}
1808pub mod snzcr {
1809
1810    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1811    pub struct Rxdreqen_SPEC;
1812    pub type Rxdreqen = crate::EnumBitfieldStruct<u8, Rxdreqen_SPEC>;
1813    impl Rxdreqen {
1814        #[doc = "Ignore RXD0 falling edge in Software Standby mode"]
1815        pub const _0: Self = Self::new(0);
1816
1817        #[doc = "Detect RXD0 falling edge in Software Standby mode"]
1818        pub const _1: Self = Self::new(1);
1819    }
1820    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1821    pub struct Snzdtcen_SPEC;
1822    pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
1823    impl Snzdtcen {
1824        #[doc = "Disable DTC operation"]
1825        pub const _0: Self = Self::new(0);
1826
1827        #[doc = "Enable DTC operation"]
1828        pub const _1: Self = Self::new(1);
1829    }
1830    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1831    pub struct Snze_SPEC;
1832    pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
1833    impl Snze {
1834        #[doc = "Disable Snooze mode"]
1835        pub const _0: Self = Self::new(0);
1836
1837        #[doc = "Enable Snooze mode"]
1838        pub const _1: Self = Self::new(1);
1839    }
1840}
1841#[doc(hidden)]
1842#[derive(Copy, Clone, Eq, PartialEq)]
1843pub struct Snzedcr0_SPEC;
1844impl crate::sealed::RegSpec for Snzedcr0_SPEC {
1845    type DataType = u8;
1846}
1847
1848#[doc = "Snooze End Control Register 0"]
1849pub type Snzedcr0 = crate::RegValueT<Snzedcr0_SPEC>;
1850
1851impl Snzedcr0 {
1852    #[doc = "AGT1 Underflow Snooze End Enable"]
1853    #[inline(always)]
1854    pub fn agtunfed(
1855        self,
1856    ) -> crate::common::RegisterField<
1857        0,
1858        0x1,
1859        1,
1860        0,
1861        snzedcr0::Agtunfed,
1862        snzedcr0::Agtunfed,
1863        Snzedcr0_SPEC,
1864        crate::common::RW,
1865    > {
1866        crate::common::RegisterField::<
1867            0,
1868            0x1,
1869            1,
1870            0,
1871            snzedcr0::Agtunfed,
1872            snzedcr0::Agtunfed,
1873            Snzedcr0_SPEC,
1874            crate::common::RW,
1875        >::from_register(self, 0)
1876    }
1877
1878    #[doc = "Last DTC Transmission Completion Snooze End Enable"]
1879    #[inline(always)]
1880    pub fn dtczred(
1881        self,
1882    ) -> crate::common::RegisterField<
1883        1,
1884        0x1,
1885        1,
1886        0,
1887        snzedcr0::Dtczred,
1888        snzedcr0::Dtczred,
1889        Snzedcr0_SPEC,
1890        crate::common::RW,
1891    > {
1892        crate::common::RegisterField::<
1893            1,
1894            0x1,
1895            1,
1896            0,
1897            snzedcr0::Dtczred,
1898            snzedcr0::Dtczred,
1899            Snzedcr0_SPEC,
1900            crate::common::RW,
1901        >::from_register(self, 0)
1902    }
1903
1904    #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
1905    #[inline(always)]
1906    pub fn dtcnzred(
1907        self,
1908    ) -> crate::common::RegisterField<
1909        2,
1910        0x1,
1911        1,
1912        0,
1913        snzedcr0::Dtcnzred,
1914        snzedcr0::Dtcnzred,
1915        Snzedcr0_SPEC,
1916        crate::common::RW,
1917    > {
1918        crate::common::RegisterField::<
1919            2,
1920            0x1,
1921            1,
1922            0,
1923            snzedcr0::Dtcnzred,
1924            snzedcr0::Dtcnzred,
1925            Snzedcr0_SPEC,
1926            crate::common::RW,
1927        >::from_register(self, 0)
1928    }
1929
1930    #[doc = "ADC12 Compare Match Snooze End Enable"]
1931    #[inline(always)]
1932    pub fn ad0mated(
1933        self,
1934    ) -> crate::common::RegisterField<
1935        3,
1936        0x1,
1937        1,
1938        0,
1939        snzedcr0::Ad0Mated,
1940        snzedcr0::Ad0Mated,
1941        Snzedcr0_SPEC,
1942        crate::common::RW,
1943    > {
1944        crate::common::RegisterField::<
1945            3,
1946            0x1,
1947            1,
1948            0,
1949            snzedcr0::Ad0Mated,
1950            snzedcr0::Ad0Mated,
1951            Snzedcr0_SPEC,
1952            crate::common::RW,
1953        >::from_register(self, 0)
1954    }
1955
1956    #[doc = "ADC12 Compare Mismatch Snooze End Enable"]
1957    #[inline(always)]
1958    pub fn ad0umted(
1959        self,
1960    ) -> crate::common::RegisterField<
1961        4,
1962        0x1,
1963        1,
1964        0,
1965        snzedcr0::Ad0Umted,
1966        snzedcr0::Ad0Umted,
1967        Snzedcr0_SPEC,
1968        crate::common::RW,
1969    > {
1970        crate::common::RegisterField::<
1971            4,
1972            0x1,
1973            1,
1974            0,
1975            snzedcr0::Ad0Umted,
1976            snzedcr0::Ad0Umted,
1977            Snzedcr0_SPEC,
1978            crate::common::RW,
1979        >::from_register(self, 0)
1980    }
1981
1982    #[doc = "SCI0 Address Mismatch Snooze End Enable"]
1983    #[inline(always)]
1984    pub fn sci0umted(
1985        self,
1986    ) -> crate::common::RegisterField<
1987        7,
1988        0x1,
1989        1,
1990        0,
1991        snzedcr0::Sci0Umted,
1992        snzedcr0::Sci0Umted,
1993        Snzedcr0_SPEC,
1994        crate::common::RW,
1995    > {
1996        crate::common::RegisterField::<
1997            7,
1998            0x1,
1999            1,
2000            0,
2001            snzedcr0::Sci0Umted,
2002            snzedcr0::Sci0Umted,
2003            Snzedcr0_SPEC,
2004            crate::common::RW,
2005        >::from_register(self, 0)
2006    }
2007}
2008impl ::core::default::Default for Snzedcr0 {
2009    #[inline(always)]
2010    fn default() -> Snzedcr0 {
2011        <crate::RegValueT<Snzedcr0_SPEC> as RegisterValue<_>>::new(0)
2012    }
2013}
2014pub mod snzedcr0 {
2015
2016    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2017    pub struct Agtunfed_SPEC;
2018    pub type Agtunfed = crate::EnumBitfieldStruct<u8, Agtunfed_SPEC>;
2019    impl Agtunfed {
2020        #[doc = "Disable the snooze end request"]
2021        pub const _0: Self = Self::new(0);
2022
2023        #[doc = "Enable the snooze end request"]
2024        pub const _1: Self = Self::new(1);
2025    }
2026    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2027    pub struct Dtczred_SPEC;
2028    pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
2029    impl Dtczred {
2030        #[doc = "Disable the snooze end request"]
2031        pub const _0: Self = Self::new(0);
2032
2033        #[doc = "Enable the snooze end request"]
2034        pub const _1: Self = Self::new(1);
2035    }
2036    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2037    pub struct Dtcnzred_SPEC;
2038    pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
2039    impl Dtcnzred {
2040        #[doc = "Disable the snooze end request"]
2041        pub const _0: Self = Self::new(0);
2042
2043        #[doc = "Enable the snooze end request"]
2044        pub const _1: Self = Self::new(1);
2045    }
2046    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2047    pub struct Ad0Mated_SPEC;
2048    pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
2049    impl Ad0Mated {
2050        #[doc = "Disable the snooze end request"]
2051        pub const _0: Self = Self::new(0);
2052
2053        #[doc = "Enable the snooze end request"]
2054        pub const _1: Self = Self::new(1);
2055    }
2056    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2057    pub struct Ad0Umted_SPEC;
2058    pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
2059    impl Ad0Umted {
2060        #[doc = "Disable the snooze end request"]
2061        pub const _0: Self = Self::new(0);
2062
2063        #[doc = "Enable the snooze end request"]
2064        pub const _1: Self = Self::new(1);
2065    }
2066    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2067    pub struct Sci0Umted_SPEC;
2068    pub type Sci0Umted = crate::EnumBitfieldStruct<u8, Sci0Umted_SPEC>;
2069    impl Sci0Umted {
2070        #[doc = "Disable the snooze end request"]
2071        pub const _0: Self = Self::new(0);
2072
2073        #[doc = "Enable the snooze end request"]
2074        pub const _1: Self = Self::new(1);
2075    }
2076}
2077#[doc(hidden)]
2078#[derive(Copy, Clone, Eq, PartialEq)]
2079pub struct Snzreqcr0_SPEC;
2080impl crate::sealed::RegSpec for Snzreqcr0_SPEC {
2081    type DataType = u32;
2082}
2083
2084#[doc = "Snooze Request Control Register 0"]
2085pub type Snzreqcr0 = crate::RegValueT<Snzreqcr0_SPEC>;
2086
2087impl Snzreqcr0 {
2088    #[doc = "Enable IRQ0 pin snooze request"]
2089    #[inline(always)]
2090    pub fn snzreqen0(
2091        self,
2092    ) -> crate::common::RegisterField<
2093        0,
2094        0x1,
2095        1,
2096        0,
2097        snzreqcr0::Snzreqen0,
2098        snzreqcr0::Snzreqen0,
2099        Snzreqcr0_SPEC,
2100        crate::common::RW,
2101    > {
2102        crate::common::RegisterField::<
2103            0,
2104            0x1,
2105            1,
2106            0,
2107            snzreqcr0::Snzreqen0,
2108            snzreqcr0::Snzreqen0,
2109            Snzreqcr0_SPEC,
2110            crate::common::RW,
2111        >::from_register(self, 0)
2112    }
2113
2114    #[doc = "Enable IRQ1 pin snooze request"]
2115    #[inline(always)]
2116    pub fn snzreqen1(
2117        self,
2118    ) -> crate::common::RegisterField<
2119        1,
2120        0x1,
2121        1,
2122        0,
2123        snzreqcr0::Snzreqen1,
2124        snzreqcr0::Snzreqen1,
2125        Snzreqcr0_SPEC,
2126        crate::common::RW,
2127    > {
2128        crate::common::RegisterField::<
2129            1,
2130            0x1,
2131            1,
2132            0,
2133            snzreqcr0::Snzreqen1,
2134            snzreqcr0::Snzreqen1,
2135            Snzreqcr0_SPEC,
2136            crate::common::RW,
2137        >::from_register(self, 0)
2138    }
2139
2140    #[doc = "Enable IRQ2 pin snooze request"]
2141    #[inline(always)]
2142    pub fn snzreqen2(
2143        self,
2144    ) -> crate::common::RegisterField<
2145        2,
2146        0x1,
2147        1,
2148        0,
2149        snzreqcr0::Snzreqen2,
2150        snzreqcr0::Snzreqen2,
2151        Snzreqcr0_SPEC,
2152        crate::common::RW,
2153    > {
2154        crate::common::RegisterField::<
2155            2,
2156            0x1,
2157            1,
2158            0,
2159            snzreqcr0::Snzreqen2,
2160            snzreqcr0::Snzreqen2,
2161            Snzreqcr0_SPEC,
2162            crate::common::RW,
2163        >::from_register(self, 0)
2164    }
2165
2166    #[doc = "Enable IRQ3 pin snooze request"]
2167    #[inline(always)]
2168    pub fn snzreqen3(
2169        self,
2170    ) -> crate::common::RegisterField<
2171        3,
2172        0x1,
2173        1,
2174        0,
2175        snzreqcr0::Snzreqen3,
2176        snzreqcr0::Snzreqen3,
2177        Snzreqcr0_SPEC,
2178        crate::common::RW,
2179    > {
2180        crate::common::RegisterField::<
2181            3,
2182            0x1,
2183            1,
2184            0,
2185            snzreqcr0::Snzreqen3,
2186            snzreqcr0::Snzreqen3,
2187            Snzreqcr0_SPEC,
2188            crate::common::RW,
2189        >::from_register(self, 0)
2190    }
2191
2192    #[doc = "Enable IRQ4 pin snooze request"]
2193    #[inline(always)]
2194    pub fn snzreqen4(
2195        self,
2196    ) -> crate::common::RegisterField<
2197        4,
2198        0x1,
2199        1,
2200        0,
2201        snzreqcr0::Snzreqen4,
2202        snzreqcr0::Snzreqen4,
2203        Snzreqcr0_SPEC,
2204        crate::common::RW,
2205    > {
2206        crate::common::RegisterField::<
2207            4,
2208            0x1,
2209            1,
2210            0,
2211            snzreqcr0::Snzreqen4,
2212            snzreqcr0::Snzreqen4,
2213            Snzreqcr0_SPEC,
2214            crate::common::RW,
2215        >::from_register(self, 0)
2216    }
2217
2218    #[doc = "Enable IRQ5 pin snooze request"]
2219    #[inline(always)]
2220    pub fn snzreqen5(
2221        self,
2222    ) -> crate::common::RegisterField<
2223        5,
2224        0x1,
2225        1,
2226        0,
2227        snzreqcr0::Snzreqen5,
2228        snzreqcr0::Snzreqen5,
2229        Snzreqcr0_SPEC,
2230        crate::common::RW,
2231    > {
2232        crate::common::RegisterField::<
2233            5,
2234            0x1,
2235            1,
2236            0,
2237            snzreqcr0::Snzreqen5,
2238            snzreqcr0::Snzreqen5,
2239            Snzreqcr0_SPEC,
2240            crate::common::RW,
2241        >::from_register(self, 0)
2242    }
2243
2244    #[doc = "Enable IRQ6 pin snooze request"]
2245    #[inline(always)]
2246    pub fn snzreqen6(
2247        self,
2248    ) -> crate::common::RegisterField<
2249        6,
2250        0x1,
2251        1,
2252        0,
2253        snzreqcr0::Snzreqen6,
2254        snzreqcr0::Snzreqen6,
2255        Snzreqcr0_SPEC,
2256        crate::common::RW,
2257    > {
2258        crate::common::RegisterField::<
2259            6,
2260            0x1,
2261            1,
2262            0,
2263            snzreqcr0::Snzreqen6,
2264            snzreqcr0::Snzreqen6,
2265            Snzreqcr0_SPEC,
2266            crate::common::RW,
2267        >::from_register(self, 0)
2268    }
2269
2270    #[doc = "Enable IRQ7 pin snooze request"]
2271    #[inline(always)]
2272    pub fn snzreqen7(
2273        self,
2274    ) -> crate::common::RegisterField<
2275        7,
2276        0x1,
2277        1,
2278        0,
2279        snzreqcr0::Snzreqen7,
2280        snzreqcr0::Snzreqen7,
2281        Snzreqcr0_SPEC,
2282        crate::common::RW,
2283    > {
2284        crate::common::RegisterField::<
2285            7,
2286            0x1,
2287            1,
2288            0,
2289            snzreqcr0::Snzreqen7,
2290            snzreqcr0::Snzreqen7,
2291            Snzreqcr0_SPEC,
2292            crate::common::RW,
2293        >::from_register(self, 0)
2294    }
2295
2296    #[doc = "Enable KEY_INTKR snooze request"]
2297    #[inline(always)]
2298    pub fn snzreqen17(
2299        self,
2300    ) -> crate::common::RegisterField<
2301        17,
2302        0x1,
2303        1,
2304        0,
2305        snzreqcr0::Snzreqen17,
2306        snzreqcr0::Snzreqen17,
2307        Snzreqcr0_SPEC,
2308        crate::common::RW,
2309    > {
2310        crate::common::RegisterField::<
2311            17,
2312            0x1,
2313            1,
2314            0,
2315            snzreqcr0::Snzreqen17,
2316            snzreqcr0::Snzreqen17,
2317            Snzreqcr0_SPEC,
2318            crate::common::RW,
2319        >::from_register(self, 0)
2320    }
2321
2322    #[doc = "Enable RTC alarm snooze request"]
2323    #[inline(always)]
2324    pub fn snzreqen24(
2325        self,
2326    ) -> crate::common::RegisterField<
2327        24,
2328        0x1,
2329        1,
2330        0,
2331        snzreqcr0::Snzreqen24,
2332        snzreqcr0::Snzreqen24,
2333        Snzreqcr0_SPEC,
2334        crate::common::RW,
2335    > {
2336        crate::common::RegisterField::<
2337            24,
2338            0x1,
2339            1,
2340            0,
2341            snzreqcr0::Snzreqen24,
2342            snzreqcr0::Snzreqen24,
2343            Snzreqcr0_SPEC,
2344            crate::common::RW,
2345        >::from_register(self, 0)
2346    }
2347
2348    #[doc = "Enable RTC period snooze request"]
2349    #[inline(always)]
2350    pub fn snzreqen25(
2351        self,
2352    ) -> crate::common::RegisterField<
2353        25,
2354        0x1,
2355        1,
2356        0,
2357        snzreqcr0::Snzreqen25,
2358        snzreqcr0::Snzreqen25,
2359        Snzreqcr0_SPEC,
2360        crate::common::RW,
2361    > {
2362        crate::common::RegisterField::<
2363            25,
2364            0x1,
2365            1,
2366            0,
2367            snzreqcr0::Snzreqen25,
2368            snzreqcr0::Snzreqen25,
2369            Snzreqcr0_SPEC,
2370            crate::common::RW,
2371        >::from_register(self, 0)
2372    }
2373
2374    #[doc = "Enable AGT1 underflow snooze request"]
2375    #[inline(always)]
2376    pub fn snzreqen28(
2377        self,
2378    ) -> crate::common::RegisterField<
2379        28,
2380        0x1,
2381        1,
2382        0,
2383        snzreqcr0::Snzreqen28,
2384        snzreqcr0::Snzreqen28,
2385        Snzreqcr0_SPEC,
2386        crate::common::RW,
2387    > {
2388        crate::common::RegisterField::<
2389            28,
2390            0x1,
2391            1,
2392            0,
2393            snzreqcr0::Snzreqen28,
2394            snzreqcr0::Snzreqen28,
2395            Snzreqcr0_SPEC,
2396            crate::common::RW,
2397        >::from_register(self, 0)
2398    }
2399
2400    #[doc = "Enable AGT1 compare match A snooze request"]
2401    #[inline(always)]
2402    pub fn snzreqen29(
2403        self,
2404    ) -> crate::common::RegisterField<
2405        29,
2406        0x1,
2407        1,
2408        0,
2409        snzreqcr0::Snzreqen29,
2410        snzreqcr0::Snzreqen29,
2411        Snzreqcr0_SPEC,
2412        crate::common::RW,
2413    > {
2414        crate::common::RegisterField::<
2415            29,
2416            0x1,
2417            1,
2418            0,
2419            snzreqcr0::Snzreqen29,
2420            snzreqcr0::Snzreqen29,
2421            Snzreqcr0_SPEC,
2422            crate::common::RW,
2423        >::from_register(self, 0)
2424    }
2425
2426    #[doc = "Enable AGT1 compare match B snooze request"]
2427    #[inline(always)]
2428    pub fn snzreqen30(
2429        self,
2430    ) -> crate::common::RegisterField<
2431        30,
2432        0x1,
2433        1,
2434        0,
2435        snzreqcr0::Snzreqen30,
2436        snzreqcr0::Snzreqen30,
2437        Snzreqcr0_SPEC,
2438        crate::common::RW,
2439    > {
2440        crate::common::RegisterField::<
2441            30,
2442            0x1,
2443            1,
2444            0,
2445            snzreqcr0::Snzreqen30,
2446            snzreqcr0::Snzreqen30,
2447            Snzreqcr0_SPEC,
2448            crate::common::RW,
2449        >::from_register(self, 0)
2450    }
2451}
2452impl ::core::default::Default for Snzreqcr0 {
2453    #[inline(always)]
2454    fn default() -> Snzreqcr0 {
2455        <crate::RegValueT<Snzreqcr0_SPEC> as RegisterValue<_>>::new(0)
2456    }
2457}
2458pub mod snzreqcr0 {
2459
2460    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2461    pub struct Snzreqen0_SPEC;
2462    pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
2463    impl Snzreqen0 {
2464        #[doc = "Disable the snooze request"]
2465        pub const _0: Self = Self::new(0);
2466
2467        #[doc = "Enable the snooze request"]
2468        pub const _1: Self = Self::new(1);
2469    }
2470    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2471    pub struct Snzreqen1_SPEC;
2472    pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
2473    impl Snzreqen1 {
2474        #[doc = "Disable the snooze request"]
2475        pub const _0: Self = Self::new(0);
2476
2477        #[doc = "Enable the snooze request"]
2478        pub const _1: Self = Self::new(1);
2479    }
2480    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2481    pub struct Snzreqen2_SPEC;
2482    pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
2483    impl Snzreqen2 {
2484        #[doc = "Disable the snooze request"]
2485        pub const _0: Self = Self::new(0);
2486
2487        #[doc = "Enable the snooze request"]
2488        pub const _1: Self = Self::new(1);
2489    }
2490    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2491    pub struct Snzreqen3_SPEC;
2492    pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
2493    impl Snzreqen3 {
2494        #[doc = "Disable the snooze request"]
2495        pub const _0: Self = Self::new(0);
2496
2497        #[doc = "Enable the snooze request"]
2498        pub const _1: Self = Self::new(1);
2499    }
2500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2501    pub struct Snzreqen4_SPEC;
2502    pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
2503    impl Snzreqen4 {
2504        #[doc = "Disable the snooze request"]
2505        pub const _0: Self = Self::new(0);
2506
2507        #[doc = "Enable the snooze request"]
2508        pub const _1: Self = Self::new(1);
2509    }
2510    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2511    pub struct Snzreqen5_SPEC;
2512    pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
2513    impl Snzreqen5 {
2514        #[doc = "Disable the snooze request"]
2515        pub const _0: Self = Self::new(0);
2516
2517        #[doc = "Enable the snooze request"]
2518        pub const _1: Self = Self::new(1);
2519    }
2520    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2521    pub struct Snzreqen6_SPEC;
2522    pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
2523    impl Snzreqen6 {
2524        #[doc = "Disable the snooze request"]
2525        pub const _0: Self = Self::new(0);
2526
2527        #[doc = "Enable the snooze request"]
2528        pub const _1: Self = Self::new(1);
2529    }
2530    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2531    pub struct Snzreqen7_SPEC;
2532    pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
2533    impl Snzreqen7 {
2534        #[doc = "Disable the snooze request"]
2535        pub const _0: Self = Self::new(0);
2536
2537        #[doc = "Enable the snooze request"]
2538        pub const _1: Self = Self::new(1);
2539    }
2540    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2541    pub struct Snzreqen17_SPEC;
2542    pub type Snzreqen17 = crate::EnumBitfieldStruct<u8, Snzreqen17_SPEC>;
2543    impl Snzreqen17 {
2544        #[doc = "Disable the snooze request"]
2545        pub const _0: Self = Self::new(0);
2546
2547        #[doc = "Enable the snooze request"]
2548        pub const _1: Self = Self::new(1);
2549    }
2550    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2551    pub struct Snzreqen24_SPEC;
2552    pub type Snzreqen24 = crate::EnumBitfieldStruct<u8, Snzreqen24_SPEC>;
2553    impl Snzreqen24 {
2554        #[doc = "Disable the snooze request"]
2555        pub const _0: Self = Self::new(0);
2556
2557        #[doc = "Enable the snooze request"]
2558        pub const _1: Self = Self::new(1);
2559    }
2560    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2561    pub struct Snzreqen25_SPEC;
2562    pub type Snzreqen25 = crate::EnumBitfieldStruct<u8, Snzreqen25_SPEC>;
2563    impl Snzreqen25 {
2564        #[doc = "Disable the snooze request"]
2565        pub const _0: Self = Self::new(0);
2566
2567        #[doc = "Enable the snooze request"]
2568        pub const _1: Self = Self::new(1);
2569    }
2570    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2571    pub struct Snzreqen28_SPEC;
2572    pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
2573    impl Snzreqen28 {
2574        #[doc = "Disable the snooze request"]
2575        pub const _0: Self = Self::new(0);
2576
2577        #[doc = "Enable the snooze request"]
2578        pub const _1: Self = Self::new(1);
2579    }
2580    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2581    pub struct Snzreqen29_SPEC;
2582    pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
2583    impl Snzreqen29 {
2584        #[doc = "Disable the snooze request"]
2585        pub const _0: Self = Self::new(0);
2586
2587        #[doc = "Enable the snooze request"]
2588        pub const _1: Self = Self::new(1);
2589    }
2590    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2591    pub struct Snzreqen30_SPEC;
2592    pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
2593    impl Snzreqen30 {
2594        #[doc = "Disable the snooze request"]
2595        pub const _0: Self = Self::new(0);
2596
2597        #[doc = "Enable the snooze request"]
2598        pub const _1: Self = Self::new(1);
2599    }
2600}
2601#[doc(hidden)]
2602#[derive(Copy, Clone, Eq, PartialEq)]
2603pub struct Psmcr_SPEC;
2604impl crate::sealed::RegSpec for Psmcr_SPEC {
2605    type DataType = u8;
2606}
2607
2608#[doc = "Power Save Memory Control Register"]
2609pub type Psmcr = crate::RegValueT<Psmcr_SPEC>;
2610
2611impl Psmcr {
2612    #[doc = "Power Save Memory Control"]
2613    #[inline(always)]
2614    pub fn psmc(
2615        self,
2616    ) -> crate::common::RegisterField<
2617        0,
2618        0x3,
2619        1,
2620        0,
2621        psmcr::Psmc,
2622        psmcr::Psmc,
2623        Psmcr_SPEC,
2624        crate::common::RW,
2625    > {
2626        crate::common::RegisterField::<
2627            0,
2628            0x3,
2629            1,
2630            0,
2631            psmcr::Psmc,
2632            psmcr::Psmc,
2633            Psmcr_SPEC,
2634            crate::common::RW,
2635        >::from_register(self, 0)
2636    }
2637}
2638impl ::core::default::Default for Psmcr {
2639    #[inline(always)]
2640    fn default() -> Psmcr {
2641        <crate::RegValueT<Psmcr_SPEC> as RegisterValue<_>>::new(0)
2642    }
2643}
2644pub mod psmcr {
2645
2646    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2647    pub struct Psmc_SPEC;
2648    pub type Psmc = crate::EnumBitfieldStruct<u8, Psmc_SPEC>;
2649    impl Psmc {
2650        #[doc = "All SRAMs are on in Software Standby mode"]
2651        pub const _00: Self = Self::new(0);
2652
2653        #[doc = "8 KB SRAM (0x2000_4000 to 0x2000_5FFF) is on in Software Standby mode"]
2654        pub const _01: Self = Self::new(1);
2655
2656        #[doc = "Setting prohibited"]
2657        pub const _10: Self = Self::new(2);
2658
2659        #[doc = "Setting prohibited"]
2660        pub const _11: Self = Self::new(3);
2661    }
2662}
2663#[doc(hidden)]
2664#[derive(Copy, Clone, Eq, PartialEq)]
2665pub struct Opccr_SPEC;
2666impl crate::sealed::RegSpec for Opccr_SPEC {
2667    type DataType = u8;
2668}
2669
2670#[doc = "Operating Power Control Register"]
2671pub type Opccr = crate::RegValueT<Opccr_SPEC>;
2672
2673impl Opccr {
2674    #[doc = "Operating Power Control Mode Select"]
2675    #[inline(always)]
2676    pub fn opcm(
2677        self,
2678    ) -> crate::common::RegisterField<
2679        0,
2680        0x3,
2681        1,
2682        0,
2683        opccr::Opcm,
2684        opccr::Opcm,
2685        Opccr_SPEC,
2686        crate::common::RW,
2687    > {
2688        crate::common::RegisterField::<
2689            0,
2690            0x3,
2691            1,
2692            0,
2693            opccr::Opcm,
2694            opccr::Opcm,
2695            Opccr_SPEC,
2696            crate::common::RW,
2697        >::from_register(self, 0)
2698    }
2699
2700    #[doc = "Operating Power Control Mode Transition Status Flag"]
2701    #[inline(always)]
2702    pub fn opcmtsf(
2703        self,
2704    ) -> crate::common::RegisterField<
2705        4,
2706        0x1,
2707        1,
2708        0,
2709        opccr::Opcmtsf,
2710        opccr::Opcmtsf,
2711        Opccr_SPEC,
2712        crate::common::R,
2713    > {
2714        crate::common::RegisterField::<
2715            4,
2716            0x1,
2717            1,
2718            0,
2719            opccr::Opcmtsf,
2720            opccr::Opcmtsf,
2721            Opccr_SPEC,
2722            crate::common::R,
2723        >::from_register(self, 0)
2724    }
2725}
2726impl ::core::default::Default for Opccr {
2727    #[inline(always)]
2728    fn default() -> Opccr {
2729        <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(1)
2730    }
2731}
2732pub mod opccr {
2733
2734    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2735    pub struct Opcm_SPEC;
2736    pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
2737    impl Opcm {
2738        #[doc = "High-speed mode"]
2739        pub const _00: Self = Self::new(0);
2740
2741        #[doc = "Middle-speed mode"]
2742        pub const _01: Self = Self::new(1);
2743
2744        #[doc = "Setting prohibited"]
2745        pub const _10: Self = Self::new(2);
2746
2747        #[doc = "Low-speed mode"]
2748        pub const _11: Self = Self::new(3);
2749    }
2750    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2751    pub struct Opcmtsf_SPEC;
2752    pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
2753    impl Opcmtsf {
2754        #[doc = "Transition completed"]
2755        pub const _0: Self = Self::new(0);
2756
2757        #[doc = "During transition"]
2758        pub const _1: Self = Self::new(1);
2759    }
2760}
2761#[doc(hidden)]
2762#[derive(Copy, Clone, Eq, PartialEq)]
2763pub struct Moscwtcr_SPEC;
2764impl crate::sealed::RegSpec for Moscwtcr_SPEC {
2765    type DataType = u8;
2766}
2767
2768#[doc = "Main Clock Oscillator Wait Control Register"]
2769pub type Moscwtcr = crate::RegValueT<Moscwtcr_SPEC>;
2770
2771impl Moscwtcr {
2772    #[doc = "Main Clock Oscillator Wait Time Setting"]
2773    #[inline(always)]
2774    pub fn msts(
2775        self,
2776    ) -> crate::common::RegisterField<
2777        0,
2778        0xf,
2779        1,
2780        0,
2781        moscwtcr::Msts,
2782        moscwtcr::Msts,
2783        Moscwtcr_SPEC,
2784        crate::common::RW,
2785    > {
2786        crate::common::RegisterField::<
2787            0,
2788            0xf,
2789            1,
2790            0,
2791            moscwtcr::Msts,
2792            moscwtcr::Msts,
2793            Moscwtcr_SPEC,
2794            crate::common::RW,
2795        >::from_register(self, 0)
2796    }
2797}
2798impl ::core::default::Default for Moscwtcr {
2799    #[inline(always)]
2800    fn default() -> Moscwtcr {
2801        <crate::RegValueT<Moscwtcr_SPEC> as RegisterValue<_>>::new(5)
2802    }
2803}
2804pub mod moscwtcr {
2805
2806    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2807    pub struct Msts_SPEC;
2808    pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
2809    impl Msts {
2810        #[doc = "Wait time = 2 cycles (0.25 us)"]
2811        pub const _0_X_0: Self = Self::new(0);
2812
2813        #[doc = "Wait time = 1024 cycles (128 us)"]
2814        pub const _0_X_1: Self = Self::new(1);
2815
2816        #[doc = "Wait time = 2048 cycles (256 us)"]
2817        pub const _0_X_2: Self = Self::new(2);
2818
2819        #[doc = "Wait time = 4096 cycles (512 us)"]
2820        pub const _0_X_3: Self = Self::new(3);
2821
2822        #[doc = "Wait time = 8192 cycles (1024 us)"]
2823        pub const _0_X_4: Self = Self::new(4);
2824
2825        #[doc = "Wait time = 16384 cycles (2048 us)"]
2826        pub const _0_X_5: Self = Self::new(5);
2827
2828        #[doc = "Wait time = 32768 cycles (4096 us)"]
2829        pub const _0_X_6: Self = Self::new(6);
2830
2831        #[doc = "Wait time = 65536 cycles (8192 us)"]
2832        pub const _0_X_7: Self = Self::new(7);
2833
2834        #[doc = "Wait time = 131072 cycles (16384 us)"]
2835        pub const _0_X_8: Self = Self::new(8);
2836
2837        #[doc = "Wait time = 262144 cycles (32768 us)"]
2838        pub const _0_X_9: Self = Self::new(9);
2839    }
2840}
2841#[doc(hidden)]
2842#[derive(Copy, Clone, Eq, PartialEq)]
2843pub struct Hocowtcr_SPEC;
2844impl crate::sealed::RegSpec for Hocowtcr_SPEC {
2845    type DataType = u8;
2846}
2847
2848#[doc = "High-Speed On-Chip Oscillator Wait Control Register"]
2849pub type Hocowtcr = crate::RegValueT<Hocowtcr_SPEC>;
2850
2851impl Hocowtcr {
2852    #[doc = "HOCO Wait Time Setting"]
2853    #[inline(always)]
2854    pub fn hsts(
2855        self,
2856    ) -> crate::common::RegisterField<
2857        0,
2858        0x7,
2859        1,
2860        0,
2861        hocowtcr::Hsts,
2862        hocowtcr::Hsts,
2863        Hocowtcr_SPEC,
2864        crate::common::RW,
2865    > {
2866        crate::common::RegisterField::<
2867            0,
2868            0x7,
2869            1,
2870            0,
2871            hocowtcr::Hsts,
2872            hocowtcr::Hsts,
2873            Hocowtcr_SPEC,
2874            crate::common::RW,
2875        >::from_register(self, 0)
2876    }
2877}
2878impl ::core::default::Default for Hocowtcr {
2879    #[inline(always)]
2880    fn default() -> Hocowtcr {
2881        <crate::RegValueT<Hocowtcr_SPEC> as RegisterValue<_>>::new(5)
2882    }
2883}
2884pub mod hocowtcr {
2885
2886    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2887    pub struct Hsts_SPEC;
2888    pub type Hsts = crate::EnumBitfieldStruct<u8, Hsts_SPEC>;
2889    impl Hsts {
2890        #[doc = "Value after reset."]
2891        pub const _101: Self = Self::new(5);
2892
2893        #[doc = "Before starting high-speed on-chip oscillator by setting HOCOCR.HCSTP bit, the HSTS\\[2:0\\] bits must be set to 011b beforehand. Wait time = 46 cycles (5.75 µs) Wait time is calculated at MOCO = 8 MHz (typically 0.125 µs)."]
2894        pub const _011: Self = Self::new(3);
2895    }
2896}
2897#[doc(hidden)]
2898#[derive(Copy, Clone, Eq, PartialEq)]
2899pub struct Sopccr_SPEC;
2900impl crate::sealed::RegSpec for Sopccr_SPEC {
2901    type DataType = u8;
2902}
2903
2904#[doc = "Sub Operating Power Control Register"]
2905pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
2906
2907impl Sopccr {
2908    #[doc = "Sub Operating Power Control Mode Select"]
2909    #[inline(always)]
2910    pub fn sopcm(
2911        self,
2912    ) -> crate::common::RegisterField<
2913        0,
2914        0x1,
2915        1,
2916        0,
2917        sopccr::Sopcm,
2918        sopccr::Sopcm,
2919        Sopccr_SPEC,
2920        crate::common::RW,
2921    > {
2922        crate::common::RegisterField::<
2923            0,
2924            0x1,
2925            1,
2926            0,
2927            sopccr::Sopcm,
2928            sopccr::Sopcm,
2929            Sopccr_SPEC,
2930            crate::common::RW,
2931        >::from_register(self, 0)
2932    }
2933
2934    #[doc = "Operating Power Control Mode Transition Status Flag"]
2935    #[inline(always)]
2936    pub fn sopcmtsf(
2937        self,
2938    ) -> crate::common::RegisterField<
2939        4,
2940        0x1,
2941        1,
2942        0,
2943        sopccr::Sopcmtsf,
2944        sopccr::Sopcmtsf,
2945        Sopccr_SPEC,
2946        crate::common::R,
2947    > {
2948        crate::common::RegisterField::<
2949            4,
2950            0x1,
2951            1,
2952            0,
2953            sopccr::Sopcmtsf,
2954            sopccr::Sopcmtsf,
2955            Sopccr_SPEC,
2956            crate::common::R,
2957        >::from_register(self, 0)
2958    }
2959}
2960impl ::core::default::Default for Sopccr {
2961    #[inline(always)]
2962    fn default() -> Sopccr {
2963        <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
2964    }
2965}
2966pub mod sopccr {
2967
2968    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2969    pub struct Sopcm_SPEC;
2970    pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
2971    impl Sopcm {
2972        #[doc = "Other than Subosc-speed mode"]
2973        pub const _0: Self = Self::new(0);
2974
2975        #[doc = "Subosc-speed mode"]
2976        pub const _1: Self = Self::new(1);
2977    }
2978    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2979    pub struct Sopcmtsf_SPEC;
2980    pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
2981    impl Sopcmtsf {
2982        #[doc = "Transition completed"]
2983        pub const _0: Self = Self::new(0);
2984
2985        #[doc = "During transition"]
2986        pub const _1: Self = Self::new(1);
2987    }
2988}
2989#[doc(hidden)]
2990#[derive(Copy, Clone, Eq, PartialEq)]
2991pub struct Rstsr1_SPEC;
2992impl crate::sealed::RegSpec for Rstsr1_SPEC {
2993    type DataType = u16;
2994}
2995
2996#[doc = "Reset Status Register 1"]
2997pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
2998
2999impl Rstsr1 {
3000    #[doc = "Independent Watchdog Timer Reset Detect Flag"]
3001    #[inline(always)]
3002    pub fn iwdtrf(
3003        self,
3004    ) -> crate::common::RegisterField<
3005        0,
3006        0x1,
3007        1,
3008        0,
3009        rstsr1::Iwdtrf,
3010        rstsr1::Iwdtrf,
3011        Rstsr1_SPEC,
3012        crate::common::RW,
3013    > {
3014        crate::common::RegisterField::<
3015            0,
3016            0x1,
3017            1,
3018            0,
3019            rstsr1::Iwdtrf,
3020            rstsr1::Iwdtrf,
3021            Rstsr1_SPEC,
3022            crate::common::RW,
3023        >::from_register(self, 0)
3024    }
3025
3026    #[doc = "Watchdog Timer Reset Detect Flag"]
3027    #[inline(always)]
3028    pub fn wdtrf(
3029        self,
3030    ) -> crate::common::RegisterField<
3031        1,
3032        0x1,
3033        1,
3034        0,
3035        rstsr1::Wdtrf,
3036        rstsr1::Wdtrf,
3037        Rstsr1_SPEC,
3038        crate::common::RW,
3039    > {
3040        crate::common::RegisterField::<
3041            1,
3042            0x1,
3043            1,
3044            0,
3045            rstsr1::Wdtrf,
3046            rstsr1::Wdtrf,
3047            Rstsr1_SPEC,
3048            crate::common::RW,
3049        >::from_register(self, 0)
3050    }
3051
3052    #[doc = "Software Reset Detect Flag"]
3053    #[inline(always)]
3054    pub fn swrf(
3055        self,
3056    ) -> crate::common::RegisterField<
3057        2,
3058        0x1,
3059        1,
3060        0,
3061        rstsr1::Swrf,
3062        rstsr1::Swrf,
3063        Rstsr1_SPEC,
3064        crate::common::RW,
3065    > {
3066        crate::common::RegisterField::<
3067            2,
3068            0x1,
3069            1,
3070            0,
3071            rstsr1::Swrf,
3072            rstsr1::Swrf,
3073            Rstsr1_SPEC,
3074            crate::common::RW,
3075        >::from_register(self, 0)
3076    }
3077
3078    #[doc = "SRAM Parity Error Reset Detect Flag"]
3079    #[inline(always)]
3080    pub fn rperf(
3081        self,
3082    ) -> crate::common::RegisterField<
3083        8,
3084        0x1,
3085        1,
3086        0,
3087        rstsr1::Rperf,
3088        rstsr1::Rperf,
3089        Rstsr1_SPEC,
3090        crate::common::RW,
3091    > {
3092        crate::common::RegisterField::<
3093            8,
3094            0x1,
3095            1,
3096            0,
3097            rstsr1::Rperf,
3098            rstsr1::Rperf,
3099            Rstsr1_SPEC,
3100            crate::common::RW,
3101        >::from_register(self, 0)
3102    }
3103
3104    #[doc = "Bus Slave MPU Error Reset Detect Flag"]
3105    #[inline(always)]
3106    pub fn bussrf(
3107        self,
3108    ) -> crate::common::RegisterField<
3109        10,
3110        0x1,
3111        1,
3112        0,
3113        rstsr1::Bussrf,
3114        rstsr1::Bussrf,
3115        Rstsr1_SPEC,
3116        crate::common::RW,
3117    > {
3118        crate::common::RegisterField::<
3119            10,
3120            0x1,
3121            1,
3122            0,
3123            rstsr1::Bussrf,
3124            rstsr1::Bussrf,
3125            Rstsr1_SPEC,
3126            crate::common::RW,
3127        >::from_register(self, 0)
3128    }
3129
3130    #[doc = "Bus Master MPU Error Reset Detect Flag"]
3131    #[inline(always)]
3132    pub fn busmrf(
3133        self,
3134    ) -> crate::common::RegisterField<
3135        11,
3136        0x1,
3137        1,
3138        0,
3139        rstsr1::Busmrf,
3140        rstsr1::Busmrf,
3141        Rstsr1_SPEC,
3142        crate::common::RW,
3143    > {
3144        crate::common::RegisterField::<
3145            11,
3146            0x1,
3147            1,
3148            0,
3149            rstsr1::Busmrf,
3150            rstsr1::Busmrf,
3151            Rstsr1_SPEC,
3152            crate::common::RW,
3153        >::from_register(self, 0)
3154    }
3155
3156    #[doc = "CPU Stack Pointer Error Reset Detect Flag"]
3157    #[inline(always)]
3158    pub fn sperf(
3159        self,
3160    ) -> crate::common::RegisterField<
3161        12,
3162        0x1,
3163        1,
3164        0,
3165        rstsr1::Sperf,
3166        rstsr1::Sperf,
3167        Rstsr1_SPEC,
3168        crate::common::RW,
3169    > {
3170        crate::common::RegisterField::<
3171            12,
3172            0x1,
3173            1,
3174            0,
3175            rstsr1::Sperf,
3176            rstsr1::Sperf,
3177            Rstsr1_SPEC,
3178            crate::common::RW,
3179        >::from_register(self, 0)
3180    }
3181}
3182impl ::core::default::Default for Rstsr1 {
3183    #[inline(always)]
3184    fn default() -> Rstsr1 {
3185        <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
3186    }
3187}
3188pub mod rstsr1 {
3189
3190    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3191    pub struct Iwdtrf_SPEC;
3192    pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
3193    impl Iwdtrf {
3194        #[doc = "Independent watchdog timer reset not detected"]
3195        pub const _0: Self = Self::new(0);
3196
3197        #[doc = "Independent watchdog timer reset detected"]
3198        pub const _1: Self = Self::new(1);
3199    }
3200    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3201    pub struct Wdtrf_SPEC;
3202    pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
3203    impl Wdtrf {
3204        #[doc = "Watchdog timer reset not detected"]
3205        pub const _0: Self = Self::new(0);
3206
3207        #[doc = "Watchdog timer reset detected"]
3208        pub const _1: Self = Self::new(1);
3209    }
3210    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3211    pub struct Swrf_SPEC;
3212    pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
3213    impl Swrf {
3214        #[doc = "Software reset not detected"]
3215        pub const _0: Self = Self::new(0);
3216
3217        #[doc = "Software reset detected"]
3218        pub const _1: Self = Self::new(1);
3219    }
3220    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3221    pub struct Rperf_SPEC;
3222    pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
3223    impl Rperf {
3224        #[doc = "SRAM parity error reset not detected"]
3225        pub const _0: Self = Self::new(0);
3226
3227        #[doc = "SRAM parity error reset detected"]
3228        pub const _1: Self = Self::new(1);
3229    }
3230    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3231    pub struct Bussrf_SPEC;
3232    pub type Bussrf = crate::EnumBitfieldStruct<u8, Bussrf_SPEC>;
3233    impl Bussrf {
3234        #[doc = "Bus slave MPU error reset not detected"]
3235        pub const _0: Self = Self::new(0);
3236
3237        #[doc = "Bus slave MPU error reset detected"]
3238        pub const _1: Self = Self::new(1);
3239    }
3240    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3241    pub struct Busmrf_SPEC;
3242    pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
3243    impl Busmrf {
3244        #[doc = "Bus master MPU error reset not detected"]
3245        pub const _0: Self = Self::new(0);
3246
3247        #[doc = "Bus master MPU error reset detected"]
3248        pub const _1: Self = Self::new(1);
3249    }
3250    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3251    pub struct Sperf_SPEC;
3252    pub type Sperf = crate::EnumBitfieldStruct<u8, Sperf_SPEC>;
3253    impl Sperf {
3254        #[doc = "CPU stack pointer error reset not detected"]
3255        pub const _0: Self = Self::new(0);
3256
3257        #[doc = "CPU stack pointer error reset detected"]
3258        pub const _1: Self = Self::new(1);
3259    }
3260}
3261#[doc(hidden)]
3262#[derive(Copy, Clone, Eq, PartialEq)]
3263pub struct Lvd1Cr1_SPEC;
3264impl crate::sealed::RegSpec for Lvd1Cr1_SPEC {
3265    type DataType = u8;
3266}
3267
3268#[doc = "Voltage Monitor 1 Circuit Control Register"]
3269pub type Lvd1Cr1 = crate::RegValueT<Lvd1Cr1_SPEC>;
3270
3271impl Lvd1Cr1 {
3272    #[doc = "Voltage Monitor 1 Interrupt Generation Condition Select"]
3273    #[inline(always)]
3274    pub fn idtsel(
3275        self,
3276    ) -> crate::common::RegisterField<
3277        0,
3278        0x3,
3279        1,
3280        0,
3281        lvd1cr1::Idtsel,
3282        lvd1cr1::Idtsel,
3283        Lvd1Cr1_SPEC,
3284        crate::common::RW,
3285    > {
3286        crate::common::RegisterField::<
3287            0,
3288            0x3,
3289            1,
3290            0,
3291            lvd1cr1::Idtsel,
3292            lvd1cr1::Idtsel,
3293            Lvd1Cr1_SPEC,
3294            crate::common::RW,
3295        >::from_register(self, 0)
3296    }
3297
3298    #[doc = "Voltage Monitor 1 Interrupt Type Select"]
3299    #[inline(always)]
3300    pub fn irqsel(
3301        self,
3302    ) -> crate::common::RegisterField<
3303        2,
3304        0x1,
3305        1,
3306        0,
3307        lvd1cr1::Irqsel,
3308        lvd1cr1::Irqsel,
3309        Lvd1Cr1_SPEC,
3310        crate::common::RW,
3311    > {
3312        crate::common::RegisterField::<
3313            2,
3314            0x1,
3315            1,
3316            0,
3317            lvd1cr1::Irqsel,
3318            lvd1cr1::Irqsel,
3319            Lvd1Cr1_SPEC,
3320            crate::common::RW,
3321        >::from_register(self, 0)
3322    }
3323}
3324impl ::core::default::Default for Lvd1Cr1 {
3325    #[inline(always)]
3326    fn default() -> Lvd1Cr1 {
3327        <crate::RegValueT<Lvd1Cr1_SPEC> as RegisterValue<_>>::new(1)
3328    }
3329}
3330pub mod lvd1cr1 {
3331
3332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3333    pub struct Idtsel_SPEC;
3334    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
3335    impl Idtsel {
3336        #[doc = "When VCC >= Vdet1 (rise) is detected"]
3337        pub const _00: Self = Self::new(0);
3338
3339        #[doc = "When VCC < Vdet1 (fall) is detected"]
3340        pub const _01: Self = Self::new(1);
3341
3342        #[doc = "When fall and rise are detected"]
3343        pub const _10: Self = Self::new(2);
3344
3345        #[doc = "Settings prohibited"]
3346        pub const _11: Self = Self::new(3);
3347    }
3348    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3349    pub struct Irqsel_SPEC;
3350    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
3351    impl Irqsel {
3352        #[doc = "Non-maskable interrupt"]
3353        pub const _0: Self = Self::new(0);
3354
3355        #[doc = "Maskable interrupt"]
3356        pub const _1: Self = Self::new(1);
3357    }
3358}
3359#[doc(hidden)]
3360#[derive(Copy, Clone, Eq, PartialEq)]
3361pub struct Lvd1Sr_SPEC;
3362impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
3363    type DataType = u8;
3364}
3365
3366#[doc = "Voltage Monitor 1 Circuit Status Register"]
3367pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
3368
3369impl Lvd1Sr {
3370    #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
3371    #[inline(always)]
3372    pub fn det(
3373        self,
3374    ) -> crate::common::RegisterField<
3375        0,
3376        0x1,
3377        1,
3378        0,
3379        lvd1sr::Det,
3380        lvd1sr::Det,
3381        Lvd1Sr_SPEC,
3382        crate::common::RW,
3383    > {
3384        crate::common::RegisterField::<
3385            0,
3386            0x1,
3387            1,
3388            0,
3389            lvd1sr::Det,
3390            lvd1sr::Det,
3391            Lvd1Sr_SPEC,
3392            crate::common::RW,
3393        >::from_register(self, 0)
3394    }
3395
3396    #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
3397    #[inline(always)]
3398    pub fn mon(
3399        self,
3400    ) -> crate::common::RegisterField<
3401        1,
3402        0x1,
3403        1,
3404        0,
3405        lvd1sr::Mon,
3406        lvd1sr::Mon,
3407        Lvd1Sr_SPEC,
3408        crate::common::R,
3409    > {
3410        crate::common::RegisterField::<
3411            1,
3412            0x1,
3413            1,
3414            0,
3415            lvd1sr::Mon,
3416            lvd1sr::Mon,
3417            Lvd1Sr_SPEC,
3418            crate::common::R,
3419        >::from_register(self, 0)
3420    }
3421}
3422impl ::core::default::Default for Lvd1Sr {
3423    #[inline(always)]
3424    fn default() -> Lvd1Sr {
3425        <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
3426    }
3427}
3428pub mod lvd1sr {
3429
3430    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3431    pub struct Det_SPEC;
3432    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
3433    impl Det {
3434        #[doc = "Not detected"]
3435        pub const _0: Self = Self::new(0);
3436
3437        #[doc = "Vdet1 crossing is detected"]
3438        pub const _1: Self = Self::new(1);
3439    }
3440    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3441    pub struct Mon_SPEC;
3442    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
3443    impl Mon {
3444        #[doc = "VCC < Vdet1"]
3445        pub const _0: Self = Self::new(0);
3446
3447        #[doc = "VCC >= Vdet1 or MON is disabled"]
3448        pub const _1: Self = Self::new(1);
3449    }
3450}
3451#[doc(hidden)]
3452#[derive(Copy, Clone, Eq, PartialEq)]
3453pub struct Lvd2Cr1_SPEC;
3454impl crate::sealed::RegSpec for Lvd2Cr1_SPEC {
3455    type DataType = u8;
3456}
3457
3458#[doc = "Voltage Monitor 2 Circuit Control Register 1"]
3459pub type Lvd2Cr1 = crate::RegValueT<Lvd2Cr1_SPEC>;
3460
3461impl Lvd2Cr1 {
3462    #[doc = "Voltage Monitor 2 Interrupt Generation Condition Select"]
3463    #[inline(always)]
3464    pub fn idtsel(
3465        self,
3466    ) -> crate::common::RegisterField<
3467        0,
3468        0x3,
3469        1,
3470        0,
3471        lvd2cr1::Idtsel,
3472        lvd2cr1::Idtsel,
3473        Lvd2Cr1_SPEC,
3474        crate::common::RW,
3475    > {
3476        crate::common::RegisterField::<
3477            0,
3478            0x3,
3479            1,
3480            0,
3481            lvd2cr1::Idtsel,
3482            lvd2cr1::Idtsel,
3483            Lvd2Cr1_SPEC,
3484            crate::common::RW,
3485        >::from_register(self, 0)
3486    }
3487
3488    #[doc = "Voltage Monitor 2 Interrupt Type Select"]
3489    #[inline(always)]
3490    pub fn irqsel(
3491        self,
3492    ) -> crate::common::RegisterField<
3493        2,
3494        0x1,
3495        1,
3496        0,
3497        lvd2cr1::Irqsel,
3498        lvd2cr1::Irqsel,
3499        Lvd2Cr1_SPEC,
3500        crate::common::RW,
3501    > {
3502        crate::common::RegisterField::<
3503            2,
3504            0x1,
3505            1,
3506            0,
3507            lvd2cr1::Irqsel,
3508            lvd2cr1::Irqsel,
3509            Lvd2Cr1_SPEC,
3510            crate::common::RW,
3511        >::from_register(self, 0)
3512    }
3513}
3514impl ::core::default::Default for Lvd2Cr1 {
3515    #[inline(always)]
3516    fn default() -> Lvd2Cr1 {
3517        <crate::RegValueT<Lvd2Cr1_SPEC> as RegisterValue<_>>::new(1)
3518    }
3519}
3520pub mod lvd2cr1 {
3521
3522    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3523    pub struct Idtsel_SPEC;
3524    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
3525    impl Idtsel {
3526        #[doc = "When VCC >= Vdet2 (rise) is detected"]
3527        pub const _00: Self = Self::new(0);
3528
3529        #[doc = "When VCC < Vdet2 (fall) is detected"]
3530        pub const _01: Self = Self::new(1);
3531
3532        #[doc = "When fall and rise are detected"]
3533        pub const _10: Self = Self::new(2);
3534
3535        #[doc = "Settings prohibited"]
3536        pub const _11: Self = Self::new(3);
3537    }
3538    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3539    pub struct Irqsel_SPEC;
3540    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
3541    impl Irqsel {
3542        #[doc = "Non-maskable interrupt"]
3543        pub const _0: Self = Self::new(0);
3544
3545        #[doc = "Maskable interrupt"]
3546        pub const _1: Self = Self::new(1);
3547    }
3548}
3549#[doc(hidden)]
3550#[derive(Copy, Clone, Eq, PartialEq)]
3551pub struct Lvd2Sr_SPEC;
3552impl crate::sealed::RegSpec for Lvd2Sr_SPEC {
3553    type DataType = u8;
3554}
3555
3556#[doc = "Voltage Monitor 2 Circuit Status Register"]
3557pub type Lvd2Sr = crate::RegValueT<Lvd2Sr_SPEC>;
3558
3559impl Lvd2Sr {
3560    #[doc = "Voltage Monitor 2 Voltage Variation Detection Flag"]
3561    #[inline(always)]
3562    pub fn det(
3563        self,
3564    ) -> crate::common::RegisterField<
3565        0,
3566        0x1,
3567        1,
3568        0,
3569        lvd2sr::Det,
3570        lvd2sr::Det,
3571        Lvd2Sr_SPEC,
3572        crate::common::RW,
3573    > {
3574        crate::common::RegisterField::<
3575            0,
3576            0x1,
3577            1,
3578            0,
3579            lvd2sr::Det,
3580            lvd2sr::Det,
3581            Lvd2Sr_SPEC,
3582            crate::common::RW,
3583        >::from_register(self, 0)
3584    }
3585
3586    #[doc = "Voltage Monitor 2 Signal Monitor Flag"]
3587    #[inline(always)]
3588    pub fn mon(
3589        self,
3590    ) -> crate::common::RegisterField<
3591        1,
3592        0x1,
3593        1,
3594        0,
3595        lvd2sr::Mon,
3596        lvd2sr::Mon,
3597        Lvd2Sr_SPEC,
3598        crate::common::R,
3599    > {
3600        crate::common::RegisterField::<
3601            1,
3602            0x1,
3603            1,
3604            0,
3605            lvd2sr::Mon,
3606            lvd2sr::Mon,
3607            Lvd2Sr_SPEC,
3608            crate::common::R,
3609        >::from_register(self, 0)
3610    }
3611}
3612impl ::core::default::Default for Lvd2Sr {
3613    #[inline(always)]
3614    fn default() -> Lvd2Sr {
3615        <crate::RegValueT<Lvd2Sr_SPEC> as RegisterValue<_>>::new(2)
3616    }
3617}
3618pub mod lvd2sr {
3619
3620    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3621    pub struct Det_SPEC;
3622    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
3623    impl Det {
3624        #[doc = "Not detected"]
3625        pub const _0: Self = Self::new(0);
3626
3627        #[doc = "Vdet2 crossing is detected"]
3628        pub const _1: Self = Self::new(1);
3629    }
3630    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3631    pub struct Mon_SPEC;
3632    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
3633    impl Mon {
3634        #[doc = "VCC < Vdet2"]
3635        pub const _0: Self = Self::new(0);
3636
3637        #[doc = "VCC >= Vdet2 or MON is disabled"]
3638        pub const _1: Self = Self::new(1);
3639    }
3640}
3641#[doc(hidden)]
3642#[derive(Copy, Clone, Eq, PartialEq)]
3643pub struct Prcr_SPEC;
3644impl crate::sealed::RegSpec for Prcr_SPEC {
3645    type DataType = u16;
3646}
3647
3648#[doc = "Protect Register"]
3649pub type Prcr = crate::RegValueT<Prcr_SPEC>;
3650
3651impl Prcr {
3652    #[doc = "Enable writing to the registers related to the clock generation circuit"]
3653    #[inline(always)]
3654    pub fn prc0(
3655        self,
3656    ) -> crate::common::RegisterField<
3657        0,
3658        0x1,
3659        1,
3660        0,
3661        prcr::Prc0,
3662        prcr::Prc0,
3663        Prcr_SPEC,
3664        crate::common::RW,
3665    > {
3666        crate::common::RegisterField::<
3667            0,
3668            0x1,
3669            1,
3670            0,
3671            prcr::Prc0,
3672            prcr::Prc0,
3673            Prcr_SPEC,
3674            crate::common::RW,
3675        >::from_register(self, 0)
3676    }
3677
3678    #[doc = "Enable writing to the registers related to the low power modes"]
3679    #[inline(always)]
3680    pub fn prc1(
3681        self,
3682    ) -> crate::common::RegisterField<
3683        1,
3684        0x1,
3685        1,
3686        0,
3687        prcr::Prc1,
3688        prcr::Prc1,
3689        Prcr_SPEC,
3690        crate::common::RW,
3691    > {
3692        crate::common::RegisterField::<
3693            1,
3694            0x1,
3695            1,
3696            0,
3697            prcr::Prc1,
3698            prcr::Prc1,
3699            Prcr_SPEC,
3700            crate::common::RW,
3701        >::from_register(self, 0)
3702    }
3703
3704    #[doc = "Enable writing to the registers related to the LVD"]
3705    #[inline(always)]
3706    pub fn prc3(
3707        self,
3708    ) -> crate::common::RegisterField<
3709        3,
3710        0x1,
3711        1,
3712        0,
3713        prcr::Prc3,
3714        prcr::Prc3,
3715        Prcr_SPEC,
3716        crate::common::RW,
3717    > {
3718        crate::common::RegisterField::<
3719            3,
3720            0x1,
3721            1,
3722            0,
3723            prcr::Prc3,
3724            prcr::Prc3,
3725            Prcr_SPEC,
3726            crate::common::RW,
3727        >::from_register(self, 0)
3728    }
3729
3730    #[doc = "PRC Key Code"]
3731    #[inline(always)]
3732    pub fn prkey(
3733        self,
3734    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Prcr_SPEC, crate::common::W> {
3735        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Prcr_SPEC,crate::common::W>::from_register(self,0)
3736    }
3737}
3738impl ::core::default::Default for Prcr {
3739    #[inline(always)]
3740    fn default() -> Prcr {
3741        <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
3742    }
3743}
3744pub mod prcr {
3745
3746    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3747    pub struct Prc0_SPEC;
3748    pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
3749    impl Prc0 {
3750        #[doc = "Disable writes"]
3751        pub const _0: Self = Self::new(0);
3752
3753        #[doc = "Enable writes"]
3754        pub const _1: Self = Self::new(1);
3755    }
3756    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3757    pub struct Prc1_SPEC;
3758    pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
3759    impl Prc1 {
3760        #[doc = "Disable writes"]
3761        pub const _0: Self = Self::new(0);
3762
3763        #[doc = "Enable writes"]
3764        pub const _1: Self = Self::new(1);
3765    }
3766    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3767    pub struct Prc3_SPEC;
3768    pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
3769    impl Prc3 {
3770        #[doc = "Disable writes"]
3771        pub const _0: Self = Self::new(0);
3772
3773        #[doc = "Enable writes"]
3774        pub const _1: Self = Self::new(1);
3775    }
3776}
3777#[doc(hidden)]
3778#[derive(Copy, Clone, Eq, PartialEq)]
3779pub struct Syocdcr_SPEC;
3780impl crate::sealed::RegSpec for Syocdcr_SPEC {
3781    type DataType = u8;
3782}
3783
3784#[doc = "System Control OCD Control Register"]
3785pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
3786
3787impl Syocdcr {
3788    #[doc = "Debugger Enable bit"]
3789    #[inline(always)]
3790    pub fn dbgen(
3791        self,
3792    ) -> crate::common::RegisterField<
3793        7,
3794        0x1,
3795        1,
3796        0,
3797        syocdcr::Dbgen,
3798        syocdcr::Dbgen,
3799        Syocdcr_SPEC,
3800        crate::common::RW,
3801    > {
3802        crate::common::RegisterField::<
3803            7,
3804            0x1,
3805            1,
3806            0,
3807            syocdcr::Dbgen,
3808            syocdcr::Dbgen,
3809            Syocdcr_SPEC,
3810            crate::common::RW,
3811        >::from_register(self, 0)
3812    }
3813}
3814impl ::core::default::Default for Syocdcr {
3815    #[inline(always)]
3816    fn default() -> Syocdcr {
3817        <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
3818    }
3819}
3820pub mod syocdcr {
3821
3822    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3823    pub struct Dbgen_SPEC;
3824    pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
3825    impl Dbgen {
3826        #[doc = "On-chip debugger is disabled"]
3827        pub const _0: Self = Self::new(0);
3828
3829        #[doc = "On-chip debugger is enabled"]
3830        pub const _1: Self = Self::new(1);
3831    }
3832}
3833#[doc(hidden)]
3834#[derive(Copy, Clone, Eq, PartialEq)]
3835pub struct Rstsr0_SPEC;
3836impl crate::sealed::RegSpec for Rstsr0_SPEC {
3837    type DataType = u8;
3838}
3839
3840#[doc = "Reset Status Register 0"]
3841pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
3842
3843impl Rstsr0 {
3844    #[doc = "Power-On Reset Detect Flag"]
3845    #[inline(always)]
3846    pub fn porf(
3847        self,
3848    ) -> crate::common::RegisterField<
3849        0,
3850        0x1,
3851        1,
3852        0,
3853        rstsr0::Porf,
3854        rstsr0::Porf,
3855        Rstsr0_SPEC,
3856        crate::common::RW,
3857    > {
3858        crate::common::RegisterField::<
3859            0,
3860            0x1,
3861            1,
3862            0,
3863            rstsr0::Porf,
3864            rstsr0::Porf,
3865            Rstsr0_SPEC,
3866            crate::common::RW,
3867        >::from_register(self, 0)
3868    }
3869
3870    #[doc = "Voltage Monitor 0 Reset Detect Flag"]
3871    #[inline(always)]
3872    pub fn lvd0rf(
3873        self,
3874    ) -> crate::common::RegisterField<
3875        1,
3876        0x1,
3877        1,
3878        0,
3879        rstsr0::Lvd0Rf,
3880        rstsr0::Lvd0Rf,
3881        Rstsr0_SPEC,
3882        crate::common::RW,
3883    > {
3884        crate::common::RegisterField::<
3885            1,
3886            0x1,
3887            1,
3888            0,
3889            rstsr0::Lvd0Rf,
3890            rstsr0::Lvd0Rf,
3891            Rstsr0_SPEC,
3892            crate::common::RW,
3893        >::from_register(self, 0)
3894    }
3895
3896    #[doc = "Voltage Monitor 1 Reset Detect Flag"]
3897    #[inline(always)]
3898    pub fn lvd1rf(
3899        self,
3900    ) -> crate::common::RegisterField<
3901        2,
3902        0x1,
3903        1,
3904        0,
3905        rstsr0::Lvd1Rf,
3906        rstsr0::Lvd1Rf,
3907        Rstsr0_SPEC,
3908        crate::common::RW,
3909    > {
3910        crate::common::RegisterField::<
3911            2,
3912            0x1,
3913            1,
3914            0,
3915            rstsr0::Lvd1Rf,
3916            rstsr0::Lvd1Rf,
3917            Rstsr0_SPEC,
3918            crate::common::RW,
3919        >::from_register(self, 0)
3920    }
3921
3922    #[doc = "Voltage Monitor 2 Reset Detect Flag"]
3923    #[inline(always)]
3924    pub fn lvd2rf(
3925        self,
3926    ) -> crate::common::RegisterField<
3927        3,
3928        0x1,
3929        1,
3930        0,
3931        rstsr0::Lvd2Rf,
3932        rstsr0::Lvd2Rf,
3933        Rstsr0_SPEC,
3934        crate::common::RW,
3935    > {
3936        crate::common::RegisterField::<
3937            3,
3938            0x1,
3939            1,
3940            0,
3941            rstsr0::Lvd2Rf,
3942            rstsr0::Lvd2Rf,
3943            Rstsr0_SPEC,
3944            crate::common::RW,
3945        >::from_register(self, 0)
3946    }
3947}
3948impl ::core::default::Default for Rstsr0 {
3949    #[inline(always)]
3950    fn default() -> Rstsr0 {
3951        <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
3952    }
3953}
3954pub mod rstsr0 {
3955
3956    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3957    pub struct Porf_SPEC;
3958    pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
3959    impl Porf {
3960        #[doc = "Power-on reset not detected"]
3961        pub const _0: Self = Self::new(0);
3962
3963        #[doc = "Power-on reset detected"]
3964        pub const _1: Self = Self::new(1);
3965    }
3966    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3967    pub struct Lvd0Rf_SPEC;
3968    pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
3969    impl Lvd0Rf {
3970        #[doc = "Voltage monitor 0 reset not detected"]
3971        pub const _0: Self = Self::new(0);
3972
3973        #[doc = "Voltage monitor 0 reset detected"]
3974        pub const _1: Self = Self::new(1);
3975    }
3976    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3977    pub struct Lvd1Rf_SPEC;
3978    pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
3979    impl Lvd1Rf {
3980        #[doc = "Voltage monitor 1 reset not detected"]
3981        pub const _0: Self = Self::new(0);
3982
3983        #[doc = "Voltage monitor 1 reset detected"]
3984        pub const _1: Self = Self::new(1);
3985    }
3986    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3987    pub struct Lvd2Rf_SPEC;
3988    pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
3989    impl Lvd2Rf {
3990        #[doc = "Voltage monitor 2 reset not detected"]
3991        pub const _0: Self = Self::new(0);
3992
3993        #[doc = "Voltage monitor 2 reset detected"]
3994        pub const _1: Self = Self::new(1);
3995    }
3996}
3997#[doc(hidden)]
3998#[derive(Copy, Clone, Eq, PartialEq)]
3999pub struct Rstsr2_SPEC;
4000impl crate::sealed::RegSpec for Rstsr2_SPEC {
4001    type DataType = u8;
4002}
4003
4004#[doc = "Reset Status Register 2"]
4005pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
4006
4007impl Rstsr2 {
4008    #[doc = "Cold/Warm Start Determination Flag"]
4009    #[inline(always)]
4010    pub fn cwsf(
4011        self,
4012    ) -> crate::common::RegisterField<
4013        0,
4014        0x1,
4015        1,
4016        0,
4017        rstsr2::Cwsf,
4018        rstsr2::Cwsf,
4019        Rstsr2_SPEC,
4020        crate::common::RW,
4021    > {
4022        crate::common::RegisterField::<
4023            0,
4024            0x1,
4025            1,
4026            0,
4027            rstsr2::Cwsf,
4028            rstsr2::Cwsf,
4029            Rstsr2_SPEC,
4030            crate::common::RW,
4031        >::from_register(self, 0)
4032    }
4033}
4034impl ::core::default::Default for Rstsr2 {
4035    #[inline(always)]
4036    fn default() -> Rstsr2 {
4037        <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
4038    }
4039}
4040pub mod rstsr2 {
4041
4042    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4043    pub struct Cwsf_SPEC;
4044    pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
4045    impl Cwsf {
4046        #[doc = "Cold start"]
4047        pub const _0: Self = Self::new(0);
4048
4049        #[doc = "Warm start"]
4050        pub const _1: Self = Self::new(1);
4051    }
4052}
4053#[doc(hidden)]
4054#[derive(Copy, Clone, Eq, PartialEq)]
4055pub struct Momcr_SPEC;
4056impl crate::sealed::RegSpec for Momcr_SPEC {
4057    type DataType = u8;
4058}
4059
4060#[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
4061pub type Momcr = crate::RegValueT<Momcr_SPEC>;
4062
4063impl Momcr {
4064    #[doc = "Main Clock Oscillator Drive Capability 1 Switching"]
4065    #[inline(always)]
4066    pub fn modrv1(
4067        self,
4068    ) -> crate::common::RegisterField<
4069        3,
4070        0x1,
4071        1,
4072        0,
4073        momcr::Modrv1,
4074        momcr::Modrv1,
4075        Momcr_SPEC,
4076        crate::common::RW,
4077    > {
4078        crate::common::RegisterField::<
4079            3,
4080            0x1,
4081            1,
4082            0,
4083            momcr::Modrv1,
4084            momcr::Modrv1,
4085            Momcr_SPEC,
4086            crate::common::RW,
4087        >::from_register(self, 0)
4088    }
4089
4090    #[doc = "Main Clock Oscillator Switching"]
4091    #[inline(always)]
4092    pub fn mosel(
4093        self,
4094    ) -> crate::common::RegisterField<
4095        6,
4096        0x1,
4097        1,
4098        0,
4099        momcr::Mosel,
4100        momcr::Mosel,
4101        Momcr_SPEC,
4102        crate::common::RW,
4103    > {
4104        crate::common::RegisterField::<
4105            6,
4106            0x1,
4107            1,
4108            0,
4109            momcr::Mosel,
4110            momcr::Mosel,
4111            Momcr_SPEC,
4112            crate::common::RW,
4113        >::from_register(self, 0)
4114    }
4115}
4116impl ::core::default::Default for Momcr {
4117    #[inline(always)]
4118    fn default() -> Momcr {
4119        <crate::RegValueT<Momcr_SPEC> as RegisterValue<_>>::new(0)
4120    }
4121}
4122pub mod momcr {
4123
4124    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4125    pub struct Modrv1_SPEC;
4126    pub type Modrv1 = crate::EnumBitfieldStruct<u8, Modrv1_SPEC>;
4127    impl Modrv1 {
4128        #[doc = "10 MHz to 20 MHz"]
4129        pub const _0: Self = Self::new(0);
4130
4131        #[doc = "1 MHz to 10 MHz"]
4132        pub const _1: Self = Self::new(1);
4133    }
4134    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4135    pub struct Mosel_SPEC;
4136    pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
4137    impl Mosel {
4138        #[doc = "Resonator"]
4139        pub const _0: Self = Self::new(0);
4140
4141        #[doc = "External clock input"]
4142        pub const _1: Self = Self::new(1);
4143    }
4144}
4145#[doc(hidden)]
4146#[derive(Copy, Clone, Eq, PartialEq)]
4147pub struct Lvcmpcr_SPEC;
4148impl crate::sealed::RegSpec for Lvcmpcr_SPEC {
4149    type DataType = u8;
4150}
4151
4152#[doc = "Voltage Monitor Circuit Control Register"]
4153pub type Lvcmpcr = crate::RegValueT<Lvcmpcr_SPEC>;
4154
4155impl Lvcmpcr {
4156    #[doc = "Voltage Detection 1 Enable"]
4157    #[inline(always)]
4158    pub fn lvd1e(
4159        self,
4160    ) -> crate::common::RegisterField<
4161        5,
4162        0x1,
4163        1,
4164        0,
4165        lvcmpcr::Lvd1E,
4166        lvcmpcr::Lvd1E,
4167        Lvcmpcr_SPEC,
4168        crate::common::RW,
4169    > {
4170        crate::common::RegisterField::<
4171            5,
4172            0x1,
4173            1,
4174            0,
4175            lvcmpcr::Lvd1E,
4176            lvcmpcr::Lvd1E,
4177            Lvcmpcr_SPEC,
4178            crate::common::RW,
4179        >::from_register(self, 0)
4180    }
4181
4182    #[doc = "Voltage Detection 2 Enable"]
4183    #[inline(always)]
4184    pub fn lvd2e(
4185        self,
4186    ) -> crate::common::RegisterField<
4187        6,
4188        0x1,
4189        1,
4190        0,
4191        lvcmpcr::Lvd2E,
4192        lvcmpcr::Lvd2E,
4193        Lvcmpcr_SPEC,
4194        crate::common::RW,
4195    > {
4196        crate::common::RegisterField::<
4197            6,
4198            0x1,
4199            1,
4200            0,
4201            lvcmpcr::Lvd2E,
4202            lvcmpcr::Lvd2E,
4203            Lvcmpcr_SPEC,
4204            crate::common::RW,
4205        >::from_register(self, 0)
4206    }
4207}
4208impl ::core::default::Default for Lvcmpcr {
4209    #[inline(always)]
4210    fn default() -> Lvcmpcr {
4211        <crate::RegValueT<Lvcmpcr_SPEC> as RegisterValue<_>>::new(0)
4212    }
4213}
4214pub mod lvcmpcr {
4215
4216    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4217    pub struct Lvd1E_SPEC;
4218    pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
4219    impl Lvd1E {
4220        #[doc = "Voltage detection 1 circuit disabled"]
4221        pub const _0: Self = Self::new(0);
4222
4223        #[doc = "Voltage detection 1 circuit enabled"]
4224        pub const _1: Self = Self::new(1);
4225    }
4226    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4227    pub struct Lvd2E_SPEC;
4228    pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
4229    impl Lvd2E {
4230        #[doc = "Voltage detection 2 circuit disabled"]
4231        pub const _0: Self = Self::new(0);
4232
4233        #[doc = "Voltage detection 2 circuit enabled"]
4234        pub const _1: Self = Self::new(1);
4235    }
4236}
4237#[doc(hidden)]
4238#[derive(Copy, Clone, Eq, PartialEq)]
4239pub struct Lvdlvlr_SPEC;
4240impl crate::sealed::RegSpec for Lvdlvlr_SPEC {
4241    type DataType = u8;
4242}
4243
4244#[doc = "Voltage Detection Level Select Register"]
4245pub type Lvdlvlr = crate::RegValueT<Lvdlvlr_SPEC>;
4246
4247impl Lvdlvlr {
4248    #[doc = "Voltage Detection 1 Level Select (Standard voltage during fall in voltage)"]
4249    #[inline(always)]
4250    pub fn lvd1lvl(
4251        self,
4252    ) -> crate::common::RegisterField<
4253        0,
4254        0x1f,
4255        1,
4256        0,
4257        lvdlvlr::Lvd1Lvl,
4258        lvdlvlr::Lvd1Lvl,
4259        Lvdlvlr_SPEC,
4260        crate::common::RW,
4261    > {
4262        crate::common::RegisterField::<
4263            0,
4264            0x1f,
4265            1,
4266            0,
4267            lvdlvlr::Lvd1Lvl,
4268            lvdlvlr::Lvd1Lvl,
4269            Lvdlvlr_SPEC,
4270            crate::common::RW,
4271        >::from_register(self, 0)
4272    }
4273
4274    #[doc = "Voltage Detection 2 Level Select (Standard voltage during fall in voltage)"]
4275    #[inline(always)]
4276    pub fn lvd2lvl(
4277        self,
4278    ) -> crate::common::RegisterField<
4279        5,
4280        0x7,
4281        1,
4282        0,
4283        lvdlvlr::Lvd2Lvl,
4284        lvdlvlr::Lvd2Lvl,
4285        Lvdlvlr_SPEC,
4286        crate::common::RW,
4287    > {
4288        crate::common::RegisterField::<
4289            5,
4290            0x7,
4291            1,
4292            0,
4293            lvdlvlr::Lvd2Lvl,
4294            lvdlvlr::Lvd2Lvl,
4295            Lvdlvlr_SPEC,
4296            crate::common::RW,
4297        >::from_register(self, 0)
4298    }
4299}
4300impl ::core::default::Default for Lvdlvlr {
4301    #[inline(always)]
4302    fn default() -> Lvdlvlr {
4303        <crate::RegValueT<Lvdlvlr_SPEC> as RegisterValue<_>>::new(7)
4304    }
4305}
4306pub mod lvdlvlr {
4307
4308    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4309    pub struct Lvd1Lvl_SPEC;
4310    pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
4311    impl Lvd1Lvl {
4312        #[doc = "Vdet1_0"]
4313        pub const _0_X_00: Self = Self::new(0);
4314
4315        #[doc = "Vdet1_1"]
4316        pub const _0_X_01: Self = Self::new(1);
4317
4318        #[doc = "Vdet1_2"]
4319        pub const _0_X_02: Self = Self::new(2);
4320
4321        #[doc = "Vdet1_3"]
4322        pub const _0_X_03: Self = Self::new(3);
4323
4324        #[doc = "Vdet1_4"]
4325        pub const _0_X_04: Self = Self::new(4);
4326
4327        #[doc = "Vdet1_5"]
4328        pub const _0_X_05: Self = Self::new(5);
4329
4330        #[doc = "Vdet1_6"]
4331        pub const _0_X_06: Self = Self::new(6);
4332
4333        #[doc = "Vdet1_7"]
4334        pub const _0_X_07: Self = Self::new(7);
4335
4336        #[doc = "Vdet1_8"]
4337        pub const _0_X_08: Self = Self::new(8);
4338
4339        #[doc = "Vdet1_9"]
4340        pub const _0_X_09: Self = Self::new(9);
4341
4342        #[doc = "Vdet1_A"]
4343        pub const _0_X_0_A: Self = Self::new(10);
4344
4345        #[doc = "Vdet1_B"]
4346        pub const _0_X_0_B: Self = Self::new(11);
4347
4348        #[doc = "Vdet1_C"]
4349        pub const _0_X_0_C: Self = Self::new(12);
4350
4351        #[doc = "Vdet1_D"]
4352        pub const _0_X_0_D: Self = Self::new(13);
4353
4354        #[doc = "Vdet1_E"]
4355        pub const _0_X_0_E: Self = Self::new(14);
4356
4357        #[doc = "Vdet1_F"]
4358        pub const _0_X_0_F: Self = Self::new(15);
4359    }
4360    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4361    pub struct Lvd2Lvl_SPEC;
4362    pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
4363    impl Lvd2Lvl {
4364        #[doc = "Vdet2_0"]
4365        pub const _000: Self = Self::new(0);
4366
4367        #[doc = "Vdet2_1"]
4368        pub const _001: Self = Self::new(1);
4369
4370        #[doc = "Vdet2_2"]
4371        pub const _010: Self = Self::new(2);
4372
4373        #[doc = "Vdet2_3"]
4374        pub const _011: Self = Self::new(3);
4375    }
4376}
4377#[doc(hidden)]
4378#[derive(Copy, Clone, Eq, PartialEq)]
4379pub struct Lvd1Cr0_SPEC;
4380impl crate::sealed::RegSpec for Lvd1Cr0_SPEC {
4381    type DataType = u8;
4382}
4383
4384#[doc = "Voltage Monitor 1 Circuit Control Register 0"]
4385pub type Lvd1Cr0 = crate::RegValueT<Lvd1Cr0_SPEC>;
4386
4387impl Lvd1Cr0 {
4388    #[doc = "Voltage Monitor 1 Interrupt/Reset Enable"]
4389    #[inline(always)]
4390    pub fn rie(
4391        self,
4392    ) -> crate::common::RegisterField<
4393        0,
4394        0x1,
4395        1,
4396        0,
4397        lvd1cr0::Rie,
4398        lvd1cr0::Rie,
4399        Lvd1Cr0_SPEC,
4400        crate::common::RW,
4401    > {
4402        crate::common::RegisterField::<
4403            0,
4404            0x1,
4405            1,
4406            0,
4407            lvd1cr0::Rie,
4408            lvd1cr0::Rie,
4409            Lvd1Cr0_SPEC,
4410            crate::common::RW,
4411        >::from_register(self, 0)
4412    }
4413
4414    #[doc = "Voltage Monitor 1 Circuit Comparison Result Output Enable"]
4415    #[inline(always)]
4416    pub fn cmpe(
4417        self,
4418    ) -> crate::common::RegisterField<
4419        2,
4420        0x1,
4421        1,
4422        0,
4423        lvd1cr0::Cmpe,
4424        lvd1cr0::Cmpe,
4425        Lvd1Cr0_SPEC,
4426        crate::common::RW,
4427    > {
4428        crate::common::RegisterField::<
4429            2,
4430            0x1,
4431            1,
4432            0,
4433            lvd1cr0::Cmpe,
4434            lvd1cr0::Cmpe,
4435            Lvd1Cr0_SPEC,
4436            crate::common::RW,
4437        >::from_register(self, 0)
4438    }
4439
4440    #[doc = "Voltage Monitor 1 Circuit Mode Select"]
4441    #[inline(always)]
4442    pub fn ri(
4443        self,
4444    ) -> crate::common::RegisterField<
4445        6,
4446        0x1,
4447        1,
4448        0,
4449        lvd1cr0::Ri,
4450        lvd1cr0::Ri,
4451        Lvd1Cr0_SPEC,
4452        crate::common::RW,
4453    > {
4454        crate::common::RegisterField::<
4455            6,
4456            0x1,
4457            1,
4458            0,
4459            lvd1cr0::Ri,
4460            lvd1cr0::Ri,
4461            Lvd1Cr0_SPEC,
4462            crate::common::RW,
4463        >::from_register(self, 0)
4464    }
4465
4466    #[doc = "Voltage Monitor 1 Reset Negate Select"]
4467    #[inline(always)]
4468    pub fn rn(
4469        self,
4470    ) -> crate::common::RegisterField<
4471        7,
4472        0x1,
4473        1,
4474        0,
4475        lvd1cr0::Rn,
4476        lvd1cr0::Rn,
4477        Lvd1Cr0_SPEC,
4478        crate::common::RW,
4479    > {
4480        crate::common::RegisterField::<
4481            7,
4482            0x1,
4483            1,
4484            0,
4485            lvd1cr0::Rn,
4486            lvd1cr0::Rn,
4487            Lvd1Cr0_SPEC,
4488            crate::common::RW,
4489        >::from_register(self, 0)
4490    }
4491}
4492impl ::core::default::Default for Lvd1Cr0 {
4493    #[inline(always)]
4494    fn default() -> Lvd1Cr0 {
4495        <crate::RegValueT<Lvd1Cr0_SPEC> as RegisterValue<_>>::new(128)
4496    }
4497}
4498pub mod lvd1cr0 {
4499
4500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4501    pub struct Rie_SPEC;
4502    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
4503    impl Rie {
4504        #[doc = "Disable"]
4505        pub const _0: Self = Self::new(0);
4506
4507        #[doc = "Enable"]
4508        pub const _1: Self = Self::new(1);
4509    }
4510    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4511    pub struct Cmpe_SPEC;
4512    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
4513    impl Cmpe {
4514        #[doc = "Disable voltage monitor 1 circuit comparison result output"]
4515        pub const _0: Self = Self::new(0);
4516
4517        #[doc = "Enable voltage monitor 1 circuit comparison result output"]
4518        pub const _1: Self = Self::new(1);
4519    }
4520    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4521    pub struct Ri_SPEC;
4522    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
4523    impl Ri {
4524        #[doc = "Generate voltage monitor 1 interrupt on Vdet1 crossing"]
4525        pub const _0: Self = Self::new(0);
4526
4527        #[doc = "Enable voltage monitor 1 reset when the voltage falls to and below Vdet1"]
4528        pub const _1: Self = Self::new(1);
4529    }
4530    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4531    pub struct Rn_SPEC;
4532    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
4533    impl Rn {
4534        #[doc = "Negate after a stabilization time (tLVD1) when VCC > Vdet1 is detected"]
4535        pub const _0: Self = Self::new(0);
4536
4537        #[doc = "Negate after a stabilization time (tLVD1) on assertion of the LVD1 reset"]
4538        pub const _1: Self = Self::new(1);
4539    }
4540}
4541#[doc(hidden)]
4542#[derive(Copy, Clone, Eq, PartialEq)]
4543pub struct Lvd2Cr0_SPEC;
4544impl crate::sealed::RegSpec for Lvd2Cr0_SPEC {
4545    type DataType = u8;
4546}
4547
4548#[doc = "Voltage Monitor 2 Circuit Control Register 0"]
4549pub type Lvd2Cr0 = crate::RegValueT<Lvd2Cr0_SPEC>;
4550
4551impl Lvd2Cr0 {
4552    #[doc = "Voltage Monitor 2 Interrupt/Reset Enable"]
4553    #[inline(always)]
4554    pub fn rie(
4555        self,
4556    ) -> crate::common::RegisterField<
4557        0,
4558        0x1,
4559        1,
4560        0,
4561        lvd2cr0::Rie,
4562        lvd2cr0::Rie,
4563        Lvd2Cr0_SPEC,
4564        crate::common::RW,
4565    > {
4566        crate::common::RegisterField::<
4567            0,
4568            0x1,
4569            1,
4570            0,
4571            lvd2cr0::Rie,
4572            lvd2cr0::Rie,
4573            Lvd2Cr0_SPEC,
4574            crate::common::RW,
4575        >::from_register(self, 0)
4576    }
4577
4578    #[doc = "Voltage Monitor 2 Circuit Comparison Result Output Enable"]
4579    #[inline(always)]
4580    pub fn cmpe(
4581        self,
4582    ) -> crate::common::RegisterField<
4583        2,
4584        0x1,
4585        1,
4586        0,
4587        lvd2cr0::Cmpe,
4588        lvd2cr0::Cmpe,
4589        Lvd2Cr0_SPEC,
4590        crate::common::RW,
4591    > {
4592        crate::common::RegisterField::<
4593            2,
4594            0x1,
4595            1,
4596            0,
4597            lvd2cr0::Cmpe,
4598            lvd2cr0::Cmpe,
4599            Lvd2Cr0_SPEC,
4600            crate::common::RW,
4601        >::from_register(self, 0)
4602    }
4603
4604    #[doc = "Voltage Monitor 2 Circuit Mode Select"]
4605    #[inline(always)]
4606    pub fn ri(
4607        self,
4608    ) -> crate::common::RegisterField<
4609        6,
4610        0x1,
4611        1,
4612        0,
4613        lvd2cr0::Ri,
4614        lvd2cr0::Ri,
4615        Lvd2Cr0_SPEC,
4616        crate::common::RW,
4617    > {
4618        crate::common::RegisterField::<
4619            6,
4620            0x1,
4621            1,
4622            0,
4623            lvd2cr0::Ri,
4624            lvd2cr0::Ri,
4625            Lvd2Cr0_SPEC,
4626            crate::common::RW,
4627        >::from_register(self, 0)
4628    }
4629
4630    #[doc = "Voltage Monitor 2 Reset Negate Select"]
4631    #[inline(always)]
4632    pub fn rn(
4633        self,
4634    ) -> crate::common::RegisterField<
4635        7,
4636        0x1,
4637        1,
4638        0,
4639        lvd2cr0::Rn,
4640        lvd2cr0::Rn,
4641        Lvd2Cr0_SPEC,
4642        crate::common::RW,
4643    > {
4644        crate::common::RegisterField::<
4645            7,
4646            0x1,
4647            1,
4648            0,
4649            lvd2cr0::Rn,
4650            lvd2cr0::Rn,
4651            Lvd2Cr0_SPEC,
4652            crate::common::RW,
4653        >::from_register(self, 0)
4654    }
4655}
4656impl ::core::default::Default for Lvd2Cr0 {
4657    #[inline(always)]
4658    fn default() -> Lvd2Cr0 {
4659        <crate::RegValueT<Lvd2Cr0_SPEC> as RegisterValue<_>>::new(128)
4660    }
4661}
4662pub mod lvd2cr0 {
4663
4664    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4665    pub struct Rie_SPEC;
4666    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
4667    impl Rie {
4668        #[doc = "Disable"]
4669        pub const _0: Self = Self::new(0);
4670
4671        #[doc = "Enable"]
4672        pub const _1: Self = Self::new(1);
4673    }
4674    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4675    pub struct Cmpe_SPEC;
4676    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
4677    impl Cmpe {
4678        #[doc = "Disable voltage monitor 2 circuit comparison result output"]
4679        pub const _0: Self = Self::new(0);
4680
4681        #[doc = "Enable voltage monitor 2 circuit comparison result output"]
4682        pub const _1: Self = Self::new(1);
4683    }
4684    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4685    pub struct Ri_SPEC;
4686    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
4687    impl Ri {
4688        #[doc = "Generate voltage monitor 2 interrupt on Vdet2 crossing"]
4689        pub const _0: Self = Self::new(0);
4690
4691        #[doc = "Enable voltage monitor 2 reset when the voltage falls to and below Vdet2"]
4692        pub const _1: Self = Self::new(1);
4693    }
4694    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4695    pub struct Rn_SPEC;
4696    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
4697    impl Rn {
4698        #[doc = "Negate after a stabilization time (tLVD2) when VCC > Vdet2 is detected"]
4699        pub const _0: Self = Self::new(0);
4700
4701        #[doc = "Negate after a stabilization time (tLVD2) on assertion of the LVD2 reset"]
4702        pub const _1: Self = Self::new(1);
4703    }
4704}
4705#[doc(hidden)]
4706#[derive(Copy, Clone, Eq, PartialEq)]
4707pub struct Sosccr_SPEC;
4708impl crate::sealed::RegSpec for Sosccr_SPEC {
4709    type DataType = u8;
4710}
4711
4712#[doc = "Sub-Clock Oscillator Control Register"]
4713pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
4714
4715impl Sosccr {
4716    #[doc = "Sub Clock Oscillator Stop"]
4717    #[inline(always)]
4718    pub fn sostp(
4719        self,
4720    ) -> crate::common::RegisterField<
4721        0,
4722        0x1,
4723        1,
4724        0,
4725        sosccr::Sostp,
4726        sosccr::Sostp,
4727        Sosccr_SPEC,
4728        crate::common::RW,
4729    > {
4730        crate::common::RegisterField::<
4731            0,
4732            0x1,
4733            1,
4734            0,
4735            sosccr::Sostp,
4736            sosccr::Sostp,
4737            Sosccr_SPEC,
4738            crate::common::RW,
4739        >::from_register(self, 0)
4740    }
4741}
4742impl ::core::default::Default for Sosccr {
4743    #[inline(always)]
4744    fn default() -> Sosccr {
4745        <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(1)
4746    }
4747}
4748pub mod sosccr {
4749
4750    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4751    pub struct Sostp_SPEC;
4752    pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
4753    impl Sostp {
4754        #[doc = "Operate the sub-clock oscillator"]
4755        pub const _0: Self = Self::new(0);
4756
4757        #[doc = "Stop the sub-clock oscillator"]
4758        pub const _1: Self = Self::new(1);
4759    }
4760}
4761#[doc(hidden)]
4762#[derive(Copy, Clone, Eq, PartialEq)]
4763pub struct Somcr_SPEC;
4764impl crate::sealed::RegSpec for Somcr_SPEC {
4765    type DataType = u8;
4766}
4767
4768#[doc = "Sub-Clock Oscillator Mode Control Register"]
4769pub type Somcr = crate::RegValueT<Somcr_SPEC>;
4770
4771impl Somcr {
4772    #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
4773    #[inline(always)]
4774    pub fn sodrv(
4775        self,
4776    ) -> crate::common::RegisterField<
4777        0,
4778        0x3,
4779        1,
4780        0,
4781        somcr::Sodrv,
4782        somcr::Sodrv,
4783        Somcr_SPEC,
4784        crate::common::RW,
4785    > {
4786        crate::common::RegisterField::<
4787            0,
4788            0x3,
4789            1,
4790            0,
4791            somcr::Sodrv,
4792            somcr::Sodrv,
4793            Somcr_SPEC,
4794            crate::common::RW,
4795        >::from_register(self, 0)
4796    }
4797}
4798impl ::core::default::Default for Somcr {
4799    #[inline(always)]
4800    fn default() -> Somcr {
4801        <crate::RegValueT<Somcr_SPEC> as RegisterValue<_>>::new(0)
4802    }
4803}
4804pub mod somcr {
4805
4806    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4807    pub struct Sodrv_SPEC;
4808    pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
4809    impl Sodrv {
4810        #[doc = "Normal Mode"]
4811        pub const _00: Self = Self::new(0);
4812
4813        #[doc = "Low Power Mode 1"]
4814        pub const _01: Self = Self::new(1);
4815
4816        #[doc = "Low Power Mode 2"]
4817        pub const _10: Self = Self::new(2);
4818
4819        #[doc = "Low Power Mode 3"]
4820        pub const _11: Self = Self::new(3);
4821    }
4822}
4823#[doc(hidden)]
4824#[derive(Copy, Clone, Eq, PartialEq)]
4825pub struct Somrg_SPEC;
4826impl crate::sealed::RegSpec for Somrg_SPEC {
4827    type DataType = u8;
4828}
4829
4830#[doc = "Sub-Clock Oscillator Margin Check Register"]
4831pub type Somrg = crate::RegValueT<Somrg_SPEC>;
4832
4833impl Somrg {
4834    #[doc = "Sub Clock Oscillator Margin check Switching"]
4835    #[inline(always)]
4836    pub fn soscmrg(
4837        self,
4838    ) -> crate::common::RegisterField<
4839        0,
4840        0x3,
4841        1,
4842        0,
4843        somrg::Soscmrg,
4844        somrg::Soscmrg,
4845        Somrg_SPEC,
4846        crate::common::RW,
4847    > {
4848        crate::common::RegisterField::<
4849            0,
4850            0x3,
4851            1,
4852            0,
4853            somrg::Soscmrg,
4854            somrg::Soscmrg,
4855            Somrg_SPEC,
4856            crate::common::RW,
4857        >::from_register(self, 0)
4858    }
4859}
4860impl ::core::default::Default for Somrg {
4861    #[inline(always)]
4862    fn default() -> Somrg {
4863        <crate::RegValueT<Somrg_SPEC> as RegisterValue<_>>::new(0)
4864    }
4865}
4866pub mod somrg {
4867
4868    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4869    pub struct Soscmrg_SPEC;
4870    pub type Soscmrg = crate::EnumBitfieldStruct<u8, Soscmrg_SPEC>;
4871    impl Soscmrg {
4872        #[doc = "Normal Current"]
4873        pub const _00: Self = Self::new(0);
4874
4875        #[doc = "Lower Margin check"]
4876        pub const _01: Self = Self::new(1);
4877
4878        #[doc = "Upper Margin check"]
4879        pub const _10: Self = Self::new(2);
4880
4881        #[doc = "Setting prohibited"]
4882        pub const _11: Self = Self::new(3);
4883    }
4884}
4885#[doc(hidden)]
4886#[derive(Copy, Clone, Eq, PartialEq)]
4887pub struct Lococr_SPEC;
4888impl crate::sealed::RegSpec for Lococr_SPEC {
4889    type DataType = u8;
4890}
4891
4892#[doc = "Low-Speed On-Chip Oscillator Control Register"]
4893pub type Lococr = crate::RegValueT<Lococr_SPEC>;
4894
4895impl Lococr {
4896    #[doc = "LOCO Stop"]
4897    #[inline(always)]
4898    pub fn lcstp(
4899        self,
4900    ) -> crate::common::RegisterField<
4901        0,
4902        0x1,
4903        1,
4904        0,
4905        lococr::Lcstp,
4906        lococr::Lcstp,
4907        Lococr_SPEC,
4908        crate::common::RW,
4909    > {
4910        crate::common::RegisterField::<
4911            0,
4912            0x1,
4913            1,
4914            0,
4915            lococr::Lcstp,
4916            lococr::Lcstp,
4917            Lococr_SPEC,
4918            crate::common::RW,
4919        >::from_register(self, 0)
4920    }
4921}
4922impl ::core::default::Default for Lococr {
4923    #[inline(always)]
4924    fn default() -> Lococr {
4925        <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
4926    }
4927}
4928pub mod lococr {
4929
4930    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4931    pub struct Lcstp_SPEC;
4932    pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
4933    impl Lcstp {
4934        #[doc = "Operate the LOCO clock"]
4935        pub const _0: Self = Self::new(0);
4936
4937        #[doc = "Stop the LOCO clock"]
4938        pub const _1: Self = Self::new(1);
4939    }
4940}
4941#[doc(hidden)]
4942#[derive(Copy, Clone, Eq, PartialEq)]
4943pub struct Locoutcr_SPEC;
4944impl crate::sealed::RegSpec for Locoutcr_SPEC {
4945    type DataType = u8;
4946}
4947
4948#[doc = "LOCO User Trimming Control Register"]
4949pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
4950
4951impl Locoutcr {
4952    #[doc = "LOCO User Trimming"]
4953    #[inline(always)]
4954    pub fn locoutrm(
4955        self,
4956    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
4957        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
4958    }
4959}
4960impl ::core::default::Default for Locoutcr {
4961    #[inline(always)]
4962    fn default() -> Locoutcr {
4963        <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
4964    }
4965}