Expand description
Arm Cortex-M23 based Microcontroller RA2E1 device
Re-exports§
Modules§
- adc120
- agt0
- bus
- cac
- common
- crc
- dbg
- doc
- dtc
- elc
- flcn
- gpt164
- gpt320
- gpt_ops
- icu
- iic0
- iic0wu
- interrupt_
handlers - iwdt
- kint
- mstp
- pfs
- poeg
- port0
- port1
- rmpu
- rtc
- sci0
- sci1
- spi0
- sram
- sysc
- wdt
Structs§
- Adc120
- Agt0
- Bus
- CBP
- Cache and branch predictor maintenance operations
- CPUID
- CPUID
- Cac
- Core
Peripherals - Core peripherals
- Crc
- DCB
- Debug Control Block
- DWT
- Data Watchpoint and Trace unit
- Dbg
- Doc
- Dtc
- Elc
- FPB
- Flash Patch and Breakpoint unit
- Flcn
- Gpt164
- Gpt320
- GptOps
- ITM
- Instrumentation Trace Macrocell
- Icu
- Iic0
- Iic0Wu
- Iwdt
- Kint
- MPU
- Memory Protection Unit
- Mstp
- NVIC
- Nested Vector Interrupt Controller
- Peripherals
- Required for compatibility with RTIC and other frameworks
- Pfs
- Poeg
- Port0
- Port1
- Rmpu
- Rtc
- SCB
- System Control Block
- SYST
- SysTick: System Timer
- Sci0
- Sci1
- Spi0
- Sram
- Sysc
- TPIU
- Trace Port Interface Unit
- Wdt
Enums§
- Interrupt
- Enumeration of all the interrupts.
Constants§
- ADC120
- AGT0
- AGT1
- BUS
- CAC
- CRC
- DBG
- DOC
- DTC
- ELC
- FLCN
- GPT164
- GPT165
- GPT166
- GPT167
- GPT168
- GPT169
- GPT320
- GPT_OPS
- ICU
- IIC0
- IIC0WU
- IWDT
- KINT
- MSTP
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority
- PFS
- POEG
- PORT0
- PORT1
- PORT2
- PORT3
- PORT4
- PORT5
- PORT9
- RMPU
- RTC
- SCI0
- SCI1
- SCI2
- SCI9
- SPI0
- SRAM
- SYSC
- WDT