1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Peripheral Interface"]
28unsafe impl ::core::marker::Send for super::Spi0 {}
29unsafe impl ::core::marker::Sync for super::Spi0 {}
30impl super::Spi0 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "SPI Control Register"]
38 #[inline(always)]
39 pub const fn spcr(&self) -> &'static crate::common::Reg<self::Spcr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Spcr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "SPI Slave Select Polarity Register"]
48 #[inline(always)]
49 pub const fn sslp(&self) -> &'static crate::common::Reg<self::Sslp_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Sslp_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(1usize),
53 )
54 }
55 }
56
57 #[doc = "SPI Pin Control Register"]
58 #[inline(always)]
59 pub const fn sppcr(&self) -> &'static crate::common::Reg<self::Sppcr_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Sppcr_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(2usize),
63 )
64 }
65 }
66
67 #[doc = "SPI Status Register"]
68 #[inline(always)]
69 pub const fn spsr(&self) -> &'static crate::common::Reg<self::Spsr_SPEC, crate::common::RW> {
70 unsafe {
71 crate::common::Reg::<self::Spsr_SPEC, crate::common::RW>::from_ptr(
72 self._svd2pac_as_ptr().add(3usize),
73 )
74 }
75 }
76
77 #[doc = "SPI Data Register"]
78 #[inline(always)]
79 pub const fn spdr(&self) -> &'static crate::common::Reg<self::Spdr_SPEC, crate::common::RW> {
80 unsafe {
81 crate::common::Reg::<self::Spdr_SPEC, crate::common::RW>::from_ptr(
82 self._svd2pac_as_ptr().add(4usize),
83 )
84 }
85 }
86
87 #[doc = "SPI Data Register"]
88 #[inline(always)]
89 pub const fn spdr_ha(
90 &self,
91 ) -> &'static crate::common::Reg<self::SpdrHa_SPEC, crate::common::RW> {
92 unsafe {
93 crate::common::Reg::<self::SpdrHa_SPEC, crate::common::RW>::from_ptr(
94 self._svd2pac_as_ptr().add(4usize),
95 )
96 }
97 }
98
99 #[doc = "SPI Data Register"]
100 #[inline(always)]
101 pub const fn spdr_by(
102 &self,
103 ) -> &'static crate::common::Reg<self::SpdrBy_SPEC, crate::common::RW> {
104 unsafe {
105 crate::common::Reg::<self::SpdrBy_SPEC, crate::common::RW>::from_ptr(
106 self._svd2pac_as_ptr().add(4usize),
107 )
108 }
109 }
110
111 #[doc = "SPI Bit Rate Register"]
112 #[inline(always)]
113 pub const fn spbr(&self) -> &'static crate::common::Reg<self::Spbr_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Spbr_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(10usize),
117 )
118 }
119 }
120
121 #[doc = "SPI Data Control Register"]
122 #[inline(always)]
123 pub const fn spdcr(&self) -> &'static crate::common::Reg<self::Spdcr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Spdcr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(11usize),
127 )
128 }
129 }
130
131 #[doc = "SPI Clock Delay Register"]
132 #[inline(always)]
133 pub const fn spckd(&self) -> &'static crate::common::Reg<self::Spckd_SPEC, crate::common::RW> {
134 unsafe {
135 crate::common::Reg::<self::Spckd_SPEC, crate::common::RW>::from_ptr(
136 self._svd2pac_as_ptr().add(12usize),
137 )
138 }
139 }
140
141 #[doc = "SPI Slave Select Negation Delay Register"]
142 #[inline(always)]
143 pub const fn sslnd(&self) -> &'static crate::common::Reg<self::Sslnd_SPEC, crate::common::RW> {
144 unsafe {
145 crate::common::Reg::<self::Sslnd_SPEC, crate::common::RW>::from_ptr(
146 self._svd2pac_as_ptr().add(13usize),
147 )
148 }
149 }
150
151 #[doc = "SPI Next-Access Delay Register"]
152 #[inline(always)]
153 pub const fn spnd(&self) -> &'static crate::common::Reg<self::Spnd_SPEC, crate::common::RW> {
154 unsafe {
155 crate::common::Reg::<self::Spnd_SPEC, crate::common::RW>::from_ptr(
156 self._svd2pac_as_ptr().add(14usize),
157 )
158 }
159 }
160
161 #[doc = "SPI Control Register 2"]
162 #[inline(always)]
163 pub const fn spcr2(&self) -> &'static crate::common::Reg<self::Spcr2_SPEC, crate::common::RW> {
164 unsafe {
165 crate::common::Reg::<self::Spcr2_SPEC, crate::common::RW>::from_ptr(
166 self._svd2pac_as_ptr().add(15usize),
167 )
168 }
169 }
170
171 #[doc = "SPI Command Register 0"]
172 #[inline(always)]
173 pub const fn spcmd0(
174 &self,
175 ) -> &'static crate::common::Reg<self::Spcmd0_SPEC, crate::common::RW> {
176 unsafe {
177 crate::common::Reg::<self::Spcmd0_SPEC, crate::common::RW>::from_ptr(
178 self._svd2pac_as_ptr().add(16usize),
179 )
180 }
181 }
182}
183#[doc(hidden)]
184#[derive(Copy, Clone, Eq, PartialEq)]
185pub struct Spcr_SPEC;
186impl crate::sealed::RegSpec for Spcr_SPEC {
187 type DataType = u8;
188}
189
190#[doc = "SPI Control Register"]
191pub type Spcr = crate::RegValueT<Spcr_SPEC>;
192
193impl Spcr {
194 #[doc = "SPI Mode Select"]
195 #[inline(always)]
196 pub fn spms(
197 self,
198 ) -> crate::common::RegisterField<
199 0,
200 0x1,
201 1,
202 0,
203 spcr::Spms,
204 spcr::Spms,
205 Spcr_SPEC,
206 crate::common::RW,
207 > {
208 crate::common::RegisterField::<
209 0,
210 0x1,
211 1,
212 0,
213 spcr::Spms,
214 spcr::Spms,
215 Spcr_SPEC,
216 crate::common::RW,
217 >::from_register(self, 0)
218 }
219
220 #[doc = "Communications Operating Mode Select"]
221 #[inline(always)]
222 pub fn txmd(
223 self,
224 ) -> crate::common::RegisterField<
225 1,
226 0x1,
227 1,
228 0,
229 spcr::Txmd,
230 spcr::Txmd,
231 Spcr_SPEC,
232 crate::common::RW,
233 > {
234 crate::common::RegisterField::<
235 1,
236 0x1,
237 1,
238 0,
239 spcr::Txmd,
240 spcr::Txmd,
241 Spcr_SPEC,
242 crate::common::RW,
243 >::from_register(self, 0)
244 }
245
246 #[doc = "Mode Fault Error Detection Enable"]
247 #[inline(always)]
248 pub fn modfen(
249 self,
250 ) -> crate::common::RegisterField<
251 2,
252 0x1,
253 1,
254 0,
255 spcr::Modfen,
256 spcr::Modfen,
257 Spcr_SPEC,
258 crate::common::RW,
259 > {
260 crate::common::RegisterField::<
261 2,
262 0x1,
263 1,
264 0,
265 spcr::Modfen,
266 spcr::Modfen,
267 Spcr_SPEC,
268 crate::common::RW,
269 >::from_register(self, 0)
270 }
271
272 #[doc = "SPI Master/Slave Mode Select"]
273 #[inline(always)]
274 pub fn mstr(
275 self,
276 ) -> crate::common::RegisterField<
277 3,
278 0x1,
279 1,
280 0,
281 spcr::Mstr,
282 spcr::Mstr,
283 Spcr_SPEC,
284 crate::common::RW,
285 > {
286 crate::common::RegisterField::<
287 3,
288 0x1,
289 1,
290 0,
291 spcr::Mstr,
292 spcr::Mstr,
293 Spcr_SPEC,
294 crate::common::RW,
295 >::from_register(self, 0)
296 }
297
298 #[doc = "SPI Error Interrupt Enable"]
299 #[inline(always)]
300 pub fn speie(
301 self,
302 ) -> crate::common::RegisterField<
303 4,
304 0x1,
305 1,
306 0,
307 spcr::Speie,
308 spcr::Speie,
309 Spcr_SPEC,
310 crate::common::RW,
311 > {
312 crate::common::RegisterField::<
313 4,
314 0x1,
315 1,
316 0,
317 spcr::Speie,
318 spcr::Speie,
319 Spcr_SPEC,
320 crate::common::RW,
321 >::from_register(self, 0)
322 }
323
324 #[doc = "Transmit Buffer Empty Interrupt Enable"]
325 #[inline(always)]
326 pub fn sptie(
327 self,
328 ) -> crate::common::RegisterField<
329 5,
330 0x1,
331 1,
332 0,
333 spcr::Sptie,
334 spcr::Sptie,
335 Spcr_SPEC,
336 crate::common::RW,
337 > {
338 crate::common::RegisterField::<
339 5,
340 0x1,
341 1,
342 0,
343 spcr::Sptie,
344 spcr::Sptie,
345 Spcr_SPEC,
346 crate::common::RW,
347 >::from_register(self, 0)
348 }
349
350 #[doc = "SPI Function Enable"]
351 #[inline(always)]
352 pub fn spe(
353 self,
354 ) -> crate::common::RegisterField<
355 6,
356 0x1,
357 1,
358 0,
359 spcr::Spe,
360 spcr::Spe,
361 Spcr_SPEC,
362 crate::common::RW,
363 > {
364 crate::common::RegisterField::<
365 6,
366 0x1,
367 1,
368 0,
369 spcr::Spe,
370 spcr::Spe,
371 Spcr_SPEC,
372 crate::common::RW,
373 >::from_register(self, 0)
374 }
375
376 #[doc = "SPI Receive Buffer Full Interrupt Enable"]
377 #[inline(always)]
378 pub fn sprie(
379 self,
380 ) -> crate::common::RegisterField<
381 7,
382 0x1,
383 1,
384 0,
385 spcr::Sprie,
386 spcr::Sprie,
387 Spcr_SPEC,
388 crate::common::RW,
389 > {
390 crate::common::RegisterField::<
391 7,
392 0x1,
393 1,
394 0,
395 spcr::Sprie,
396 spcr::Sprie,
397 Spcr_SPEC,
398 crate::common::RW,
399 >::from_register(self, 0)
400 }
401}
402impl ::core::default::Default for Spcr {
403 #[inline(always)]
404 fn default() -> Spcr {
405 <crate::RegValueT<Spcr_SPEC> as RegisterValue<_>>::new(0)
406 }
407}
408pub mod spcr {
409
410 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
411 pub struct Spms_SPEC;
412 pub type Spms = crate::EnumBitfieldStruct<u8, Spms_SPEC>;
413 impl Spms {
414 #[doc = "Select SPI operation (4-wire method)"]
415 pub const _0: Self = Self::new(0);
416
417 #[doc = "Select clock synchronous operation (3-wire method)"]
418 pub const _1: Self = Self::new(1);
419 }
420 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
421 pub struct Txmd_SPEC;
422 pub type Txmd = crate::EnumBitfieldStruct<u8, Txmd_SPEC>;
423 impl Txmd {
424 #[doc = "Select full-duplex synchronous serial communications"]
425 pub const _0: Self = Self::new(0);
426
427 #[doc = "Select serial communications with transmit-only"]
428 pub const _1: Self = Self::new(1);
429 }
430 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
431 pub struct Modfen_SPEC;
432 pub type Modfen = crate::EnumBitfieldStruct<u8, Modfen_SPEC>;
433 impl Modfen {
434 #[doc = "Disable detection of mode fault errors"]
435 pub const _0: Self = Self::new(0);
436
437 #[doc = "Enable detection of mode fault errors"]
438 pub const _1: Self = Self::new(1);
439 }
440 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
441 pub struct Mstr_SPEC;
442 pub type Mstr = crate::EnumBitfieldStruct<u8, Mstr_SPEC>;
443 impl Mstr {
444 #[doc = "Select slave mode"]
445 pub const _0: Self = Self::new(0);
446
447 #[doc = "Select master mode"]
448 pub const _1: Self = Self::new(1);
449 }
450 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
451 pub struct Speie_SPEC;
452 pub type Speie = crate::EnumBitfieldStruct<u8, Speie_SPEC>;
453 impl Speie {
454 #[doc = "Disable SPI error interrupt requests"]
455 pub const _0: Self = Self::new(0);
456
457 #[doc = "Enable SPI error interrupt requests"]
458 pub const _1: Self = Self::new(1);
459 }
460 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
461 pub struct Sptie_SPEC;
462 pub type Sptie = crate::EnumBitfieldStruct<u8, Sptie_SPEC>;
463 impl Sptie {
464 #[doc = "Disable transmit buffer empty interrupt requests"]
465 pub const _0: Self = Self::new(0);
466
467 #[doc = "Enable transmit buffer empty interrupt requests"]
468 pub const _1: Self = Self::new(1);
469 }
470 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
471 pub struct Spe_SPEC;
472 pub type Spe = crate::EnumBitfieldStruct<u8, Spe_SPEC>;
473 impl Spe {
474 #[doc = "Disable SPI function"]
475 pub const _0: Self = Self::new(0);
476
477 #[doc = "Enable SPI function"]
478 pub const _1: Self = Self::new(1);
479 }
480 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
481 pub struct Sprie_SPEC;
482 pub type Sprie = crate::EnumBitfieldStruct<u8, Sprie_SPEC>;
483 impl Sprie {
484 #[doc = "Disable SPI receive buffer full interrupt requests"]
485 pub const _0: Self = Self::new(0);
486
487 #[doc = "Enable SPI receive buffer full interrupt requests"]
488 pub const _1: Self = Self::new(1);
489 }
490}
491#[doc(hidden)]
492#[derive(Copy, Clone, Eq, PartialEq)]
493pub struct Sslp_SPEC;
494impl crate::sealed::RegSpec for Sslp_SPEC {
495 type DataType = u8;
496}
497
498#[doc = "SPI Slave Select Polarity Register"]
499pub type Sslp = crate::RegValueT<Sslp_SPEC>;
500
501impl Sslp {
502 #[doc = "SSLn0 Signal Polarity Setting"]
503 #[inline(always)]
504 pub fn ssl0p(
505 self,
506 ) -> crate::common::RegisterField<
507 0,
508 0x1,
509 1,
510 0,
511 sslp::Ssl0P,
512 sslp::Ssl0P,
513 Sslp_SPEC,
514 crate::common::RW,
515 > {
516 crate::common::RegisterField::<
517 0,
518 0x1,
519 1,
520 0,
521 sslp::Ssl0P,
522 sslp::Ssl0P,
523 Sslp_SPEC,
524 crate::common::RW,
525 >::from_register(self, 0)
526 }
527}
528impl ::core::default::Default for Sslp {
529 #[inline(always)]
530 fn default() -> Sslp {
531 <crate::RegValueT<Sslp_SPEC> as RegisterValue<_>>::new(0)
532 }
533}
534pub mod sslp {
535
536 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
537 pub struct Ssl0P_SPEC;
538 pub type Ssl0P = crate::EnumBitfieldStruct<u8, Ssl0P_SPEC>;
539 impl Ssl0P {
540 #[doc = "Set SSLn0 signal to active-low"]
541 pub const _0: Self = Self::new(0);
542
543 #[doc = "Set SSLn0 signal to active-high"]
544 pub const _1: Self = Self::new(1);
545 }
546}
547#[doc(hidden)]
548#[derive(Copy, Clone, Eq, PartialEq)]
549pub struct Sppcr_SPEC;
550impl crate::sealed::RegSpec for Sppcr_SPEC {
551 type DataType = u8;
552}
553
554#[doc = "SPI Pin Control Register"]
555pub type Sppcr = crate::RegValueT<Sppcr_SPEC>;
556
557impl Sppcr {
558 #[doc = "SPI Loopback"]
559 #[inline(always)]
560 pub fn splp(
561 self,
562 ) -> crate::common::RegisterField<
563 0,
564 0x1,
565 1,
566 0,
567 sppcr::Splp,
568 sppcr::Splp,
569 Sppcr_SPEC,
570 crate::common::RW,
571 > {
572 crate::common::RegisterField::<
573 0,
574 0x1,
575 1,
576 0,
577 sppcr::Splp,
578 sppcr::Splp,
579 Sppcr_SPEC,
580 crate::common::RW,
581 >::from_register(self, 0)
582 }
583
584 #[doc = "SPI Loopback 2"]
585 #[inline(always)]
586 pub fn splp2(
587 self,
588 ) -> crate::common::RegisterField<
589 1,
590 0x1,
591 1,
592 0,
593 sppcr::Splp2,
594 sppcr::Splp2,
595 Sppcr_SPEC,
596 crate::common::RW,
597 > {
598 crate::common::RegisterField::<
599 1,
600 0x1,
601 1,
602 0,
603 sppcr::Splp2,
604 sppcr::Splp2,
605 Sppcr_SPEC,
606 crate::common::RW,
607 >::from_register(self, 0)
608 }
609
610 #[doc = "MOSI Idle Fixed Value"]
611 #[inline(always)]
612 pub fn moifv(
613 self,
614 ) -> crate::common::RegisterField<
615 4,
616 0x1,
617 1,
618 0,
619 sppcr::Moifv,
620 sppcr::Moifv,
621 Sppcr_SPEC,
622 crate::common::RW,
623 > {
624 crate::common::RegisterField::<
625 4,
626 0x1,
627 1,
628 0,
629 sppcr::Moifv,
630 sppcr::Moifv,
631 Sppcr_SPEC,
632 crate::common::RW,
633 >::from_register(self, 0)
634 }
635
636 #[doc = "MOSI Idle Value Fixing Enable"]
637 #[inline(always)]
638 pub fn moife(
639 self,
640 ) -> crate::common::RegisterField<
641 5,
642 0x1,
643 1,
644 0,
645 sppcr::Moife,
646 sppcr::Moife,
647 Sppcr_SPEC,
648 crate::common::RW,
649 > {
650 crate::common::RegisterField::<
651 5,
652 0x1,
653 1,
654 0,
655 sppcr::Moife,
656 sppcr::Moife,
657 Sppcr_SPEC,
658 crate::common::RW,
659 >::from_register(self, 0)
660 }
661}
662impl ::core::default::Default for Sppcr {
663 #[inline(always)]
664 fn default() -> Sppcr {
665 <crate::RegValueT<Sppcr_SPEC> as RegisterValue<_>>::new(0)
666 }
667}
668pub mod sppcr {
669
670 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
671 pub struct Splp_SPEC;
672 pub type Splp = crate::EnumBitfieldStruct<u8, Splp_SPEC>;
673 impl Splp {
674 #[doc = "Normal mode"]
675 pub const _0: Self = Self::new(0);
676
677 #[doc = "Loopback mode (receive data = inverted transmit data)"]
678 pub const _1: Self = Self::new(1);
679 }
680 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
681 pub struct Splp2_SPEC;
682 pub type Splp2 = crate::EnumBitfieldStruct<u8, Splp2_SPEC>;
683 impl Splp2 {
684 #[doc = "Normal mode"]
685 pub const _0: Self = Self::new(0);
686
687 #[doc = "Loopback mode (receive data = transmit data)"]
688 pub const _1: Self = Self::new(1);
689 }
690 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
691 pub struct Moifv_SPEC;
692 pub type Moifv = crate::EnumBitfieldStruct<u8, Moifv_SPEC>;
693 impl Moifv {
694 #[doc = "Set level output on MOSIn pin during MOSI idling to low"]
695 pub const _0: Self = Self::new(0);
696
697 #[doc = "Set level output on MOSIn pin during MOSI idling to high"]
698 pub const _1: Self = Self::new(1);
699 }
700 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
701 pub struct Moife_SPEC;
702 pub type Moife = crate::EnumBitfieldStruct<u8, Moife_SPEC>;
703 impl Moife {
704 #[doc = "Set MOSI output value to equal final data from previous transfer"]
705 pub const _0: Self = Self::new(0);
706
707 #[doc = "Set MOSI output value to equal value set in the MOIFV bit"]
708 pub const _1: Self = Self::new(1);
709 }
710}
711#[doc(hidden)]
712#[derive(Copy, Clone, Eq, PartialEq)]
713pub struct Spsr_SPEC;
714impl crate::sealed::RegSpec for Spsr_SPEC {
715 type DataType = u8;
716}
717
718#[doc = "SPI Status Register"]
719pub type Spsr = crate::RegValueT<Spsr_SPEC>;
720
721impl Spsr {
722 #[doc = "Overrun Error Flag"]
723 #[inline(always)]
724 pub fn ovrf(
725 self,
726 ) -> crate::common::RegisterField<
727 0,
728 0x1,
729 1,
730 0,
731 spsr::Ovrf,
732 spsr::Ovrf,
733 Spsr_SPEC,
734 crate::common::RW,
735 > {
736 crate::common::RegisterField::<
737 0,
738 0x1,
739 1,
740 0,
741 spsr::Ovrf,
742 spsr::Ovrf,
743 Spsr_SPEC,
744 crate::common::RW,
745 >::from_register(self, 0)
746 }
747
748 #[doc = "SPI Idle Flag"]
749 #[inline(always)]
750 pub fn idlnf(
751 self,
752 ) -> crate::common::RegisterField<
753 1,
754 0x1,
755 1,
756 0,
757 spsr::Idlnf,
758 spsr::Idlnf,
759 Spsr_SPEC,
760 crate::common::R,
761 > {
762 crate::common::RegisterField::<
763 1,
764 0x1,
765 1,
766 0,
767 spsr::Idlnf,
768 spsr::Idlnf,
769 Spsr_SPEC,
770 crate::common::R,
771 >::from_register(self, 0)
772 }
773
774 #[doc = "Mode Fault Error Flag"]
775 #[inline(always)]
776 pub fn modf(
777 self,
778 ) -> crate::common::RegisterField<
779 2,
780 0x1,
781 1,
782 0,
783 spsr::Modf,
784 spsr::Modf,
785 Spsr_SPEC,
786 crate::common::RW,
787 > {
788 crate::common::RegisterField::<
789 2,
790 0x1,
791 1,
792 0,
793 spsr::Modf,
794 spsr::Modf,
795 Spsr_SPEC,
796 crate::common::RW,
797 >::from_register(self, 0)
798 }
799
800 #[doc = "Parity Error Flag"]
801 #[inline(always)]
802 pub fn perf(
803 self,
804 ) -> crate::common::RegisterField<
805 3,
806 0x1,
807 1,
808 0,
809 spsr::Perf,
810 spsr::Perf,
811 Spsr_SPEC,
812 crate::common::RW,
813 > {
814 crate::common::RegisterField::<
815 3,
816 0x1,
817 1,
818 0,
819 spsr::Perf,
820 spsr::Perf,
821 Spsr_SPEC,
822 crate::common::RW,
823 >::from_register(self, 0)
824 }
825
826 #[doc = "Underrun Error Flag"]
827 #[inline(always)]
828 pub fn udrf(
829 self,
830 ) -> crate::common::RegisterField<
831 4,
832 0x1,
833 1,
834 0,
835 spsr::Udrf,
836 spsr::Udrf,
837 Spsr_SPEC,
838 crate::common::RW,
839 > {
840 crate::common::RegisterField::<
841 4,
842 0x1,
843 1,
844 0,
845 spsr::Udrf,
846 spsr::Udrf,
847 Spsr_SPEC,
848 crate::common::RW,
849 >::from_register(self, 0)
850 }
851
852 #[doc = "SPI Transmit Buffer Empty Flag"]
853 #[inline(always)]
854 pub fn sptef(
855 self,
856 ) -> crate::common::RegisterField<
857 5,
858 0x1,
859 1,
860 0,
861 spsr::Sptef,
862 spsr::Sptef,
863 Spsr_SPEC,
864 crate::common::RW,
865 > {
866 crate::common::RegisterField::<
867 5,
868 0x1,
869 1,
870 0,
871 spsr::Sptef,
872 spsr::Sptef,
873 Spsr_SPEC,
874 crate::common::RW,
875 >::from_register(self, 0)
876 }
877
878 #[doc = "SPI Receive Buffer Full Flag"]
879 #[inline(always)]
880 pub fn sprf(
881 self,
882 ) -> crate::common::RegisterField<
883 7,
884 0x1,
885 1,
886 0,
887 spsr::Sprf,
888 spsr::Sprf,
889 Spsr_SPEC,
890 crate::common::RW,
891 > {
892 crate::common::RegisterField::<
893 7,
894 0x1,
895 1,
896 0,
897 spsr::Sprf,
898 spsr::Sprf,
899 Spsr_SPEC,
900 crate::common::RW,
901 >::from_register(self, 0)
902 }
903}
904impl ::core::default::Default for Spsr {
905 #[inline(always)]
906 fn default() -> Spsr {
907 <crate::RegValueT<Spsr_SPEC> as RegisterValue<_>>::new(32)
908 }
909}
910pub mod spsr {
911
912 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
913 pub struct Ovrf_SPEC;
914 pub type Ovrf = crate::EnumBitfieldStruct<u8, Ovrf_SPEC>;
915 impl Ovrf {
916 #[doc = "No overrun error occurred"]
917 pub const _0: Self = Self::new(0);
918
919 #[doc = "Overrun error occurred"]
920 pub const _1: Self = Self::new(1);
921 }
922 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
923 pub struct Idlnf_SPEC;
924 pub type Idlnf = crate::EnumBitfieldStruct<u8, Idlnf_SPEC>;
925 impl Idlnf {
926 #[doc = "SPI is in the idle state"]
927 pub const _0: Self = Self::new(0);
928
929 #[doc = "SPI is in the transfer state"]
930 pub const _1: Self = Self::new(1);
931 }
932 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
933 pub struct Modf_SPEC;
934 pub type Modf = crate::EnumBitfieldStruct<u8, Modf_SPEC>;
935 impl Modf {
936 #[doc = "No mode fault or underrun error occurred"]
937 pub const _0: Self = Self::new(0);
938
939 #[doc = "Mode fault error or underrun error occurred"]
940 pub const _1: Self = Self::new(1);
941 }
942 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
943 pub struct Perf_SPEC;
944 pub type Perf = crate::EnumBitfieldStruct<u8, Perf_SPEC>;
945 impl Perf {
946 #[doc = "No parity error occurred"]
947 pub const _0: Self = Self::new(0);
948
949 #[doc = "Parity error occurred"]
950 pub const _1: Self = Self::new(1);
951 }
952 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
953 pub struct Udrf_SPEC;
954 pub type Udrf = crate::EnumBitfieldStruct<u8, Udrf_SPEC>;
955 impl Udrf {
956 #[doc = "Mode fault error occurred (MODF = 1)"]
957 pub const _0: Self = Self::new(0);
958
959 #[doc = "Underrun error occurred (MODF = 1)"]
960 pub const _1: Self = Self::new(1);
961 }
962 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
963 pub struct Sptef_SPEC;
964 pub type Sptef = crate::EnumBitfieldStruct<u8, Sptef_SPEC>;
965 impl Sptef {
966 #[doc = "Data is in the transmit buffer"]
967 pub const _0: Self = Self::new(0);
968
969 #[doc = "No data is in the transmit buffer"]
970 pub const _1: Self = Self::new(1);
971 }
972 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
973 pub struct Sprf_SPEC;
974 pub type Sprf = crate::EnumBitfieldStruct<u8, Sprf_SPEC>;
975 impl Sprf {
976 #[doc = "No valid data is in SPDR/SPDR_HA"]
977 pub const _0: Self = Self::new(0);
978
979 #[doc = "Valid data is in SPDR/SPDR_HA"]
980 pub const _1: Self = Self::new(1);
981 }
982}
983#[doc(hidden)]
984#[derive(Copy, Clone, Eq, PartialEq)]
985pub struct Spdr_SPEC;
986impl crate::sealed::RegSpec for Spdr_SPEC {
987 type DataType = u32;
988}
989
990#[doc = "SPI Data Register"]
991pub type Spdr = crate::RegValueT<Spdr_SPEC>;
992
993impl NoBitfieldReg<Spdr_SPEC> for Spdr {}
994impl ::core::default::Default for Spdr {
995 #[inline(always)]
996 fn default() -> Spdr {
997 <crate::RegValueT<Spdr_SPEC> as RegisterValue<_>>::new(0)
998 }
999}
1000
1001#[doc(hidden)]
1002#[derive(Copy, Clone, Eq, PartialEq)]
1003pub struct SpdrHa_SPEC;
1004impl crate::sealed::RegSpec for SpdrHa_SPEC {
1005 type DataType = u16;
1006}
1007
1008#[doc = "SPI Data Register"]
1009pub type SpdrHa = crate::RegValueT<SpdrHa_SPEC>;
1010
1011impl NoBitfieldReg<SpdrHa_SPEC> for SpdrHa {}
1012impl ::core::default::Default for SpdrHa {
1013 #[inline(always)]
1014 fn default() -> SpdrHa {
1015 <crate::RegValueT<SpdrHa_SPEC> as RegisterValue<_>>::new(0)
1016 }
1017}
1018
1019#[doc(hidden)]
1020#[derive(Copy, Clone, Eq, PartialEq)]
1021pub struct SpdrBy_SPEC;
1022impl crate::sealed::RegSpec for SpdrBy_SPEC {
1023 type DataType = u8;
1024}
1025
1026#[doc = "SPI Data Register"]
1027pub type SpdrBy = crate::RegValueT<SpdrBy_SPEC>;
1028
1029impl NoBitfieldReg<SpdrBy_SPEC> for SpdrBy {}
1030impl ::core::default::Default for SpdrBy {
1031 #[inline(always)]
1032 fn default() -> SpdrBy {
1033 <crate::RegValueT<SpdrBy_SPEC> as RegisterValue<_>>::new(0)
1034 }
1035}
1036
1037#[doc(hidden)]
1038#[derive(Copy, Clone, Eq, PartialEq)]
1039pub struct Spbr_SPEC;
1040impl crate::sealed::RegSpec for Spbr_SPEC {
1041 type DataType = u8;
1042}
1043
1044#[doc = "SPI Bit Rate Register"]
1045pub type Spbr = crate::RegValueT<Spbr_SPEC>;
1046
1047impl NoBitfieldReg<Spbr_SPEC> for Spbr {}
1048impl ::core::default::Default for Spbr {
1049 #[inline(always)]
1050 fn default() -> Spbr {
1051 <crate::RegValueT<Spbr_SPEC> as RegisterValue<_>>::new(255)
1052 }
1053}
1054
1055#[doc(hidden)]
1056#[derive(Copy, Clone, Eq, PartialEq)]
1057pub struct Spdcr_SPEC;
1058impl crate::sealed::RegSpec for Spdcr_SPEC {
1059 type DataType = u8;
1060}
1061
1062#[doc = "SPI Data Control Register"]
1063pub type Spdcr = crate::RegValueT<Spdcr_SPEC>;
1064
1065impl Spdcr {
1066 #[doc = "SPI Receive/Transmit Data Select"]
1067 #[inline(always)]
1068 pub fn sprdtd(
1069 self,
1070 ) -> crate::common::RegisterField<
1071 4,
1072 0x1,
1073 1,
1074 0,
1075 spdcr::Sprdtd,
1076 spdcr::Sprdtd,
1077 Spdcr_SPEC,
1078 crate::common::RW,
1079 > {
1080 crate::common::RegisterField::<
1081 4,
1082 0x1,
1083 1,
1084 0,
1085 spdcr::Sprdtd,
1086 spdcr::Sprdtd,
1087 Spdcr_SPEC,
1088 crate::common::RW,
1089 >::from_register(self, 0)
1090 }
1091
1092 #[doc = "SPI Word Access/Halfword Access Specification"]
1093 #[inline(always)]
1094 pub fn splw(
1095 self,
1096 ) -> crate::common::RegisterField<
1097 5,
1098 0x1,
1099 1,
1100 0,
1101 spdcr::Splw,
1102 spdcr::Splw,
1103 Spdcr_SPEC,
1104 crate::common::RW,
1105 > {
1106 crate::common::RegisterField::<
1107 5,
1108 0x1,
1109 1,
1110 0,
1111 spdcr::Splw,
1112 spdcr::Splw,
1113 Spdcr_SPEC,
1114 crate::common::RW,
1115 >::from_register(self, 0)
1116 }
1117
1118 #[doc = "SPI Byte Access Specification"]
1119 #[inline(always)]
1120 pub fn spbyt(
1121 self,
1122 ) -> crate::common::RegisterField<
1123 6,
1124 0x1,
1125 1,
1126 0,
1127 spdcr::Spbyt,
1128 spdcr::Spbyt,
1129 Spdcr_SPEC,
1130 crate::common::RW,
1131 > {
1132 crate::common::RegisterField::<
1133 6,
1134 0x1,
1135 1,
1136 0,
1137 spdcr::Spbyt,
1138 spdcr::Spbyt,
1139 Spdcr_SPEC,
1140 crate::common::RW,
1141 >::from_register(self, 0)
1142 }
1143}
1144impl ::core::default::Default for Spdcr {
1145 #[inline(always)]
1146 fn default() -> Spdcr {
1147 <crate::RegValueT<Spdcr_SPEC> as RegisterValue<_>>::new(0)
1148 }
1149}
1150pub mod spdcr {
1151
1152 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1153 pub struct Sprdtd_SPEC;
1154 pub type Sprdtd = crate::EnumBitfieldStruct<u8, Sprdtd_SPEC>;
1155 impl Sprdtd {
1156 #[doc = "Read SPDR/SPDR_HA values from receive buffer"]
1157 pub const _0: Self = Self::new(0);
1158
1159 #[doc = "Read SPDR/SPDR_HA values from transmit buffer, but only if the transmit buffer is empty"]
1160 pub const _1: Self = Self::new(1);
1161 }
1162 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1163 pub struct Splw_SPEC;
1164 pub type Splw = crate::EnumBitfieldStruct<u8, Splw_SPEC>;
1165 impl Splw {
1166 #[doc = "Set SPDR_HA to valid for halfword access"]
1167 pub const _0: Self = Self::new(0);
1168
1169 #[doc = "Set SPDR to valid for word access"]
1170 pub const _1: Self = Self::new(1);
1171 }
1172 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1173 pub struct Spbyt_SPEC;
1174 pub type Spbyt = crate::EnumBitfieldStruct<u8, Spbyt_SPEC>;
1175 impl Spbyt {
1176 #[doc = "SPDR/SPDR_HA is accessed in halfword or word (SPLW is valid)"]
1177 pub const _0: Self = Self::new(0);
1178
1179 #[doc = "SPDR_BY is accessed in byte (SPLW is invalid)"]
1180 pub const _1: Self = Self::new(1);
1181 }
1182}
1183#[doc(hidden)]
1184#[derive(Copy, Clone, Eq, PartialEq)]
1185pub struct Spckd_SPEC;
1186impl crate::sealed::RegSpec for Spckd_SPEC {
1187 type DataType = u8;
1188}
1189
1190#[doc = "SPI Clock Delay Register"]
1191pub type Spckd = crate::RegValueT<Spckd_SPEC>;
1192
1193impl Spckd {
1194 #[doc = "RSPCK Delay Setting"]
1195 #[inline(always)]
1196 pub fn sckdl(
1197 self,
1198 ) -> crate::common::RegisterField<
1199 0,
1200 0x7,
1201 1,
1202 0,
1203 spckd::Sckdl,
1204 spckd::Sckdl,
1205 Spckd_SPEC,
1206 crate::common::RW,
1207 > {
1208 crate::common::RegisterField::<
1209 0,
1210 0x7,
1211 1,
1212 0,
1213 spckd::Sckdl,
1214 spckd::Sckdl,
1215 Spckd_SPEC,
1216 crate::common::RW,
1217 >::from_register(self, 0)
1218 }
1219}
1220impl ::core::default::Default for Spckd {
1221 #[inline(always)]
1222 fn default() -> Spckd {
1223 <crate::RegValueT<Spckd_SPEC> as RegisterValue<_>>::new(0)
1224 }
1225}
1226pub mod spckd {
1227
1228 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1229 pub struct Sckdl_SPEC;
1230 pub type Sckdl = crate::EnumBitfieldStruct<u8, Sckdl_SPEC>;
1231 impl Sckdl {
1232 #[doc = "1 RSPCK"]
1233 pub const _000: Self = Self::new(0);
1234
1235 #[doc = "2 RSPCK"]
1236 pub const _001: Self = Self::new(1);
1237
1238 #[doc = "3 RSPCK"]
1239 pub const _010: Self = Self::new(2);
1240
1241 #[doc = "4 RSPCK"]
1242 pub const _011: Self = Self::new(3);
1243
1244 #[doc = "5 RSPCK"]
1245 pub const _100: Self = Self::new(4);
1246
1247 #[doc = "6 RSPCK"]
1248 pub const _101: Self = Self::new(5);
1249
1250 #[doc = "7 RSPCK"]
1251 pub const _110: Self = Self::new(6);
1252
1253 #[doc = "8 RSPCK"]
1254 pub const _111: Self = Self::new(7);
1255 }
1256}
1257#[doc(hidden)]
1258#[derive(Copy, Clone, Eq, PartialEq)]
1259pub struct Sslnd_SPEC;
1260impl crate::sealed::RegSpec for Sslnd_SPEC {
1261 type DataType = u8;
1262}
1263
1264#[doc = "SPI Slave Select Negation Delay Register"]
1265pub type Sslnd = crate::RegValueT<Sslnd_SPEC>;
1266
1267impl Sslnd {
1268 #[doc = "SSL Negation Delay Setting"]
1269 #[inline(always)]
1270 pub fn slndl(
1271 self,
1272 ) -> crate::common::RegisterField<
1273 0,
1274 0x7,
1275 1,
1276 0,
1277 sslnd::Slndl,
1278 sslnd::Slndl,
1279 Sslnd_SPEC,
1280 crate::common::RW,
1281 > {
1282 crate::common::RegisterField::<
1283 0,
1284 0x7,
1285 1,
1286 0,
1287 sslnd::Slndl,
1288 sslnd::Slndl,
1289 Sslnd_SPEC,
1290 crate::common::RW,
1291 >::from_register(self, 0)
1292 }
1293}
1294impl ::core::default::Default for Sslnd {
1295 #[inline(always)]
1296 fn default() -> Sslnd {
1297 <crate::RegValueT<Sslnd_SPEC> as RegisterValue<_>>::new(0)
1298 }
1299}
1300pub mod sslnd {
1301
1302 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1303 pub struct Slndl_SPEC;
1304 pub type Slndl = crate::EnumBitfieldStruct<u8, Slndl_SPEC>;
1305 impl Slndl {
1306 #[doc = "1 RSPCK"]
1307 pub const _000: Self = Self::new(0);
1308
1309 #[doc = "2 RSPCK"]
1310 pub const _001: Self = Self::new(1);
1311
1312 #[doc = "3 RSPCK"]
1313 pub const _010: Self = Self::new(2);
1314
1315 #[doc = "4 RSPCK"]
1316 pub const _011: Self = Self::new(3);
1317
1318 #[doc = "5 RSPCK"]
1319 pub const _100: Self = Self::new(4);
1320
1321 #[doc = "6 RSPCK"]
1322 pub const _101: Self = Self::new(5);
1323
1324 #[doc = "7 RSPCK"]
1325 pub const _110: Self = Self::new(6);
1326
1327 #[doc = "8 RSPCK"]
1328 pub const _111: Self = Self::new(7);
1329 }
1330}
1331#[doc(hidden)]
1332#[derive(Copy, Clone, Eq, PartialEq)]
1333pub struct Spnd_SPEC;
1334impl crate::sealed::RegSpec for Spnd_SPEC {
1335 type DataType = u8;
1336}
1337
1338#[doc = "SPI Next-Access Delay Register"]
1339pub type Spnd = crate::RegValueT<Spnd_SPEC>;
1340
1341impl Spnd {
1342 #[doc = "SPI Next-Access Delay Setting"]
1343 #[inline(always)]
1344 pub fn spndl(
1345 self,
1346 ) -> crate::common::RegisterField<
1347 0,
1348 0x7,
1349 1,
1350 0,
1351 spnd::Spndl,
1352 spnd::Spndl,
1353 Spnd_SPEC,
1354 crate::common::RW,
1355 > {
1356 crate::common::RegisterField::<
1357 0,
1358 0x7,
1359 1,
1360 0,
1361 spnd::Spndl,
1362 spnd::Spndl,
1363 Spnd_SPEC,
1364 crate::common::RW,
1365 >::from_register(self, 0)
1366 }
1367}
1368impl ::core::default::Default for Spnd {
1369 #[inline(always)]
1370 fn default() -> Spnd {
1371 <crate::RegValueT<Spnd_SPEC> as RegisterValue<_>>::new(0)
1372 }
1373}
1374pub mod spnd {
1375
1376 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1377 pub struct Spndl_SPEC;
1378 pub type Spndl = crate::EnumBitfieldStruct<u8, Spndl_SPEC>;
1379 impl Spndl {
1380 #[doc = "1 RSPCK + 2 PCLKB"]
1381 pub const _000: Self = Self::new(0);
1382
1383 #[doc = "2 RSPCK + 2 PCLKB"]
1384 pub const _001: Self = Self::new(1);
1385
1386 #[doc = "3 RSPCK + 2 PCLKB"]
1387 pub const _010: Self = Self::new(2);
1388
1389 #[doc = "4 RSPCK + 2 PCLKB"]
1390 pub const _011: Self = Self::new(3);
1391
1392 #[doc = "5 RSPCK + 2 PCLKB"]
1393 pub const _100: Self = Self::new(4);
1394
1395 #[doc = "6 RSPCK + 2 PCLKB"]
1396 pub const _101: Self = Self::new(5);
1397
1398 #[doc = "7 RSPCK + 2 PCLKB"]
1399 pub const _110: Self = Self::new(6);
1400
1401 #[doc = "8 RSPCK + 2 PCLKB"]
1402 pub const _111: Self = Self::new(7);
1403 }
1404}
1405#[doc(hidden)]
1406#[derive(Copy, Clone, Eq, PartialEq)]
1407pub struct Spcr2_SPEC;
1408impl crate::sealed::RegSpec for Spcr2_SPEC {
1409 type DataType = u8;
1410}
1411
1412#[doc = "SPI Control Register 2"]
1413pub type Spcr2 = crate::RegValueT<Spcr2_SPEC>;
1414
1415impl Spcr2 {
1416 #[doc = "Parity Enable"]
1417 #[inline(always)]
1418 pub fn sppe(
1419 self,
1420 ) -> crate::common::RegisterField<
1421 0,
1422 0x1,
1423 1,
1424 0,
1425 spcr2::Sppe,
1426 spcr2::Sppe,
1427 Spcr2_SPEC,
1428 crate::common::RW,
1429 > {
1430 crate::common::RegisterField::<
1431 0,
1432 0x1,
1433 1,
1434 0,
1435 spcr2::Sppe,
1436 spcr2::Sppe,
1437 Spcr2_SPEC,
1438 crate::common::RW,
1439 >::from_register(self, 0)
1440 }
1441
1442 #[doc = "Parity Mode"]
1443 #[inline(always)]
1444 pub fn spoe(
1445 self,
1446 ) -> crate::common::RegisterField<
1447 1,
1448 0x1,
1449 1,
1450 0,
1451 spcr2::Spoe,
1452 spcr2::Spoe,
1453 Spcr2_SPEC,
1454 crate::common::RW,
1455 > {
1456 crate::common::RegisterField::<
1457 1,
1458 0x1,
1459 1,
1460 0,
1461 spcr2::Spoe,
1462 spcr2::Spoe,
1463 Spcr2_SPEC,
1464 crate::common::RW,
1465 >::from_register(self, 0)
1466 }
1467
1468 #[doc = "SPI Idle Interrupt Enable"]
1469 #[inline(always)]
1470 pub fn spiie(
1471 self,
1472 ) -> crate::common::RegisterField<
1473 2,
1474 0x1,
1475 1,
1476 0,
1477 spcr2::Spiie,
1478 spcr2::Spiie,
1479 Spcr2_SPEC,
1480 crate::common::RW,
1481 > {
1482 crate::common::RegisterField::<
1483 2,
1484 0x1,
1485 1,
1486 0,
1487 spcr2::Spiie,
1488 spcr2::Spiie,
1489 Spcr2_SPEC,
1490 crate::common::RW,
1491 >::from_register(self, 0)
1492 }
1493
1494 #[doc = "Parity Self-Testing"]
1495 #[inline(always)]
1496 pub fn pte(
1497 self,
1498 ) -> crate::common::RegisterField<
1499 3,
1500 0x1,
1501 1,
1502 0,
1503 spcr2::Pte,
1504 spcr2::Pte,
1505 Spcr2_SPEC,
1506 crate::common::RW,
1507 > {
1508 crate::common::RegisterField::<
1509 3,
1510 0x1,
1511 1,
1512 0,
1513 spcr2::Pte,
1514 spcr2::Pte,
1515 Spcr2_SPEC,
1516 crate::common::RW,
1517 >::from_register(self, 0)
1518 }
1519
1520 #[doc = "RSPCK Auto-Stop Function Enable"]
1521 #[inline(always)]
1522 pub fn sckase(
1523 self,
1524 ) -> crate::common::RegisterField<
1525 4,
1526 0x1,
1527 1,
1528 0,
1529 spcr2::Sckase,
1530 spcr2::Sckase,
1531 Spcr2_SPEC,
1532 crate::common::RW,
1533 > {
1534 crate::common::RegisterField::<
1535 4,
1536 0x1,
1537 1,
1538 0,
1539 spcr2::Sckase,
1540 spcr2::Sckase,
1541 Spcr2_SPEC,
1542 crate::common::RW,
1543 >::from_register(self, 0)
1544 }
1545}
1546impl ::core::default::Default for Spcr2 {
1547 #[inline(always)]
1548 fn default() -> Spcr2 {
1549 <crate::RegValueT<Spcr2_SPEC> as RegisterValue<_>>::new(0)
1550 }
1551}
1552pub mod spcr2 {
1553
1554 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1555 pub struct Sppe_SPEC;
1556 pub type Sppe = crate::EnumBitfieldStruct<u8, Sppe_SPEC>;
1557 impl Sppe {
1558 #[doc = "Do not add parity bit to transmit data and do not check parity bit of receive data"]
1559 pub const _0: Self = Self::new(0);
1560
1561 #[doc = "When SPCR.TXMD = 0: Add parity bit to transmit data and check parity bit of receive data When SPCR.TXMD = 1: Add parity bit to transmit data but do not check parity bit of receive data"]
1562 pub const _1: Self = Self::new(1);
1563 }
1564 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1565 pub struct Spoe_SPEC;
1566 pub type Spoe = crate::EnumBitfieldStruct<u8, Spoe_SPEC>;
1567 impl Spoe {
1568 #[doc = "Select even parity for transmission and reception"]
1569 pub const _0: Self = Self::new(0);
1570
1571 #[doc = "Select odd parity for transmission and reception"]
1572 pub const _1: Self = Self::new(1);
1573 }
1574 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1575 pub struct Spiie_SPEC;
1576 pub type Spiie = crate::EnumBitfieldStruct<u8, Spiie_SPEC>;
1577 impl Spiie {
1578 #[doc = "Disable idle interrupt requests"]
1579 pub const _0: Self = Self::new(0);
1580
1581 #[doc = "Enable idle interrupt requests"]
1582 pub const _1: Self = Self::new(1);
1583 }
1584 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1585 pub struct Pte_SPEC;
1586 pub type Pte = crate::EnumBitfieldStruct<u8, Pte_SPEC>;
1587 impl Pte {
1588 #[doc = "Disable self-diagnosis function of the parity circuit"]
1589 pub const _0: Self = Self::new(0);
1590
1591 #[doc = "Enable self-diagnosis function of the parity circuit"]
1592 pub const _1: Self = Self::new(1);
1593 }
1594 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1595 pub struct Sckase_SPEC;
1596 pub type Sckase = crate::EnumBitfieldStruct<u8, Sckase_SPEC>;
1597 impl Sckase {
1598 #[doc = "Disable RSPCK auto-stop function"]
1599 pub const _0: Self = Self::new(0);
1600
1601 #[doc = "Enable RSPCK auto-stop function"]
1602 pub const _1: Self = Self::new(1);
1603 }
1604}
1605#[doc(hidden)]
1606#[derive(Copy, Clone, Eq, PartialEq)]
1607pub struct Spcmd0_SPEC;
1608impl crate::sealed::RegSpec for Spcmd0_SPEC {
1609 type DataType = u16;
1610}
1611
1612#[doc = "SPI Command Register 0"]
1613pub type Spcmd0 = crate::RegValueT<Spcmd0_SPEC>;
1614
1615impl Spcmd0 {
1616 #[doc = "RSPCK Phase Setting"]
1617 #[inline(always)]
1618 pub fn cpha(
1619 self,
1620 ) -> crate::common::RegisterField<
1621 0,
1622 0x1,
1623 1,
1624 0,
1625 spcmd0::Cpha,
1626 spcmd0::Cpha,
1627 Spcmd0_SPEC,
1628 crate::common::RW,
1629 > {
1630 crate::common::RegisterField::<
1631 0,
1632 0x1,
1633 1,
1634 0,
1635 spcmd0::Cpha,
1636 spcmd0::Cpha,
1637 Spcmd0_SPEC,
1638 crate::common::RW,
1639 >::from_register(self, 0)
1640 }
1641
1642 #[doc = "RSPCK Polarity Setting"]
1643 #[inline(always)]
1644 pub fn cpol(
1645 self,
1646 ) -> crate::common::RegisterField<
1647 1,
1648 0x1,
1649 1,
1650 0,
1651 spcmd0::Cpol,
1652 spcmd0::Cpol,
1653 Spcmd0_SPEC,
1654 crate::common::RW,
1655 > {
1656 crate::common::RegisterField::<
1657 1,
1658 0x1,
1659 1,
1660 0,
1661 spcmd0::Cpol,
1662 spcmd0::Cpol,
1663 Spcmd0_SPEC,
1664 crate::common::RW,
1665 >::from_register(self, 0)
1666 }
1667
1668 #[doc = "Bit Rate Division Setting"]
1669 #[inline(always)]
1670 pub fn brdv(
1671 self,
1672 ) -> crate::common::RegisterField<
1673 2,
1674 0x3,
1675 1,
1676 0,
1677 spcmd0::Brdv,
1678 spcmd0::Brdv,
1679 Spcmd0_SPEC,
1680 crate::common::RW,
1681 > {
1682 crate::common::RegisterField::<
1683 2,
1684 0x3,
1685 1,
1686 0,
1687 spcmd0::Brdv,
1688 spcmd0::Brdv,
1689 Spcmd0_SPEC,
1690 crate::common::RW,
1691 >::from_register(self, 0)
1692 }
1693
1694 #[doc = "SPI Data Length Setting"]
1695 #[inline(always)]
1696 pub fn spb(
1697 self,
1698 ) -> crate::common::RegisterField<
1699 8,
1700 0xf,
1701 1,
1702 0,
1703 spcmd0::Spb,
1704 spcmd0::Spb,
1705 Spcmd0_SPEC,
1706 crate::common::RW,
1707 > {
1708 crate::common::RegisterField::<
1709 8,
1710 0xf,
1711 1,
1712 0,
1713 spcmd0::Spb,
1714 spcmd0::Spb,
1715 Spcmd0_SPEC,
1716 crate::common::RW,
1717 >::from_register(self, 0)
1718 }
1719
1720 #[doc = "SPI LSB First"]
1721 #[inline(always)]
1722 pub fn lsbf(
1723 self,
1724 ) -> crate::common::RegisterField<
1725 12,
1726 0x1,
1727 1,
1728 0,
1729 spcmd0::Lsbf,
1730 spcmd0::Lsbf,
1731 Spcmd0_SPEC,
1732 crate::common::RW,
1733 > {
1734 crate::common::RegisterField::<
1735 12,
1736 0x1,
1737 1,
1738 0,
1739 spcmd0::Lsbf,
1740 spcmd0::Lsbf,
1741 Spcmd0_SPEC,
1742 crate::common::RW,
1743 >::from_register(self, 0)
1744 }
1745
1746 #[doc = "SPI Next-Access Delay Enable"]
1747 #[inline(always)]
1748 pub fn spnden(
1749 self,
1750 ) -> crate::common::RegisterField<
1751 13,
1752 0x1,
1753 1,
1754 0,
1755 spcmd0::Spnden,
1756 spcmd0::Spnden,
1757 Spcmd0_SPEC,
1758 crate::common::RW,
1759 > {
1760 crate::common::RegisterField::<
1761 13,
1762 0x1,
1763 1,
1764 0,
1765 spcmd0::Spnden,
1766 spcmd0::Spnden,
1767 Spcmd0_SPEC,
1768 crate::common::RW,
1769 >::from_register(self, 0)
1770 }
1771
1772 #[doc = "SSL Negation Delay Setting Enable"]
1773 #[inline(always)]
1774 pub fn slnden(
1775 self,
1776 ) -> crate::common::RegisterField<
1777 14,
1778 0x1,
1779 1,
1780 0,
1781 spcmd0::Slnden,
1782 spcmd0::Slnden,
1783 Spcmd0_SPEC,
1784 crate::common::RW,
1785 > {
1786 crate::common::RegisterField::<
1787 14,
1788 0x1,
1789 1,
1790 0,
1791 spcmd0::Slnden,
1792 spcmd0::Slnden,
1793 Spcmd0_SPEC,
1794 crate::common::RW,
1795 >::from_register(self, 0)
1796 }
1797
1798 #[doc = "RSPCK Delay Setting Enable"]
1799 #[inline(always)]
1800 pub fn sckden(
1801 self,
1802 ) -> crate::common::RegisterField<
1803 15,
1804 0x1,
1805 1,
1806 0,
1807 spcmd0::Sckden,
1808 spcmd0::Sckden,
1809 Spcmd0_SPEC,
1810 crate::common::RW,
1811 > {
1812 crate::common::RegisterField::<
1813 15,
1814 0x1,
1815 1,
1816 0,
1817 spcmd0::Sckden,
1818 spcmd0::Sckden,
1819 Spcmd0_SPEC,
1820 crate::common::RW,
1821 >::from_register(self, 0)
1822 }
1823}
1824impl ::core::default::Default for Spcmd0 {
1825 #[inline(always)]
1826 fn default() -> Spcmd0 {
1827 <crate::RegValueT<Spcmd0_SPEC> as RegisterValue<_>>::new(1805)
1828 }
1829}
1830pub mod spcmd0 {
1831
1832 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1833 pub struct Cpha_SPEC;
1834 pub type Cpha = crate::EnumBitfieldStruct<u8, Cpha_SPEC>;
1835 impl Cpha {
1836 #[doc = "Select data sampling on leading edge, data change on trailing edge"]
1837 pub const _0: Self = Self::new(0);
1838
1839 #[doc = "Select data change on leading edge, data sampling on trailing edge"]
1840 pub const _1: Self = Self::new(1);
1841 }
1842 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1843 pub struct Cpol_SPEC;
1844 pub type Cpol = crate::EnumBitfieldStruct<u8, Cpol_SPEC>;
1845 impl Cpol {
1846 #[doc = "Set RSPCK low during idle"]
1847 pub const _0: Self = Self::new(0);
1848
1849 #[doc = "Set RSPCK high during idle"]
1850 pub const _1: Self = Self::new(1);
1851 }
1852 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1853 pub struct Brdv_SPEC;
1854 pub type Brdv = crate::EnumBitfieldStruct<u8, Brdv_SPEC>;
1855 impl Brdv {
1856 #[doc = "Base bit rate"]
1857 pub const _00: Self = Self::new(0);
1858
1859 #[doc = "Base bit rate divided by 2"]
1860 pub const _01: Self = Self::new(1);
1861
1862 #[doc = "Base bit rate divided by 4"]
1863 pub const _10: Self = Self::new(2);
1864
1865 #[doc = "Base bit rate divided by 8"]
1866 pub const _11: Self = Self::new(3);
1867 }
1868 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1869 pub struct Spb_SPEC;
1870 pub type Spb = crate::EnumBitfieldStruct<u8, Spb_SPEC>;
1871 impl Spb {
1872 #[doc = "20 bits"]
1873 pub const _0_X_0: Self = Self::new(0);
1874
1875 #[doc = "24 bits"]
1876 pub const _0_X_1: Self = Self::new(1);
1877
1878 #[doc = "32 bits"]
1879 pub const _0_X_2: Self = Self::new(2);
1880
1881 #[doc = "32 bits"]
1882 pub const _0_X_3: Self = Self::new(3);
1883
1884 #[doc = "9 bits"]
1885 pub const _0_X_8: Self = Self::new(8);
1886
1887 #[doc = "10 bits"]
1888 pub const _0_X_9: Self = Self::new(9);
1889
1890 #[doc = "11 bits"]
1891 pub const _0_X_A: Self = Self::new(10);
1892
1893 #[doc = "12 bits"]
1894 pub const _0_X_B: Self = Self::new(11);
1895
1896 #[doc = "13 bits"]
1897 pub const _0_X_C: Self = Self::new(12);
1898
1899 #[doc = "14 bits"]
1900 pub const _0_X_D: Self = Self::new(13);
1901
1902 #[doc = "15 bits"]
1903 pub const _0_X_E: Self = Self::new(14);
1904
1905 #[doc = "16 bits"]
1906 pub const _0_X_F: Self = Self::new(15);
1907
1908 #[doc = "8 bits"]
1909 pub const OTHERS: Self = Self::new(0);
1910 }
1911 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1912 pub struct Lsbf_SPEC;
1913 pub type Lsbf = crate::EnumBitfieldStruct<u8, Lsbf_SPEC>;
1914 impl Lsbf {
1915 #[doc = "MSB-first"]
1916 pub const _0: Self = Self::new(0);
1917
1918 #[doc = "LSB-first"]
1919 pub const _1: Self = Self::new(1);
1920 }
1921 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1922 pub struct Spnden_SPEC;
1923 pub type Spnden = crate::EnumBitfieldStruct<u8, Spnden_SPEC>;
1924 impl Spnden {
1925 #[doc = "Select next-access delay of 1 RSPCK + 2 PCLKB"]
1926 pub const _0: Self = Self::new(0);
1927
1928 #[doc = "Select next-access delay equal to the setting in the SPI Next-Access Delay Register (SPND)"]
1929 pub const _1: Self = Self::new(1);
1930 }
1931 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1932 pub struct Slnden_SPEC;
1933 pub type Slnden = crate::EnumBitfieldStruct<u8, Slnden_SPEC>;
1934 impl Slnden {
1935 #[doc = "Select SSL negation delay of 1 RSPCK"]
1936 pub const _0: Self = Self::new(0);
1937
1938 #[doc = "Select SSL negation delay equal to the setting in the SPI Slave Select Negation Delay Register (SSLND)"]
1939 pub const _1: Self = Self::new(1);
1940 }
1941 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1942 pub struct Sckden_SPEC;
1943 pub type Sckden = crate::EnumBitfieldStruct<u8, Sckden_SPEC>;
1944 impl Sckden {
1945 #[doc = "Select RSPCK delay of 1 RSPCK"]
1946 pub const _0: Self = Self::new(0);
1947
1948 #[doc = "Select RSPCK delay equal to the setting in the SPI Clock Delay Register (SPCKD)"]
1949 pub const _1: Self = Self::new(1);
1950 }
1951}