ra2e2_pac/
rmpu.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.40.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:46:37 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Renesas Memory Protection Unit"]
28unsafe impl ::core::marker::Send for super::Rmpu {}
29unsafe impl ::core::marker::Sync for super::Rmpu {}
30impl super::Rmpu {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Bus Master MPU Control Register"]
38    #[inline(always)]
39    pub const fn mmpuctla(
40        &self,
41    ) -> &'static crate::common::Reg<self::Mmpuctla_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Mmpuctla_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "Group A Protection of Register"]
50    #[inline(always)]
51    pub const fn mmpupta(
52        &self,
53    ) -> &'static crate::common::Reg<self::Mmpupta_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Mmpupta_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(258usize),
57            )
58        }
59    }
60
61    #[doc = "Group A Region %s access control register"]
62    #[inline(always)]
63    pub const fn mmpuaca(
64        &self,
65    ) -> &'static crate::common::ClusterRegisterArray<
66        crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW>,
67        4,
68        0x10,
69    > {
70        unsafe {
71            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x200usize))
72        }
73    }
74    #[inline(always)]
75    pub const fn mmpuaca0(
76        &self,
77    ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(0x200usize),
81            )
82        }
83    }
84    #[inline(always)]
85    pub const fn mmpuaca1(
86        &self,
87    ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(0x210usize),
91            )
92        }
93    }
94    #[inline(always)]
95    pub const fn mmpuaca2(
96        &self,
97    ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(0x220usize),
101            )
102        }
103    }
104    #[inline(always)]
105    pub const fn mmpuaca3(
106        &self,
107    ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
108        unsafe {
109            crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
110                self._svd2pac_as_ptr().add(0x230usize),
111            )
112        }
113    }
114
115    #[doc = "Group A Region %s Start Address Register"]
116    #[inline(always)]
117    pub const fn mmpusa(
118        &self,
119    ) -> &'static crate::common::ClusterRegisterArray<
120        crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW>,
121        4,
122        0x10,
123    > {
124        unsafe {
125            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x204usize))
126        }
127    }
128    #[inline(always)]
129    pub const fn mmpusa0(
130        &self,
131    ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
132        unsafe {
133            crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
134                self._svd2pac_as_ptr().add(0x204usize),
135            )
136        }
137    }
138    #[inline(always)]
139    pub const fn mmpusa1(
140        &self,
141    ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
142        unsafe {
143            crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
144                self._svd2pac_as_ptr().add(0x214usize),
145            )
146        }
147    }
148    #[inline(always)]
149    pub const fn mmpusa2(
150        &self,
151    ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
152        unsafe {
153            crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
154                self._svd2pac_as_ptr().add(0x224usize),
155            )
156        }
157    }
158    #[inline(always)]
159    pub const fn mmpusa3(
160        &self,
161    ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
162        unsafe {
163            crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
164                self._svd2pac_as_ptr().add(0x234usize),
165            )
166        }
167    }
168
169    #[doc = "Group A Region %s End Address Register"]
170    #[inline(always)]
171    pub const fn mmpuea(
172        &self,
173    ) -> &'static crate::common::ClusterRegisterArray<
174        crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW>,
175        4,
176        0x10,
177    > {
178        unsafe {
179            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x208usize))
180        }
181    }
182    #[inline(always)]
183    pub const fn mmpuea0(
184        &self,
185    ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
186        unsafe {
187            crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
188                self._svd2pac_as_ptr().add(0x208usize),
189            )
190        }
191    }
192    #[inline(always)]
193    pub const fn mmpuea1(
194        &self,
195    ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
196        unsafe {
197            crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
198                self._svd2pac_as_ptr().add(0x218usize),
199            )
200        }
201    }
202    #[inline(always)]
203    pub const fn mmpuea2(
204        &self,
205    ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
206        unsafe {
207            crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
208                self._svd2pac_as_ptr().add(0x228usize),
209            )
210        }
211    }
212    #[inline(always)]
213    pub const fn mmpuea3(
214        &self,
215    ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
216        unsafe {
217            crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
218                self._svd2pac_as_ptr().add(0x238usize),
219            )
220        }
221    }
222
223    #[doc = "Slave MPU Control Register"]
224    #[inline(always)]
225    pub const fn smpuctl(
226        &self,
227    ) -> &'static crate::common::Reg<self::Smpuctl_SPEC, crate::common::RW> {
228        unsafe {
229            crate::common::Reg::<self::Smpuctl_SPEC, crate::common::RW>::from_ptr(
230                self._svd2pac_as_ptr().add(3072usize),
231            )
232        }
233    }
234
235    #[doc = "Access Control Register for Memory Bus 1"]
236    #[inline(always)]
237    pub const fn smpumbiu(
238        &self,
239    ) -> &'static crate::common::Reg<self::Smpumbiu_SPEC, crate::common::RW> {
240        unsafe {
241            crate::common::Reg::<self::Smpumbiu_SPEC, crate::common::RW>::from_ptr(
242                self._svd2pac_as_ptr().add(3088usize),
243            )
244        }
245    }
246
247    #[doc = "Access Control Register for Internal Peripheral Bus 9"]
248    #[inline(always)]
249    pub const fn smpufbiu(
250        &self,
251    ) -> &'static crate::common::Reg<self::Smpufbiu_SPEC, crate::common::RW> {
252        unsafe {
253            crate::common::Reg::<self::Smpufbiu_SPEC, crate::common::RW>::from_ptr(
254                self._svd2pac_as_ptr().add(3092usize),
255            )
256        }
257    }
258
259    #[doc = "Access Control Register for Memory Bus 4"]
260    #[inline(always)]
261    pub const fn smpusram0(
262        &self,
263    ) -> &'static crate::common::Reg<self::Smpusram0_SPEC, crate::common::RW> {
264        unsafe {
265            crate::common::Reg::<self::Smpusram0_SPEC, crate::common::RW>::from_ptr(
266                self._svd2pac_as_ptr().add(3096usize),
267            )
268        }
269    }
270
271    #[doc = "Access Control Register for Internal Peripheral Bus 1"]
272    #[inline(always)]
273    pub const fn smpup0biu(
274        &self,
275    ) -> &'static crate::common::Reg<self::Smpup0Biu_SPEC, crate::common::RW> {
276        unsafe {
277            crate::common::Reg::<self::Smpup0Biu_SPEC, crate::common::RW>::from_ptr(
278                self._svd2pac_as_ptr().add(3104usize),
279            )
280        }
281    }
282
283    #[doc = "Access Control Register for Internal Peripheral Bus 3"]
284    #[inline(always)]
285    pub const fn smpup2biu(
286        &self,
287    ) -> &'static crate::common::Reg<self::Smpup2Biu_SPEC, crate::common::RW> {
288        unsafe {
289            crate::common::Reg::<self::Smpup2Biu_SPEC, crate::common::RW>::from_ptr(
290                self._svd2pac_as_ptr().add(3108usize),
291            )
292        }
293    }
294
295    #[doc = "Access Control Register for Internal Peripheral Bus 7"]
296    #[inline(always)]
297    pub const fn smpup6biu(
298        &self,
299    ) -> &'static crate::common::Reg<self::Smpup6Biu_SPEC, crate::common::RW> {
300        unsafe {
301            crate::common::Reg::<self::Smpup6Biu_SPEC, crate::common::RW>::from_ptr(
302                self._svd2pac_as_ptr().add(3112usize),
303            )
304        }
305    }
306
307    #[doc = "Stack Pointer Monitor Operation After Detection Register"]
308    #[inline(always)]
309    pub const fn mspmpuoad(
310        &self,
311    ) -> &'static crate::common::Reg<self::Mspmpuoad_SPEC, crate::common::RW> {
312        unsafe {
313            crate::common::Reg::<self::Mspmpuoad_SPEC, crate::common::RW>::from_ptr(
314                self._svd2pac_as_ptr().add(3328usize),
315            )
316        }
317    }
318
319    #[doc = "Stack Pointer Monitor Access Control Register"]
320    #[inline(always)]
321    pub const fn mspmpuctl(
322        &self,
323    ) -> &'static crate::common::Reg<self::Mspmpuctl_SPEC, crate::common::RW> {
324        unsafe {
325            crate::common::Reg::<self::Mspmpuctl_SPEC, crate::common::RW>::from_ptr(
326                self._svd2pac_as_ptr().add(3332usize),
327            )
328        }
329    }
330
331    #[doc = "Stack Pointer Monitor Protection Register"]
332    #[inline(always)]
333    pub const fn mspmpupt(
334        &self,
335    ) -> &'static crate::common::Reg<self::Mspmpupt_SPEC, crate::common::RW> {
336        unsafe {
337            crate::common::Reg::<self::Mspmpupt_SPEC, crate::common::RW>::from_ptr(
338                self._svd2pac_as_ptr().add(3334usize),
339            )
340        }
341    }
342
343    #[doc = "Main Stack Pointer (MSP) Monitor Start Address Register"]
344    #[inline(always)]
345    pub const fn mspmpusa(
346        &self,
347    ) -> &'static crate::common::Reg<self::Mspmpusa_SPEC, crate::common::RW> {
348        unsafe {
349            crate::common::Reg::<self::Mspmpusa_SPEC, crate::common::RW>::from_ptr(
350                self._svd2pac_as_ptr().add(3336usize),
351            )
352        }
353    }
354
355    #[doc = "Main Stack Pointer (MSP) Monitor End Address Register"]
356    #[inline(always)]
357    pub const fn mspmpuea(
358        &self,
359    ) -> &'static crate::common::Reg<self::Mspmpuea_SPEC, crate::common::RW> {
360        unsafe {
361            crate::common::Reg::<self::Mspmpuea_SPEC, crate::common::RW>::from_ptr(
362                self._svd2pac_as_ptr().add(3340usize),
363            )
364        }
365    }
366
367    #[doc = "Stack Pointer Monitor Operation After Detection Register"]
368    #[inline(always)]
369    pub const fn pspmpuoad(
370        &self,
371    ) -> &'static crate::common::Reg<self::Pspmpuoad_SPEC, crate::common::RW> {
372        unsafe {
373            crate::common::Reg::<self::Pspmpuoad_SPEC, crate::common::RW>::from_ptr(
374                self._svd2pac_as_ptr().add(3344usize),
375            )
376        }
377    }
378
379    #[doc = "Stack Pointer Monitor Access Control Register"]
380    #[inline(always)]
381    pub const fn pspmpuctl(
382        &self,
383    ) -> &'static crate::common::Reg<self::Pspmpuctl_SPEC, crate::common::RW> {
384        unsafe {
385            crate::common::Reg::<self::Pspmpuctl_SPEC, crate::common::RW>::from_ptr(
386                self._svd2pac_as_ptr().add(3348usize),
387            )
388        }
389    }
390
391    #[doc = "Stack Pointer Monitor Protection Register"]
392    #[inline(always)]
393    pub const fn pspmpupt(
394        &self,
395    ) -> &'static crate::common::Reg<self::Pspmpupt_SPEC, crate::common::RW> {
396        unsafe {
397            crate::common::Reg::<self::Pspmpupt_SPEC, crate::common::RW>::from_ptr(
398                self._svd2pac_as_ptr().add(3350usize),
399            )
400        }
401    }
402
403    #[doc = "Process Stack Pointer (PSP) Monitor Start Address Register"]
404    #[inline(always)]
405    pub const fn pspmpusa(
406        &self,
407    ) -> &'static crate::common::Reg<self::Pspmpusa_SPEC, crate::common::RW> {
408        unsafe {
409            crate::common::Reg::<self::Pspmpusa_SPEC, crate::common::RW>::from_ptr(
410                self._svd2pac_as_ptr().add(3352usize),
411            )
412        }
413    }
414
415    #[doc = "Process Stack Pointer (PSP) Monitor End Address Register"]
416    #[inline(always)]
417    pub const fn pspmpuea(
418        &self,
419    ) -> &'static crate::common::Reg<self::Pspmpuea_SPEC, crate::common::RW> {
420        unsafe {
421            crate::common::Reg::<self::Pspmpuea_SPEC, crate::common::RW>::from_ptr(
422                self._svd2pac_as_ptr().add(3356usize),
423            )
424        }
425    }
426}
427#[doc(hidden)]
428#[derive(Copy, Clone, Eq, PartialEq)]
429pub struct Mmpuctla_SPEC;
430impl crate::sealed::RegSpec for Mmpuctla_SPEC {
431    type DataType = u16;
432}
433
434#[doc = "Bus Master MPU Control Register"]
435pub type Mmpuctla = crate::RegValueT<Mmpuctla_SPEC>;
436
437impl Mmpuctla {
438    #[doc = "Master Group Enable"]
439    #[inline(always)]
440    pub fn enable(
441        self,
442    ) -> crate::common::RegisterField<
443        0,
444        0x1,
445        1,
446        0,
447        mmpuctla::Enable,
448        mmpuctla::Enable,
449        Mmpuctla_SPEC,
450        crate::common::RW,
451    > {
452        crate::common::RegisterField::<
453            0,
454            0x1,
455            1,
456            0,
457            mmpuctla::Enable,
458            mmpuctla::Enable,
459            Mmpuctla_SPEC,
460            crate::common::RW,
461        >::from_register(self, 0)
462    }
463
464    #[doc = "Operation After Detection"]
465    #[inline(always)]
466    pub fn oad(
467        self,
468    ) -> crate::common::RegisterField<
469        1,
470        0x1,
471        1,
472        0,
473        mmpuctla::Oad,
474        mmpuctla::Oad,
475        Mmpuctla_SPEC,
476        crate::common::RW,
477    > {
478        crate::common::RegisterField::<
479            1,
480            0x1,
481            1,
482            0,
483            mmpuctla::Oad,
484            mmpuctla::Oad,
485            Mmpuctla_SPEC,
486            crate::common::RW,
487        >::from_register(self, 0)
488    }
489
490    #[doc = "Key Code"]
491    #[inline(always)]
492    pub fn key(
493        self,
494    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuctla_SPEC, crate::common::RW> {
495        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuctla_SPEC,crate::common::RW>::from_register(self,0)
496    }
497}
498impl ::core::default::Default for Mmpuctla {
499    #[inline(always)]
500    fn default() -> Mmpuctla {
501        <crate::RegValueT<Mmpuctla_SPEC> as RegisterValue<_>>::new(0)
502    }
503}
504pub mod mmpuctla {
505
506    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
507    pub struct Enable_SPEC;
508    pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
509    impl Enable {
510        #[doc = "Master group A disabled"]
511        pub const _0: Self = Self::new(0);
512
513        #[doc = "Master group A enabled"]
514        pub const _1: Self = Self::new(1);
515    }
516    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
517    pub struct Oad_SPEC;
518    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
519    impl Oad {
520        #[doc = "Non-maskable interrupt"]
521        pub const _0: Self = Self::new(0);
522
523        #[doc = "Reset"]
524        pub const _1: Self = Self::new(1);
525    }
526}
527#[doc(hidden)]
528#[derive(Copy, Clone, Eq, PartialEq)]
529pub struct Mmpupta_SPEC;
530impl crate::sealed::RegSpec for Mmpupta_SPEC {
531    type DataType = u16;
532}
533
534#[doc = "Group A Protection of Register"]
535pub type Mmpupta = crate::RegValueT<Mmpupta_SPEC>;
536
537impl Mmpupta {
538    #[doc = "Protection of Register"]
539    #[inline(always)]
540    pub fn protect(
541        self,
542    ) -> crate::common::RegisterField<
543        0,
544        0x1,
545        1,
546        0,
547        mmpupta::Protect,
548        mmpupta::Protect,
549        Mmpupta_SPEC,
550        crate::common::RW,
551    > {
552        crate::common::RegisterField::<
553            0,
554            0x1,
555            1,
556            0,
557            mmpupta::Protect,
558            mmpupta::Protect,
559            Mmpupta_SPEC,
560            crate::common::RW,
561        >::from_register(self, 0)
562    }
563
564    #[doc = "Key Code"]
565    #[inline(always)]
566    pub fn key(
567        self,
568    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpupta_SPEC, crate::common::RW> {
569        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpupta_SPEC,crate::common::RW>::from_register(self,0)
570    }
571}
572impl ::core::default::Default for Mmpupta {
573    #[inline(always)]
574    fn default() -> Mmpupta {
575        <crate::RegValueT<Mmpupta_SPEC> as RegisterValue<_>>::new(0)
576    }
577}
578pub mod mmpupta {
579
580    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
581    pub struct Protect_SPEC;
582    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
583    impl Protect {
584        #[doc = "All bus master MPU group A register writes are permitted."]
585        pub const _0: Self = Self::new(0);
586
587        #[doc = "All bus master MPU group A register writes are protected. Reads are permitted."]
588        pub const _1: Self = Self::new(1);
589    }
590}
591#[doc(hidden)]
592#[derive(Copy, Clone, Eq, PartialEq)]
593pub struct Mmpuaca_SPEC;
594impl crate::sealed::RegSpec for Mmpuaca_SPEC {
595    type DataType = u16;
596}
597
598#[doc = "Group A Region %s access control register"]
599pub type Mmpuaca = crate::RegValueT<Mmpuaca_SPEC>;
600
601impl Mmpuaca {
602    #[doc = "Region Enable"]
603    #[inline(always)]
604    pub fn enable(
605        self,
606    ) -> crate::common::RegisterField<
607        0,
608        0x1,
609        1,
610        0,
611        mmpuaca::Enable,
612        mmpuaca::Enable,
613        Mmpuaca_SPEC,
614        crate::common::RW,
615    > {
616        crate::common::RegisterField::<
617            0,
618            0x1,
619            1,
620            0,
621            mmpuaca::Enable,
622            mmpuaca::Enable,
623            Mmpuaca_SPEC,
624            crate::common::RW,
625        >::from_register(self, 0)
626    }
627
628    #[doc = "Read Protection"]
629    #[inline(always)]
630    pub fn rp(
631        self,
632    ) -> crate::common::RegisterField<
633        1,
634        0x1,
635        1,
636        0,
637        mmpuaca::Rp,
638        mmpuaca::Rp,
639        Mmpuaca_SPEC,
640        crate::common::RW,
641    > {
642        crate::common::RegisterField::<
643            1,
644            0x1,
645            1,
646            0,
647            mmpuaca::Rp,
648            mmpuaca::Rp,
649            Mmpuaca_SPEC,
650            crate::common::RW,
651        >::from_register(self, 0)
652    }
653
654    #[doc = "Write Protection"]
655    #[inline(always)]
656    pub fn wp(
657        self,
658    ) -> crate::common::RegisterField<
659        2,
660        0x1,
661        1,
662        0,
663        mmpuaca::Wp,
664        mmpuaca::Wp,
665        Mmpuaca_SPEC,
666        crate::common::RW,
667    > {
668        crate::common::RegisterField::<
669            2,
670            0x1,
671            1,
672            0,
673            mmpuaca::Wp,
674            mmpuaca::Wp,
675            Mmpuaca_SPEC,
676            crate::common::RW,
677        >::from_register(self, 0)
678    }
679}
680impl ::core::default::Default for Mmpuaca {
681    #[inline(always)]
682    fn default() -> Mmpuaca {
683        <crate::RegValueT<Mmpuaca_SPEC> as RegisterValue<_>>::new(0)
684    }
685}
686pub mod mmpuaca {
687
688    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
689    pub struct Enable_SPEC;
690    pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
691    impl Enable {
692        #[doc = "Group A region n disabled"]
693        pub const _0: Self = Self::new(0);
694
695        #[doc = "Group A region n enabled"]
696        pub const _1: Self = Self::new(1);
697    }
698    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
699    pub struct Rp_SPEC;
700    pub type Rp = crate::EnumBitfieldStruct<u8, Rp_SPEC>;
701    impl Rp {
702        #[doc = "Read permission"]
703        pub const _0: Self = Self::new(0);
704
705        #[doc = "Read protection"]
706        pub const _1: Self = Self::new(1);
707    }
708    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
709    pub struct Wp_SPEC;
710    pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
711    impl Wp {
712        #[doc = "Write permission"]
713        pub const _0: Self = Self::new(0);
714
715        #[doc = "Write protection"]
716        pub const _1: Self = Self::new(1);
717    }
718}
719#[doc(hidden)]
720#[derive(Copy, Clone, Eq, PartialEq)]
721pub struct Mmpusa_SPEC;
722impl crate::sealed::RegSpec for Mmpusa_SPEC {
723    type DataType = u32;
724}
725
726#[doc = "Group A Region %s Start Address Register"]
727pub type Mmpusa = crate::RegValueT<Mmpusa_SPEC>;
728
729impl Mmpusa {
730    #[doc = "Region Start Address"]
731    #[inline(always)]
732    pub fn mmpusa(
733        self,
734    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mmpusa_SPEC, crate::common::RW>
735    {
736        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Mmpusa_SPEC,crate::common::RW>::from_register(self,0)
737    }
738}
739impl ::core::default::Default for Mmpusa {
740    #[inline(always)]
741    fn default() -> Mmpusa {
742        <crate::RegValueT<Mmpusa_SPEC> as RegisterValue<_>>::new(0)
743    }
744}
745
746#[doc(hidden)]
747#[derive(Copy, Clone, Eq, PartialEq)]
748pub struct Mmpuea_SPEC;
749impl crate::sealed::RegSpec for Mmpuea_SPEC {
750    type DataType = u32;
751}
752
753#[doc = "Group A Region %s End Address Register"]
754pub type Mmpuea = crate::RegValueT<Mmpuea_SPEC>;
755
756impl Mmpuea {
757    #[doc = "Region End Address"]
758    #[inline(always)]
759    pub fn mmpuea(
760        self,
761    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mmpuea_SPEC, crate::common::RW>
762    {
763        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Mmpuea_SPEC,crate::common::RW>::from_register(self,0)
764    }
765}
766impl ::core::default::Default for Mmpuea {
767    #[inline(always)]
768    fn default() -> Mmpuea {
769        <crate::RegValueT<Mmpuea_SPEC> as RegisterValue<_>>::new(3)
770    }
771}
772
773#[doc(hidden)]
774#[derive(Copy, Clone, Eq, PartialEq)]
775pub struct Smpuctl_SPEC;
776impl crate::sealed::RegSpec for Smpuctl_SPEC {
777    type DataType = u16;
778}
779
780#[doc = "Slave MPU Control Register"]
781pub type Smpuctl = crate::RegValueT<Smpuctl_SPEC>;
782
783impl Smpuctl {
784    #[doc = "Operation After Detection"]
785    #[inline(always)]
786    pub fn oad(
787        self,
788    ) -> crate::common::RegisterField<
789        0,
790        0x1,
791        1,
792        0,
793        smpuctl::Oad,
794        smpuctl::Oad,
795        Smpuctl_SPEC,
796        crate::common::RW,
797    > {
798        crate::common::RegisterField::<
799            0,
800            0x1,
801            1,
802            0,
803            smpuctl::Oad,
804            smpuctl::Oad,
805            Smpuctl_SPEC,
806            crate::common::RW,
807        >::from_register(self, 0)
808    }
809
810    #[doc = "Protection of Register"]
811    #[inline(always)]
812    pub fn protect(
813        self,
814    ) -> crate::common::RegisterField<
815        1,
816        0x1,
817        1,
818        0,
819        smpuctl::Protect,
820        smpuctl::Protect,
821        Smpuctl_SPEC,
822        crate::common::RW,
823    > {
824        crate::common::RegisterField::<
825            1,
826            0x1,
827            1,
828            0,
829            smpuctl::Protect,
830            smpuctl::Protect,
831            Smpuctl_SPEC,
832            crate::common::RW,
833        >::from_register(self, 0)
834    }
835
836    #[doc = "Key Code"]
837    #[inline(always)]
838    pub fn key(
839        self,
840    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Smpuctl_SPEC, crate::common::RW> {
841        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Smpuctl_SPEC,crate::common::RW>::from_register(self,0)
842    }
843}
844impl ::core::default::Default for Smpuctl {
845    #[inline(always)]
846    fn default() -> Smpuctl {
847        <crate::RegValueT<Smpuctl_SPEC> as RegisterValue<_>>::new(0)
848    }
849}
850pub mod smpuctl {
851
852    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
853    pub struct Oad_SPEC;
854    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
855    impl Oad {
856        #[doc = "Non-maskable interrupt"]
857        pub const _0: Self = Self::new(0);
858
859        #[doc = "Reset"]
860        pub const _1: Self = Self::new(1);
861    }
862    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
863    pub struct Protect_SPEC;
864    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
865    impl Protect {
866        #[doc = "All bus slave register writes are permitted"]
867        pub const _0: Self = Self::new(0);
868
869        #[doc = "All bus slave register writes are protected. Reads are permitted"]
870        pub const _1: Self = Self::new(1);
871    }
872}
873#[doc(hidden)]
874#[derive(Copy, Clone, Eq, PartialEq)]
875pub struct Smpumbiu_SPEC;
876impl crate::sealed::RegSpec for Smpumbiu_SPEC {
877    type DataType = u16;
878}
879
880#[doc = "Access Control Register for Memory Bus 1"]
881pub type Smpumbiu = crate::RegValueT<Smpumbiu_SPEC>;
882
883impl Smpumbiu {
884    #[doc = "Master MPU Group A Read Protection"]
885    #[inline(always)]
886    pub fn rpgrpa(
887        self,
888    ) -> crate::common::RegisterField<
889        2,
890        0x1,
891        1,
892        0,
893        smpumbiu::Rpgrpa,
894        smpumbiu::Rpgrpa,
895        Smpumbiu_SPEC,
896        crate::common::RW,
897    > {
898        crate::common::RegisterField::<
899            2,
900            0x1,
901            1,
902            0,
903            smpumbiu::Rpgrpa,
904            smpumbiu::Rpgrpa,
905            Smpumbiu_SPEC,
906            crate::common::RW,
907        >::from_register(self, 0)
908    }
909
910    #[doc = "Master MPU Group A Write Protection"]
911    #[inline(always)]
912    pub fn wpgrpa(
913        self,
914    ) -> crate::common::RegisterField<
915        3,
916        0x1,
917        1,
918        0,
919        smpumbiu::Wpgrpa,
920        smpumbiu::Wpgrpa,
921        Smpumbiu_SPEC,
922        crate::common::RW,
923    > {
924        crate::common::RegisterField::<
925            3,
926            0x1,
927            1,
928            0,
929            smpumbiu::Wpgrpa,
930            smpumbiu::Wpgrpa,
931            Smpumbiu_SPEC,
932            crate::common::RW,
933        >::from_register(self, 0)
934    }
935}
936impl ::core::default::Default for Smpumbiu {
937    #[inline(always)]
938    fn default() -> Smpumbiu {
939        <crate::RegValueT<Smpumbiu_SPEC> as RegisterValue<_>>::new(0)
940    }
941}
942pub mod smpumbiu {
943
944    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
945    pub struct Rpgrpa_SPEC;
946    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
947    impl Rpgrpa {
948        #[doc = "Memory protection read for master MPU group A disabled"]
949        pub const _0: Self = Self::new(0);
950
951        #[doc = "Memory protection read for master MPU group A enabled"]
952        pub const _1: Self = Self::new(1);
953    }
954    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
955    pub struct Wpgrpa_SPEC;
956    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
957    impl Wpgrpa {
958        #[doc = "Memory protection write for master MPU group A disabled"]
959        pub const _0: Self = Self::new(0);
960
961        #[doc = "Memory protection write for master MPU group A enabled"]
962        pub const _1: Self = Self::new(1);
963    }
964}
965#[doc(hidden)]
966#[derive(Copy, Clone, Eq, PartialEq)]
967pub struct Smpufbiu_SPEC;
968impl crate::sealed::RegSpec for Smpufbiu_SPEC {
969    type DataType = u16;
970}
971
972#[doc = "Access Control Register for Internal Peripheral Bus 9"]
973pub type Smpufbiu = crate::RegValueT<Smpufbiu_SPEC>;
974
975impl Smpufbiu {
976    #[doc = "CPU Read Protection"]
977    #[inline(always)]
978    pub fn rpcpu(
979        self,
980    ) -> crate::common::RegisterField<
981        0,
982        0x1,
983        1,
984        0,
985        smpufbiu::Rpcpu,
986        smpufbiu::Rpcpu,
987        Smpufbiu_SPEC,
988        crate::common::RW,
989    > {
990        crate::common::RegisterField::<
991            0,
992            0x1,
993            1,
994            0,
995            smpufbiu::Rpcpu,
996            smpufbiu::Rpcpu,
997            Smpufbiu_SPEC,
998            crate::common::RW,
999        >::from_register(self, 0)
1000    }
1001
1002    #[doc = "CPU Write Protection"]
1003    #[inline(always)]
1004    pub fn wpcpu(
1005        self,
1006    ) -> crate::common::RegisterField<
1007        1,
1008        0x1,
1009        1,
1010        0,
1011        smpufbiu::Wpcpu,
1012        smpufbiu::Wpcpu,
1013        Smpufbiu_SPEC,
1014        crate::common::RW,
1015    > {
1016        crate::common::RegisterField::<
1017            1,
1018            0x1,
1019            1,
1020            0,
1021            smpufbiu::Wpcpu,
1022            smpufbiu::Wpcpu,
1023            Smpufbiu_SPEC,
1024            crate::common::RW,
1025        >::from_register(self, 0)
1026    }
1027
1028    #[doc = "Master MPU Group A Read Protection"]
1029    #[inline(always)]
1030    pub fn rpgrpa(
1031        self,
1032    ) -> crate::common::RegisterField<
1033        2,
1034        0x1,
1035        1,
1036        0,
1037        smpufbiu::Rpgrpa,
1038        smpufbiu::Rpgrpa,
1039        Smpufbiu_SPEC,
1040        crate::common::RW,
1041    > {
1042        crate::common::RegisterField::<
1043            2,
1044            0x1,
1045            1,
1046            0,
1047            smpufbiu::Rpgrpa,
1048            smpufbiu::Rpgrpa,
1049            Smpufbiu_SPEC,
1050            crate::common::RW,
1051        >::from_register(self, 0)
1052    }
1053
1054    #[doc = "Master MPU Group A Write Protection"]
1055    #[inline(always)]
1056    pub fn wpgrpa(
1057        self,
1058    ) -> crate::common::RegisterField<
1059        3,
1060        0x1,
1061        1,
1062        0,
1063        smpufbiu::Wpgrpa,
1064        smpufbiu::Wpgrpa,
1065        Smpufbiu_SPEC,
1066        crate::common::RW,
1067    > {
1068        crate::common::RegisterField::<
1069            3,
1070            0x1,
1071            1,
1072            0,
1073            smpufbiu::Wpgrpa,
1074            smpufbiu::Wpgrpa,
1075            Smpufbiu_SPEC,
1076            crate::common::RW,
1077        >::from_register(self, 0)
1078    }
1079}
1080impl ::core::default::Default for Smpufbiu {
1081    #[inline(always)]
1082    fn default() -> Smpufbiu {
1083        <crate::RegValueT<Smpufbiu_SPEC> as RegisterValue<_>>::new(0)
1084    }
1085}
1086pub mod smpufbiu {
1087
1088    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1089    pub struct Rpcpu_SPEC;
1090    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
1091    impl Rpcpu {
1092        #[doc = "Memory protection for CPU read disabled"]
1093        pub const _0: Self = Self::new(0);
1094
1095        #[doc = "Memory protection for CPU read enabled"]
1096        pub const _1: Self = Self::new(1);
1097    }
1098    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1099    pub struct Wpcpu_SPEC;
1100    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
1101    impl Wpcpu {
1102        #[doc = "Memory protection for CPU write disabled"]
1103        pub const _0: Self = Self::new(0);
1104
1105        #[doc = "Memory protection for CPU write enabled"]
1106        pub const _1: Self = Self::new(1);
1107    }
1108    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1109    pub struct Rpgrpa_SPEC;
1110    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
1111    impl Rpgrpa {
1112        #[doc = "Memory protection for master MPU group A read disabled"]
1113        pub const _0: Self = Self::new(0);
1114
1115        #[doc = "Memory protection for master MPU group A read enabled"]
1116        pub const _1: Self = Self::new(1);
1117    }
1118    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1119    pub struct Wpgrpa_SPEC;
1120    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
1121    impl Wpgrpa {
1122        #[doc = "Memory protection for master MPU group A write disabled"]
1123        pub const _0: Self = Self::new(0);
1124
1125        #[doc = "Memory protection for master MPU group A write enabled"]
1126        pub const _1: Self = Self::new(1);
1127    }
1128}
1129#[doc(hidden)]
1130#[derive(Copy, Clone, Eq, PartialEq)]
1131pub struct Smpusram0_SPEC;
1132impl crate::sealed::RegSpec for Smpusram0_SPEC {
1133    type DataType = u16;
1134}
1135
1136#[doc = "Access Control Register for Memory Bus 4"]
1137pub type Smpusram0 = crate::RegValueT<Smpusram0_SPEC>;
1138
1139impl Smpusram0 {
1140    #[doc = "CPU Read Protection"]
1141    #[inline(always)]
1142    pub fn rpcpu(
1143        self,
1144    ) -> crate::common::RegisterField<
1145        0,
1146        0x1,
1147        1,
1148        0,
1149        smpusram0::Rpcpu,
1150        smpusram0::Rpcpu,
1151        Smpusram0_SPEC,
1152        crate::common::RW,
1153    > {
1154        crate::common::RegisterField::<
1155            0,
1156            0x1,
1157            1,
1158            0,
1159            smpusram0::Rpcpu,
1160            smpusram0::Rpcpu,
1161            Smpusram0_SPEC,
1162            crate::common::RW,
1163        >::from_register(self, 0)
1164    }
1165
1166    #[doc = "CPU Write Protection"]
1167    #[inline(always)]
1168    pub fn wpcpu(
1169        self,
1170    ) -> crate::common::RegisterField<
1171        1,
1172        0x1,
1173        1,
1174        0,
1175        smpusram0::Wpcpu,
1176        smpusram0::Wpcpu,
1177        Smpusram0_SPEC,
1178        crate::common::RW,
1179    > {
1180        crate::common::RegisterField::<
1181            1,
1182            0x1,
1183            1,
1184            0,
1185            smpusram0::Wpcpu,
1186            smpusram0::Wpcpu,
1187            Smpusram0_SPEC,
1188            crate::common::RW,
1189        >::from_register(self, 0)
1190    }
1191
1192    #[doc = "Master MPU Group A Read Protection"]
1193    #[inline(always)]
1194    pub fn rpgrpa(
1195        self,
1196    ) -> crate::common::RegisterField<
1197        2,
1198        0x1,
1199        1,
1200        0,
1201        smpusram0::Rpgrpa,
1202        smpusram0::Rpgrpa,
1203        Smpusram0_SPEC,
1204        crate::common::RW,
1205    > {
1206        crate::common::RegisterField::<
1207            2,
1208            0x1,
1209            1,
1210            0,
1211            smpusram0::Rpgrpa,
1212            smpusram0::Rpgrpa,
1213            Smpusram0_SPEC,
1214            crate::common::RW,
1215        >::from_register(self, 0)
1216    }
1217
1218    #[doc = "Master MPU Group A Write Protection"]
1219    #[inline(always)]
1220    pub fn wpgrpa(
1221        self,
1222    ) -> crate::common::RegisterField<
1223        3,
1224        0x1,
1225        1,
1226        0,
1227        smpusram0::Wpgrpa,
1228        smpusram0::Wpgrpa,
1229        Smpusram0_SPEC,
1230        crate::common::RW,
1231    > {
1232        crate::common::RegisterField::<
1233            3,
1234            0x1,
1235            1,
1236            0,
1237            smpusram0::Wpgrpa,
1238            smpusram0::Wpgrpa,
1239            Smpusram0_SPEC,
1240            crate::common::RW,
1241        >::from_register(self, 0)
1242    }
1243}
1244impl ::core::default::Default for Smpusram0 {
1245    #[inline(always)]
1246    fn default() -> Smpusram0 {
1247        <crate::RegValueT<Smpusram0_SPEC> as RegisterValue<_>>::new(0)
1248    }
1249}
1250pub mod smpusram0 {
1251
1252    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1253    pub struct Rpcpu_SPEC;
1254    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
1255    impl Rpcpu {
1256        #[doc = "Memory protection for CPU read disabled"]
1257        pub const _0: Self = Self::new(0);
1258
1259        #[doc = "Memory protection for CPU read enabled"]
1260        pub const _1: Self = Self::new(1);
1261    }
1262    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1263    pub struct Wpcpu_SPEC;
1264    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
1265    impl Wpcpu {
1266        #[doc = "Memory protection for CPU write disabled"]
1267        pub const _0: Self = Self::new(0);
1268
1269        #[doc = "Memory protection for CPU write enabled"]
1270        pub const _1: Self = Self::new(1);
1271    }
1272    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1273    pub struct Rpgrpa_SPEC;
1274    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
1275    impl Rpgrpa {
1276        #[doc = "Memory protection for master MPU group A read disabled"]
1277        pub const _0: Self = Self::new(0);
1278
1279        #[doc = "Memory protection for master MPU group A read enabled"]
1280        pub const _1: Self = Self::new(1);
1281    }
1282    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1283    pub struct Wpgrpa_SPEC;
1284    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
1285    impl Wpgrpa {
1286        #[doc = "Memory protection for master MPU group A write disabled"]
1287        pub const _0: Self = Self::new(0);
1288
1289        #[doc = "Memory protection for master MPU group A write enabled"]
1290        pub const _1: Self = Self::new(1);
1291    }
1292}
1293#[doc(hidden)]
1294#[derive(Copy, Clone, Eq, PartialEq)]
1295pub struct Smpup0Biu_SPEC;
1296impl crate::sealed::RegSpec for Smpup0Biu_SPEC {
1297    type DataType = u16;
1298}
1299
1300#[doc = "Access Control Register for Internal Peripheral Bus 1"]
1301pub type Smpup0Biu = crate::RegValueT<Smpup0Biu_SPEC>;
1302
1303impl Smpup0Biu {
1304    #[doc = "CPU Read Protection"]
1305    #[inline(always)]
1306    pub fn rpcpu(
1307        self,
1308    ) -> crate::common::RegisterField<
1309        0,
1310        0x1,
1311        1,
1312        0,
1313        smpup0biu::Rpcpu,
1314        smpup0biu::Rpcpu,
1315        Smpup0Biu_SPEC,
1316        crate::common::RW,
1317    > {
1318        crate::common::RegisterField::<
1319            0,
1320            0x1,
1321            1,
1322            0,
1323            smpup0biu::Rpcpu,
1324            smpup0biu::Rpcpu,
1325            Smpup0Biu_SPEC,
1326            crate::common::RW,
1327        >::from_register(self, 0)
1328    }
1329
1330    #[doc = "CPU Write Protection"]
1331    #[inline(always)]
1332    pub fn wpcpu(
1333        self,
1334    ) -> crate::common::RegisterField<
1335        1,
1336        0x1,
1337        1,
1338        0,
1339        smpup0biu::Wpcpu,
1340        smpup0biu::Wpcpu,
1341        Smpup0Biu_SPEC,
1342        crate::common::RW,
1343    > {
1344        crate::common::RegisterField::<
1345            1,
1346            0x1,
1347            1,
1348            0,
1349            smpup0biu::Wpcpu,
1350            smpup0biu::Wpcpu,
1351            Smpup0Biu_SPEC,
1352            crate::common::RW,
1353        >::from_register(self, 0)
1354    }
1355
1356    #[doc = "Master MPU Group A Read Protection"]
1357    #[inline(always)]
1358    pub fn rpgrpa(
1359        self,
1360    ) -> crate::common::RegisterField<
1361        2,
1362        0x1,
1363        1,
1364        0,
1365        smpup0biu::Rpgrpa,
1366        smpup0biu::Rpgrpa,
1367        Smpup0Biu_SPEC,
1368        crate::common::RW,
1369    > {
1370        crate::common::RegisterField::<
1371            2,
1372            0x1,
1373            1,
1374            0,
1375            smpup0biu::Rpgrpa,
1376            smpup0biu::Rpgrpa,
1377            Smpup0Biu_SPEC,
1378            crate::common::RW,
1379        >::from_register(self, 0)
1380    }
1381
1382    #[doc = "Master MPU Group A Write Protection"]
1383    #[inline(always)]
1384    pub fn wpgrpa(
1385        self,
1386    ) -> crate::common::RegisterField<
1387        3,
1388        0x1,
1389        1,
1390        0,
1391        smpup0biu::Wpgrpa,
1392        smpup0biu::Wpgrpa,
1393        Smpup0Biu_SPEC,
1394        crate::common::RW,
1395    > {
1396        crate::common::RegisterField::<
1397            3,
1398            0x1,
1399            1,
1400            0,
1401            smpup0biu::Wpgrpa,
1402            smpup0biu::Wpgrpa,
1403            Smpup0Biu_SPEC,
1404            crate::common::RW,
1405        >::from_register(self, 0)
1406    }
1407}
1408impl ::core::default::Default for Smpup0Biu {
1409    #[inline(always)]
1410    fn default() -> Smpup0Biu {
1411        <crate::RegValueT<Smpup0Biu_SPEC> as RegisterValue<_>>::new(0)
1412    }
1413}
1414pub mod smpup0biu {
1415
1416    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1417    pub struct Rpcpu_SPEC;
1418    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
1419    impl Rpcpu {
1420        #[doc = "Memory protection for CPU read disabled"]
1421        pub const _0: Self = Self::new(0);
1422
1423        #[doc = "Memory protection for CPU read enabled"]
1424        pub const _1: Self = Self::new(1);
1425    }
1426    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1427    pub struct Wpcpu_SPEC;
1428    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
1429    impl Wpcpu {
1430        #[doc = "Memory protection for CPU write disabled"]
1431        pub const _0: Self = Self::new(0);
1432
1433        #[doc = "Memory protection for CPU write enabled"]
1434        pub const _1: Self = Self::new(1);
1435    }
1436    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1437    pub struct Rpgrpa_SPEC;
1438    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
1439    impl Rpgrpa {
1440        #[doc = "Memory protection for master MPU group A read disabled"]
1441        pub const _0: Self = Self::new(0);
1442
1443        #[doc = "Memory protection for master MPU group A read enabled"]
1444        pub const _1: Self = Self::new(1);
1445    }
1446    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1447    pub struct Wpgrpa_SPEC;
1448    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
1449    impl Wpgrpa {
1450        #[doc = "Memory protection for master MPU group A write disabled"]
1451        pub const _0: Self = Self::new(0);
1452
1453        #[doc = "Memory protection for master MPU group A write enabled"]
1454        pub const _1: Self = Self::new(1);
1455    }
1456}
1457#[doc(hidden)]
1458#[derive(Copy, Clone, Eq, PartialEq)]
1459pub struct Smpup2Biu_SPEC;
1460impl crate::sealed::RegSpec for Smpup2Biu_SPEC {
1461    type DataType = u16;
1462}
1463
1464#[doc = "Access Control Register for Internal Peripheral Bus 3"]
1465pub type Smpup2Biu = crate::RegValueT<Smpup2Biu_SPEC>;
1466
1467impl Smpup2Biu {
1468    #[doc = "CPU Read Protection"]
1469    #[inline(always)]
1470    pub fn rpcpu(
1471        self,
1472    ) -> crate::common::RegisterField<
1473        0,
1474        0x1,
1475        1,
1476        0,
1477        smpup2biu::Rpcpu,
1478        smpup2biu::Rpcpu,
1479        Smpup2Biu_SPEC,
1480        crate::common::RW,
1481    > {
1482        crate::common::RegisterField::<
1483            0,
1484            0x1,
1485            1,
1486            0,
1487            smpup2biu::Rpcpu,
1488            smpup2biu::Rpcpu,
1489            Smpup2Biu_SPEC,
1490            crate::common::RW,
1491        >::from_register(self, 0)
1492    }
1493
1494    #[doc = "CPU Write Protection"]
1495    #[inline(always)]
1496    pub fn wpcpu(
1497        self,
1498    ) -> crate::common::RegisterField<
1499        1,
1500        0x1,
1501        1,
1502        0,
1503        smpup2biu::Wpcpu,
1504        smpup2biu::Wpcpu,
1505        Smpup2Biu_SPEC,
1506        crate::common::RW,
1507    > {
1508        crate::common::RegisterField::<
1509            1,
1510            0x1,
1511            1,
1512            0,
1513            smpup2biu::Wpcpu,
1514            smpup2biu::Wpcpu,
1515            Smpup2Biu_SPEC,
1516            crate::common::RW,
1517        >::from_register(self, 0)
1518    }
1519
1520    #[doc = "Master MPU Group A Read Protection"]
1521    #[inline(always)]
1522    pub fn rpgrpa(
1523        self,
1524    ) -> crate::common::RegisterField<
1525        2,
1526        0x1,
1527        1,
1528        0,
1529        smpup2biu::Rpgrpa,
1530        smpup2biu::Rpgrpa,
1531        Smpup2Biu_SPEC,
1532        crate::common::RW,
1533    > {
1534        crate::common::RegisterField::<
1535            2,
1536            0x1,
1537            1,
1538            0,
1539            smpup2biu::Rpgrpa,
1540            smpup2biu::Rpgrpa,
1541            Smpup2Biu_SPEC,
1542            crate::common::RW,
1543        >::from_register(self, 0)
1544    }
1545
1546    #[doc = "Master MPU Group A Write Protection"]
1547    #[inline(always)]
1548    pub fn wpgrpa(
1549        self,
1550    ) -> crate::common::RegisterField<
1551        3,
1552        0x1,
1553        1,
1554        0,
1555        smpup2biu::Wpgrpa,
1556        smpup2biu::Wpgrpa,
1557        Smpup2Biu_SPEC,
1558        crate::common::RW,
1559    > {
1560        crate::common::RegisterField::<
1561            3,
1562            0x1,
1563            1,
1564            0,
1565            smpup2biu::Wpgrpa,
1566            smpup2biu::Wpgrpa,
1567            Smpup2Biu_SPEC,
1568            crate::common::RW,
1569        >::from_register(self, 0)
1570    }
1571}
1572impl ::core::default::Default for Smpup2Biu {
1573    #[inline(always)]
1574    fn default() -> Smpup2Biu {
1575        <crate::RegValueT<Smpup2Biu_SPEC> as RegisterValue<_>>::new(0)
1576    }
1577}
1578pub mod smpup2biu {
1579
1580    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1581    pub struct Rpcpu_SPEC;
1582    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
1583    impl Rpcpu {
1584        #[doc = "Memory protection for CPU read disabled"]
1585        pub const _0: Self = Self::new(0);
1586
1587        #[doc = "Memory protection for CPU read enabled"]
1588        pub const _1: Self = Self::new(1);
1589    }
1590    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1591    pub struct Wpcpu_SPEC;
1592    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
1593    impl Wpcpu {
1594        #[doc = "Memory protection for CPU write disabled"]
1595        pub const _0: Self = Self::new(0);
1596
1597        #[doc = "Memory protection for CPU write enabled"]
1598        pub const _1: Self = Self::new(1);
1599    }
1600    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1601    pub struct Rpgrpa_SPEC;
1602    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
1603    impl Rpgrpa {
1604        #[doc = "Memory protection for master MPU group A read disabled"]
1605        pub const _0: Self = Self::new(0);
1606
1607        #[doc = "Memory protection for master MPU group A read enabled"]
1608        pub const _1: Self = Self::new(1);
1609    }
1610    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1611    pub struct Wpgrpa_SPEC;
1612    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
1613    impl Wpgrpa {
1614        #[doc = "Memory protection for master MPU group A write disabled"]
1615        pub const _0: Self = Self::new(0);
1616
1617        #[doc = "Memory protection for master MPU group A write enabled"]
1618        pub const _1: Self = Self::new(1);
1619    }
1620}
1621#[doc(hidden)]
1622#[derive(Copy, Clone, Eq, PartialEq)]
1623pub struct Smpup6Biu_SPEC;
1624impl crate::sealed::RegSpec for Smpup6Biu_SPEC {
1625    type DataType = u16;
1626}
1627
1628#[doc = "Access Control Register for Internal Peripheral Bus 7"]
1629pub type Smpup6Biu = crate::RegValueT<Smpup6Biu_SPEC>;
1630
1631impl Smpup6Biu {
1632    #[doc = "CPU Read Protection"]
1633    #[inline(always)]
1634    pub fn rpcpu(
1635        self,
1636    ) -> crate::common::RegisterField<
1637        0,
1638        0x1,
1639        1,
1640        0,
1641        smpup6biu::Rpcpu,
1642        smpup6biu::Rpcpu,
1643        Smpup6Biu_SPEC,
1644        crate::common::RW,
1645    > {
1646        crate::common::RegisterField::<
1647            0,
1648            0x1,
1649            1,
1650            0,
1651            smpup6biu::Rpcpu,
1652            smpup6biu::Rpcpu,
1653            Smpup6Biu_SPEC,
1654            crate::common::RW,
1655        >::from_register(self, 0)
1656    }
1657
1658    #[doc = "CPU Write Protection"]
1659    #[inline(always)]
1660    pub fn wpcpu(
1661        self,
1662    ) -> crate::common::RegisterField<
1663        1,
1664        0x1,
1665        1,
1666        0,
1667        smpup6biu::Wpcpu,
1668        smpup6biu::Wpcpu,
1669        Smpup6Biu_SPEC,
1670        crate::common::RW,
1671    > {
1672        crate::common::RegisterField::<
1673            1,
1674            0x1,
1675            1,
1676            0,
1677            smpup6biu::Wpcpu,
1678            smpup6biu::Wpcpu,
1679            Smpup6Biu_SPEC,
1680            crate::common::RW,
1681        >::from_register(self, 0)
1682    }
1683
1684    #[doc = "Master MPU Group A Read Protection"]
1685    #[inline(always)]
1686    pub fn rpgrpa(
1687        self,
1688    ) -> crate::common::RegisterField<
1689        2,
1690        0x1,
1691        1,
1692        0,
1693        smpup6biu::Rpgrpa,
1694        smpup6biu::Rpgrpa,
1695        Smpup6Biu_SPEC,
1696        crate::common::RW,
1697    > {
1698        crate::common::RegisterField::<
1699            2,
1700            0x1,
1701            1,
1702            0,
1703            smpup6biu::Rpgrpa,
1704            smpup6biu::Rpgrpa,
1705            Smpup6Biu_SPEC,
1706            crate::common::RW,
1707        >::from_register(self, 0)
1708    }
1709
1710    #[doc = "Master MPU Group A Write Protection"]
1711    #[inline(always)]
1712    pub fn wpgrpa(
1713        self,
1714    ) -> crate::common::RegisterField<
1715        3,
1716        0x1,
1717        1,
1718        0,
1719        smpup6biu::Wpgrpa,
1720        smpup6biu::Wpgrpa,
1721        Smpup6Biu_SPEC,
1722        crate::common::RW,
1723    > {
1724        crate::common::RegisterField::<
1725            3,
1726            0x1,
1727            1,
1728            0,
1729            smpup6biu::Wpgrpa,
1730            smpup6biu::Wpgrpa,
1731            Smpup6Biu_SPEC,
1732            crate::common::RW,
1733        >::from_register(self, 0)
1734    }
1735}
1736impl ::core::default::Default for Smpup6Biu {
1737    #[inline(always)]
1738    fn default() -> Smpup6Biu {
1739        <crate::RegValueT<Smpup6Biu_SPEC> as RegisterValue<_>>::new(0)
1740    }
1741}
1742pub mod smpup6biu {
1743
1744    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1745    pub struct Rpcpu_SPEC;
1746    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
1747    impl Rpcpu {
1748        #[doc = "CPU read of memory protection disabled"]
1749        pub const _0: Self = Self::new(0);
1750
1751        #[doc = "CPU read of memory protection enabled"]
1752        pub const _1: Self = Self::new(1);
1753    }
1754    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1755    pub struct Wpcpu_SPEC;
1756    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
1757    impl Wpcpu {
1758        #[doc = "CPU write of memory protection disabled"]
1759        pub const _0: Self = Self::new(0);
1760
1761        #[doc = "CPU write of memory protection enabled"]
1762        pub const _1: Self = Self::new(1);
1763    }
1764    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1765    pub struct Rpgrpa_SPEC;
1766    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
1767    impl Rpgrpa {
1768        #[doc = "Master MPU group A read of memory protection disabled"]
1769        pub const _0: Self = Self::new(0);
1770
1771        #[doc = "Master MPU group A read of memory protection enabled"]
1772        pub const _1: Self = Self::new(1);
1773    }
1774    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1775    pub struct Wpgrpa_SPEC;
1776    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
1777    impl Wpgrpa {
1778        #[doc = "Master MPU group A write of memory protection disabled"]
1779        pub const _0: Self = Self::new(0);
1780
1781        #[doc = "Master MPU group A write of memory protection enabled"]
1782        pub const _1: Self = Self::new(1);
1783    }
1784}
1785#[doc(hidden)]
1786#[derive(Copy, Clone, Eq, PartialEq)]
1787pub struct Mspmpuoad_SPEC;
1788impl crate::sealed::RegSpec for Mspmpuoad_SPEC {
1789    type DataType = u16;
1790}
1791
1792#[doc = "Stack Pointer Monitor Operation After Detection Register"]
1793pub type Mspmpuoad = crate::RegValueT<Mspmpuoad_SPEC>;
1794
1795impl Mspmpuoad {
1796    #[doc = "Operation after Detection"]
1797    #[inline(always)]
1798    pub fn oad(
1799        self,
1800    ) -> crate::common::RegisterField<
1801        0,
1802        0x1,
1803        1,
1804        0,
1805        mspmpuoad::Oad,
1806        mspmpuoad::Oad,
1807        Mspmpuoad_SPEC,
1808        crate::common::RW,
1809    > {
1810        crate::common::RegisterField::<
1811            0,
1812            0x1,
1813            1,
1814            0,
1815            mspmpuoad::Oad,
1816            mspmpuoad::Oad,
1817            Mspmpuoad_SPEC,
1818            crate::common::RW,
1819        >::from_register(self, 0)
1820    }
1821
1822    #[doc = "Key Code"]
1823    #[inline(always)]
1824    pub fn key(
1825        self,
1826    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mspmpuoad_SPEC, crate::common::RW>
1827    {
1828        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mspmpuoad_SPEC,crate::common::RW>::from_register(self,0)
1829    }
1830}
1831impl ::core::default::Default for Mspmpuoad {
1832    #[inline(always)]
1833    fn default() -> Mspmpuoad {
1834        <crate::RegValueT<Mspmpuoad_SPEC> as RegisterValue<_>>::new(0)
1835    }
1836}
1837pub mod mspmpuoad {
1838
1839    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1840    pub struct Oad_SPEC;
1841    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
1842    impl Oad {
1843        #[doc = "Non-maskable interrupt"]
1844        pub const _0: Self = Self::new(0);
1845
1846        #[doc = "Reset"]
1847        pub const _1: Self = Self::new(1);
1848    }
1849}
1850#[doc(hidden)]
1851#[derive(Copy, Clone, Eq, PartialEq)]
1852pub struct Mspmpuctl_SPEC;
1853impl crate::sealed::RegSpec for Mspmpuctl_SPEC {
1854    type DataType = u16;
1855}
1856
1857#[doc = "Stack Pointer Monitor Access Control Register"]
1858pub type Mspmpuctl = crate::RegValueT<Mspmpuctl_SPEC>;
1859
1860impl Mspmpuctl {
1861    #[doc = "Stack Pointer Monitor Enable"]
1862    #[inline(always)]
1863    pub fn enable(
1864        self,
1865    ) -> crate::common::RegisterField<
1866        0,
1867        0x1,
1868        1,
1869        0,
1870        mspmpuctl::Enable,
1871        mspmpuctl::Enable,
1872        Mspmpuctl_SPEC,
1873        crate::common::RW,
1874    > {
1875        crate::common::RegisterField::<
1876            0,
1877            0x1,
1878            1,
1879            0,
1880            mspmpuctl::Enable,
1881            mspmpuctl::Enable,
1882            Mspmpuctl_SPEC,
1883            crate::common::RW,
1884        >::from_register(self, 0)
1885    }
1886
1887    #[doc = "Stack Pointer Monitor Error Flag"]
1888    #[inline(always)]
1889    pub fn error(
1890        self,
1891    ) -> crate::common::RegisterField<
1892        8,
1893        0x1,
1894        1,
1895        0,
1896        mspmpuctl::Error,
1897        mspmpuctl::Error,
1898        Mspmpuctl_SPEC,
1899        crate::common::RW,
1900    > {
1901        crate::common::RegisterField::<
1902            8,
1903            0x1,
1904            1,
1905            0,
1906            mspmpuctl::Error,
1907            mspmpuctl::Error,
1908            Mspmpuctl_SPEC,
1909            crate::common::RW,
1910        >::from_register(self, 0)
1911    }
1912}
1913impl ::core::default::Default for Mspmpuctl {
1914    #[inline(always)]
1915    fn default() -> Mspmpuctl {
1916        <crate::RegValueT<Mspmpuctl_SPEC> as RegisterValue<_>>::new(0)
1917    }
1918}
1919pub mod mspmpuctl {
1920
1921    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1922    pub struct Enable_SPEC;
1923    pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
1924    impl Enable {
1925        #[doc = "Stack pointer monitor is disabled"]
1926        pub const _0: Self = Self::new(0);
1927
1928        #[doc = "Stack pointer monitor is enabled"]
1929        pub const _1: Self = Self::new(1);
1930    }
1931    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1932    pub struct Error_SPEC;
1933    pub type Error = crate::EnumBitfieldStruct<u8, Error_SPEC>;
1934    impl Error {
1935        #[doc = "Stack pointer has not overflowed or underflowed"]
1936        pub const _0: Self = Self::new(0);
1937
1938        #[doc = "Stack pointer has overflowed or underflowed"]
1939        pub const _1: Self = Self::new(1);
1940    }
1941}
1942#[doc(hidden)]
1943#[derive(Copy, Clone, Eq, PartialEq)]
1944pub struct Mspmpupt_SPEC;
1945impl crate::sealed::RegSpec for Mspmpupt_SPEC {
1946    type DataType = u16;
1947}
1948
1949#[doc = "Stack Pointer Monitor Protection Register"]
1950pub type Mspmpupt = crate::RegValueT<Mspmpupt_SPEC>;
1951
1952impl Mspmpupt {
1953    #[doc = "Protection of Register"]
1954    #[inline(always)]
1955    pub fn protect(
1956        self,
1957    ) -> crate::common::RegisterField<
1958        0,
1959        0x1,
1960        1,
1961        0,
1962        mspmpupt::Protect,
1963        mspmpupt::Protect,
1964        Mspmpupt_SPEC,
1965        crate::common::RW,
1966    > {
1967        crate::common::RegisterField::<
1968            0,
1969            0x1,
1970            1,
1971            0,
1972            mspmpupt::Protect,
1973            mspmpupt::Protect,
1974            Mspmpupt_SPEC,
1975            crate::common::RW,
1976        >::from_register(self, 0)
1977    }
1978
1979    #[doc = "Key Code"]
1980    #[inline(always)]
1981    pub fn key(
1982        self,
1983    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mspmpupt_SPEC, crate::common::RW> {
1984        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mspmpupt_SPEC,crate::common::RW>::from_register(self,0)
1985    }
1986}
1987impl ::core::default::Default for Mspmpupt {
1988    #[inline(always)]
1989    fn default() -> Mspmpupt {
1990        <crate::RegValueT<Mspmpupt_SPEC> as RegisterValue<_>>::new(0)
1991    }
1992}
1993pub mod mspmpupt {
1994
1995    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1996    pub struct Protect_SPEC;
1997    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
1998    impl Protect {
1999        #[doc = "Stack pointer monitor register writes are permitted."]
2000        pub const _0: Self = Self::new(0);
2001
2002        #[doc = "Stack pointer monitor register writes are protected. Reads are permitted"]
2003        pub const _1: Self = Self::new(1);
2004    }
2005}
2006#[doc(hidden)]
2007#[derive(Copy, Clone, Eq, PartialEq)]
2008pub struct Mspmpusa_SPEC;
2009impl crate::sealed::RegSpec for Mspmpusa_SPEC {
2010    type DataType = u32;
2011}
2012
2013#[doc = "Main Stack Pointer (MSP) Monitor Start Address Register"]
2014pub type Mspmpusa = crate::RegValueT<Mspmpusa_SPEC>;
2015
2016impl Mspmpusa {
2017    #[doc = "Region Start Address"]
2018    #[inline(always)]
2019    pub fn mspmpusa(
2020        self,
2021    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mspmpusa_SPEC, crate::common::RW>
2022    {
2023        crate::common::RegisterField::<
2024            0,
2025            0xffffffff,
2026            1,
2027            0,
2028            u32,
2029            u32,
2030            Mspmpusa_SPEC,
2031            crate::common::RW,
2032        >::from_register(self, 0)
2033    }
2034}
2035impl ::core::default::Default for Mspmpusa {
2036    #[inline(always)]
2037    fn default() -> Mspmpusa {
2038        <crate::RegValueT<Mspmpusa_SPEC> as RegisterValue<_>>::new(0)
2039    }
2040}
2041
2042#[doc(hidden)]
2043#[derive(Copy, Clone, Eq, PartialEq)]
2044pub struct Mspmpuea_SPEC;
2045impl crate::sealed::RegSpec for Mspmpuea_SPEC {
2046    type DataType = u32;
2047}
2048
2049#[doc = "Main Stack Pointer (MSP) Monitor End Address Register"]
2050pub type Mspmpuea = crate::RegValueT<Mspmpuea_SPEC>;
2051
2052impl Mspmpuea {
2053    #[doc = "Region End Address"]
2054    #[inline(always)]
2055    pub fn mspmpuea(
2056        self,
2057    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mspmpuea_SPEC, crate::common::RW>
2058    {
2059        crate::common::RegisterField::<
2060            0,
2061            0xffffffff,
2062            1,
2063            0,
2064            u32,
2065            u32,
2066            Mspmpuea_SPEC,
2067            crate::common::RW,
2068        >::from_register(self, 0)
2069    }
2070}
2071impl ::core::default::Default for Mspmpuea {
2072    #[inline(always)]
2073    fn default() -> Mspmpuea {
2074        <crate::RegValueT<Mspmpuea_SPEC> as RegisterValue<_>>::new(0)
2075    }
2076}
2077
2078#[doc(hidden)]
2079#[derive(Copy, Clone, Eq, PartialEq)]
2080pub struct Pspmpuoad_SPEC;
2081impl crate::sealed::RegSpec for Pspmpuoad_SPEC {
2082    type DataType = u16;
2083}
2084
2085#[doc = "Stack Pointer Monitor Operation After Detection Register"]
2086pub type Pspmpuoad = crate::RegValueT<Pspmpuoad_SPEC>;
2087
2088impl Pspmpuoad {
2089    #[doc = "Operation after Detection"]
2090    #[inline(always)]
2091    pub fn oad(
2092        self,
2093    ) -> crate::common::RegisterField<
2094        0,
2095        0x1,
2096        1,
2097        0,
2098        pspmpuoad::Oad,
2099        pspmpuoad::Oad,
2100        Pspmpuoad_SPEC,
2101        crate::common::RW,
2102    > {
2103        crate::common::RegisterField::<
2104            0,
2105            0x1,
2106            1,
2107            0,
2108            pspmpuoad::Oad,
2109            pspmpuoad::Oad,
2110            Pspmpuoad_SPEC,
2111            crate::common::RW,
2112        >::from_register(self, 0)
2113    }
2114
2115    #[doc = "Key Code"]
2116    #[inline(always)]
2117    pub fn key(
2118        self,
2119    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Pspmpuoad_SPEC, crate::common::RW>
2120    {
2121        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Pspmpuoad_SPEC,crate::common::RW>::from_register(self,0)
2122    }
2123}
2124impl ::core::default::Default for Pspmpuoad {
2125    #[inline(always)]
2126    fn default() -> Pspmpuoad {
2127        <crate::RegValueT<Pspmpuoad_SPEC> as RegisterValue<_>>::new(0)
2128    }
2129}
2130pub mod pspmpuoad {
2131
2132    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2133    pub struct Oad_SPEC;
2134    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
2135    impl Oad {
2136        #[doc = "Non-maskable interrupt"]
2137        pub const _0: Self = Self::new(0);
2138
2139        #[doc = "Reset"]
2140        pub const _1: Self = Self::new(1);
2141    }
2142}
2143#[doc(hidden)]
2144#[derive(Copy, Clone, Eq, PartialEq)]
2145pub struct Pspmpuctl_SPEC;
2146impl crate::sealed::RegSpec for Pspmpuctl_SPEC {
2147    type DataType = u16;
2148}
2149
2150#[doc = "Stack Pointer Monitor Access Control Register"]
2151pub type Pspmpuctl = crate::RegValueT<Pspmpuctl_SPEC>;
2152
2153impl Pspmpuctl {
2154    #[doc = "Stack Pointer Monitor Enable"]
2155    #[inline(always)]
2156    pub fn enable(
2157        self,
2158    ) -> crate::common::RegisterField<
2159        0,
2160        0x1,
2161        1,
2162        0,
2163        pspmpuctl::Enable,
2164        pspmpuctl::Enable,
2165        Pspmpuctl_SPEC,
2166        crate::common::RW,
2167    > {
2168        crate::common::RegisterField::<
2169            0,
2170            0x1,
2171            1,
2172            0,
2173            pspmpuctl::Enable,
2174            pspmpuctl::Enable,
2175            Pspmpuctl_SPEC,
2176            crate::common::RW,
2177        >::from_register(self, 0)
2178    }
2179
2180    #[doc = "Stack Pointer Monitor Error Flag"]
2181    #[inline(always)]
2182    pub fn error(
2183        self,
2184    ) -> crate::common::RegisterField<
2185        8,
2186        0x1,
2187        1,
2188        0,
2189        pspmpuctl::Error,
2190        pspmpuctl::Error,
2191        Pspmpuctl_SPEC,
2192        crate::common::RW,
2193    > {
2194        crate::common::RegisterField::<
2195            8,
2196            0x1,
2197            1,
2198            0,
2199            pspmpuctl::Error,
2200            pspmpuctl::Error,
2201            Pspmpuctl_SPEC,
2202            crate::common::RW,
2203        >::from_register(self, 0)
2204    }
2205}
2206impl ::core::default::Default for Pspmpuctl {
2207    #[inline(always)]
2208    fn default() -> Pspmpuctl {
2209        <crate::RegValueT<Pspmpuctl_SPEC> as RegisterValue<_>>::new(0)
2210    }
2211}
2212pub mod pspmpuctl {
2213
2214    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2215    pub struct Enable_SPEC;
2216    pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
2217    impl Enable {
2218        #[doc = "Stack pointer monitor is disabled"]
2219        pub const _0: Self = Self::new(0);
2220
2221        #[doc = "Stack pointer monitor is enabled"]
2222        pub const _1: Self = Self::new(1);
2223    }
2224    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2225    pub struct Error_SPEC;
2226    pub type Error = crate::EnumBitfieldStruct<u8, Error_SPEC>;
2227    impl Error {
2228        #[doc = "Stack pointer has not overflowed or underflowed"]
2229        pub const _0: Self = Self::new(0);
2230
2231        #[doc = "Stack pointer has overflowed or underflowed"]
2232        pub const _1: Self = Self::new(1);
2233    }
2234}
2235#[doc(hidden)]
2236#[derive(Copy, Clone, Eq, PartialEq)]
2237pub struct Pspmpupt_SPEC;
2238impl crate::sealed::RegSpec for Pspmpupt_SPEC {
2239    type DataType = u16;
2240}
2241
2242#[doc = "Stack Pointer Monitor Protection Register"]
2243pub type Pspmpupt = crate::RegValueT<Pspmpupt_SPEC>;
2244
2245impl Pspmpupt {
2246    #[doc = "Protection of Register"]
2247    #[inline(always)]
2248    pub fn protect(
2249        self,
2250    ) -> crate::common::RegisterField<
2251        0,
2252        0x1,
2253        1,
2254        0,
2255        pspmpupt::Protect,
2256        pspmpupt::Protect,
2257        Pspmpupt_SPEC,
2258        crate::common::RW,
2259    > {
2260        crate::common::RegisterField::<
2261            0,
2262            0x1,
2263            1,
2264            0,
2265            pspmpupt::Protect,
2266            pspmpupt::Protect,
2267            Pspmpupt_SPEC,
2268            crate::common::RW,
2269        >::from_register(self, 0)
2270    }
2271
2272    #[doc = "Key Code"]
2273    #[inline(always)]
2274    pub fn key(
2275        self,
2276    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Pspmpupt_SPEC, crate::common::RW> {
2277        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Pspmpupt_SPEC,crate::common::RW>::from_register(self,0)
2278    }
2279}
2280impl ::core::default::Default for Pspmpupt {
2281    #[inline(always)]
2282    fn default() -> Pspmpupt {
2283        <crate::RegValueT<Pspmpupt_SPEC> as RegisterValue<_>>::new(0)
2284    }
2285}
2286pub mod pspmpupt {
2287
2288    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2289    pub struct Protect_SPEC;
2290    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
2291    impl Protect {
2292        #[doc = "Stack pointer monitor register writes are permitted."]
2293        pub const _0: Self = Self::new(0);
2294
2295        #[doc = "Stack pointer monitor register writes are protected. Reads are permitted"]
2296        pub const _1: Self = Self::new(1);
2297    }
2298}
2299#[doc(hidden)]
2300#[derive(Copy, Clone, Eq, PartialEq)]
2301pub struct Pspmpusa_SPEC;
2302impl crate::sealed::RegSpec for Pspmpusa_SPEC {
2303    type DataType = u32;
2304}
2305
2306#[doc = "Process Stack Pointer (PSP) Monitor Start Address Register"]
2307pub type Pspmpusa = crate::RegValueT<Pspmpusa_SPEC>;
2308
2309impl Pspmpusa {
2310    #[doc = "Region Start Address"]
2311    #[inline(always)]
2312    pub fn pspmpusa(
2313        self,
2314    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Pspmpusa_SPEC, crate::common::RW>
2315    {
2316        crate::common::RegisterField::<
2317            0,
2318            0xffffffff,
2319            1,
2320            0,
2321            u32,
2322            u32,
2323            Pspmpusa_SPEC,
2324            crate::common::RW,
2325        >::from_register(self, 0)
2326    }
2327}
2328impl ::core::default::Default for Pspmpusa {
2329    #[inline(always)]
2330    fn default() -> Pspmpusa {
2331        <crate::RegValueT<Pspmpusa_SPEC> as RegisterValue<_>>::new(0)
2332    }
2333}
2334
2335#[doc(hidden)]
2336#[derive(Copy, Clone, Eq, PartialEq)]
2337pub struct Pspmpuea_SPEC;
2338impl crate::sealed::RegSpec for Pspmpuea_SPEC {
2339    type DataType = u32;
2340}
2341
2342#[doc = "Process Stack Pointer (PSP) Monitor End Address Register"]
2343pub type Pspmpuea = crate::RegValueT<Pspmpuea_SPEC>;
2344
2345impl Pspmpuea {
2346    #[doc = "Region End Address"]
2347    #[inline(always)]
2348    pub fn pspmpuea(
2349        self,
2350    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Pspmpuea_SPEC, crate::common::RW>
2351    {
2352        crate::common::RegisterField::<
2353            0,
2354            0xffffffff,
2355            1,
2356            0,
2357            u32,
2358            u32,
2359            Pspmpuea_SPEC,
2360            crate::common::RW,
2361        >::from_register(self, 0)
2362    }
2363}
2364impl ::core::default::Default for Pspmpuea {
2365    #[inline(always)]
2366    fn default() -> Pspmpuea {
2367        <crate::RegValueT<Pspmpuea_SPEC> as RegisterValue<_>>::new(0)
2368    }
2369}
ra2e2_pac/rmpu.rs

ra2e2_pac/
rmpu.rs
