1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Port Output Enable Module for GPT"]
28unsafe impl ::core::marker::Send for super::Poeg {}
29unsafe impl ::core::marker::Sync for super::Poeg {}
30impl super::Poeg {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "POEG Group A Setting Register"]
38 #[inline(always)]
39 pub const fn poegga(
40 &self,
41 ) -> &'static crate::common::Reg<self::Poegga_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Poegga_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "POEG Group B Setting Register"]
50 #[inline(always)]
51 pub const fn poeggb(
52 &self,
53 ) -> &'static crate::common::Reg<self::Poeggb_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Poeggb_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(256usize),
57 )
58 }
59 }
60}
61#[doc(hidden)]
62#[derive(Copy, Clone, Eq, PartialEq)]
63pub struct Poegga_SPEC;
64impl crate::sealed::RegSpec for Poegga_SPEC {
65 type DataType = u32;
66}
67
68#[doc = "POEG Group A Setting Register"]
69pub type Poegga = crate::RegValueT<Poegga_SPEC>;
70
71impl Poegga {
72 #[doc = "Port Input Detection Flag"]
73 #[inline(always)]
74 pub fn pidf(
75 self,
76 ) -> crate::common::RegisterField<
77 0,
78 0x1,
79 1,
80 0,
81 poegga::Pidf,
82 poegga::Pidf,
83 Poegga_SPEC,
84 crate::common::RW,
85 > {
86 crate::common::RegisterField::<
87 0,
88 0x1,
89 1,
90 0,
91 poegga::Pidf,
92 poegga::Pidf,
93 Poegga_SPEC,
94 crate::common::RW,
95 >::from_register(self, 0)
96 }
97
98 #[doc = "Detection Flag for GPT Output-Disable Request"]
99 #[inline(always)]
100 pub fn iocf(
101 self,
102 ) -> crate::common::RegisterField<
103 1,
104 0x1,
105 1,
106 0,
107 poegga::Iocf,
108 poegga::Iocf,
109 Poegga_SPEC,
110 crate::common::RW,
111 > {
112 crate::common::RegisterField::<
113 1,
114 0x1,
115 1,
116 0,
117 poegga::Iocf,
118 poegga::Iocf,
119 Poegga_SPEC,
120 crate::common::RW,
121 >::from_register(self, 0)
122 }
123
124 #[doc = "Software Stop Flag"]
125 #[inline(always)]
126 pub fn ssf(
127 self,
128 ) -> crate::common::RegisterField<
129 3,
130 0x1,
131 1,
132 0,
133 poegga::Ssf,
134 poegga::Ssf,
135 Poegga_SPEC,
136 crate::common::RW,
137 > {
138 crate::common::RegisterField::<
139 3,
140 0x1,
141 1,
142 0,
143 poegga::Ssf,
144 poegga::Ssf,
145 Poegga_SPEC,
146 crate::common::RW,
147 >::from_register(self, 0)
148 }
149
150 #[doc = "Port Input Detection Enable"]
151 #[inline(always)]
152 pub fn pide(
153 self,
154 ) -> crate::common::RegisterField<
155 4,
156 0x1,
157 1,
158 0,
159 poegga::Pide,
160 poegga::Pide,
161 Poegga_SPEC,
162 crate::common::RW,
163 > {
164 crate::common::RegisterField::<
165 4,
166 0x1,
167 1,
168 0,
169 poegga::Pide,
170 poegga::Pide,
171 Poegga_SPEC,
172 crate::common::RW,
173 >::from_register(self, 0)
174 }
175
176 #[doc = "Enable for GPT Output-Disable Request"]
177 #[inline(always)]
178 pub fn ioce(
179 self,
180 ) -> crate::common::RegisterField<
181 5,
182 0x1,
183 1,
184 0,
185 poegga::Ioce,
186 poegga::Ioce,
187 Poegga_SPEC,
188 crate::common::RW,
189 > {
190 crate::common::RegisterField::<
191 5,
192 0x1,
193 1,
194 0,
195 poegga::Ioce,
196 poegga::Ioce,
197 Poegga_SPEC,
198 crate::common::RW,
199 >::from_register(self, 0)
200 }
201
202 #[doc = "GTETRGn Input Status Flag"]
203 #[inline(always)]
204 pub fn st(
205 self,
206 ) -> crate::common::RegisterField<
207 16,
208 0x1,
209 1,
210 0,
211 poegga::St,
212 poegga::St,
213 Poegga_SPEC,
214 crate::common::R,
215 > {
216 crate::common::RegisterField::<
217 16,
218 0x1,
219 1,
220 0,
221 poegga::St,
222 poegga::St,
223 Poegga_SPEC,
224 crate::common::R,
225 >::from_register(self, 0)
226 }
227
228 #[doc = "GTETRGn Input Reverse"]
229 #[inline(always)]
230 pub fn inv(
231 self,
232 ) -> crate::common::RegisterField<
233 28,
234 0x1,
235 1,
236 0,
237 poegga::Inv,
238 poegga::Inv,
239 Poegga_SPEC,
240 crate::common::RW,
241 > {
242 crate::common::RegisterField::<
243 28,
244 0x1,
245 1,
246 0,
247 poegga::Inv,
248 poegga::Inv,
249 Poegga_SPEC,
250 crate::common::RW,
251 >::from_register(self, 0)
252 }
253
254 #[doc = "Noise Filter Enable"]
255 #[inline(always)]
256 pub fn nfen(
257 self,
258 ) -> crate::common::RegisterField<
259 29,
260 0x1,
261 1,
262 0,
263 poegga::Nfen,
264 poegga::Nfen,
265 Poegga_SPEC,
266 crate::common::RW,
267 > {
268 crate::common::RegisterField::<
269 29,
270 0x1,
271 1,
272 0,
273 poegga::Nfen,
274 poegga::Nfen,
275 Poegga_SPEC,
276 crate::common::RW,
277 >::from_register(self, 0)
278 }
279
280 #[doc = "Noise Filter Clock Select"]
281 #[inline(always)]
282 pub fn nfcs(
283 self,
284 ) -> crate::common::RegisterField<
285 30,
286 0x3,
287 1,
288 0,
289 poegga::Nfcs,
290 poegga::Nfcs,
291 Poegga_SPEC,
292 crate::common::RW,
293 > {
294 crate::common::RegisterField::<
295 30,
296 0x3,
297 1,
298 0,
299 poegga::Nfcs,
300 poegga::Nfcs,
301 Poegga_SPEC,
302 crate::common::RW,
303 >::from_register(self, 0)
304 }
305}
306impl ::core::default::Default for Poegga {
307 #[inline(always)]
308 fn default() -> Poegga {
309 <crate::RegValueT<Poegga_SPEC> as RegisterValue<_>>::new(0)
310 }
311}
312pub mod poegga {
313
314 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
315 pub struct Pidf_SPEC;
316 pub type Pidf = crate::EnumBitfieldStruct<u8, Pidf_SPEC>;
317 impl Pidf {
318 #[doc = "No output-disable request from the GTETRGn pin occurred"]
319 pub const _0: Self = Self::new(0);
320
321 #[doc = "Output-disable request from the GTETRGn pin occurred."]
322 pub const _1: Self = Self::new(1);
323 }
324 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
325 pub struct Iocf_SPEC;
326 pub type Iocf = crate::EnumBitfieldStruct<u8, Iocf_SPEC>;
327 impl Iocf {
328 #[doc = "No output-disable request from GPT occurred."]
329 pub const _0: Self = Self::new(0);
330
331 #[doc = "Output-disable request from GPT occurred."]
332 pub const _1: Self = Self::new(1);
333 }
334 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
335 pub struct Ssf_SPEC;
336 pub type Ssf = crate::EnumBitfieldStruct<u8, Ssf_SPEC>;
337 impl Ssf {
338 #[doc = "No output-disable request from software occurred"]
339 pub const _0: Self = Self::new(0);
340
341 #[doc = "Output-disable request from software occurred"]
342 pub const _1: Self = Self::new(1);
343 }
344 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
345 pub struct Pide_SPEC;
346 pub type Pide = crate::EnumBitfieldStruct<u8, Pide_SPEC>;
347 impl Pide {
348 #[doc = "Disable output-disable requests from the GTETRGn pins"]
349 pub const _0: Self = Self::new(0);
350
351 #[doc = "Enable output-disable requests from the GTETRGn pins"]
352 pub const _1: Self = Self::new(1);
353 }
354 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
355 pub struct Ioce_SPEC;
356 pub type Ioce = crate::EnumBitfieldStruct<u8, Ioce_SPEC>;
357 impl Ioce {
358 #[doc = "Disable output-disable requests from GPT"]
359 pub const _0: Self = Self::new(0);
360
361 #[doc = "Enable output-disable requests from GPT"]
362 pub const _1: Self = Self::new(1);
363 }
364 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
365 pub struct St_SPEC;
366 pub type St = crate::EnumBitfieldStruct<u8, St_SPEC>;
367 impl St {
368 #[doc = "GTETRGn input after filtering was 0"]
369 pub const _0: Self = Self::new(0);
370
371 #[doc = "GTETRGn input after filtering was 1"]
372 pub const _1: Self = Self::new(1);
373 }
374 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
375 pub struct Inv_SPEC;
376 pub type Inv = crate::EnumBitfieldStruct<u8, Inv_SPEC>;
377 impl Inv {
378 #[doc = "Input GTETRGn as-is"]
379 pub const _0: Self = Self::new(0);
380
381 #[doc = "Input GTETRGn in reverse"]
382 pub const _1: Self = Self::new(1);
383 }
384 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
385 pub struct Nfen_SPEC;
386 pub type Nfen = crate::EnumBitfieldStruct<u8, Nfen_SPEC>;
387 impl Nfen {
388 #[doc = "Disable noise filtering"]
389 pub const _0: Self = Self::new(0);
390
391 #[doc = "Enable noise filtering"]
392 pub const _1: Self = Self::new(1);
393 }
394 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
395 pub struct Nfcs_SPEC;
396 pub type Nfcs = crate::EnumBitfieldStruct<u8, Nfcs_SPEC>;
397 impl Nfcs {
398 #[doc = "Sample GTETRGn pin input level three times every PCLKB"]
399 pub const _00: Self = Self::new(0);
400
401 #[doc = "Sample GTETRGn pin input level three times every PCLKB/8"]
402 pub const _01: Self = Self::new(1);
403
404 #[doc = "Sample GTETRGn pin input level three times every PCLKB/32"]
405 pub const _10: Self = Self::new(2);
406
407 #[doc = "Sample GTETRGn pin input level three times every PCLKB/128"]
408 pub const _11: Self = Self::new(3);
409 }
410}
411#[doc(hidden)]
412#[derive(Copy, Clone, Eq, PartialEq)]
413pub struct Poeggb_SPEC;
414impl crate::sealed::RegSpec for Poeggb_SPEC {
415 type DataType = u32;
416}
417
418#[doc = "POEG Group B Setting Register"]
419pub type Poeggb = crate::RegValueT<Poeggb_SPEC>;
420
421impl Poeggb {
422 #[doc = "Port Input Detection Flag"]
423 #[inline(always)]
424 pub fn pidf(
425 self,
426 ) -> crate::common::RegisterField<
427 0,
428 0x1,
429 1,
430 0,
431 poeggb::Pidf,
432 poeggb::Pidf,
433 Poeggb_SPEC,
434 crate::common::RW,
435 > {
436 crate::common::RegisterField::<
437 0,
438 0x1,
439 1,
440 0,
441 poeggb::Pidf,
442 poeggb::Pidf,
443 Poeggb_SPEC,
444 crate::common::RW,
445 >::from_register(self, 0)
446 }
447
448 #[doc = "Detection Flag for GPT Output-Disable Request"]
449 #[inline(always)]
450 pub fn iocf(
451 self,
452 ) -> crate::common::RegisterField<
453 1,
454 0x1,
455 1,
456 0,
457 poeggb::Iocf,
458 poeggb::Iocf,
459 Poeggb_SPEC,
460 crate::common::RW,
461 > {
462 crate::common::RegisterField::<
463 1,
464 0x1,
465 1,
466 0,
467 poeggb::Iocf,
468 poeggb::Iocf,
469 Poeggb_SPEC,
470 crate::common::RW,
471 >::from_register(self, 0)
472 }
473
474 #[doc = "Software Stop Flag"]
475 #[inline(always)]
476 pub fn ssf(
477 self,
478 ) -> crate::common::RegisterField<
479 3,
480 0x1,
481 1,
482 0,
483 poeggb::Ssf,
484 poeggb::Ssf,
485 Poeggb_SPEC,
486 crate::common::RW,
487 > {
488 crate::common::RegisterField::<
489 3,
490 0x1,
491 1,
492 0,
493 poeggb::Ssf,
494 poeggb::Ssf,
495 Poeggb_SPEC,
496 crate::common::RW,
497 >::from_register(self, 0)
498 }
499
500 #[doc = "Port Input Detection Enable"]
501 #[inline(always)]
502 pub fn pide(
503 self,
504 ) -> crate::common::RegisterField<
505 4,
506 0x1,
507 1,
508 0,
509 poeggb::Pide,
510 poeggb::Pide,
511 Poeggb_SPEC,
512 crate::common::RW,
513 > {
514 crate::common::RegisterField::<
515 4,
516 0x1,
517 1,
518 0,
519 poeggb::Pide,
520 poeggb::Pide,
521 Poeggb_SPEC,
522 crate::common::RW,
523 >::from_register(self, 0)
524 }
525
526 #[doc = "Enable for GPT Output-Disable Request"]
527 #[inline(always)]
528 pub fn ioce(
529 self,
530 ) -> crate::common::RegisterField<
531 5,
532 0x1,
533 1,
534 0,
535 poeggb::Ioce,
536 poeggb::Ioce,
537 Poeggb_SPEC,
538 crate::common::RW,
539 > {
540 crate::common::RegisterField::<
541 5,
542 0x1,
543 1,
544 0,
545 poeggb::Ioce,
546 poeggb::Ioce,
547 Poeggb_SPEC,
548 crate::common::RW,
549 >::from_register(self, 0)
550 }
551
552 #[doc = "GTETRGn Input Status Flag"]
553 #[inline(always)]
554 pub fn st(
555 self,
556 ) -> crate::common::RegisterField<
557 16,
558 0x1,
559 1,
560 0,
561 poeggb::St,
562 poeggb::St,
563 Poeggb_SPEC,
564 crate::common::R,
565 > {
566 crate::common::RegisterField::<
567 16,
568 0x1,
569 1,
570 0,
571 poeggb::St,
572 poeggb::St,
573 Poeggb_SPEC,
574 crate::common::R,
575 >::from_register(self, 0)
576 }
577
578 #[doc = "GTETRGn Input Reverse"]
579 #[inline(always)]
580 pub fn inv(
581 self,
582 ) -> crate::common::RegisterField<
583 28,
584 0x1,
585 1,
586 0,
587 poeggb::Inv,
588 poeggb::Inv,
589 Poeggb_SPEC,
590 crate::common::RW,
591 > {
592 crate::common::RegisterField::<
593 28,
594 0x1,
595 1,
596 0,
597 poeggb::Inv,
598 poeggb::Inv,
599 Poeggb_SPEC,
600 crate::common::RW,
601 >::from_register(self, 0)
602 }
603
604 #[doc = "Noise Filter Enable"]
605 #[inline(always)]
606 pub fn nfen(
607 self,
608 ) -> crate::common::RegisterField<
609 29,
610 0x1,
611 1,
612 0,
613 poeggb::Nfen,
614 poeggb::Nfen,
615 Poeggb_SPEC,
616 crate::common::RW,
617 > {
618 crate::common::RegisterField::<
619 29,
620 0x1,
621 1,
622 0,
623 poeggb::Nfen,
624 poeggb::Nfen,
625 Poeggb_SPEC,
626 crate::common::RW,
627 >::from_register(self, 0)
628 }
629
630 #[doc = "Noise Filter Clock Select"]
631 #[inline(always)]
632 pub fn nfcs(
633 self,
634 ) -> crate::common::RegisterField<
635 30,
636 0x3,
637 1,
638 0,
639 poeggb::Nfcs,
640 poeggb::Nfcs,
641 Poeggb_SPEC,
642 crate::common::RW,
643 > {
644 crate::common::RegisterField::<
645 30,
646 0x3,
647 1,
648 0,
649 poeggb::Nfcs,
650 poeggb::Nfcs,
651 Poeggb_SPEC,
652 crate::common::RW,
653 >::from_register(self, 0)
654 }
655}
656impl ::core::default::Default for Poeggb {
657 #[inline(always)]
658 fn default() -> Poeggb {
659 <crate::RegValueT<Poeggb_SPEC> as RegisterValue<_>>::new(0)
660 }
661}
662pub mod poeggb {
663
664 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
665 pub struct Pidf_SPEC;
666 pub type Pidf = crate::EnumBitfieldStruct<u8, Pidf_SPEC>;
667 impl Pidf {
668 #[doc = "No output-disable request from the GTETRGn pin occurred"]
669 pub const _0: Self = Self::new(0);
670
671 #[doc = "Output-disable request from the GTETRGn pin occurred."]
672 pub const _1: Self = Self::new(1);
673 }
674 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
675 pub struct Iocf_SPEC;
676 pub type Iocf = crate::EnumBitfieldStruct<u8, Iocf_SPEC>;
677 impl Iocf {
678 #[doc = "No output-disable request from GPT occurred."]
679 pub const _0: Self = Self::new(0);
680
681 #[doc = "Output-disable request from GPT occurred."]
682 pub const _1: Self = Self::new(1);
683 }
684 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
685 pub struct Ssf_SPEC;
686 pub type Ssf = crate::EnumBitfieldStruct<u8, Ssf_SPEC>;
687 impl Ssf {
688 #[doc = "No output-disable request from software occurred"]
689 pub const _0: Self = Self::new(0);
690
691 #[doc = "Output-disable request from software occurred"]
692 pub const _1: Self = Self::new(1);
693 }
694 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
695 pub struct Pide_SPEC;
696 pub type Pide = crate::EnumBitfieldStruct<u8, Pide_SPEC>;
697 impl Pide {
698 #[doc = "Disable output-disable requests from the GTETRGn pins"]
699 pub const _0: Self = Self::new(0);
700
701 #[doc = "Enable output-disable requests from the GTETRGn pins"]
702 pub const _1: Self = Self::new(1);
703 }
704 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
705 pub struct Ioce_SPEC;
706 pub type Ioce = crate::EnumBitfieldStruct<u8, Ioce_SPEC>;
707 impl Ioce {
708 #[doc = "Disable output-disable requests from GPT"]
709 pub const _0: Self = Self::new(0);
710
711 #[doc = "Enable output-disable requests from GPT"]
712 pub const _1: Self = Self::new(1);
713 }
714 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
715 pub struct St_SPEC;
716 pub type St = crate::EnumBitfieldStruct<u8, St_SPEC>;
717 impl St {
718 #[doc = "GTETRGn input after filtering was 0"]
719 pub const _0: Self = Self::new(0);
720
721 #[doc = "GTETRGn input after filtering was 1"]
722 pub const _1: Self = Self::new(1);
723 }
724 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
725 pub struct Inv_SPEC;
726 pub type Inv = crate::EnumBitfieldStruct<u8, Inv_SPEC>;
727 impl Inv {
728 #[doc = "Input GTETRGn as-is"]
729 pub const _0: Self = Self::new(0);
730
731 #[doc = "Input GTETRGn in reverse"]
732 pub const _1: Self = Self::new(1);
733 }
734 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
735 pub struct Nfen_SPEC;
736 pub type Nfen = crate::EnumBitfieldStruct<u8, Nfen_SPEC>;
737 impl Nfen {
738 #[doc = "Disable noise filtering"]
739 pub const _0: Self = Self::new(0);
740
741 #[doc = "Enable noise filtering"]
742 pub const _1: Self = Self::new(1);
743 }
744 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
745 pub struct Nfcs_SPEC;
746 pub type Nfcs = crate::EnumBitfieldStruct<u8, Nfcs_SPEC>;
747 impl Nfcs {
748 #[doc = "Sample GTETRGn pin input level three times every PCLKB"]
749 pub const _00: Self = Self::new(0);
750
751 #[doc = "Sample GTETRGn pin input level three times every PCLKB/8"]
752 pub const _01: Self = Self::new(1);
753
754 #[doc = "Sample GTETRGn pin input level three times every PCLKB/32"]
755 pub const _10: Self = Self::new(2);
756
757 #[doc = "Sample GTETRGn pin input level three times every PCLKB/128"]
758 pub const _11: Self = Self::new(3);
759 }
760}