ra2e2_pac/
dbg.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.40.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:46:37 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Debug Function"]
28unsafe impl ::core::marker::Send for super::Dbg {}
29unsafe impl ::core::marker::Sync for super::Dbg {}
30impl super::Dbg {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Debug Status Register"]
38    #[inline(always)]
39    pub const fn dbgstr(&self) -> &'static crate::common::Reg<self::Dbgstr_SPEC, crate::common::R> {
40        unsafe {
41            crate::common::Reg::<self::Dbgstr_SPEC, crate::common::R>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "Debug Stop Control Register"]
48    #[inline(always)]
49    pub const fn dbgstopcr(
50        &self,
51    ) -> &'static crate::common::Reg<self::Dbgstopcr_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Dbgstopcr_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(16usize),
55            )
56        }
57    }
58}
59#[doc(hidden)]
60#[derive(Copy, Clone, Eq, PartialEq)]
61pub struct Dbgstr_SPEC;
62impl crate::sealed::RegSpec for Dbgstr_SPEC {
63    type DataType = u32;
64}
65
66#[doc = "Debug Status Register"]
67pub type Dbgstr = crate::RegValueT<Dbgstr_SPEC>;
68
69impl Dbgstr {
70    #[doc = "Debug power-up request"]
71    #[inline(always)]
72    pub fn cdbgpwrupreq(
73        self,
74    ) -> crate::common::RegisterField<
75        28,
76        0x1,
77        1,
78        0,
79        dbgstr::Cdbgpwrupreq,
80        dbgstr::Cdbgpwrupreq,
81        Dbgstr_SPEC,
82        crate::common::R,
83    > {
84        crate::common::RegisterField::<
85            28,
86            0x1,
87            1,
88            0,
89            dbgstr::Cdbgpwrupreq,
90            dbgstr::Cdbgpwrupreq,
91            Dbgstr_SPEC,
92            crate::common::R,
93        >::from_register(self, 0)
94    }
95
96    #[doc = "Debug power-up acknowledge"]
97    #[inline(always)]
98    pub fn cdbgpwrupack(
99        self,
100    ) -> crate::common::RegisterField<
101        29,
102        0x1,
103        1,
104        0,
105        dbgstr::Cdbgpwrupack,
106        dbgstr::Cdbgpwrupack,
107        Dbgstr_SPEC,
108        crate::common::R,
109    > {
110        crate::common::RegisterField::<
111            29,
112            0x1,
113            1,
114            0,
115            dbgstr::Cdbgpwrupack,
116            dbgstr::Cdbgpwrupack,
117            Dbgstr_SPEC,
118            crate::common::R,
119        >::from_register(self, 0)
120    }
121}
122impl ::core::default::Default for Dbgstr {
123    #[inline(always)]
124    fn default() -> Dbgstr {
125        <crate::RegValueT<Dbgstr_SPEC> as RegisterValue<_>>::new(0)
126    }
127}
128pub mod dbgstr {
129
130    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
131    pub struct Cdbgpwrupreq_SPEC;
132    pub type Cdbgpwrupreq = crate::EnumBitfieldStruct<u8, Cdbgpwrupreq_SPEC>;
133    impl Cdbgpwrupreq {
134        #[doc = "OCD is not requesting debug power up"]
135        pub const _0: Self = Self::new(0);
136
137        #[doc = "OCD is requesting debug power up"]
138        pub const _1: Self = Self::new(1);
139    }
140    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
141    pub struct Cdbgpwrupack_SPEC;
142    pub type Cdbgpwrupack = crate::EnumBitfieldStruct<u8, Cdbgpwrupack_SPEC>;
143    impl Cdbgpwrupack {
144        #[doc = "Debug power-up request is not acknowledged"]
145        pub const _0: Self = Self::new(0);
146
147        #[doc = "Debug power-up request is acknowledged"]
148        pub const _1: Self = Self::new(1);
149    }
150}
151#[doc(hidden)]
152#[derive(Copy, Clone, Eq, PartialEq)]
153pub struct Dbgstopcr_SPEC;
154impl crate::sealed::RegSpec for Dbgstopcr_SPEC {
155    type DataType = u32;
156}
157
158#[doc = "Debug Stop Control Register"]
159pub type Dbgstopcr = crate::RegValueT<Dbgstopcr_SPEC>;
160
161impl Dbgstopcr {
162    #[doc = "Mask bit for IWDT reset/interrupt in the OCD run mode"]
163    #[inline(always)]
164    pub fn dbgstop_iwdt(
165        self,
166    ) -> crate::common::RegisterField<
167        0,
168        0x1,
169        1,
170        0,
171        dbgstopcr::DbgstopIwdt,
172        dbgstopcr::DbgstopIwdt,
173        Dbgstopcr_SPEC,
174        crate::common::RW,
175    > {
176        crate::common::RegisterField::<
177            0,
178            0x1,
179            1,
180            0,
181            dbgstopcr::DbgstopIwdt,
182            dbgstopcr::DbgstopIwdt,
183            Dbgstopcr_SPEC,
184            crate::common::RW,
185        >::from_register(self, 0)
186    }
187
188    #[doc = "Mask bit for WDT reset/interrupt in the OCD run mode"]
189    #[inline(always)]
190    pub fn dbgstop_wdt(
191        self,
192    ) -> crate::common::RegisterField<
193        1,
194        0x1,
195        1,
196        0,
197        dbgstopcr::DbgstopWdt,
198        dbgstopcr::DbgstopWdt,
199        Dbgstopcr_SPEC,
200        crate::common::RW,
201    > {
202        crate::common::RegisterField::<
203            1,
204            0x1,
205            1,
206            0,
207            dbgstopcr::DbgstopWdt,
208            dbgstopcr::DbgstopWdt,
209            Dbgstopcr_SPEC,
210            crate::common::RW,
211        >::from_register(self, 0)
212    }
213
214    #[doc = "Mask bit for LVD0 reset"]
215    #[inline(always)]
216    pub fn dbgstop_lvd0(
217        self,
218    ) -> crate::common::RegisterField<
219        16,
220        0x1,
221        1,
222        0,
223        dbgstopcr::DbgstopLvd0,
224        dbgstopcr::DbgstopLvd0,
225        Dbgstopcr_SPEC,
226        crate::common::RW,
227    > {
228        crate::common::RegisterField::<
229            16,
230            0x1,
231            1,
232            0,
233            dbgstopcr::DbgstopLvd0,
234            dbgstopcr::DbgstopLvd0,
235            Dbgstopcr_SPEC,
236            crate::common::RW,
237        >::from_register(self, 0)
238    }
239
240    #[doc = "Mask bit for LVD1 reset/interrupt"]
241    #[inline(always)]
242    pub fn dbgstop_lvd1(
243        self,
244    ) -> crate::common::RegisterField<
245        17,
246        0x1,
247        1,
248        0,
249        dbgstopcr::DbgstopLvd1,
250        dbgstopcr::DbgstopLvd1,
251        Dbgstopcr_SPEC,
252        crate::common::RW,
253    > {
254        crate::common::RegisterField::<
255            17,
256            0x1,
257            1,
258            0,
259            dbgstopcr::DbgstopLvd1,
260            dbgstopcr::DbgstopLvd1,
261            Dbgstopcr_SPEC,
262            crate::common::RW,
263        >::from_register(self, 0)
264    }
265
266    #[doc = "Mask bit for LVD2 reset/interrupt"]
267    #[inline(always)]
268    pub fn dbgstop_lvd2(
269        self,
270    ) -> crate::common::RegisterField<
271        18,
272        0x1,
273        1,
274        0,
275        dbgstopcr::DbgstopLvd2,
276        dbgstopcr::DbgstopLvd2,
277        Dbgstopcr_SPEC,
278        crate::common::RW,
279    > {
280        crate::common::RegisterField::<
281            18,
282            0x1,
283            1,
284            0,
285            dbgstopcr::DbgstopLvd2,
286            dbgstopcr::DbgstopLvd2,
287            Dbgstopcr_SPEC,
288            crate::common::RW,
289        >::from_register(self, 0)
290    }
291
292    #[doc = "Mask bit for SRAM parity error reset/interrupt"]
293    #[inline(always)]
294    pub fn dbgstop_rper(
295        self,
296    ) -> crate::common::RegisterField<
297        24,
298        0x1,
299        1,
300        0,
301        dbgstopcr::DbgstopRper,
302        dbgstopcr::DbgstopRper,
303        Dbgstopcr_SPEC,
304        crate::common::RW,
305    > {
306        crate::common::RegisterField::<
307            24,
308            0x1,
309            1,
310            0,
311            dbgstopcr::DbgstopRper,
312            dbgstopcr::DbgstopRper,
313            Dbgstopcr_SPEC,
314            crate::common::RW,
315        >::from_register(self, 0)
316    }
317}
318impl ::core::default::Default for Dbgstopcr {
319    #[inline(always)]
320    fn default() -> Dbgstopcr {
321        <crate::RegValueT<Dbgstopcr_SPEC> as RegisterValue<_>>::new(3)
322    }
323}
324pub mod dbgstopcr {
325
326    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
327    pub struct DbgstopIwdt_SPEC;
328    pub type DbgstopIwdt = crate::EnumBitfieldStruct<u8, DbgstopIwdt_SPEC>;
329    impl DbgstopIwdt {
330        #[doc = "Enable IWDT reset/interrupt"]
331        pub const _0: Self = Self::new(0);
332
333        #[doc = "Mask IWDT reset/interrupt and stop IWDT counter"]
334        pub const _1: Self = Self::new(1);
335    }
336    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
337    pub struct DbgstopWdt_SPEC;
338    pub type DbgstopWdt = crate::EnumBitfieldStruct<u8, DbgstopWdt_SPEC>;
339    impl DbgstopWdt {
340        #[doc = "Enable WDT reset/interrupt"]
341        pub const _0: Self = Self::new(0);
342
343        #[doc = "Mask WDT reset/interrupt and stop WDT counter"]
344        pub const _1: Self = Self::new(1);
345    }
346    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
347    pub struct DbgstopLvd0_SPEC;
348    pub type DbgstopLvd0 = crate::EnumBitfieldStruct<u8, DbgstopLvd0_SPEC>;
349    impl DbgstopLvd0 {
350        #[doc = "Enable LVD0 reset"]
351        pub const _0: Self = Self::new(0);
352
353        #[doc = "Mask LVD0 reset"]
354        pub const _1: Self = Self::new(1);
355    }
356    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
357    pub struct DbgstopLvd1_SPEC;
358    pub type DbgstopLvd1 = crate::EnumBitfieldStruct<u8, DbgstopLvd1_SPEC>;
359    impl DbgstopLvd1 {
360        #[doc = "Enable LVD1 reset/interrupt"]
361        pub const _0: Self = Self::new(0);
362
363        #[doc = "Mask LVD1 reset/interrupt"]
364        pub const _1: Self = Self::new(1);
365    }
366    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
367    pub struct DbgstopLvd2_SPEC;
368    pub type DbgstopLvd2 = crate::EnumBitfieldStruct<u8, DbgstopLvd2_SPEC>;
369    impl DbgstopLvd2 {
370        #[doc = "Enable LVD2 reset/interrupt"]
371        pub const _0: Self = Self::new(0);
372
373        #[doc = "Mask LVD2 reset/interrupt"]
374        pub const _1: Self = Self::new(1);
375    }
376    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
377    pub struct DbgstopRper_SPEC;
378    pub type DbgstopRper = crate::EnumBitfieldStruct<u8, DbgstopRper_SPEC>;
379    impl DbgstopRper {
380        #[doc = "Enable SRAM parity error reset/interrupt"]
381        pub const _0: Self = Self::new(0);
382
383        #[doc = "Mask SRAM parity error reset/interrupt"]
384        pub const _1: Self = Self::new(1);
385    }
386}
ra2e2_pac/dbg.rs

ra2e2_pac/
dbg.rs
