ra2e2_pac/
cac.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.40.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:46:37 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Clock Frequency Accuracy Measurement Circuit"]
28unsafe impl ::core::marker::Send for super::Cac {}
29unsafe impl ::core::marker::Sync for super::Cac {}
30impl super::Cac {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "CAC Control Register 0"]
38    #[inline(always)]
39    pub const fn cacr0(&self) -> &'static crate::common::Reg<self::Cacr0_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Cacr0_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "CAC Control Register 1"]
48    #[inline(always)]
49    pub const fn cacr1(&self) -> &'static crate::common::Reg<self::Cacr1_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Cacr1_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(1usize),
53            )
54        }
55    }
56
57    #[doc = "CAC Control Register 2"]
58    #[inline(always)]
59    pub const fn cacr2(&self) -> &'static crate::common::Reg<self::Cacr2_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Cacr2_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(2usize),
63            )
64        }
65    }
66
67    #[doc = "CAC Interrupt Control Register"]
68    #[inline(always)]
69    pub const fn caicr(&self) -> &'static crate::common::Reg<self::Caicr_SPEC, crate::common::RW> {
70        unsafe {
71            crate::common::Reg::<self::Caicr_SPEC, crate::common::RW>::from_ptr(
72                self._svd2pac_as_ptr().add(3usize),
73            )
74        }
75    }
76
77    #[doc = "CAC Status Register"]
78    #[inline(always)]
79    pub const fn castr(&self) -> &'static crate::common::Reg<self::Castr_SPEC, crate::common::R> {
80        unsafe {
81            crate::common::Reg::<self::Castr_SPEC, crate::common::R>::from_ptr(
82                self._svd2pac_as_ptr().add(4usize),
83            )
84        }
85    }
86
87    #[doc = "CAC Upper-Limit Value Setting Register"]
88    #[inline(always)]
89    pub const fn caulvr(
90        &self,
91    ) -> &'static crate::common::Reg<self::Caulvr_SPEC, crate::common::RW> {
92        unsafe {
93            crate::common::Reg::<self::Caulvr_SPEC, crate::common::RW>::from_ptr(
94                self._svd2pac_as_ptr().add(6usize),
95            )
96        }
97    }
98
99    #[doc = "CAC Lower-Limit Value Setting Register"]
100    #[inline(always)]
101    pub const fn callvr(
102        &self,
103    ) -> &'static crate::common::Reg<self::Callvr_SPEC, crate::common::RW> {
104        unsafe {
105            crate::common::Reg::<self::Callvr_SPEC, crate::common::RW>::from_ptr(
106                self._svd2pac_as_ptr().add(8usize),
107            )
108        }
109    }
110
111    #[doc = "CAC Counter Buffer Register"]
112    #[inline(always)]
113    pub const fn cacntbr(
114        &self,
115    ) -> &'static crate::common::Reg<self::Cacntbr_SPEC, crate::common::R> {
116        unsafe {
117            crate::common::Reg::<self::Cacntbr_SPEC, crate::common::R>::from_ptr(
118                self._svd2pac_as_ptr().add(10usize),
119            )
120        }
121    }
122}
123#[doc(hidden)]
124#[derive(Copy, Clone, Eq, PartialEq)]
125pub struct Cacr0_SPEC;
126impl crate::sealed::RegSpec for Cacr0_SPEC {
127    type DataType = u8;
128}
129
130#[doc = "CAC Control Register 0"]
131pub type Cacr0 = crate::RegValueT<Cacr0_SPEC>;
132
133impl Cacr0 {
134    #[doc = "Clock Frequency Measurement Enable"]
135    #[inline(always)]
136    pub fn cfme(
137        self,
138    ) -> crate::common::RegisterField<
139        0,
140        0x1,
141        1,
142        0,
143        cacr0::Cfme,
144        cacr0::Cfme,
145        Cacr0_SPEC,
146        crate::common::RW,
147    > {
148        crate::common::RegisterField::<
149            0,
150            0x1,
151            1,
152            0,
153            cacr0::Cfme,
154            cacr0::Cfme,
155            Cacr0_SPEC,
156            crate::common::RW,
157        >::from_register(self, 0)
158    }
159}
160impl ::core::default::Default for Cacr0 {
161    #[inline(always)]
162    fn default() -> Cacr0 {
163        <crate::RegValueT<Cacr0_SPEC> as RegisterValue<_>>::new(0)
164    }
165}
166pub mod cacr0 {
167
168    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
169    pub struct Cfme_SPEC;
170    pub type Cfme = crate::EnumBitfieldStruct<u8, Cfme_SPEC>;
171    impl Cfme {
172        #[doc = "Disable"]
173        pub const _0: Self = Self::new(0);
174
175        #[doc = "Enable"]
176        pub const _1: Self = Self::new(1);
177    }
178}
179#[doc(hidden)]
180#[derive(Copy, Clone, Eq, PartialEq)]
181pub struct Cacr1_SPEC;
182impl crate::sealed::RegSpec for Cacr1_SPEC {
183    type DataType = u8;
184}
185
186#[doc = "CAC Control Register 1"]
187pub type Cacr1 = crate::RegValueT<Cacr1_SPEC>;
188
189impl Cacr1 {
190    #[doc = "CACREF Pin Input Enable"]
191    #[inline(always)]
192    pub fn cacrefe(
193        self,
194    ) -> crate::common::RegisterField<
195        0,
196        0x1,
197        1,
198        0,
199        cacr1::Cacrefe,
200        cacr1::Cacrefe,
201        Cacr1_SPEC,
202        crate::common::RW,
203    > {
204        crate::common::RegisterField::<
205            0,
206            0x1,
207            1,
208            0,
209            cacr1::Cacrefe,
210            cacr1::Cacrefe,
211            Cacr1_SPEC,
212            crate::common::RW,
213        >::from_register(self, 0)
214    }
215
216    #[doc = "Measurement Target Clock Select"]
217    #[inline(always)]
218    pub fn fmcs(
219        self,
220    ) -> crate::common::RegisterField<
221        1,
222        0x7,
223        1,
224        0,
225        cacr1::Fmcs,
226        cacr1::Fmcs,
227        Cacr1_SPEC,
228        crate::common::RW,
229    > {
230        crate::common::RegisterField::<
231            1,
232            0x7,
233            1,
234            0,
235            cacr1::Fmcs,
236            cacr1::Fmcs,
237            Cacr1_SPEC,
238            crate::common::RW,
239        >::from_register(self, 0)
240    }
241
242    #[doc = "Timer Count Clock Source Select"]
243    #[inline(always)]
244    pub fn tcss(
245        self,
246    ) -> crate::common::RegisterField<
247        4,
248        0x3,
249        1,
250        0,
251        cacr1::Tcss,
252        cacr1::Tcss,
253        Cacr1_SPEC,
254        crate::common::RW,
255    > {
256        crate::common::RegisterField::<
257            4,
258            0x3,
259            1,
260            0,
261            cacr1::Tcss,
262            cacr1::Tcss,
263            Cacr1_SPEC,
264            crate::common::RW,
265        >::from_register(self, 0)
266    }
267
268    #[doc = "Valid Edge Select"]
269    #[inline(always)]
270    pub fn edges(
271        self,
272    ) -> crate::common::RegisterField<
273        6,
274        0x3,
275        1,
276        0,
277        cacr1::Edges,
278        cacr1::Edges,
279        Cacr1_SPEC,
280        crate::common::RW,
281    > {
282        crate::common::RegisterField::<
283            6,
284            0x3,
285            1,
286            0,
287            cacr1::Edges,
288            cacr1::Edges,
289            Cacr1_SPEC,
290            crate::common::RW,
291        >::from_register(self, 0)
292    }
293}
294impl ::core::default::Default for Cacr1 {
295    #[inline(always)]
296    fn default() -> Cacr1 {
297        <crate::RegValueT<Cacr1_SPEC> as RegisterValue<_>>::new(0)
298    }
299}
300pub mod cacr1 {
301
302    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
303    pub struct Cacrefe_SPEC;
304    pub type Cacrefe = crate::EnumBitfieldStruct<u8, Cacrefe_SPEC>;
305    impl Cacrefe {
306        #[doc = "Disable"]
307        pub const _0: Self = Self::new(0);
308
309        #[doc = "Enable"]
310        pub const _1: Self = Self::new(1);
311    }
312    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
313    pub struct Fmcs_SPEC;
314    pub type Fmcs = crate::EnumBitfieldStruct<u8, Fmcs_SPEC>;
315    impl Fmcs {
316        #[doc = "Setting prohibited"]
317        pub const _000: Self = Self::new(0);
318
319        #[doc = "Setting prohibited"]
320        pub const _001: Self = Self::new(1);
321
322        #[doc = "HOCO clock"]
323        pub const _010: Self = Self::new(2);
324
325        #[doc = "MOCO"]
326        pub const _011: Self = Self::new(3);
327
328        #[doc = "LOCO clock"]
329        pub const _100: Self = Self::new(4);
330
331        #[doc = "Peripheral module clock B (PCLKB)"]
332        pub const _101: Self = Self::new(5);
333
334        #[doc = "IWDT-dedicated clock"]
335        pub const _110: Self = Self::new(6);
336
337        #[doc = "Setting prohibited"]
338        pub const _111: Self = Self::new(7);
339    }
340    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
341    pub struct Tcss_SPEC;
342    pub type Tcss = crate::EnumBitfieldStruct<u8, Tcss_SPEC>;
343    impl Tcss {
344        #[doc = "No division"]
345        pub const _00: Self = Self::new(0);
346
347        #[doc = "x 1/4 clock"]
348        pub const _01: Self = Self::new(1);
349
350        #[doc = "x 1/8 clock"]
351        pub const _10: Self = Self::new(2);
352
353        #[doc = "x 1/32 clock"]
354        pub const _11: Self = Self::new(3);
355    }
356    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
357    pub struct Edges_SPEC;
358    pub type Edges = crate::EnumBitfieldStruct<u8, Edges_SPEC>;
359    impl Edges {
360        #[doc = "Rising edge"]
361        pub const _00: Self = Self::new(0);
362
363        #[doc = "Falling edge"]
364        pub const _01: Self = Self::new(1);
365
366        #[doc = "Both rising and falling edges"]
367        pub const _10: Self = Self::new(2);
368
369        #[doc = "Setting prohibited"]
370        pub const _11: Self = Self::new(3);
371    }
372}
373#[doc(hidden)]
374#[derive(Copy, Clone, Eq, PartialEq)]
375pub struct Cacr2_SPEC;
376impl crate::sealed::RegSpec for Cacr2_SPEC {
377    type DataType = u8;
378}
379
380#[doc = "CAC Control Register 2"]
381pub type Cacr2 = crate::RegValueT<Cacr2_SPEC>;
382
383impl Cacr2 {
384    #[doc = "Reference Signal Select"]
385    #[inline(always)]
386    pub fn rps(
387        self,
388    ) -> crate::common::RegisterField<
389        0,
390        0x1,
391        1,
392        0,
393        cacr2::Rps,
394        cacr2::Rps,
395        Cacr2_SPEC,
396        crate::common::RW,
397    > {
398        crate::common::RegisterField::<
399            0,
400            0x1,
401            1,
402            0,
403            cacr2::Rps,
404            cacr2::Rps,
405            Cacr2_SPEC,
406            crate::common::RW,
407        >::from_register(self, 0)
408    }
409
410    #[doc = "Measurement Reference Clock Select"]
411    #[inline(always)]
412    pub fn rscs(
413        self,
414    ) -> crate::common::RegisterField<
415        1,
416        0x7,
417        1,
418        0,
419        cacr2::Rscs,
420        cacr2::Rscs,
421        Cacr2_SPEC,
422        crate::common::RW,
423    > {
424        crate::common::RegisterField::<
425            1,
426            0x7,
427            1,
428            0,
429            cacr2::Rscs,
430            cacr2::Rscs,
431            Cacr2_SPEC,
432            crate::common::RW,
433        >::from_register(self, 0)
434    }
435
436    #[doc = "Measurement Reference Clock Frequency Division Ratio Select"]
437    #[inline(always)]
438    pub fn rcds(
439        self,
440    ) -> crate::common::RegisterField<
441        4,
442        0x3,
443        1,
444        0,
445        cacr2::Rcds,
446        cacr2::Rcds,
447        Cacr2_SPEC,
448        crate::common::RW,
449    > {
450        crate::common::RegisterField::<
451            4,
452            0x3,
453            1,
454            0,
455            cacr2::Rcds,
456            cacr2::Rcds,
457            Cacr2_SPEC,
458            crate::common::RW,
459        >::from_register(self, 0)
460    }
461
462    #[doc = "Digital Filter Select"]
463    #[inline(always)]
464    pub fn dfs(
465        self,
466    ) -> crate::common::RegisterField<
467        6,
468        0x3,
469        1,
470        0,
471        cacr2::Dfs,
472        cacr2::Dfs,
473        Cacr2_SPEC,
474        crate::common::RW,
475    > {
476        crate::common::RegisterField::<
477            6,
478            0x3,
479            1,
480            0,
481            cacr2::Dfs,
482            cacr2::Dfs,
483            Cacr2_SPEC,
484            crate::common::RW,
485        >::from_register(self, 0)
486    }
487}
488impl ::core::default::Default for Cacr2 {
489    #[inline(always)]
490    fn default() -> Cacr2 {
491        <crate::RegValueT<Cacr2_SPEC> as RegisterValue<_>>::new(0)
492    }
493}
494pub mod cacr2 {
495
496    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
497    pub struct Rps_SPEC;
498    pub type Rps = crate::EnumBitfieldStruct<u8, Rps_SPEC>;
499    impl Rps {
500        #[doc = "CACREF pin input"]
501        pub const _0: Self = Self::new(0);
502
503        #[doc = "Internal clock (internally generated signal)"]
504        pub const _1: Self = Self::new(1);
505    }
506    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
507    pub struct Rscs_SPEC;
508    pub type Rscs = crate::EnumBitfieldStruct<u8, Rscs_SPEC>;
509    impl Rscs {
510        #[doc = "Setting prohibited"]
511        pub const _000: Self = Self::new(0);
512
513        #[doc = "Setting prohibited"]
514        pub const _001: Self = Self::new(1);
515
516        #[doc = "HOCO clock"]
517        pub const _010: Self = Self::new(2);
518
519        #[doc = "MOCO"]
520        pub const _011: Self = Self::new(3);
521
522        #[doc = "LOCO clock"]
523        pub const _100: Self = Self::new(4);
524
525        #[doc = "Peripheral module clock B (PCLKB)"]
526        pub const _101: Self = Self::new(5);
527
528        #[doc = "IWDT-dedicated clock"]
529        pub const _110: Self = Self::new(6);
530
531        #[doc = "Setting prohibited"]
532        pub const _111: Self = Self::new(7);
533    }
534    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
535    pub struct Rcds_SPEC;
536    pub type Rcds = crate::EnumBitfieldStruct<u8, Rcds_SPEC>;
537    impl Rcds {
538        #[doc = "x 1/32 clock"]
539        pub const _00: Self = Self::new(0);
540
541        #[doc = "x 1/128 clock"]
542        pub const _01: Self = Self::new(1);
543
544        #[doc = "x 1/1024 clock"]
545        pub const _10: Self = Self::new(2);
546
547        #[doc = "x 1/8192 clock"]
548        pub const _11: Self = Self::new(3);
549    }
550    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
551    pub struct Dfs_SPEC;
552    pub type Dfs = crate::EnumBitfieldStruct<u8, Dfs_SPEC>;
553    impl Dfs {
554        #[doc = "Disable digital filtering"]
555        pub const _00: Self = Self::new(0);
556
557        #[doc = "Use sampling clock for the digital filter as the frequency measuring clock"]
558        pub const _01: Self = Self::new(1);
559
560        #[doc = "Use sampling clock for the digital filter as the frequency measuring clock divided by 4"]
561        pub const _10: Self = Self::new(2);
562
563        #[doc = "Use sampling clock for the digital filter as the frequency measuring clock divided by 16."]
564        pub const _11: Self = Self::new(3);
565    }
566}
567#[doc(hidden)]
568#[derive(Copy, Clone, Eq, PartialEq)]
569pub struct Caicr_SPEC;
570impl crate::sealed::RegSpec for Caicr_SPEC {
571    type DataType = u8;
572}
573
574#[doc = "CAC Interrupt Control Register"]
575pub type Caicr = crate::RegValueT<Caicr_SPEC>;
576
577impl Caicr {
578    #[doc = "Frequency Error Interrupt Request Enable"]
579    #[inline(always)]
580    pub fn ferrie(
581        self,
582    ) -> crate::common::RegisterField<
583        0,
584        0x1,
585        1,
586        0,
587        caicr::Ferrie,
588        caicr::Ferrie,
589        Caicr_SPEC,
590        crate::common::RW,
591    > {
592        crate::common::RegisterField::<
593            0,
594            0x1,
595            1,
596            0,
597            caicr::Ferrie,
598            caicr::Ferrie,
599            Caicr_SPEC,
600            crate::common::RW,
601        >::from_register(self, 0)
602    }
603
604    #[doc = "Measurement End Interrupt Request Enable"]
605    #[inline(always)]
606    pub fn mendie(
607        self,
608    ) -> crate::common::RegisterField<
609        1,
610        0x1,
611        1,
612        0,
613        caicr::Mendie,
614        caicr::Mendie,
615        Caicr_SPEC,
616        crate::common::RW,
617    > {
618        crate::common::RegisterField::<
619            1,
620            0x1,
621            1,
622            0,
623            caicr::Mendie,
624            caicr::Mendie,
625            Caicr_SPEC,
626            crate::common::RW,
627        >::from_register(self, 0)
628    }
629
630    #[doc = "Overflow Interrupt Request Enable"]
631    #[inline(always)]
632    pub fn ovfie(
633        self,
634    ) -> crate::common::RegisterField<
635        2,
636        0x1,
637        1,
638        0,
639        caicr::Ovfie,
640        caicr::Ovfie,
641        Caicr_SPEC,
642        crate::common::RW,
643    > {
644        crate::common::RegisterField::<
645            2,
646            0x1,
647            1,
648            0,
649            caicr::Ovfie,
650            caicr::Ovfie,
651            Caicr_SPEC,
652            crate::common::RW,
653        >::from_register(self, 0)
654    }
655
656    #[doc = "FERRF Clear"]
657    #[inline(always)]
658    pub fn ferrfcl(
659        self,
660    ) -> crate::common::RegisterField<
661        4,
662        0x1,
663        1,
664        0,
665        caicr::Ferrfcl,
666        caicr::Ferrfcl,
667        Caicr_SPEC,
668        crate::common::W,
669    > {
670        crate::common::RegisterField::<
671            4,
672            0x1,
673            1,
674            0,
675            caicr::Ferrfcl,
676            caicr::Ferrfcl,
677            Caicr_SPEC,
678            crate::common::W,
679        >::from_register(self, 0)
680    }
681
682    #[doc = "MENDF Clear"]
683    #[inline(always)]
684    pub fn mendfcl(
685        self,
686    ) -> crate::common::RegisterField<
687        5,
688        0x1,
689        1,
690        0,
691        caicr::Mendfcl,
692        caicr::Mendfcl,
693        Caicr_SPEC,
694        crate::common::W,
695    > {
696        crate::common::RegisterField::<
697            5,
698            0x1,
699            1,
700            0,
701            caicr::Mendfcl,
702            caicr::Mendfcl,
703            Caicr_SPEC,
704            crate::common::W,
705        >::from_register(self, 0)
706    }
707
708    #[doc = "OVFF Clear"]
709    #[inline(always)]
710    pub fn ovffcl(
711        self,
712    ) -> crate::common::RegisterField<
713        6,
714        0x1,
715        1,
716        0,
717        caicr::Ovffcl,
718        caicr::Ovffcl,
719        Caicr_SPEC,
720        crate::common::W,
721    > {
722        crate::common::RegisterField::<
723            6,
724            0x1,
725            1,
726            0,
727            caicr::Ovffcl,
728            caicr::Ovffcl,
729            Caicr_SPEC,
730            crate::common::W,
731        >::from_register(self, 0)
732    }
733}
734impl ::core::default::Default for Caicr {
735    #[inline(always)]
736    fn default() -> Caicr {
737        <crate::RegValueT<Caicr_SPEC> as RegisterValue<_>>::new(0)
738    }
739}
740pub mod caicr {
741
742    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
743    pub struct Ferrie_SPEC;
744    pub type Ferrie = crate::EnumBitfieldStruct<u8, Ferrie_SPEC>;
745    impl Ferrie {
746        #[doc = "Disable"]
747        pub const _0: Self = Self::new(0);
748
749        #[doc = "Enable"]
750        pub const _1: Self = Self::new(1);
751    }
752    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
753    pub struct Mendie_SPEC;
754    pub type Mendie = crate::EnumBitfieldStruct<u8, Mendie_SPEC>;
755    impl Mendie {
756        #[doc = "Disable"]
757        pub const _0: Self = Self::new(0);
758
759        #[doc = "Enable"]
760        pub const _1: Self = Self::new(1);
761    }
762    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
763    pub struct Ovfie_SPEC;
764    pub type Ovfie = crate::EnumBitfieldStruct<u8, Ovfie_SPEC>;
765    impl Ovfie {
766        #[doc = "Disable"]
767        pub const _0: Self = Self::new(0);
768
769        #[doc = "Enable"]
770        pub const _1: Self = Self::new(1);
771    }
772    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
773    pub struct Ferrfcl_SPEC;
774    pub type Ferrfcl = crate::EnumBitfieldStruct<u8, Ferrfcl_SPEC>;
775    impl Ferrfcl {
776        #[doc = "No effect"]
777        pub const _0: Self = Self::new(0);
778
779        #[doc = "The CASTR.FERRF flag is cleared"]
780        pub const _1: Self = Self::new(1);
781    }
782    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
783    pub struct Mendfcl_SPEC;
784    pub type Mendfcl = crate::EnumBitfieldStruct<u8, Mendfcl_SPEC>;
785    impl Mendfcl {
786        #[doc = "No effect"]
787        pub const _0: Self = Self::new(0);
788
789        #[doc = "The CASTR.MENDF flag is cleared"]
790        pub const _1: Self = Self::new(1);
791    }
792    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
793    pub struct Ovffcl_SPEC;
794    pub type Ovffcl = crate::EnumBitfieldStruct<u8, Ovffcl_SPEC>;
795    impl Ovffcl {
796        #[doc = "No effect"]
797        pub const _0: Self = Self::new(0);
798
799        #[doc = "The CASTR.OVFF flag is cleared."]
800        pub const _1: Self = Self::new(1);
801    }
802}
803#[doc(hidden)]
804#[derive(Copy, Clone, Eq, PartialEq)]
805pub struct Castr_SPEC;
806impl crate::sealed::RegSpec for Castr_SPEC {
807    type DataType = u8;
808}
809
810#[doc = "CAC Status Register"]
811pub type Castr = crate::RegValueT<Castr_SPEC>;
812
813impl Castr {
814    #[doc = "Frequency Error Flag"]
815    #[inline(always)]
816    pub fn ferrf(
817        self,
818    ) -> crate::common::RegisterField<
819        0,
820        0x1,
821        1,
822        0,
823        castr::Ferrf,
824        castr::Ferrf,
825        Castr_SPEC,
826        crate::common::R,
827    > {
828        crate::common::RegisterField::<
829            0,
830            0x1,
831            1,
832            0,
833            castr::Ferrf,
834            castr::Ferrf,
835            Castr_SPEC,
836            crate::common::R,
837        >::from_register(self, 0)
838    }
839
840    #[doc = "Measurement End Flag"]
841    #[inline(always)]
842    pub fn mendf(
843        self,
844    ) -> crate::common::RegisterField<
845        1,
846        0x1,
847        1,
848        0,
849        castr::Mendf,
850        castr::Mendf,
851        Castr_SPEC,
852        crate::common::R,
853    > {
854        crate::common::RegisterField::<
855            1,
856            0x1,
857            1,
858            0,
859            castr::Mendf,
860            castr::Mendf,
861            Castr_SPEC,
862            crate::common::R,
863        >::from_register(self, 0)
864    }
865
866    #[doc = "Overflow Flag"]
867    #[inline(always)]
868    pub fn ovff(
869        self,
870    ) -> crate::common::RegisterField<
871        2,
872        0x1,
873        1,
874        0,
875        castr::Ovff,
876        castr::Ovff,
877        Castr_SPEC,
878        crate::common::R,
879    > {
880        crate::common::RegisterField::<
881            2,
882            0x1,
883            1,
884            0,
885            castr::Ovff,
886            castr::Ovff,
887            Castr_SPEC,
888            crate::common::R,
889        >::from_register(self, 0)
890    }
891}
892impl ::core::default::Default for Castr {
893    #[inline(always)]
894    fn default() -> Castr {
895        <crate::RegValueT<Castr_SPEC> as RegisterValue<_>>::new(0)
896    }
897}
898pub mod castr {
899
900    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
901    pub struct Ferrf_SPEC;
902    pub type Ferrf = crate::EnumBitfieldStruct<u8, Ferrf_SPEC>;
903    impl Ferrf {
904        #[doc = "Clock frequency is within the allowable range"]
905        pub const _0: Self = Self::new(0);
906
907        #[doc = "Clock frequency has deviated beyond the allowable range (frequency error)."]
908        pub const _1: Self = Self::new(1);
909    }
910    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
911    pub struct Mendf_SPEC;
912    pub type Mendf = crate::EnumBitfieldStruct<u8, Mendf_SPEC>;
913    impl Mendf {
914        #[doc = "Measurement is in progress"]
915        pub const _0: Self = Self::new(0);
916
917        #[doc = "Measurement ended"]
918        pub const _1: Self = Self::new(1);
919    }
920    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
921    pub struct Ovff_SPEC;
922    pub type Ovff = crate::EnumBitfieldStruct<u8, Ovff_SPEC>;
923    impl Ovff {
924        #[doc = "Counter has not overflowed"]
925        pub const _0: Self = Self::new(0);
926
927        #[doc = "Counter overflowed"]
928        pub const _1: Self = Self::new(1);
929    }
930}
931#[doc(hidden)]
932#[derive(Copy, Clone, Eq, PartialEq)]
933pub struct Caulvr_SPEC;
934impl crate::sealed::RegSpec for Caulvr_SPEC {
935    type DataType = u16;
936}
937
938#[doc = "CAC Upper-Limit Value Setting Register"]
939pub type Caulvr = crate::RegValueT<Caulvr_SPEC>;
940
941impl NoBitfieldReg<Caulvr_SPEC> for Caulvr {}
942impl ::core::default::Default for Caulvr {
943    #[inline(always)]
944    fn default() -> Caulvr {
945        <crate::RegValueT<Caulvr_SPEC> as RegisterValue<_>>::new(0)
946    }
947}
948
949#[doc(hidden)]
950#[derive(Copy, Clone, Eq, PartialEq)]
951pub struct Callvr_SPEC;
952impl crate::sealed::RegSpec for Callvr_SPEC {
953    type DataType = u16;
954}
955
956#[doc = "CAC Lower-Limit Value Setting Register"]
957pub type Callvr = crate::RegValueT<Callvr_SPEC>;
958
959impl NoBitfieldReg<Callvr_SPEC> for Callvr {}
960impl ::core::default::Default for Callvr {
961    #[inline(always)]
962    fn default() -> Callvr {
963        <crate::RegValueT<Callvr_SPEC> as RegisterValue<_>>::new(0)
964    }
965}
966
967#[doc(hidden)]
968#[derive(Copy, Clone, Eq, PartialEq)]
969pub struct Cacntbr_SPEC;
970impl crate::sealed::RegSpec for Cacntbr_SPEC {
971    type DataType = u16;
972}
973
974#[doc = "CAC Counter Buffer Register"]
975pub type Cacntbr = crate::RegValueT<Cacntbr_SPEC>;
976
977impl NoBitfieldReg<Cacntbr_SPEC> for Cacntbr {}
978impl ::core::default::Default for Cacntbr {
979    #[inline(always)]
980    fn default() -> Cacntbr {
981        <crate::RegValueT<Cacntbr_SPEC> as RegisterValue<_>>::new(0)
982    }
983}
ra2e2_pac/cac.rs

ra2e2_pac/
cac.rs
