1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"I3C Bus Interface"]
28unsafe impl ::core::marker::Send for super::I3C {}
29unsafe impl ::core::marker::Sync for super::I3C {}
30impl super::I3C {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Protocol Selection Register"]
38 #[inline(always)]
39 pub const fn prts(&self) -> &'static crate::common::Reg<self::Prts_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Prts_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "Bus Control Register"]
48 #[inline(always)]
49 pub const fn bctl(&self) -> &'static crate::common::Reg<self::Bctl_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Bctl_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(20usize),
53 )
54 }
55 }
56
57 #[doc = "Master Device Address Register"]
58 #[inline(always)]
59 pub const fn msdvad(
60 &self,
61 ) -> &'static crate::common::Reg<self::Msdvad_SPEC, crate::common::RW> {
62 unsafe {
63 crate::common::Reg::<self::Msdvad_SPEC, crate::common::RW>::from_ptr(
64 self._svd2pac_as_ptr().add(24usize),
65 )
66 }
67 }
68
69 #[doc = "Reset Control Register"]
70 #[inline(always)]
71 pub const fn rstctl(
72 &self,
73 ) -> &'static crate::common::Reg<self::Rstctl_SPEC, crate::common::RW> {
74 unsafe {
75 crate::common::Reg::<self::Rstctl_SPEC, crate::common::RW>::from_ptr(
76 self._svd2pac_as_ptr().add(32usize),
77 )
78 }
79 }
80
81 #[doc = "Present State Register"]
82 #[inline(always)]
83 pub const fn prsst(&self) -> &'static crate::common::Reg<self::Prsst_SPEC, crate::common::RW> {
84 unsafe {
85 crate::common::Reg::<self::Prsst_SPEC, crate::common::RW>::from_ptr(
86 self._svd2pac_as_ptr().add(36usize),
87 )
88 }
89 }
90
91 #[doc = "Internal Status Register"]
92 #[inline(always)]
93 pub const fn inst(&self) -> &'static crate::common::Reg<self::Inst_SPEC, crate::common::RW> {
94 unsafe {
95 crate::common::Reg::<self::Inst_SPEC, crate::common::RW>::from_ptr(
96 self._svd2pac_as_ptr().add(48usize),
97 )
98 }
99 }
100
101 #[doc = "Internal Status Enable Register"]
102 #[inline(always)]
103 pub const fn inste(&self) -> &'static crate::common::Reg<self::Inste_SPEC, crate::common::RW> {
104 unsafe {
105 crate::common::Reg::<self::Inste_SPEC, crate::common::RW>::from_ptr(
106 self._svd2pac_as_ptr().add(52usize),
107 )
108 }
109 }
110
111 #[doc = "Internal Interrupt Enable Register"]
112 #[inline(always)]
113 pub const fn inie(&self) -> &'static crate::common::Reg<self::Inie_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Inie_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(56usize),
117 )
118 }
119 }
120
121 #[doc = "Internal Status Force Register"]
122 #[inline(always)]
123 pub const fn instfc(&self) -> &'static crate::common::Reg<self::Instfc_SPEC, crate::common::W> {
124 unsafe {
125 crate::common::Reg::<self::Instfc_SPEC, crate::common::W>::from_ptr(
126 self._svd2pac_as_ptr().add(60usize),
127 )
128 }
129 }
130
131 #[doc = "Device Characteristic Table Register"]
132 #[inline(always)]
133 pub const fn dvct(&self) -> &'static crate::common::Reg<self::Dvct_SPEC, crate::common::R> {
134 unsafe {
135 crate::common::Reg::<self::Dvct_SPEC, crate::common::R>::from_ptr(
136 self._svd2pac_as_ptr().add(68usize),
137 )
138 }
139 }
140
141 #[doc = "IBI Notify Control Register"]
142 #[inline(always)]
143 pub const fn ibinctl(
144 &self,
145 ) -> &'static crate::common::Reg<self::Ibinctl_SPEC, crate::common::RW> {
146 unsafe {
147 crate::common::Reg::<self::Ibinctl_SPEC, crate::common::RW>::from_ptr(
148 self._svd2pac_as_ptr().add(88usize),
149 )
150 }
151 }
152
153 #[doc = "Bus Function Control Register"]
154 #[inline(always)]
155 pub const fn bfctl(&self) -> &'static crate::common::Reg<self::Bfctl_SPEC, crate::common::RW> {
156 unsafe {
157 crate::common::Reg::<self::Bfctl_SPEC, crate::common::RW>::from_ptr(
158 self._svd2pac_as_ptr().add(96usize),
159 )
160 }
161 }
162
163 #[doc = "Slave Control Register"]
164 #[inline(always)]
165 pub const fn svctl(&self) -> &'static crate::common::Reg<self::Svctl_SPEC, crate::common::RW> {
166 unsafe {
167 crate::common::Reg::<self::Svctl_SPEC, crate::common::RW>::from_ptr(
168 self._svd2pac_as_ptr().add(100usize),
169 )
170 }
171 }
172
173 #[doc = "Reference Clock Control Register"]
174 #[inline(always)]
175 pub const fn refckctl(
176 &self,
177 ) -> &'static crate::common::Reg<self::Refckctl_SPEC, crate::common::RW> {
178 unsafe {
179 crate::common::Reg::<self::Refckctl_SPEC, crate::common::RW>::from_ptr(
180 self._svd2pac_as_ptr().add(112usize),
181 )
182 }
183 }
184
185 #[doc = "Standard Bit Rate Register"]
186 #[inline(always)]
187 pub const fn stdbr(&self) -> &'static crate::common::Reg<self::Stdbr_SPEC, crate::common::RW> {
188 unsafe {
189 crate::common::Reg::<self::Stdbr_SPEC, crate::common::RW>::from_ptr(
190 self._svd2pac_as_ptr().add(116usize),
191 )
192 }
193 }
194
195 #[doc = "Extended Bit Rate Register"]
196 #[inline(always)]
197 pub const fn extbr(&self) -> &'static crate::common::Reg<self::Extbr_SPEC, crate::common::RW> {
198 unsafe {
199 crate::common::Reg::<self::Extbr_SPEC, crate::common::RW>::from_ptr(
200 self._svd2pac_as_ptr().add(120usize),
201 )
202 }
203 }
204
205 #[doc = "Bus Free Condition Detection Time Register"]
206 #[inline(always)]
207 pub const fn bfrecdt(
208 &self,
209 ) -> &'static crate::common::Reg<self::Bfrecdt_SPEC, crate::common::RW> {
210 unsafe {
211 crate::common::Reg::<self::Bfrecdt_SPEC, crate::common::RW>::from_ptr(
212 self._svd2pac_as_ptr().add(124usize),
213 )
214 }
215 }
216
217 #[doc = "Bus Available Condition Detection Time Register"]
218 #[inline(always)]
219 pub const fn bavlcdt(
220 &self,
221 ) -> &'static crate::common::Reg<self::Bavlcdt_SPEC, crate::common::RW> {
222 unsafe {
223 crate::common::Reg::<self::Bavlcdt_SPEC, crate::common::RW>::from_ptr(
224 self._svd2pac_as_ptr().add(128usize),
225 )
226 }
227 }
228
229 #[doc = "Bus Idle Condition Detection Time Register"]
230 #[inline(always)]
231 pub const fn bidlcdt(
232 &self,
233 ) -> &'static crate::common::Reg<self::Bidlcdt_SPEC, crate::common::RW> {
234 unsafe {
235 crate::common::Reg::<self::Bidlcdt_SPEC, crate::common::RW>::from_ptr(
236 self._svd2pac_as_ptr().add(132usize),
237 )
238 }
239 }
240
241 #[doc = "Output Control Register"]
242 #[inline(always)]
243 pub const fn outctl(
244 &self,
245 ) -> &'static crate::common::Reg<self::Outctl_SPEC, crate::common::RW> {
246 unsafe {
247 crate::common::Reg::<self::Outctl_SPEC, crate::common::RW>::from_ptr(
248 self._svd2pac_as_ptr().add(136usize),
249 )
250 }
251 }
252
253 #[doc = "Input Control Register"]
254 #[inline(always)]
255 pub const fn inctl(&self) -> &'static crate::common::Reg<self::Inctl_SPEC, crate::common::RW> {
256 unsafe {
257 crate::common::Reg::<self::Inctl_SPEC, crate::common::RW>::from_ptr(
258 self._svd2pac_as_ptr().add(140usize),
259 )
260 }
261 }
262
263 #[doc = "Timeout Control Register"]
264 #[inline(always)]
265 pub const fn tmoctl(
266 &self,
267 ) -> &'static crate::common::Reg<self::Tmoctl_SPEC, crate::common::RW> {
268 unsafe {
269 crate::common::Reg::<self::Tmoctl_SPEC, crate::common::RW>::from_ptr(
270 self._svd2pac_as_ptr().add(144usize),
271 )
272 }
273 }
274
275 #[doc = "Acknowledge Control Register"]
276 #[inline(always)]
277 pub const fn ackctl(
278 &self,
279 ) -> &'static crate::common::Reg<self::Ackctl_SPEC, crate::common::RW> {
280 unsafe {
281 crate::common::Reg::<self::Ackctl_SPEC, crate::common::RW>::from_ptr(
282 self._svd2pac_as_ptr().add(160usize),
283 )
284 }
285 }
286
287 #[doc = "SCL Stretch Control Register"]
288 #[inline(always)]
289 pub const fn scstrctl(
290 &self,
291 ) -> &'static crate::common::Reg<self::Scstrctl_SPEC, crate::common::RW> {
292 unsafe {
293 crate::common::Reg::<self::Scstrctl_SPEC, crate::common::RW>::from_ptr(
294 self._svd2pac_as_ptr().add(164usize),
295 )
296 }
297 }
298
299 #[doc = "SCL Stalling Control Register"]
300 #[inline(always)]
301 pub const fn scstlctl(
302 &self,
303 ) -> &'static crate::common::Reg<self::Scstlctl_SPEC, crate::common::RW> {
304 unsafe {
305 crate::common::Reg::<self::Scstlctl_SPEC, crate::common::RW>::from_ptr(
306 self._svd2pac_as_ptr().add(176usize),
307 )
308 }
309 }
310
311 #[doc = "Slave Transfer Data Length Register 0"]
312 #[inline(always)]
313 pub const fn svtdlg0(
314 &self,
315 ) -> &'static crate::common::Reg<self::Svtdlg0_SPEC, crate::common::RW> {
316 unsafe {
317 crate::common::Reg::<self::Svtdlg0_SPEC, crate::common::RW>::from_ptr(
318 self._svd2pac_as_ptr().add(192usize),
319 )
320 }
321 }
322
323 #[doc = "Condition Control Register"]
324 #[inline(always)]
325 pub const fn cndctl(
326 &self,
327 ) -> &'static crate::common::Reg<self::Cndctl_SPEC, crate::common::RW> {
328 unsafe {
329 crate::common::Reg::<self::Cndctl_SPEC, crate::common::RW>::from_ptr(
330 self._svd2pac_as_ptr().add(320usize),
331 )
332 }
333 }
334
335 #[doc = "Normal Command Queue Port Register"]
336 #[inline(always)]
337 pub const fn ncmdqp(&self) -> &'static crate::common::Reg<self::Ncmdqp_SPEC, crate::common::W> {
338 unsafe {
339 crate::common::Reg::<self::Ncmdqp_SPEC, crate::common::W>::from_ptr(
340 self._svd2pac_as_ptr().add(336usize),
341 )
342 }
343 }
344
345 #[doc = "Normal Response Queue Port Register"]
346 #[inline(always)]
347 pub const fn nrspqp(&self) -> &'static crate::common::Reg<self::Nrspqp_SPEC, crate::common::R> {
348 unsafe {
349 crate::common::Reg::<self::Nrspqp_SPEC, crate::common::R>::from_ptr(
350 self._svd2pac_as_ptr().add(340usize),
351 )
352 }
353 }
354
355 #[doc = "Normal Transfer Data Buffer Port Register 0"]
356 #[inline(always)]
357 pub const fn ntdtbp0(
358 &self,
359 ) -> &'static crate::common::Reg<self::Ntdtbp0_SPEC, crate::common::RW> {
360 unsafe {
361 crate::common::Reg::<self::Ntdtbp0_SPEC, crate::common::RW>::from_ptr(
362 self._svd2pac_as_ptr().add(344usize),
363 )
364 }
365 }
366
367 #[doc = "Normal Transfer Data Buffer Port Register 0"]
368 #[inline(always)]
369 pub const fn ntdtbp0_by(
370 &self,
371 ) -> &'static crate::common::Reg<self::Ntdtbp0By_SPEC, crate::common::RW> {
372 unsafe {
373 crate::common::Reg::<self::Ntdtbp0By_SPEC, crate::common::RW>::from_ptr(
374 self._svd2pac_as_ptr().add(344usize),
375 )
376 }
377 }
378
379 #[doc = "Normal IBI Queue Port Register"]
380 #[inline(always)]
381 pub const fn nibiqp(
382 &self,
383 ) -> &'static crate::common::Reg<self::Nibiqp_SPEC, crate::common::RW> {
384 unsafe {
385 crate::common::Reg::<self::Nibiqp_SPEC, crate::common::RW>::from_ptr(
386 self._svd2pac_as_ptr().add(380usize),
387 )
388 }
389 }
390
391 #[doc = "Normal Receive Status Queue Port Register"]
392 #[inline(always)]
393 pub const fn nrsqp(&self) -> &'static crate::common::Reg<self::Nrsqp_SPEC, crate::common::R> {
394 unsafe {
395 crate::common::Reg::<self::Nrsqp_SPEC, crate::common::R>::from_ptr(
396 self._svd2pac_as_ptr().add(384usize),
397 )
398 }
399 }
400
401 #[doc = "Normal Queue Threshold Control Register"]
402 #[inline(always)]
403 pub const fn nqthctl(
404 &self,
405 ) -> &'static crate::common::Reg<self::Nqthctl_SPEC, crate::common::RW> {
406 unsafe {
407 crate::common::Reg::<self::Nqthctl_SPEC, crate::common::RW>::from_ptr(
408 self._svd2pac_as_ptr().add(400usize),
409 )
410 }
411 }
412
413 #[doc = "Normal Transfer Data Buffer Threshold Control Register 0"]
414 #[inline(always)]
415 pub const fn ntbthctl0(
416 &self,
417 ) -> &'static crate::common::Reg<self::Ntbthctl0_SPEC, crate::common::RW> {
418 unsafe {
419 crate::common::Reg::<self::Ntbthctl0_SPEC, crate::common::RW>::from_ptr(
420 self._svd2pac_as_ptr().add(404usize),
421 )
422 }
423 }
424
425 #[doc = "Normal Receive Status Queue Threshold Control Register"]
426 #[inline(always)]
427 pub const fn nrqthctl(
428 &self,
429 ) -> &'static crate::common::Reg<self::Nrqthctl_SPEC, crate::common::RW> {
430 unsafe {
431 crate::common::Reg::<self::Nrqthctl_SPEC, crate::common::RW>::from_ptr(
432 self._svd2pac_as_ptr().add(448usize),
433 )
434 }
435 }
436
437 #[doc = "Bus Status Register"]
438 #[inline(always)]
439 pub const fn bst(&self) -> &'static crate::common::Reg<self::Bst_SPEC, crate::common::RW> {
440 unsafe {
441 crate::common::Reg::<self::Bst_SPEC, crate::common::RW>::from_ptr(
442 self._svd2pac_as_ptr().add(464usize),
443 )
444 }
445 }
446
447 #[doc = "Bus Status Enable Register"]
448 #[inline(always)]
449 pub const fn bste(&self) -> &'static crate::common::Reg<self::Bste_SPEC, crate::common::RW> {
450 unsafe {
451 crate::common::Reg::<self::Bste_SPEC, crate::common::RW>::from_ptr(
452 self._svd2pac_as_ptr().add(468usize),
453 )
454 }
455 }
456
457 #[doc = "Bus Interrupt Enable Register"]
458 #[inline(always)]
459 pub const fn bie(&self) -> &'static crate::common::Reg<self::Bie_SPEC, crate::common::RW> {
460 unsafe {
461 crate::common::Reg::<self::Bie_SPEC, crate::common::RW>::from_ptr(
462 self._svd2pac_as_ptr().add(472usize),
463 )
464 }
465 }
466
467 #[doc = "Bus Status Force Register"]
468 #[inline(always)]
469 pub const fn bstfc(&self) -> &'static crate::common::Reg<self::Bstfc_SPEC, crate::common::RW> {
470 unsafe {
471 crate::common::Reg::<self::Bstfc_SPEC, crate::common::RW>::from_ptr(
472 self._svd2pac_as_ptr().add(476usize),
473 )
474 }
475 }
476
477 #[doc = "Normal Transfer Status Register"]
478 #[inline(always)]
479 pub const fn ntst(&self) -> &'static crate::common::Reg<self::Ntst_SPEC, crate::common::RW> {
480 unsafe {
481 crate::common::Reg::<self::Ntst_SPEC, crate::common::RW>::from_ptr(
482 self._svd2pac_as_ptr().add(480usize),
483 )
484 }
485 }
486
487 #[doc = "Normal Transfer Status Enable Register"]
488 #[inline(always)]
489 pub const fn ntste(&self) -> &'static crate::common::Reg<self::Ntste_SPEC, crate::common::RW> {
490 unsafe {
491 crate::common::Reg::<self::Ntste_SPEC, crate::common::RW>::from_ptr(
492 self._svd2pac_as_ptr().add(484usize),
493 )
494 }
495 }
496
497 #[doc = "Normal Transfer Interrupt Enable Register"]
498 #[inline(always)]
499 pub const fn ntie(&self) -> &'static crate::common::Reg<self::Ntie_SPEC, crate::common::RW> {
500 unsafe {
501 crate::common::Reg::<self::Ntie_SPEC, crate::common::RW>::from_ptr(
502 self._svd2pac_as_ptr().add(488usize),
503 )
504 }
505 }
506
507 #[doc = "Normal Transfer Status Force Register"]
508 #[inline(always)]
509 pub const fn ntstfc(&self) -> &'static crate::common::Reg<self::Ntstfc_SPEC, crate::common::W> {
510 unsafe {
511 crate::common::Reg::<self::Ntstfc_SPEC, crate::common::W>::from_ptr(
512 self._svd2pac_as_ptr().add(492usize),
513 )
514 }
515 }
516
517 #[doc = "Bus Condition Status Register"]
518 #[inline(always)]
519 pub const fn bcst(&self) -> &'static crate::common::Reg<self::Bcst_SPEC, crate::common::R> {
520 unsafe {
521 crate::common::Reg::<self::Bcst_SPEC, crate::common::R>::from_ptr(
522 self._svd2pac_as_ptr().add(528usize),
523 )
524 }
525 }
526
527 #[doc = "Slave Status Register"]
528 #[inline(always)]
529 pub const fn svst(&self) -> &'static crate::common::Reg<self::Svst_SPEC, crate::common::RW> {
530 unsafe {
531 crate::common::Reg::<self::Svst_SPEC, crate::common::RW>::from_ptr(
532 self._svd2pac_as_ptr().add(532usize),
533 )
534 }
535 }
536
537 #[doc = "Device Address Table Basic Register %s"]
538 #[inline(always)]
539 pub const fn datbas(
540 &self,
541 ) -> &'static crate::common::ClusterRegisterArray<
542 crate::common::Reg<self::Datbas_SPEC, crate::common::RW>,
543 4,
544 0x8,
545 > {
546 unsafe {
547 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x224usize))
548 }
549 }
550 #[inline(always)]
551 pub const fn datbas0(
552 &self,
553 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
554 unsafe {
555 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
556 self._svd2pac_as_ptr().add(0x224usize),
557 )
558 }
559 }
560 #[inline(always)]
561 pub const fn datbas1(
562 &self,
563 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
564 unsafe {
565 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
566 self._svd2pac_as_ptr().add(0x22cusize),
567 )
568 }
569 }
570 #[inline(always)]
571 pub const fn datbas2(
572 &self,
573 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
574 unsafe {
575 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
576 self._svd2pac_as_ptr().add(0x234usize),
577 )
578 }
579 }
580 #[inline(always)]
581 pub const fn datbas3(
582 &self,
583 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
584 unsafe {
585 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
586 self._svd2pac_as_ptr().add(0x23cusize),
587 )
588 }
589 }
590
591 #[doc = "Extended Device Address Table Basic Register"]
592 #[inline(always)]
593 pub const fn exdatbas(
594 &self,
595 ) -> &'static crate::common::Reg<self::Exdatbas_SPEC, crate::common::RW> {
596 unsafe {
597 crate::common::Reg::<self::Exdatbas_SPEC, crate::common::RW>::from_ptr(
598 self._svd2pac_as_ptr().add(672usize),
599 )
600 }
601 }
602
603 #[doc = "Slave Device Address Table Basic Register 0"]
604 #[inline(always)]
605 pub const fn sdatbas0(
606 &self,
607 ) -> &'static crate::common::Reg<self::Sdatbas0_SPEC, crate::common::RW> {
608 unsafe {
609 crate::common::Reg::<self::Sdatbas0_SPEC, crate::common::RW>::from_ptr(
610 self._svd2pac_as_ptr().add(688usize),
611 )
612 }
613 }
614
615 #[doc = "Master Device Characteristic Table Register %s"]
616 #[inline(always)]
617 pub const fn msdct(
618 &self,
619 ) -> &'static crate::common::ClusterRegisterArray<
620 crate::common::Reg<self::Msdct_SPEC, crate::common::RW>,
621 4,
622 0x4,
623 > {
624 unsafe {
625 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2d0usize))
626 }
627 }
628 #[inline(always)]
629 pub const fn msdct0(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
630 unsafe {
631 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
632 self._svd2pac_as_ptr().add(0x2d0usize),
633 )
634 }
635 }
636 #[inline(always)]
637 pub const fn msdct1(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
638 unsafe {
639 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
640 self._svd2pac_as_ptr().add(0x2d4usize),
641 )
642 }
643 }
644 #[inline(always)]
645 pub const fn msdct2(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
646 unsafe {
647 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
648 self._svd2pac_as_ptr().add(0x2d8usize),
649 )
650 }
651 }
652 #[inline(always)]
653 pub const fn msdct3(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
654 unsafe {
655 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
656 self._svd2pac_as_ptr().add(0x2dcusize),
657 )
658 }
659 }
660
661 #[doc = "Slave Device Characteristic Table Register"]
662 #[inline(always)]
663 pub const fn svdct(&self) -> &'static crate::common::Reg<self::Svdct_SPEC, crate::common::RW> {
664 unsafe {
665 crate::common::Reg::<self::Svdct_SPEC, crate::common::RW>::from_ptr(
666 self._svd2pac_as_ptr().add(800usize),
667 )
668 }
669 }
670
671 #[doc = "Slave Device Characteristic Table Provisional ID Low Register"]
672 #[inline(always)]
673 pub const fn sdctpidl(
674 &self,
675 ) -> &'static crate::common::Reg<self::Sdctpidl_SPEC, crate::common::RW> {
676 unsafe {
677 crate::common::Reg::<self::Sdctpidl_SPEC, crate::common::RW>::from_ptr(
678 self._svd2pac_as_ptr().add(804usize),
679 )
680 }
681 }
682
683 #[doc = "Slave Device Characteristic Table Provisional ID High Register"]
684 #[inline(always)]
685 pub const fn sdctpidh(
686 &self,
687 ) -> &'static crate::common::Reg<self::Sdctpidh_SPEC, crate::common::RW> {
688 unsafe {
689 crate::common::Reg::<self::Sdctpidh_SPEC, crate::common::RW>::from_ptr(
690 self._svd2pac_as_ptr().add(808usize),
691 )
692 }
693 }
694
695 #[doc = "Slave Device Address Register 0"]
696 #[inline(always)]
697 pub const fn svdvad0(
698 &self,
699 ) -> &'static crate::common::Reg<self::Svdvad0_SPEC, crate::common::R> {
700 unsafe {
701 crate::common::Reg::<self::Svdvad0_SPEC, crate::common::R>::from_ptr(
702 self._svd2pac_as_ptr().add(816usize),
703 )
704 }
705 }
706
707 #[doc = "CCC Slave Events Command Register"]
708 #[inline(always)]
709 pub const fn csecmd(
710 &self,
711 ) -> &'static crate::common::Reg<self::Csecmd_SPEC, crate::common::RW> {
712 unsafe {
713 crate::common::Reg::<self::Csecmd_SPEC, crate::common::RW>::from_ptr(
714 self._svd2pac_as_ptr().add(848usize),
715 )
716 }
717 }
718
719 #[doc = "CCC Enter Activity State Register"]
720 #[inline(always)]
721 pub const fn ceactst(
722 &self,
723 ) -> &'static crate::common::Reg<self::Ceactst_SPEC, crate::common::RW> {
724 unsafe {
725 crate::common::Reg::<self::Ceactst_SPEC, crate::common::RW>::from_ptr(
726 self._svd2pac_as_ptr().add(852usize),
727 )
728 }
729 }
730
731 #[doc = "CCC Max Write Length Register"]
732 #[inline(always)]
733 pub const fn cmwlg(&self) -> &'static crate::common::Reg<self::Cmwlg_SPEC, crate::common::RW> {
734 unsafe {
735 crate::common::Reg::<self::Cmwlg_SPEC, crate::common::RW>::from_ptr(
736 self._svd2pac_as_ptr().add(856usize),
737 )
738 }
739 }
740
741 #[doc = "CCC Max Read Length Register"]
742 #[inline(always)]
743 pub const fn cmrlg(&self) -> &'static crate::common::Reg<self::Cmrlg_SPEC, crate::common::RW> {
744 unsafe {
745 crate::common::Reg::<self::Cmrlg_SPEC, crate::common::RW>::from_ptr(
746 self._svd2pac_as_ptr().add(860usize),
747 )
748 }
749 }
750
751 #[doc = "CCC Enter Test Mode Register"]
752 #[inline(always)]
753 pub const fn cetstmd(
754 &self,
755 ) -> &'static crate::common::Reg<self::Cetstmd_SPEC, crate::common::R> {
756 unsafe {
757 crate::common::Reg::<self::Cetstmd_SPEC, crate::common::R>::from_ptr(
758 self._svd2pac_as_ptr().add(864usize),
759 )
760 }
761 }
762
763 #[doc = "CCC Get Device Status Register"]
764 #[inline(always)]
765 pub const fn cgdvst(
766 &self,
767 ) -> &'static crate::common::Reg<self::Cgdvst_SPEC, crate::common::RW> {
768 unsafe {
769 crate::common::Reg::<self::Cgdvst_SPEC, crate::common::RW>::from_ptr(
770 self._svd2pac_as_ptr().add(868usize),
771 )
772 }
773 }
774
775 #[doc = "CCC Max Data Speed W (Write) Register"]
776 #[inline(always)]
777 pub const fn cmdspw(
778 &self,
779 ) -> &'static crate::common::Reg<self::Cmdspw_SPEC, crate::common::RW> {
780 unsafe {
781 crate::common::Reg::<self::Cmdspw_SPEC, crate::common::RW>::from_ptr(
782 self._svd2pac_as_ptr().add(872usize),
783 )
784 }
785 }
786
787 #[doc = "CCC Max Data Speed R (Read) Register"]
788 #[inline(always)]
789 pub const fn cmdspr(
790 &self,
791 ) -> &'static crate::common::Reg<self::Cmdspr_SPEC, crate::common::RW> {
792 unsafe {
793 crate::common::Reg::<self::Cmdspr_SPEC, crate::common::RW>::from_ptr(
794 self._svd2pac_as_ptr().add(876usize),
795 )
796 }
797 }
798
799 #[doc = "CCC Max Data Speed T (Turnaround) Register"]
800 #[inline(always)]
801 pub const fn cmdspt(
802 &self,
803 ) -> &'static crate::common::Reg<self::Cmdspt_SPEC, crate::common::RW> {
804 unsafe {
805 crate::common::Reg::<self::Cmdspt_SPEC, crate::common::RW>::from_ptr(
806 self._svd2pac_as_ptr().add(880usize),
807 )
808 }
809 }
810
811 #[doc = "CCC Exchange Timing Support Information M (Mode) Register"]
812 #[inline(always)]
813 pub const fn cetsm(&self) -> &'static crate::common::Reg<self::Cetsm_SPEC, crate::common::RW> {
814 unsafe {
815 crate::common::Reg::<self::Cetsm_SPEC, crate::common::RW>::from_ptr(
816 self._svd2pac_as_ptr().add(884usize),
817 )
818 }
819 }
820
821 #[doc = "Bit Count Register"]
822 #[inline(always)]
823 pub const fn bitcnt(&self) -> &'static crate::common::Reg<self::Bitcnt_SPEC, crate::common::R> {
824 unsafe {
825 crate::common::Reg::<self::Bitcnt_SPEC, crate::common::R>::from_ptr(
826 self._svd2pac_as_ptr().add(896usize),
827 )
828 }
829 }
830
831 #[doc = "Normal Queue Status Level Register"]
832 #[inline(always)]
833 pub const fn nqstlv(&self) -> &'static crate::common::Reg<self::Nqstlv_SPEC, crate::common::R> {
834 unsafe {
835 crate::common::Reg::<self::Nqstlv_SPEC, crate::common::R>::from_ptr(
836 self._svd2pac_as_ptr().add(916usize),
837 )
838 }
839 }
840
841 #[doc = "Normal Data Buffer Status Level Register 0"]
842 #[inline(always)]
843 pub const fn ndbstlv0(
844 &self,
845 ) -> &'static crate::common::Reg<self::Ndbstlv0_SPEC, crate::common::R> {
846 unsafe {
847 crate::common::Reg::<self::Ndbstlv0_SPEC, crate::common::R>::from_ptr(
848 self._svd2pac_as_ptr().add(920usize),
849 )
850 }
851 }
852
853 #[doc = "Normal Receive Status Queue Status Level Register"]
854 #[inline(always)]
855 pub const fn nrsqstlv(
856 &self,
857 ) -> &'static crate::common::Reg<self::Nrsqstlv_SPEC, crate::common::R> {
858 unsafe {
859 crate::common::Reg::<self::Nrsqstlv_SPEC, crate::common::R>::from_ptr(
860 self._svd2pac_as_ptr().add(960usize),
861 )
862 }
863 }
864
865 #[doc = "Present State Debug Register"]
866 #[inline(always)]
867 pub const fn prstdbg(
868 &self,
869 ) -> &'static crate::common::Reg<self::Prstdbg_SPEC, crate::common::R> {
870 unsafe {
871 crate::common::Reg::<self::Prstdbg_SPEC, crate::common::R>::from_ptr(
872 self._svd2pac_as_ptr().add(972usize),
873 )
874 }
875 }
876
877 #[doc = "Master Error Counters Register"]
878 #[inline(always)]
879 pub const fn mserrcnt(
880 &self,
881 ) -> &'static crate::common::Reg<self::Mserrcnt_SPEC, crate::common::R> {
882 unsafe {
883 crate::common::Reg::<self::Mserrcnt_SPEC, crate::common::R>::from_ptr(
884 self._svd2pac_as_ptr().add(976usize),
885 )
886 }
887 }
888}
889#[doc(hidden)]
890#[derive(Copy, Clone, Eq, PartialEq)]
891pub struct Prts_SPEC;
892impl crate::sealed::RegSpec for Prts_SPEC {
893 type DataType = u32;
894}
895
896#[doc = "Protocol Selection Register"]
897pub type Prts = crate::RegValueT<Prts_SPEC>;
898
899impl Prts {
900 #[doc = "Protocol Mode"]
901 #[inline(always)]
902 pub fn prtmd(
903 self,
904 ) -> crate::common::RegisterField<
905 0,
906 0x1,
907 1,
908 0,
909 prts::Prtmd,
910 prts::Prtmd,
911 Prts_SPEC,
912 crate::common::RW,
913 > {
914 crate::common::RegisterField::<
915 0,
916 0x1,
917 1,
918 0,
919 prts::Prtmd,
920 prts::Prtmd,
921 Prts_SPEC,
922 crate::common::RW,
923 >::from_register(self, 0)
924 }
925}
926impl ::core::default::Default for Prts {
927 #[inline(always)]
928 fn default() -> Prts {
929 <crate::RegValueT<Prts_SPEC> as RegisterValue<_>>::new(1)
930 }
931}
932pub mod prts {
933
934 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
935 pub struct Prtmd_SPEC;
936 pub type Prtmd = crate::EnumBitfieldStruct<u8, Prtmd_SPEC>;
937 impl Prtmd {
938 #[doc = "I3C protocol mode"]
939 pub const _0: Self = Self::new(0);
940
941 #[doc = "I2C protocol mode"]
942 pub const _1: Self = Self::new(1);
943 }
944}
945#[doc(hidden)]
946#[derive(Copy, Clone, Eq, PartialEq)]
947pub struct Bctl_SPEC;
948impl crate::sealed::RegSpec for Bctl_SPEC {
949 type DataType = u32;
950}
951
952#[doc = "Bus Control Register"]
953pub type Bctl = crate::RegValueT<Bctl_SPEC>;
954
955impl Bctl {
956 #[doc = "Include I3C Broadcast Address"]
957 #[inline(always)]
958 pub fn incba(
959 self,
960 ) -> crate::common::RegisterField<
961 0,
962 0x1,
963 1,
964 0,
965 bctl::Incba,
966 bctl::Incba,
967 Bctl_SPEC,
968 crate::common::RW,
969 > {
970 crate::common::RegisterField::<
971 0,
972 0x1,
973 1,
974 0,
975 bctl::Incba,
976 bctl::Incba,
977 Bctl_SPEC,
978 crate::common::RW,
979 >::from_register(self, 0)
980 }
981
982 #[doc = "Hot-Join Acknowledge Control"]
983 #[inline(always)]
984 pub fn hjackctl(
985 self,
986 ) -> crate::common::RegisterField<
987 8,
988 0x1,
989 1,
990 0,
991 bctl::Hjackctl,
992 bctl::Hjackctl,
993 Bctl_SPEC,
994 crate::common::RW,
995 > {
996 crate::common::RegisterField::<
997 8,
998 0x1,
999 1,
1000 0,
1001 bctl::Hjackctl,
1002 bctl::Hjackctl,
1003 Bctl_SPEC,
1004 crate::common::RW,
1005 >::from_register(self, 0)
1006 }
1007
1008 #[doc = "Abort"]
1009 #[inline(always)]
1010 pub fn abt(
1011 self,
1012 ) -> crate::common::RegisterField<
1013 29,
1014 0x1,
1015 1,
1016 0,
1017 bctl::Abt,
1018 bctl::Abt,
1019 Bctl_SPEC,
1020 crate::common::RW,
1021 > {
1022 crate::common::RegisterField::<
1023 29,
1024 0x1,
1025 1,
1026 0,
1027 bctl::Abt,
1028 bctl::Abt,
1029 Bctl_SPEC,
1030 crate::common::RW,
1031 >::from_register(self, 0)
1032 }
1033
1034 #[doc = "Resume"]
1035 #[inline(always)]
1036 pub fn rsm(
1037 self,
1038 ) -> crate::common::RegisterField<
1039 30,
1040 0x1,
1041 1,
1042 0,
1043 bctl::Rsm,
1044 bctl::Rsm,
1045 Bctl_SPEC,
1046 crate::common::RW,
1047 > {
1048 crate::common::RegisterField::<
1049 30,
1050 0x1,
1051 1,
1052 0,
1053 bctl::Rsm,
1054 bctl::Rsm,
1055 Bctl_SPEC,
1056 crate::common::RW,
1057 >::from_register(self, 0)
1058 }
1059
1060 #[doc = "Bus Enable"]
1061 #[inline(always)]
1062 pub fn buse(
1063 self,
1064 ) -> crate::common::RegisterField<
1065 31,
1066 0x1,
1067 1,
1068 0,
1069 bctl::Buse,
1070 bctl::Buse,
1071 Bctl_SPEC,
1072 crate::common::RW,
1073 > {
1074 crate::common::RegisterField::<
1075 31,
1076 0x1,
1077 1,
1078 0,
1079 bctl::Buse,
1080 bctl::Buse,
1081 Bctl_SPEC,
1082 crate::common::RW,
1083 >::from_register(self, 0)
1084 }
1085}
1086impl ::core::default::Default for Bctl {
1087 #[inline(always)]
1088 fn default() -> Bctl {
1089 <crate::RegValueT<Bctl_SPEC> as RegisterValue<_>>::new(0)
1090 }
1091}
1092pub mod bctl {
1093
1094 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1095 pub struct Incba_SPEC;
1096 pub type Incba = crate::EnumBitfieldStruct<u8, Incba_SPEC>;
1097 impl Incba {
1098 #[doc = "Do not include I3C broadcast address for private transfers"]
1099 pub const _0: Self = Self::new(0);
1100
1101 #[doc = "Include I3C broadcast address for private transfers"]
1102 pub const _1: Self = Self::new(1);
1103 }
1104 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1105 pub struct Hjackctl_SPEC;
1106 pub type Hjackctl = crate::EnumBitfieldStruct<u8, Hjackctl_SPEC>;
1107 impl Hjackctl {
1108 #[doc = "ACK the Hot-Join request"]
1109 pub const _0: Self = Self::new(0);
1110
1111 #[doc = "NACK and send broadcast CCC to disable Hot-Join"]
1112 pub const _1: Self = Self::new(1);
1113 }
1114 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1115 pub struct Abt_SPEC;
1116 pub type Abt = crate::EnumBitfieldStruct<u8, Abt_SPEC>;
1117 impl Abt {
1118 #[doc = "I3C is running."]
1119 pub const _0: Self = Self::new(0);
1120
1121 #[doc = "I3C has aborted a transfer."]
1122 pub const _1: Self = Self::new(1);
1123 }
1124 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1125 pub struct Rsm_SPEC;
1126 pub type Rsm = crate::EnumBitfieldStruct<u8, Rsm_SPEC>;
1127 impl Rsm {
1128 #[doc = "I3C is running."]
1129 pub const _0: Self = Self::new(0);
1130
1131 #[doc = "I3C is suspended (RW1C)."]
1132 pub const _1: Self = Self::new(1);
1133 }
1134 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1135 pub struct Buse_SPEC;
1136 pub type Buse = crate::EnumBitfieldStruct<u8, Buse_SPEC>;
1137 impl Buse {
1138 #[doc = "I3C bus operation is disabled."]
1139 pub const _0: Self = Self::new(0);
1140
1141 #[doc = "I3C bus operation is enabled."]
1142 pub const _1: Self = Self::new(1);
1143 }
1144}
1145#[doc(hidden)]
1146#[derive(Copy, Clone, Eq, PartialEq)]
1147pub struct Msdvad_SPEC;
1148impl crate::sealed::RegSpec for Msdvad_SPEC {
1149 type DataType = u32;
1150}
1151
1152#[doc = "Master Device Address Register"]
1153pub type Msdvad = crate::RegValueT<Msdvad_SPEC>;
1154
1155impl Msdvad {
1156 #[doc = "Master Dynamic Address"]
1157 #[inline(always)]
1158 pub fn mdyad(
1159 self,
1160 ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, Msdvad_SPEC, crate::common::RW> {
1161 crate::common::RegisterField::<16,0x7f,1,0,u8,u8,Msdvad_SPEC,crate::common::RW>::from_register(self,0)
1162 }
1163
1164 #[doc = "Master Dynamic Address Valid"]
1165 #[inline(always)]
1166 pub fn mdyadv(
1167 self,
1168 ) -> crate::common::RegisterField<
1169 31,
1170 0x1,
1171 1,
1172 0,
1173 msdvad::Mdyadv,
1174 msdvad::Mdyadv,
1175 Msdvad_SPEC,
1176 crate::common::RW,
1177 > {
1178 crate::common::RegisterField::<
1179 31,
1180 0x1,
1181 1,
1182 0,
1183 msdvad::Mdyadv,
1184 msdvad::Mdyadv,
1185 Msdvad_SPEC,
1186 crate::common::RW,
1187 >::from_register(self, 0)
1188 }
1189}
1190impl ::core::default::Default for Msdvad {
1191 #[inline(always)]
1192 fn default() -> Msdvad {
1193 <crate::RegValueT<Msdvad_SPEC> as RegisterValue<_>>::new(0)
1194 }
1195}
1196pub mod msdvad {
1197
1198 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1199 pub struct Mdyadv_SPEC;
1200 pub type Mdyadv = crate::EnumBitfieldStruct<u8, Mdyadv_SPEC>;
1201 impl Mdyadv {
1202 #[doc = "The master dynamic address field is not valid."]
1203 pub const _0: Self = Self::new(0);
1204
1205 #[doc = "The master dynamic address field is valid."]
1206 pub const _1: Self = Self::new(1);
1207 }
1208}
1209#[doc(hidden)]
1210#[derive(Copy, Clone, Eq, PartialEq)]
1211pub struct Rstctl_SPEC;
1212impl crate::sealed::RegSpec for Rstctl_SPEC {
1213 type DataType = u32;
1214}
1215
1216#[doc = "Reset Control Register"]
1217pub type Rstctl = crate::RegValueT<Rstctl_SPEC>;
1218
1219impl Rstctl {
1220 #[doc = "I3C Software Reset"]
1221 #[inline(always)]
1222 pub fn ri3crst(
1223 self,
1224 ) -> crate::common::RegisterField<
1225 0,
1226 0x1,
1227 1,
1228 0,
1229 rstctl::Ri3Crst,
1230 rstctl::Ri3Crst,
1231 Rstctl_SPEC,
1232 crate::common::RW,
1233 > {
1234 crate::common::RegisterField::<
1235 0,
1236 0x1,
1237 1,
1238 0,
1239 rstctl::Ri3Crst,
1240 rstctl::Ri3Crst,
1241 Rstctl_SPEC,
1242 crate::common::RW,
1243 >::from_register(self, 0)
1244 }
1245
1246 #[doc = "Command Queue Software Reset"]
1247 #[inline(always)]
1248 pub fn cmdqrst(
1249 self,
1250 ) -> crate::common::RegisterField<
1251 1,
1252 0x1,
1253 1,
1254 0,
1255 rstctl::Cmdqrst,
1256 rstctl::Cmdqrst,
1257 Rstctl_SPEC,
1258 crate::common::RW,
1259 > {
1260 crate::common::RegisterField::<
1261 1,
1262 0x1,
1263 1,
1264 0,
1265 rstctl::Cmdqrst,
1266 rstctl::Cmdqrst,
1267 Rstctl_SPEC,
1268 crate::common::RW,
1269 >::from_register(self, 0)
1270 }
1271
1272 #[doc = "Response Queue Software Reset"]
1273 #[inline(always)]
1274 pub fn rspqrst(
1275 self,
1276 ) -> crate::common::RegisterField<
1277 2,
1278 0x1,
1279 1,
1280 0,
1281 rstctl::Rspqrst,
1282 rstctl::Rspqrst,
1283 Rstctl_SPEC,
1284 crate::common::RW,
1285 > {
1286 crate::common::RegisterField::<
1287 2,
1288 0x1,
1289 1,
1290 0,
1291 rstctl::Rspqrst,
1292 rstctl::Rspqrst,
1293 Rstctl_SPEC,
1294 crate::common::RW,
1295 >::from_register(self, 0)
1296 }
1297
1298 #[doc = "Transmit Data Buffer Software Reset"]
1299 #[inline(always)]
1300 pub fn tdbrst(
1301 self,
1302 ) -> crate::common::RegisterField<
1303 3,
1304 0x1,
1305 1,
1306 0,
1307 rstctl::Tdbrst,
1308 rstctl::Tdbrst,
1309 Rstctl_SPEC,
1310 crate::common::RW,
1311 > {
1312 crate::common::RegisterField::<
1313 3,
1314 0x1,
1315 1,
1316 0,
1317 rstctl::Tdbrst,
1318 rstctl::Tdbrst,
1319 Rstctl_SPEC,
1320 crate::common::RW,
1321 >::from_register(self, 0)
1322 }
1323
1324 #[doc = "Receive Data Buffer Software Reset"]
1325 #[inline(always)]
1326 pub fn rdbrst(
1327 self,
1328 ) -> crate::common::RegisterField<
1329 4,
1330 0x1,
1331 1,
1332 0,
1333 rstctl::Rdbrst,
1334 rstctl::Rdbrst,
1335 Rstctl_SPEC,
1336 crate::common::RW,
1337 > {
1338 crate::common::RegisterField::<
1339 4,
1340 0x1,
1341 1,
1342 0,
1343 rstctl::Rdbrst,
1344 rstctl::Rdbrst,
1345 Rstctl_SPEC,
1346 crate::common::RW,
1347 >::from_register(self, 0)
1348 }
1349
1350 #[doc = "IBI Queue Software Reset"]
1351 #[inline(always)]
1352 pub fn ibiqrst(
1353 self,
1354 ) -> crate::common::RegisterField<
1355 5,
1356 0x1,
1357 1,
1358 0,
1359 rstctl::Ibiqrst,
1360 rstctl::Ibiqrst,
1361 Rstctl_SPEC,
1362 crate::common::RW,
1363 > {
1364 crate::common::RegisterField::<
1365 5,
1366 0x1,
1367 1,
1368 0,
1369 rstctl::Ibiqrst,
1370 rstctl::Ibiqrst,
1371 Rstctl_SPEC,
1372 crate::common::RW,
1373 >::from_register(self, 0)
1374 }
1375
1376 #[doc = "Receive Status Queue Software Reset"]
1377 #[inline(always)]
1378 pub fn rsqrst(
1379 self,
1380 ) -> crate::common::RegisterField<
1381 6,
1382 0x1,
1383 1,
1384 0,
1385 rstctl::Rsqrst,
1386 rstctl::Rsqrst,
1387 Rstctl_SPEC,
1388 crate::common::RW,
1389 > {
1390 crate::common::RegisterField::<
1391 6,
1392 0x1,
1393 1,
1394 0,
1395 rstctl::Rsqrst,
1396 rstctl::Rsqrst,
1397 Rstctl_SPEC,
1398 crate::common::RW,
1399 >::from_register(self, 0)
1400 }
1401
1402 #[doc = "Internal Software Reset"]
1403 #[inline(always)]
1404 pub fn intlrst(
1405 self,
1406 ) -> crate::common::RegisterField<
1407 16,
1408 0x1,
1409 1,
1410 0,
1411 rstctl::Intlrst,
1412 rstctl::Intlrst,
1413 Rstctl_SPEC,
1414 crate::common::RW,
1415 > {
1416 crate::common::RegisterField::<
1417 16,
1418 0x1,
1419 1,
1420 0,
1421 rstctl::Intlrst,
1422 rstctl::Intlrst,
1423 Rstctl_SPEC,
1424 crate::common::RW,
1425 >::from_register(self, 0)
1426 }
1427}
1428impl ::core::default::Default for Rstctl {
1429 #[inline(always)]
1430 fn default() -> Rstctl {
1431 <crate::RegValueT<Rstctl_SPEC> as RegisterValue<_>>::new(0)
1432 }
1433}
1434pub mod rstctl {
1435
1436 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1437 pub struct Ri3Crst_SPEC;
1438 pub type Ri3Crst = crate::EnumBitfieldStruct<u8, Ri3Crst_SPEC>;
1439 impl Ri3Crst {
1440 #[doc = "Release I3C reset."]
1441 pub const _0: Self = Self::new(0);
1442
1443 #[doc = "Initiate I3C reset."]
1444 pub const _1: Self = Self::new(1);
1445 }
1446 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1447 pub struct Cmdqrst_SPEC;
1448 pub type Cmdqrst = crate::EnumBitfieldStruct<u8, Cmdqrst_SPEC>;
1449 impl Cmdqrst {
1450 #[doc = "The Command Queues in I3C is not flushed."]
1451 pub const _0: Self = Self::new(0);
1452
1453 #[doc = "The Command Queues in I3C is flushed."]
1454 pub const _1: Self = Self::new(1);
1455 }
1456 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1457 pub struct Rspqrst_SPEC;
1458 pub type Rspqrst = crate::EnumBitfieldStruct<u8, Rspqrst_SPEC>;
1459 impl Rspqrst {
1460 #[doc = "The Response Queues in I3C is not flushed."]
1461 pub const _0: Self = Self::new(0);
1462
1463 #[doc = "The Response Queues in I3C is flushed."]
1464 pub const _1: Self = Self::new(1);
1465 }
1466 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1467 pub struct Tdbrst_SPEC;
1468 pub type Tdbrst = crate::EnumBitfieldStruct<u8, Tdbrst_SPEC>;
1469 impl Tdbrst {
1470 #[doc = "The Transmit Queues in I3C is not flushed."]
1471 pub const _0: Self = Self::new(0);
1472
1473 #[doc = "The Transmit Queues in I3C is flushed."]
1474 pub const _1: Self = Self::new(1);
1475 }
1476 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1477 pub struct Rdbrst_SPEC;
1478 pub type Rdbrst = crate::EnumBitfieldStruct<u8, Rdbrst_SPEC>;
1479 impl Rdbrst {
1480 #[doc = "The Receive Queues in I3C is not flushed."]
1481 pub const _0: Self = Self::new(0);
1482
1483 #[doc = "The Receive Queues in I3C is flushed."]
1484 pub const _1: Self = Self::new(1);
1485 }
1486 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1487 pub struct Ibiqrst_SPEC;
1488 pub type Ibiqrst = crate::EnumBitfieldStruct<u8, Ibiqrst_SPEC>;
1489 impl Ibiqrst {
1490 #[doc = "The IBI Queues in I3C is not flushed."]
1491 pub const _0: Self = Self::new(0);
1492
1493 #[doc = "The IBI Queues in I3C is flushed."]
1494 pub const _1: Self = Self::new(1);
1495 }
1496 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1497 pub struct Rsqrst_SPEC;
1498 pub type Rsqrst = crate::EnumBitfieldStruct<u8, Rsqrst_SPEC>;
1499 impl Rsqrst {
1500 #[doc = "The Receive Status Queue in I3C is not flushed."]
1501 pub const _0: Self = Self::new(0);
1502
1503 #[doc = "The Receive Status Queue in I3C is flushed."]
1504 pub const _1: Self = Self::new(1);
1505 }
1506 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1507 pub struct Intlrst_SPEC;
1508 pub type Intlrst = crate::EnumBitfieldStruct<u8, Intlrst_SPEC>;
1509 impl Intlrst {
1510 #[doc = "Releases of some registers and internal state."]
1511 pub const _0: Self = Self::new(0);
1512
1513 #[doc = "Resets of some registers and internal state."]
1514 pub const _1: Self = Self::new(1);
1515 }
1516}
1517#[doc(hidden)]
1518#[derive(Copy, Clone, Eq, PartialEq)]
1519pub struct Prsst_SPEC;
1520impl crate::sealed::RegSpec for Prsst_SPEC {
1521 type DataType = u32;
1522}
1523
1524#[doc = "Present State Register"]
1525pub type Prsst = crate::RegValueT<Prsst_SPEC>;
1526
1527impl Prsst {
1528 #[doc = "Current Master"]
1529 #[inline(always)]
1530 pub fn crms(
1531 self,
1532 ) -> crate::common::RegisterField<
1533 2,
1534 0x1,
1535 1,
1536 0,
1537 prsst::Crms,
1538 prsst::Crms,
1539 Prsst_SPEC,
1540 crate::common::RW,
1541 > {
1542 crate::common::RegisterField::<
1543 2,
1544 0x1,
1545 1,
1546 0,
1547 prsst::Crms,
1548 prsst::Crms,
1549 Prsst_SPEC,
1550 crate::common::RW,
1551 >::from_register(self, 0)
1552 }
1553
1554 #[doc = "Transmit/Receive Mode"]
1555 #[inline(always)]
1556 pub fn trmd(
1557 self,
1558 ) -> crate::common::RegisterField<
1559 4,
1560 0x1,
1561 1,
1562 0,
1563 prsst::Trmd,
1564 prsst::Trmd,
1565 Prsst_SPEC,
1566 crate::common::R,
1567 > {
1568 crate::common::RegisterField::<
1569 4,
1570 0x1,
1571 1,
1572 0,
1573 prsst::Trmd,
1574 prsst::Trmd,
1575 Prsst_SPEC,
1576 crate::common::R,
1577 >::from_register(self, 0)
1578 }
1579
1580 #[doc = "Present State Write Protect"]
1581 #[inline(always)]
1582 pub fn prsstwp(
1583 self,
1584 ) -> crate::common::RegisterField<
1585 7,
1586 0x1,
1587 1,
1588 0,
1589 prsst::Prsstwp,
1590 prsst::Prsstwp,
1591 Prsst_SPEC,
1592 crate::common::W,
1593 > {
1594 crate::common::RegisterField::<
1595 7,
1596 0x1,
1597 1,
1598 0,
1599 prsst::Prsstwp,
1600 prsst::Prsstwp,
1601 Prsst_SPEC,
1602 crate::common::W,
1603 >::from_register(self, 0)
1604 }
1605}
1606impl ::core::default::Default for Prsst {
1607 #[inline(always)]
1608 fn default() -> Prsst {
1609 <crate::RegValueT<Prsst_SPEC> as RegisterValue<_>>::new(0)
1610 }
1611}
1612pub mod prsst {
1613
1614 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1615 pub struct Crms_SPEC;
1616 pub type Crms = crate::EnumBitfieldStruct<u8, Crms_SPEC>;
1617 impl Crms {
1618 #[doc = "The Master is not the Current Master, and must request and acquire bus ownership before initiating any transfer."]
1619 pub const _0: Self = Self::new(0);
1620
1621 #[doc = "The Master is the Current Master, and as a result can initiate transfers."]
1622 pub const _1: Self = Self::new(1);
1623 }
1624 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1625 pub struct Trmd_SPEC;
1626 pub type Trmd = crate::EnumBitfieldStruct<u8, Trmd_SPEC>;
1627 impl Trmd {
1628 #[doc = "Receive mode"]
1629 pub const _0: Self = Self::new(0);
1630
1631 #[doc = "Transmit mode"]
1632 pub const _1: Self = Self::new(1);
1633 }
1634 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1635 pub struct Prsstwp_SPEC;
1636 pub type Prsstwp = crate::EnumBitfieldStruct<u8, Prsstwp_SPEC>;
1637 impl Prsstwp {
1638 #[doc = "CRMS bit is protected."]
1639 pub const _0: Self = Self::new(0);
1640
1641 #[doc = "CRMS bit can be written when writing simultaneously with the value of the target bit."]
1642 pub const _1: Self = Self::new(1);
1643 }
1644}
1645#[doc(hidden)]
1646#[derive(Copy, Clone, Eq, PartialEq)]
1647pub struct Inst_SPEC;
1648impl crate::sealed::RegSpec for Inst_SPEC {
1649 type DataType = u32;
1650}
1651
1652#[doc = "Internal Status Register"]
1653pub type Inst = crate::RegValueT<Inst_SPEC>;
1654
1655impl Inst {
1656 #[doc = "Internal Error Flag"]
1657 #[inline(always)]
1658 pub fn inef(
1659 self,
1660 ) -> crate::common::RegisterField<
1661 10,
1662 0x1,
1663 1,
1664 0,
1665 inst::Inef,
1666 inst::Inef,
1667 Inst_SPEC,
1668 crate::common::RW,
1669 > {
1670 crate::common::RegisterField::<
1671 10,
1672 0x1,
1673 1,
1674 0,
1675 inst::Inef,
1676 inst::Inef,
1677 Inst_SPEC,
1678 crate::common::RW,
1679 >::from_register(self, 0)
1680 }
1681}
1682impl ::core::default::Default for Inst {
1683 #[inline(always)]
1684 fn default() -> Inst {
1685 <crate::RegValueT<Inst_SPEC> as RegisterValue<_>>::new(0)
1686 }
1687}
1688pub mod inst {
1689
1690 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1691 pub struct Inef_SPEC;
1692 pub type Inef = crate::EnumBitfieldStruct<u8, Inef_SPEC>;
1693 impl Inef {
1694 #[doc = "I3C Internal Error has not detected."]
1695 pub const _0: Self = Self::new(0);
1696
1697 #[doc = "I3C Internal Error has detected."]
1698 pub const _1: Self = Self::new(1);
1699 }
1700}
1701#[doc(hidden)]
1702#[derive(Copy, Clone, Eq, PartialEq)]
1703pub struct Inste_SPEC;
1704impl crate::sealed::RegSpec for Inste_SPEC {
1705 type DataType = u32;
1706}
1707
1708#[doc = "Internal Status Enable Register"]
1709pub type Inste = crate::RegValueT<Inste_SPEC>;
1710
1711impl Inste {
1712 #[doc = "Internal Error Enable"]
1713 #[inline(always)]
1714 pub fn inee(
1715 self,
1716 ) -> crate::common::RegisterField<
1717 10,
1718 0x1,
1719 1,
1720 0,
1721 inste::Inee,
1722 inste::Inee,
1723 Inste_SPEC,
1724 crate::common::RW,
1725 > {
1726 crate::common::RegisterField::<
1727 10,
1728 0x1,
1729 1,
1730 0,
1731 inste::Inee,
1732 inste::Inee,
1733 Inste_SPEC,
1734 crate::common::RW,
1735 >::from_register(self, 0)
1736 }
1737}
1738impl ::core::default::Default for Inste {
1739 #[inline(always)]
1740 fn default() -> Inste {
1741 <crate::RegValueT<Inste_SPEC> as RegisterValue<_>>::new(0)
1742 }
1743}
1744pub mod inste {
1745
1746 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1747 pub struct Inee_SPEC;
1748 pub type Inee = crate::EnumBitfieldStruct<u8, Inee_SPEC>;
1749 impl Inee {
1750 #[doc = "Disable INST.INEF"]
1751 pub const _0: Self = Self::new(0);
1752
1753 #[doc = "Enable INST.INEF"]
1754 pub const _1: Self = Self::new(1);
1755 }
1756}
1757#[doc(hidden)]
1758#[derive(Copy, Clone, Eq, PartialEq)]
1759pub struct Inie_SPEC;
1760impl crate::sealed::RegSpec for Inie_SPEC {
1761 type DataType = u32;
1762}
1763
1764#[doc = "Internal Interrupt Enable Register"]
1765pub type Inie = crate::RegValueT<Inie_SPEC>;
1766
1767impl Inie {
1768 #[doc = "Internal Error Interrupt Enable"]
1769 #[inline(always)]
1770 pub fn ineie(
1771 self,
1772 ) -> crate::common::RegisterField<
1773 10,
1774 0x1,
1775 1,
1776 0,
1777 inie::Ineie,
1778 inie::Ineie,
1779 Inie_SPEC,
1780 crate::common::RW,
1781 > {
1782 crate::common::RegisterField::<
1783 10,
1784 0x1,
1785 1,
1786 0,
1787 inie::Ineie,
1788 inie::Ineie,
1789 Inie_SPEC,
1790 crate::common::RW,
1791 >::from_register(self, 0)
1792 }
1793}
1794impl ::core::default::Default for Inie {
1795 #[inline(always)]
1796 fn default() -> Inie {
1797 <crate::RegValueT<Inie_SPEC> as RegisterValue<_>>::new(0)
1798 }
1799}
1800pub mod inie {
1801
1802 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1803 pub struct Ineie_SPEC;
1804 pub type Ineie = crate::EnumBitfieldStruct<u8, Ineie_SPEC>;
1805 impl Ineie {
1806 #[doc = "Disables Non-recoverable Internal Error Interrupt Signal."]
1807 pub const _0: Self = Self::new(0);
1808
1809 #[doc = "Enables Non-recoverable Internal Error Interrupt Signal."]
1810 pub const _1: Self = Self::new(1);
1811 }
1812}
1813#[doc(hidden)]
1814#[derive(Copy, Clone, Eq, PartialEq)]
1815pub struct Instfc_SPEC;
1816impl crate::sealed::RegSpec for Instfc_SPEC {
1817 type DataType = u32;
1818}
1819
1820#[doc = "Internal Status Force Register"]
1821pub type Instfc = crate::RegValueT<Instfc_SPEC>;
1822
1823impl Instfc {
1824 #[doc = "Internal Error Force"]
1825 #[inline(always)]
1826 pub fn inefc(
1827 self,
1828 ) -> crate::common::RegisterField<
1829 10,
1830 0x1,
1831 1,
1832 0,
1833 instfc::Inefc,
1834 instfc::Inefc,
1835 Instfc_SPEC,
1836 crate::common::W,
1837 > {
1838 crate::common::RegisterField::<
1839 10,
1840 0x1,
1841 1,
1842 0,
1843 instfc::Inefc,
1844 instfc::Inefc,
1845 Instfc_SPEC,
1846 crate::common::W,
1847 >::from_register(self, 0)
1848 }
1849}
1850impl ::core::default::Default for Instfc {
1851 #[inline(always)]
1852 fn default() -> Instfc {
1853 <crate::RegValueT<Instfc_SPEC> as RegisterValue<_>>::new(0)
1854 }
1855}
1856pub mod instfc {
1857
1858 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1859 pub struct Inefc_SPEC;
1860 pub type Inefc = crate::EnumBitfieldStruct<u8, Inefc_SPEC>;
1861 impl Inefc {
1862 #[doc = "Not force a specific interrupt"]
1863 pub const _0: Self = Self::new(0);
1864
1865 #[doc = "Force a specific interrupt"]
1866 pub const _1: Self = Self::new(1);
1867 }
1868}
1869#[doc(hidden)]
1870#[derive(Copy, Clone, Eq, PartialEq)]
1871pub struct Dvct_SPEC;
1872impl crate::sealed::RegSpec for Dvct_SPEC {
1873 type DataType = u32;
1874}
1875
1876#[doc = "Device Characteristic Table Register"]
1877pub type Dvct = crate::RegValueT<Dvct_SPEC>;
1878
1879impl Dvct {
1880 #[doc = "DCT Table Index"]
1881 #[inline(always)]
1882 pub fn idx(
1883 self,
1884 ) -> crate::common::RegisterField<19, 0x1f, 1, 0, u8, u8, Dvct_SPEC, crate::common::R> {
1885 crate::common::RegisterField::<19,0x1f,1,0,u8,u8,Dvct_SPEC,crate::common::R>::from_register(self,0)
1886 }
1887}
1888impl ::core::default::Default for Dvct {
1889 #[inline(always)]
1890 fn default() -> Dvct {
1891 <crate::RegValueT<Dvct_SPEC> as RegisterValue<_>>::new(0)
1892 }
1893}
1894
1895#[doc(hidden)]
1896#[derive(Copy, Clone, Eq, PartialEq)]
1897pub struct Ibinctl_SPEC;
1898impl crate::sealed::RegSpec for Ibinctl_SPEC {
1899 type DataType = u32;
1900}
1901
1902#[doc = "IBI Notify Control Register"]
1903pub type Ibinctl = crate::RegValueT<Ibinctl_SPEC>;
1904
1905impl Ibinctl {
1906 #[doc = "Notify Rejected Hot-Join Control"]
1907 #[inline(always)]
1908 pub fn nrhjctl(
1909 self,
1910 ) -> crate::common::RegisterField<
1911 0,
1912 0x1,
1913 1,
1914 0,
1915 ibinctl::Nrhjctl,
1916 ibinctl::Nrhjctl,
1917 Ibinctl_SPEC,
1918 crate::common::RW,
1919 > {
1920 crate::common::RegisterField::<
1921 0,
1922 0x1,
1923 1,
1924 0,
1925 ibinctl::Nrhjctl,
1926 ibinctl::Nrhjctl,
1927 Ibinctl_SPEC,
1928 crate::common::RW,
1929 >::from_register(self, 0)
1930 }
1931
1932 #[doc = "Notify Rejected Master Request Control"]
1933 #[inline(always)]
1934 pub fn nrmrctl(
1935 self,
1936 ) -> crate::common::RegisterField<
1937 1,
1938 0x1,
1939 1,
1940 0,
1941 ibinctl::Nrmrctl,
1942 ibinctl::Nrmrctl,
1943 Ibinctl_SPEC,
1944 crate::common::RW,
1945 > {
1946 crate::common::RegisterField::<
1947 1,
1948 0x1,
1949 1,
1950 0,
1951 ibinctl::Nrmrctl,
1952 ibinctl::Nrmrctl,
1953 Ibinctl_SPEC,
1954 crate::common::RW,
1955 >::from_register(self, 0)
1956 }
1957
1958 #[doc = "Notify Rejected Slave Interrupt Request Control"]
1959 #[inline(always)]
1960 pub fn nrsirctl(
1961 self,
1962 ) -> crate::common::RegisterField<
1963 3,
1964 0x1,
1965 1,
1966 0,
1967 ibinctl::Nrsirctl,
1968 ibinctl::Nrsirctl,
1969 Ibinctl_SPEC,
1970 crate::common::RW,
1971 > {
1972 crate::common::RegisterField::<
1973 3,
1974 0x1,
1975 1,
1976 0,
1977 ibinctl::Nrsirctl,
1978 ibinctl::Nrsirctl,
1979 Ibinctl_SPEC,
1980 crate::common::RW,
1981 >::from_register(self, 0)
1982 }
1983}
1984impl ::core::default::Default for Ibinctl {
1985 #[inline(always)]
1986 fn default() -> Ibinctl {
1987 <crate::RegValueT<Ibinctl_SPEC> as RegisterValue<_>>::new(0)
1988 }
1989}
1990pub mod ibinctl {
1991
1992 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1993 pub struct Nrhjctl_SPEC;
1994 pub type Nrhjctl = crate::EnumBitfieldStruct<u8, Nrhjctl_SPEC>;
1995 impl Nrhjctl {
1996 #[doc = "Do not pass rejected IBI Status to IBI Queue, if the incoming HotJoin request is NACKed and is autodisabled based on field HJACKCTL of BCTL."]
1997 pub const _0: Self = Self::new(0);
1998
1999 #[doc = "Pass rejected IBI Status to the IBI Queue, if the incoming Hot Join request is NACKed and is autodisabled based on field HJACKCTL of BCTL."]
2000 pub const _1: Self = Self::new(1);
2001 }
2002 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2003 pub struct Nrmrctl_SPEC;
2004 pub type Nrmrctl = crate::EnumBitfieldStruct<u8, Nrmrctl_SPEC>;
2005 impl Nrmrctl {
2006 #[doc = "Do not pass rejected IBI Status to IBI Queue/Ring, if the incoming Master Request is NACKed and is auto-disabled based on DVMRRJ field in relevant DAT entry."]
2007 pub const _0: Self = Self::new(0);
2008
2009 #[doc = "Pass rejected IBI Status to the IBI Queue, if the incoming Master Request is NACKed and is autodisabled based on DVMRRJ field in relevant DAT entry."]
2010 pub const _1: Self = Self::new(1);
2011 }
2012 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2013 pub struct Nrsirctl_SPEC;
2014 pub type Nrsirctl = crate::EnumBitfieldStruct<u8, Nrsirctl_SPEC>;
2015 impl Nrsirctl {
2016 #[doc = "Do not pass rejected IBI Status to the IBI Queue/Rings, if the incoming SIR is NACKed and is auto-disabled based on DVSIRRJ field in relevant DAT entry."]
2017 pub const _0: Self = Self::new(0);
2018
2019 #[doc = "Pass rejected IBI Status to the IBI Queue/Rings, if the incoming SIR is NACKed and is auto-disabled based on DVSIRRJ field in relevant DAT entry."]
2020 pub const _1: Self = Self::new(1);
2021 }
2022}
2023#[doc(hidden)]
2024#[derive(Copy, Clone, Eq, PartialEq)]
2025pub struct Bfctl_SPEC;
2026impl crate::sealed::RegSpec for Bfctl_SPEC {
2027 type DataType = u32;
2028}
2029
2030#[doc = "Bus Function Control Register"]
2031pub type Bfctl = crate::RegValueT<Bfctl_SPEC>;
2032
2033impl Bfctl {
2034 #[doc = "Master Arbitration-Lost Detection Enable"]
2035 #[inline(always)]
2036 pub fn male(
2037 self,
2038 ) -> crate::common::RegisterField<
2039 0,
2040 0x1,
2041 1,
2042 0,
2043 bfctl::Male,
2044 bfctl::Male,
2045 Bfctl_SPEC,
2046 crate::common::RW,
2047 > {
2048 crate::common::RegisterField::<
2049 0,
2050 0x1,
2051 1,
2052 0,
2053 bfctl::Male,
2054 bfctl::Male,
2055 Bfctl_SPEC,
2056 crate::common::RW,
2057 >::from_register(self, 0)
2058 }
2059
2060 #[doc = "NACK Transmission Arbitration-Lost Detection Enable"]
2061 #[inline(always)]
2062 pub fn nale(
2063 self,
2064 ) -> crate::common::RegisterField<
2065 1,
2066 0x1,
2067 1,
2068 0,
2069 bfctl::Nale,
2070 bfctl::Nale,
2071 Bfctl_SPEC,
2072 crate::common::RW,
2073 > {
2074 crate::common::RegisterField::<
2075 1,
2076 0x1,
2077 1,
2078 0,
2079 bfctl::Nale,
2080 bfctl::Nale,
2081 Bfctl_SPEC,
2082 crate::common::RW,
2083 >::from_register(self, 0)
2084 }
2085
2086 #[doc = "Slave Arbitration-Lost Detection Enable"]
2087 #[inline(always)]
2088 pub fn sale(
2089 self,
2090 ) -> crate::common::RegisterField<
2091 2,
2092 0x1,
2093 1,
2094 0,
2095 bfctl::Sale,
2096 bfctl::Sale,
2097 Bfctl_SPEC,
2098 crate::common::RW,
2099 > {
2100 crate::common::RegisterField::<
2101 2,
2102 0x1,
2103 1,
2104 0,
2105 bfctl::Sale,
2106 bfctl::Sale,
2107 Bfctl_SPEC,
2108 crate::common::RW,
2109 >::from_register(self, 0)
2110 }
2111
2112 #[doc = "SCL Synchronous Circuit Enable"]
2113 #[inline(always)]
2114 pub fn scsyne(
2115 self,
2116 ) -> crate::common::RegisterField<
2117 8,
2118 0x1,
2119 1,
2120 0,
2121 bfctl::Scsyne,
2122 bfctl::Scsyne,
2123 Bfctl_SPEC,
2124 crate::common::RW,
2125 > {
2126 crate::common::RegisterField::<
2127 8,
2128 0x1,
2129 1,
2130 0,
2131 bfctl::Scsyne,
2132 bfctl::Scsyne,
2133 Bfctl_SPEC,
2134 crate::common::RW,
2135 >::from_register(self, 0)
2136 }
2137
2138 #[doc = "SMBus/I2C Bus Selection"]
2139 #[inline(always)]
2140 pub fn smbs(
2141 self,
2142 ) -> crate::common::RegisterField<
2143 12,
2144 0x1,
2145 1,
2146 0,
2147 bfctl::Smbs,
2148 bfctl::Smbs,
2149 Bfctl_SPEC,
2150 crate::common::RW,
2151 > {
2152 crate::common::RegisterField::<
2153 12,
2154 0x1,
2155 1,
2156 0,
2157 bfctl::Smbs,
2158 bfctl::Smbs,
2159 Bfctl_SPEC,
2160 crate::common::RW,
2161 >::from_register(self, 0)
2162 }
2163
2164 #[doc = "Fast-mode Plus Enable"]
2165 #[inline(always)]
2166 pub fn fmpe(
2167 self,
2168 ) -> crate::common::RegisterField<
2169 14,
2170 0x1,
2171 1,
2172 0,
2173 bfctl::Fmpe,
2174 bfctl::Fmpe,
2175 Bfctl_SPEC,
2176 crate::common::RW,
2177 > {
2178 crate::common::RegisterField::<
2179 14,
2180 0x1,
2181 1,
2182 0,
2183 bfctl::Fmpe,
2184 bfctl::Fmpe,
2185 Bfctl_SPEC,
2186 crate::common::RW,
2187 >::from_register(self, 0)
2188 }
2189
2190 #[doc = "High Speed Mode Enable"]
2191 #[inline(always)]
2192 pub fn hsme(
2193 self,
2194 ) -> crate::common::RegisterField<
2195 15,
2196 0x1,
2197 1,
2198 0,
2199 bfctl::Hsme,
2200 bfctl::Hsme,
2201 Bfctl_SPEC,
2202 crate::common::RW,
2203 > {
2204 crate::common::RegisterField::<
2205 15,
2206 0x1,
2207 1,
2208 0,
2209 bfctl::Hsme,
2210 bfctl::Hsme,
2211 Bfctl_SPEC,
2212 crate::common::RW,
2213 >::from_register(self, 0)
2214 }
2215}
2216impl ::core::default::Default for Bfctl {
2217 #[inline(always)]
2218 fn default() -> Bfctl {
2219 <crate::RegValueT<Bfctl_SPEC> as RegisterValue<_>>::new(257)
2220 }
2221}
2222pub mod bfctl {
2223
2224 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2225 pub struct Male_SPEC;
2226 pub type Male = crate::EnumBitfieldStruct<u8, Male_SPEC>;
2227 impl Male {
2228 #[doc = "Master arbitration-lost detection disables. Disables the arbitration-lost detection function and does not clear the CRMS and TRMD bits in PRSST automatically when arbitration is lost."]
2229 pub const _0: Self = Self::new(0);
2230
2231 #[doc = "Master arbitration-lost detection enables. Enables the arbitration-lost detection function and clears the CRMS and TRMD bits in PRSST automatically when arbitration is lost."]
2232 pub const _1: Self = Self::new(1);
2233 }
2234 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2235 pub struct Nale_SPEC;
2236 pub type Nale = crate::EnumBitfieldStruct<u8, Nale_SPEC>;
2237 impl Nale {
2238 #[doc = "NACK transmission arbitration-lost detection disables."]
2239 pub const _0: Self = Self::new(0);
2240
2241 #[doc = "NACK transmission arbitration-lost detection enables."]
2242 pub const _1: Self = Self::new(1);
2243 }
2244 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2245 pub struct Sale_SPEC;
2246 pub type Sale = crate::EnumBitfieldStruct<u8, Sale_SPEC>;
2247 impl Sale {
2248 #[doc = "Slave arbitration-lost detection disables."]
2249 pub const _0: Self = Self::new(0);
2250
2251 #[doc = "Slave arbitration-lost detection enables."]
2252 pub const _1: Self = Self::new(1);
2253 }
2254 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2255 pub struct Scsyne_SPEC;
2256 pub type Scsyne = crate::EnumBitfieldStruct<u8, Scsyne_SPEC>;
2257 impl Scsyne {
2258 #[doc = "No SCL synchronous circuit uses."]
2259 pub const _0: Self = Self::new(0);
2260
2261 #[doc = "An SCL synchronous circuit uses."]
2262 pub const _1: Self = Self::new(1);
2263 }
2264 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2265 pub struct Smbs_SPEC;
2266 pub type Smbs = crate::EnumBitfieldStruct<u8, Smbs_SPEC>;
2267 impl Smbs {
2268 #[doc = "The I2C bus select."]
2269 pub const _0: Self = Self::new(0);
2270
2271 #[doc = "The SMBus select."]
2272 pub const _1: Self = Self::new(1);
2273 }
2274 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2275 pub struct Fmpe_SPEC;
2276 pub type Fmpe = crate::EnumBitfieldStruct<u8, Fmpe_SPEC>;
2277 impl Fmpe {
2278 #[doc = "No Fm+ slope control circuit uses for the SCLn pin and SDAn pin. (n = 0)"]
2279 pub const _0: Self = Self::new(0);
2280
2281 #[doc = "An Fm+ slope control circuit uses for the SCLn pin and SDAn pin. (n = 0)"]
2282 pub const _1: Self = Self::new(1);
2283 }
2284 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2285 pub struct Hsme_SPEC;
2286 pub type Hsme = crate::EnumBitfieldStruct<u8, Hsme_SPEC>;
2287 impl Hsme {
2288 #[doc = "Disable High Speed Mode."]
2289 pub const _0: Self = Self::new(0);
2290
2291 #[doc = "Enable High Speed Mode."]
2292 pub const _1: Self = Self::new(1);
2293 }
2294}
2295#[doc(hidden)]
2296#[derive(Copy, Clone, Eq, PartialEq)]
2297pub struct Svctl_SPEC;
2298impl crate::sealed::RegSpec for Svctl_SPEC {
2299 type DataType = u32;
2300}
2301
2302#[doc = "Slave Control Register"]
2303pub type Svctl = crate::RegValueT<Svctl_SPEC>;
2304
2305impl Svctl {
2306 #[doc = "General Call Address Enable"]
2307 #[inline(always)]
2308 pub fn gcae(
2309 self,
2310 ) -> crate::common::RegisterField<
2311 0,
2312 0x1,
2313 1,
2314 0,
2315 svctl::Gcae,
2316 svctl::Gcae,
2317 Svctl_SPEC,
2318 crate::common::RW,
2319 > {
2320 crate::common::RegisterField::<
2321 0,
2322 0x1,
2323 1,
2324 0,
2325 svctl::Gcae,
2326 svctl::Gcae,
2327 Svctl_SPEC,
2328 crate::common::RW,
2329 >::from_register(self, 0)
2330 }
2331
2332 #[doc = "Hs-mode Master Code Enable"]
2333 #[inline(always)]
2334 pub fn hsmce(
2335 self,
2336 ) -> crate::common::RegisterField<
2337 5,
2338 0x1,
2339 1,
2340 0,
2341 svctl::Hsmce,
2342 svctl::Hsmce,
2343 Svctl_SPEC,
2344 crate::common::RW,
2345 > {
2346 crate::common::RegisterField::<
2347 5,
2348 0x1,
2349 1,
2350 0,
2351 svctl::Hsmce,
2352 svctl::Hsmce,
2353 Svctl_SPEC,
2354 crate::common::RW,
2355 >::from_register(self, 0)
2356 }
2357
2358 #[doc = "Device-ID Address Enable"]
2359 #[inline(always)]
2360 pub fn dvide(
2361 self,
2362 ) -> crate::common::RegisterField<
2363 6,
2364 0x1,
2365 1,
2366 0,
2367 svctl::Dvide,
2368 svctl::Dvide,
2369 Svctl_SPEC,
2370 crate::common::RW,
2371 > {
2372 crate::common::RegisterField::<
2373 6,
2374 0x1,
2375 1,
2376 0,
2377 svctl::Dvide,
2378 svctl::Dvide,
2379 Svctl_SPEC,
2380 crate::common::RW,
2381 >::from_register(self, 0)
2382 }
2383
2384 #[doc = "Host Address Enable"]
2385 #[inline(always)]
2386 pub fn hoae(
2387 self,
2388 ) -> crate::common::RegisterField<
2389 15,
2390 0x1,
2391 1,
2392 0,
2393 svctl::Hoae,
2394 svctl::Hoae,
2395 Svctl_SPEC,
2396 crate::common::RW,
2397 > {
2398 crate::common::RegisterField::<
2399 15,
2400 0x1,
2401 1,
2402 0,
2403 svctl::Hoae,
2404 svctl::Hoae,
2405 Svctl_SPEC,
2406 crate::common::RW,
2407 >::from_register(self, 0)
2408 }
2409
2410 #[doc = "Slave Address Enable 0"]
2411 #[inline(always)]
2412 pub fn svae0(
2413 self,
2414 ) -> crate::common::RegisterField<
2415 16,
2416 0x1,
2417 1,
2418 0,
2419 svctl::Svae0,
2420 svctl::Svae0,
2421 Svctl_SPEC,
2422 crate::common::RW,
2423 > {
2424 crate::common::RegisterField::<
2425 16,
2426 0x1,
2427 1,
2428 0,
2429 svctl::Svae0,
2430 svctl::Svae0,
2431 Svctl_SPEC,
2432 crate::common::RW,
2433 >::from_register(self, 0)
2434 }
2435}
2436impl ::core::default::Default for Svctl {
2437 #[inline(always)]
2438 fn default() -> Svctl {
2439 <crate::RegValueT<Svctl_SPEC> as RegisterValue<_>>::new(0)
2440 }
2441}
2442pub mod svctl {
2443
2444 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2445 pub struct Gcae_SPEC;
2446 pub type Gcae = crate::EnumBitfieldStruct<u8, Gcae_SPEC>;
2447 impl Gcae {
2448 #[doc = "General call address detection disables."]
2449 pub const _0: Self = Self::new(0);
2450
2451 #[doc = "General call address detection enables."]
2452 pub const _1: Self = Self::new(1);
2453 }
2454 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2455 pub struct Hsmce_SPEC;
2456 pub type Hsmce = crate::EnumBitfieldStruct<u8, Hsmce_SPEC>;
2457 impl Hsmce {
2458 #[doc = "Hs-mode Master Code Detection disables."]
2459 pub const _0: Self = Self::new(0);
2460
2461 #[doc = "Hs-mode Master Code Detection enables."]
2462 pub const _1: Self = Self::new(1);
2463 }
2464 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2465 pub struct Dvide_SPEC;
2466 pub type Dvide = crate::EnumBitfieldStruct<u8, Dvide_SPEC>;
2467 impl Dvide {
2468 #[doc = "Device-ID address detection disables."]
2469 pub const _0: Self = Self::new(0);
2470
2471 #[doc = "Device-ID address detection enables."]
2472 pub const _1: Self = Self::new(1);
2473 }
2474 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2475 pub struct Hoae_SPEC;
2476 pub type Hoae = crate::EnumBitfieldStruct<u8, Hoae_SPEC>;
2477 impl Hoae {
2478 #[doc = "Host address detection disables."]
2479 pub const _0: Self = Self::new(0);
2480
2481 #[doc = "Host address detection enables."]
2482 pub const _1: Self = Self::new(1);
2483 }
2484 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2485 pub struct Svae0_SPEC;
2486 pub type Svae0 = crate::EnumBitfieldStruct<u8, Svae0_SPEC>;
2487 impl Svae0 {
2488 #[doc = "Slave 0 disables"]
2489 pub const _0: Self = Self::new(0);
2490
2491 #[doc = "Slave 0 enables"]
2492 pub const _1: Self = Self::new(1);
2493 }
2494}
2495#[doc(hidden)]
2496#[derive(Copy, Clone, Eq, PartialEq)]
2497pub struct Refckctl_SPEC;
2498impl crate::sealed::RegSpec for Refckctl_SPEC {
2499 type DataType = u32;
2500}
2501
2502#[doc = "Reference Clock Control Register"]
2503pub type Refckctl = crate::RegValueT<Refckctl_SPEC>;
2504
2505impl Refckctl {
2506 #[doc = "Internal Reference Clock Selection"]
2507 #[inline(always)]
2508 pub fn irefcks(
2509 self,
2510 ) -> crate::common::RegisterField<
2511 0,
2512 0x7,
2513 1,
2514 0,
2515 refckctl::Irefcks,
2516 refckctl::Irefcks,
2517 Refckctl_SPEC,
2518 crate::common::RW,
2519 > {
2520 crate::common::RegisterField::<
2521 0,
2522 0x7,
2523 1,
2524 0,
2525 refckctl::Irefcks,
2526 refckctl::Irefcks,
2527 Refckctl_SPEC,
2528 crate::common::RW,
2529 >::from_register(self, 0)
2530 }
2531}
2532impl ::core::default::Default for Refckctl {
2533 #[inline(always)]
2534 fn default() -> Refckctl {
2535 <crate::RegValueT<Refckctl_SPEC> as RegisterValue<_>>::new(0)
2536 }
2537}
2538pub mod refckctl {
2539
2540 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2541 pub struct Irefcks_SPEC;
2542 pub type Irefcks = crate::EnumBitfieldStruct<u8, Irefcks_SPEC>;
2543 impl Irefcks {
2544 #[doc = "PCLKD/1 clock"]
2545 pub const _000: Self = Self::new(0);
2546
2547 #[doc = "PCLKD/2 clock"]
2548 pub const _001: Self = Self::new(1);
2549
2550 #[doc = "PCLKD/4 clock"]
2551 pub const _010: Self = Self::new(2);
2552
2553 #[doc = "PCLKD/8 clock"]
2554 pub const _011: Self = Self::new(3);
2555
2556 #[doc = "PCLKD/16 clock"]
2557 pub const _100: Self = Self::new(4);
2558
2559 #[doc = "PCLKD/32 clock"]
2560 pub const _101: Self = Self::new(5);
2561
2562 #[doc = "PCLKD/64 clock"]
2563 pub const _110: Self = Self::new(6);
2564
2565 #[doc = "PCLKD/128 clock"]
2566 pub const _111: Self = Self::new(7);
2567 }
2568}
2569#[doc(hidden)]
2570#[derive(Copy, Clone, Eq, PartialEq)]
2571pub struct Stdbr_SPEC;
2572impl crate::sealed::RegSpec for Stdbr_SPEC {
2573 type DataType = u32;
2574}
2575
2576#[doc = "Standard Bit Rate Register"]
2577pub type Stdbr = crate::RegValueT<Stdbr_SPEC>;
2578
2579impl Stdbr {
2580 #[doc = "Count value of the Low-level period of SCL clock"]
2581 #[inline(always)]
2582 pub fn sbrlo(
2583 self,
2584 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
2585 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
2586 }
2587
2588 #[doc = "Count value of the High-level period of SCL clock"]
2589 #[inline(always)]
2590 pub fn sbrho(
2591 self,
2592 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
2593 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
2594 }
2595
2596 #[doc = "Standard Bit Rate Low-level Period Push-Pull"]
2597 #[inline(always)]
2598 pub fn sbrlp(
2599 self,
2600 ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
2601 crate::common::RegisterField::<16,0x3f,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
2602 }
2603
2604 #[doc = "Standard Bit Rate High-Level Period Push-Pull"]
2605 #[inline(always)]
2606 pub fn sbrhp(
2607 self,
2608 ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
2609 crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
2610 }
2611
2612 #[doc = "Double the Standard Bit Rate Period for Open-Drain"]
2613 #[inline(always)]
2614 pub fn dsbrpo(
2615 self,
2616 ) -> crate::common::RegisterField<
2617 31,
2618 0x1,
2619 1,
2620 0,
2621 stdbr::Dsbrpo,
2622 stdbr::Dsbrpo,
2623 Stdbr_SPEC,
2624 crate::common::RW,
2625 > {
2626 crate::common::RegisterField::<
2627 31,
2628 0x1,
2629 1,
2630 0,
2631 stdbr::Dsbrpo,
2632 stdbr::Dsbrpo,
2633 Stdbr_SPEC,
2634 crate::common::RW,
2635 >::from_register(self, 0)
2636 }
2637}
2638impl ::core::default::Default for Stdbr {
2639 #[inline(always)]
2640 fn default() -> Stdbr {
2641 <crate::RegValueT<Stdbr_SPEC> as RegisterValue<_>>::new(1061158911)
2642 }
2643}
2644pub mod stdbr {
2645
2646 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2647 pub struct Dsbrpo_SPEC;
2648 pub type Dsbrpo = crate::EnumBitfieldStruct<u8, Dsbrpo_SPEC>;
2649 impl Dsbrpo {
2650 #[doc = "The time period set for SBRHO\\[7:0\\] and SBRLO\\[7:0\\] is not doubled."]
2651 pub const _0: Self = Self::new(0);
2652
2653 #[doc = "The time period set for SBRHO\\[7:0\\] and SBRLO\\[7:0\\] is doubled."]
2654 pub const _1: Self = Self::new(1);
2655 }
2656}
2657#[doc(hidden)]
2658#[derive(Copy, Clone, Eq, PartialEq)]
2659pub struct Extbr_SPEC;
2660impl crate::sealed::RegSpec for Extbr_SPEC {
2661 type DataType = u32;
2662}
2663
2664#[doc = "Extended Bit Rate Register"]
2665pub type Extbr = crate::RegValueT<Extbr_SPEC>;
2666
2667impl Extbr {
2668 #[doc = "Extended Bit Rate Low-Level Period Open-Drain"]
2669 #[inline(always)]
2670 pub fn ebrlo(
2671 self,
2672 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
2673 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
2674 }
2675
2676 #[doc = "Extended Bit Rate High-Level Period Open-Drain"]
2677 #[inline(always)]
2678 pub fn ebrho(
2679 self,
2680 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
2681 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
2682 }
2683
2684 #[doc = "Extended Bit Rate Low-Level Period Push-Pull"]
2685 #[inline(always)]
2686 pub fn ebrlp(
2687 self,
2688 ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
2689 crate::common::RegisterField::<16,0x3f,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
2690 }
2691
2692 #[doc = "Extended Bit Rate Low-Level Period Push-Pull"]
2693 #[inline(always)]
2694 pub fn ebrhp(
2695 self,
2696 ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
2697 crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
2698 }
2699}
2700impl ::core::default::Default for Extbr {
2701 #[inline(always)]
2702 fn default() -> Extbr {
2703 <crate::RegValueT<Extbr_SPEC> as RegisterValue<_>>::new(1061158911)
2704 }
2705}
2706
2707#[doc(hidden)]
2708#[derive(Copy, Clone, Eq, PartialEq)]
2709pub struct Bfrecdt_SPEC;
2710impl crate::sealed::RegSpec for Bfrecdt_SPEC {
2711 type DataType = u32;
2712}
2713
2714#[doc = "Bus Free Condition Detection Time Register"]
2715pub type Bfrecdt = crate::RegValueT<Bfrecdt_SPEC>;
2716
2717impl Bfrecdt {
2718 #[doc = "Bus Free Condition Detection Cycle"]
2719 #[inline(always)]
2720 pub fn frecyc(
2721 self,
2722 ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Bfrecdt_SPEC, crate::common::RW>
2723 {
2724 crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Bfrecdt_SPEC,crate::common::RW>::from_register(self,0)
2725 }
2726}
2727impl ::core::default::Default for Bfrecdt {
2728 #[inline(always)]
2729 fn default() -> Bfrecdt {
2730 <crate::RegValueT<Bfrecdt_SPEC> as RegisterValue<_>>::new(0)
2731 }
2732}
2733
2734#[doc(hidden)]
2735#[derive(Copy, Clone, Eq, PartialEq)]
2736pub struct Bavlcdt_SPEC;
2737impl crate::sealed::RegSpec for Bavlcdt_SPEC {
2738 type DataType = u32;
2739}
2740
2741#[doc = "Bus Available Condition Detection Time Register"]
2742pub type Bavlcdt = crate::RegValueT<Bavlcdt_SPEC>;
2743
2744impl Bavlcdt {
2745 #[doc = "Bus Available Condition Detection Cycle"]
2746 #[inline(always)]
2747 pub fn avlcyc(
2748 self,
2749 ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Bavlcdt_SPEC, crate::common::RW>
2750 {
2751 crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Bavlcdt_SPEC,crate::common::RW>::from_register(self,0)
2752 }
2753}
2754impl ::core::default::Default for Bavlcdt {
2755 #[inline(always)]
2756 fn default() -> Bavlcdt {
2757 <crate::RegValueT<Bavlcdt_SPEC> as RegisterValue<_>>::new(0)
2758 }
2759}
2760
2761#[doc(hidden)]
2762#[derive(Copy, Clone, Eq, PartialEq)]
2763pub struct Bidlcdt_SPEC;
2764impl crate::sealed::RegSpec for Bidlcdt_SPEC {
2765 type DataType = u32;
2766}
2767
2768#[doc = "Bus Idle Condition Detection Time Register"]
2769pub type Bidlcdt = crate::RegValueT<Bidlcdt_SPEC>;
2770
2771impl Bidlcdt {
2772 #[doc = "Bus Idle Condition Detection Cycle"]
2773 #[inline(always)]
2774 pub fn idlcyc(
2775 self,
2776 ) -> crate::common::RegisterField<0, 0x3ffff, 1, 0, u32, u32, Bidlcdt_SPEC, crate::common::RW>
2777 {
2778 crate::common::RegisterField::<0,0x3ffff,1,0,u32,u32,Bidlcdt_SPEC,crate::common::RW>::from_register(self,0)
2779 }
2780}
2781impl ::core::default::Default for Bidlcdt {
2782 #[inline(always)]
2783 fn default() -> Bidlcdt {
2784 <crate::RegValueT<Bidlcdt_SPEC> as RegisterValue<_>>::new(0)
2785 }
2786}
2787
2788#[doc(hidden)]
2789#[derive(Copy, Clone, Eq, PartialEq)]
2790pub struct Outctl_SPEC;
2791impl crate::sealed::RegSpec for Outctl_SPEC {
2792 type DataType = u32;
2793}
2794
2795#[doc = "Output Control Register"]
2796pub type Outctl = crate::RegValueT<Outctl_SPEC>;
2797
2798impl Outctl {
2799 #[doc = "SDA Output Control"]
2800 #[inline(always)]
2801 pub fn sdoc(
2802 self,
2803 ) -> crate::common::RegisterField<
2804 0,
2805 0x1,
2806 1,
2807 0,
2808 outctl::Sdoc,
2809 outctl::Sdoc,
2810 Outctl_SPEC,
2811 crate::common::RW,
2812 > {
2813 crate::common::RegisterField::<
2814 0,
2815 0x1,
2816 1,
2817 0,
2818 outctl::Sdoc,
2819 outctl::Sdoc,
2820 Outctl_SPEC,
2821 crate::common::RW,
2822 >::from_register(self, 0)
2823 }
2824
2825 #[doc = "SCL Output Control"]
2826 #[inline(always)]
2827 pub fn scoc(
2828 self,
2829 ) -> crate::common::RegisterField<
2830 1,
2831 0x1,
2832 1,
2833 0,
2834 outctl::Scoc,
2835 outctl::Scoc,
2836 Outctl_SPEC,
2837 crate::common::RW,
2838 > {
2839 crate::common::RegisterField::<
2840 1,
2841 0x1,
2842 1,
2843 0,
2844 outctl::Scoc,
2845 outctl::Scoc,
2846 Outctl_SPEC,
2847 crate::common::RW,
2848 >::from_register(self, 0)
2849 }
2850
2851 #[doc = "SCL/SDA Output Control Write Protect"]
2852 #[inline(always)]
2853 pub fn socwp(
2854 self,
2855 ) -> crate::common::RegisterField<
2856 2,
2857 0x1,
2858 1,
2859 0,
2860 outctl::Socwp,
2861 outctl::Socwp,
2862 Outctl_SPEC,
2863 crate::common::W,
2864 > {
2865 crate::common::RegisterField::<
2866 2,
2867 0x1,
2868 1,
2869 0,
2870 outctl::Socwp,
2871 outctl::Socwp,
2872 Outctl_SPEC,
2873 crate::common::W,
2874 >::from_register(self, 0)
2875 }
2876
2877 #[doc = "Extra SCL Clock Cycle Output"]
2878 #[inline(always)]
2879 pub fn excyc(
2880 self,
2881 ) -> crate::common::RegisterField<
2882 4,
2883 0x1,
2884 1,
2885 0,
2886 outctl::Excyc,
2887 outctl::Excyc,
2888 Outctl_SPEC,
2889 crate::common::RW,
2890 > {
2891 crate::common::RegisterField::<
2892 4,
2893 0x1,
2894 1,
2895 0,
2896 outctl::Excyc,
2897 outctl::Excyc,
2898 Outctl_SPEC,
2899 crate::common::RW,
2900 >::from_register(self, 0)
2901 }
2902
2903 #[doc = "SDA Output Delay"]
2904 #[inline(always)]
2905 pub fn sdod(
2906 self,
2907 ) -> crate::common::RegisterField<
2908 8,
2909 0x7,
2910 1,
2911 0,
2912 outctl::Sdod,
2913 outctl::Sdod,
2914 Outctl_SPEC,
2915 crate::common::RW,
2916 > {
2917 crate::common::RegisterField::<
2918 8,
2919 0x7,
2920 1,
2921 0,
2922 outctl::Sdod,
2923 outctl::Sdod,
2924 Outctl_SPEC,
2925 crate::common::RW,
2926 >::from_register(self, 0)
2927 }
2928
2929 #[doc = "SDA Output Delay Clock Source Selection"]
2930 #[inline(always)]
2931 pub fn sdodcs(
2932 self,
2933 ) -> crate::common::RegisterField<
2934 15,
2935 0x1,
2936 1,
2937 0,
2938 outctl::Sdodcs,
2939 outctl::Sdodcs,
2940 Outctl_SPEC,
2941 crate::common::RW,
2942 > {
2943 crate::common::RegisterField::<
2944 15,
2945 0x1,
2946 1,
2947 0,
2948 outctl::Sdodcs,
2949 outctl::Sdodcs,
2950 Outctl_SPEC,
2951 crate::common::RW,
2952 >::from_register(self, 0)
2953 }
2954}
2955impl ::core::default::Default for Outctl {
2956 #[inline(always)]
2957 fn default() -> Outctl {
2958 <crate::RegValueT<Outctl_SPEC> as RegisterValue<_>>::new(3)
2959 }
2960}
2961pub mod outctl {
2962
2963 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2964 pub struct Sdoc_SPEC;
2965 pub type Sdoc = crate::EnumBitfieldStruct<u8, Sdoc_SPEC>;
2966 impl Sdoc {
2967 #[doc = "I3C drives the SDAn pin low."]
2968 pub const _0: Self = Self::new(0);
2969
2970 #[doc = "I3C releases the SDAn pin."]
2971 pub const _1: Self = Self::new(1);
2972 }
2973 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2974 pub struct Scoc_SPEC;
2975 pub type Scoc = crate::EnumBitfieldStruct<u8, Scoc_SPEC>;
2976 impl Scoc {
2977 #[doc = "I3C drives the SCLn pin low."]
2978 pub const _0: Self = Self::new(0);
2979
2980 #[doc = "I3C releases the SCLn pin."]
2981 pub const _1: Self = Self::new(1);
2982 }
2983 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2984 pub struct Socwp_SPEC;
2985 pub type Socwp = crate::EnumBitfieldStruct<u8, Socwp_SPEC>;
2986 impl Socwp {
2987 #[doc = "Bits SCOC and SDOC are protected."]
2988 pub const _0: Self = Self::new(0);
2989
2990 #[doc = "Bits SCOC and SDOC can be written (When writing simultaneously with the value of the target bit). This bit is read as 0."]
2991 pub const _1: Self = Self::new(1);
2992 }
2993 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2994 pub struct Excyc_SPEC;
2995 pub type Excyc = crate::EnumBitfieldStruct<u8, Excyc_SPEC>;
2996 impl Excyc {
2997 #[doc = "Does not output an extra SCL clock cycle (default)."]
2998 pub const _0: Self = Self::new(0);
2999
3000 #[doc = "Outputs an extra SCL clock cycle."]
3001 pub const _1: Self = Self::new(1);
3002 }
3003 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3004 pub struct Sdod_SPEC;
3005 pub type Sdod = crate::EnumBitfieldStruct<u8, Sdod_SPEC>;
3006 impl Sdod {
3007 #[doc = "No output delay"]
3008 pub const _000: Self = Self::new(0);
3009
3010 #[doc = "1 I3Cφ cycle (When OUTCTL.SDODCS = 0 (I3Cφ)) 1 or 2 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3011 pub const _001: Self = Self::new(1);
3012
3013 #[doc = "2 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 3 or 4 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3014 pub const _010: Self = Self::new(2);
3015
3016 #[doc = "3 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 5 or 6 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3017 pub const _011: Self = Self::new(3);
3018
3019 #[doc = "4 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 7 or 8 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3020 pub const _100: Self = Self::new(4);
3021
3022 #[doc = "5 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 9 or 10 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3023 pub const _101: Self = Self::new(5);
3024
3025 #[doc = "6 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 11 or 12 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3026 pub const _110: Self = Self::new(6);
3027
3028 #[doc = "7 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 13 or 14 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3029 pub const _111: Self = Self::new(7);
3030 }
3031 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3032 pub struct Sdodcs_SPEC;
3033 pub type Sdodcs = crate::EnumBitfieldStruct<u8, Sdodcs_SPEC>;
3034 impl Sdodcs {
3035 #[doc = "The internal reference clock (I3Cφ) is selected as the clock source of the SDA output delay counter."]
3036 pub const _0: Self = Self::new(0);
3037
3038 #[doc = "The internal reference clock divided by 2 (I3Cφ/2) is selected as the clock source of the SDA output delay counter."]
3039 pub const _1: Self = Self::new(1);
3040 }
3041}
3042#[doc(hidden)]
3043#[derive(Copy, Clone, Eq, PartialEq)]
3044pub struct Inctl_SPEC;
3045impl crate::sealed::RegSpec for Inctl_SPEC {
3046 type DataType = u32;
3047}
3048
3049#[doc = "Input Control Register"]
3050pub type Inctl = crate::RegValueT<Inctl_SPEC>;
3051
3052impl Inctl {
3053 #[doc = "Digital Noise Filter Stage Selection"]
3054 #[inline(always)]
3055 pub fn dnfs(
3056 self,
3057 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Inctl_SPEC, crate::common::RW> {
3058 crate::common::RegisterField::<0,0xf,1,0,u8,u8,Inctl_SPEC,crate::common::RW>::from_register(self,0)
3059 }
3060
3061 #[doc = "Digital Noise Filter Circuit Enable"]
3062 #[inline(always)]
3063 pub fn dnfe(
3064 self,
3065 ) -> crate::common::RegisterField<
3066 4,
3067 0x1,
3068 1,
3069 0,
3070 inctl::Dnfe,
3071 inctl::Dnfe,
3072 Inctl_SPEC,
3073 crate::common::RW,
3074 > {
3075 crate::common::RegisterField::<
3076 4,
3077 0x1,
3078 1,
3079 0,
3080 inctl::Dnfe,
3081 inctl::Dnfe,
3082 Inctl_SPEC,
3083 crate::common::RW,
3084 >::from_register(self, 0)
3085 }
3086}
3087impl ::core::default::Default for Inctl {
3088 #[inline(always)]
3089 fn default() -> Inctl {
3090 <crate::RegValueT<Inctl_SPEC> as RegisterValue<_>>::new(208)
3091 }
3092}
3093pub mod inctl {
3094
3095 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3096 pub struct Dnfe_SPEC;
3097 pub type Dnfe = crate::EnumBitfieldStruct<u8, Dnfe_SPEC>;
3098 impl Dnfe {
3099 #[doc = "No digital noise filter circuit is used."]
3100 pub const _0: Self = Self::new(0);
3101
3102 #[doc = "A digital noise filter circuit is used."]
3103 pub const _1: Self = Self::new(1);
3104 }
3105}
3106#[doc(hidden)]
3107#[derive(Copy, Clone, Eq, PartialEq)]
3108pub struct Tmoctl_SPEC;
3109impl crate::sealed::RegSpec for Tmoctl_SPEC {
3110 type DataType = u32;
3111}
3112
3113#[doc = "Timeout Control Register"]
3114pub type Tmoctl = crate::RegValueT<Tmoctl_SPEC>;
3115
3116impl Tmoctl {
3117 #[doc = "Timeout Detection Time Selection"]
3118 #[inline(always)]
3119 pub fn todts(
3120 self,
3121 ) -> crate::common::RegisterField<
3122 0,
3123 0x3,
3124 1,
3125 0,
3126 tmoctl::Todts,
3127 tmoctl::Todts,
3128 Tmoctl_SPEC,
3129 crate::common::RW,
3130 > {
3131 crate::common::RegisterField::<
3132 0,
3133 0x3,
3134 1,
3135 0,
3136 tmoctl::Todts,
3137 tmoctl::Todts,
3138 Tmoctl_SPEC,
3139 crate::common::RW,
3140 >::from_register(self, 0)
3141 }
3142
3143 #[doc = "Timeout L Count Control"]
3144 #[inline(always)]
3145 pub fn tolctl(
3146 self,
3147 ) -> crate::common::RegisterField<
3148 4,
3149 0x1,
3150 1,
3151 0,
3152 tmoctl::Tolctl,
3153 tmoctl::Tolctl,
3154 Tmoctl_SPEC,
3155 crate::common::RW,
3156 > {
3157 crate::common::RegisterField::<
3158 4,
3159 0x1,
3160 1,
3161 0,
3162 tmoctl::Tolctl,
3163 tmoctl::Tolctl,
3164 Tmoctl_SPEC,
3165 crate::common::RW,
3166 >::from_register(self, 0)
3167 }
3168
3169 #[doc = "Timeout H Count Control"]
3170 #[inline(always)]
3171 pub fn tohctl(
3172 self,
3173 ) -> crate::common::RegisterField<
3174 5,
3175 0x1,
3176 1,
3177 0,
3178 tmoctl::Tohctl,
3179 tmoctl::Tohctl,
3180 Tmoctl_SPEC,
3181 crate::common::RW,
3182 > {
3183 crate::common::RegisterField::<
3184 5,
3185 0x1,
3186 1,
3187 0,
3188 tmoctl::Tohctl,
3189 tmoctl::Tohctl,
3190 Tmoctl_SPEC,
3191 crate::common::RW,
3192 >::from_register(self, 0)
3193 }
3194
3195 #[doc = "Timeout Operation Mode Selection"]
3196 #[inline(always)]
3197 pub fn tomds(
3198 self,
3199 ) -> crate::common::RegisterField<
3200 6,
3201 0x3,
3202 1,
3203 0,
3204 tmoctl::Tomds,
3205 tmoctl::Tomds,
3206 Tmoctl_SPEC,
3207 crate::common::RW,
3208 > {
3209 crate::common::RegisterField::<
3210 6,
3211 0x3,
3212 1,
3213 0,
3214 tmoctl::Tomds,
3215 tmoctl::Tomds,
3216 Tmoctl_SPEC,
3217 crate::common::RW,
3218 >::from_register(self, 0)
3219 }
3220}
3221impl ::core::default::Default for Tmoctl {
3222 #[inline(always)]
3223 fn default() -> Tmoctl {
3224 <crate::RegValueT<Tmoctl_SPEC> as RegisterValue<_>>::new(48)
3225 }
3226}
3227pub mod tmoctl {
3228
3229 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3230 pub struct Todts_SPEC;
3231 pub type Todts = crate::EnumBitfieldStruct<u8, Todts_SPEC>;
3232 impl Todts {
3233 #[doc = "16bit-timeout"]
3234 pub const _00: Self = Self::new(0);
3235
3236 #[doc = "14bit-timeout"]
3237 pub const _01: Self = Self::new(1);
3238
3239 #[doc = "8bit-timeout"]
3240 pub const _10: Self = Self::new(2);
3241
3242 #[doc = "6bit-timeout"]
3243 pub const _11: Self = Self::new(3);
3244 }
3245 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3246 pub struct Tolctl_SPEC;
3247 pub type Tolctl = crate::EnumBitfieldStruct<u8, Tolctl_SPEC>;
3248 impl Tolctl {
3249 #[doc = "Count is disabled while the SCLn line is at a low level."]
3250 pub const _0: Self = Self::new(0);
3251
3252 #[doc = "Count is enabled while the SCLn line is at a low level."]
3253 pub const _1: Self = Self::new(1);
3254 }
3255 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3256 pub struct Tohctl_SPEC;
3257 pub type Tohctl = crate::EnumBitfieldStruct<u8, Tohctl_SPEC>;
3258 impl Tohctl {
3259 #[doc = "Count is disabled while the SCLn line is at a high level."]
3260 pub const _0: Self = Self::new(0);
3261
3262 #[doc = "Count is enabled while the SCLn line is at a high level."]
3263 pub const _1: Self = Self::new(1);
3264 }
3265 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3266 pub struct Tomds_SPEC;
3267 pub type Tomds = crate::EnumBitfieldStruct<u8, Tomds_SPEC>;
3268 impl Tomds {
3269 #[doc = "Timeout is detected during the following conditions: The bus is busy (BCST.BFREF = 0) in master mode.I3C’s own slave address is detected and the bus is busy in slave mode.The bus is free (BCST.BFREF = 1) while generation of a START condition is requested (CNDCTL.STCND = 1)."]
3270 pub const _00: Self = Self::new(0);
3271
3272 #[doc = "Timeout is detected while the bus is busy."]
3273 pub const _01: Self = Self::new(1);
3274
3275 #[doc = "Timeout is detected while the bus is free."]
3276 pub const _10: Self = Self::new(2);
3277
3278 #[doc = "Setting prohibited"]
3279 pub const _11: Self = Self::new(3);
3280 }
3281}
3282#[doc(hidden)]
3283#[derive(Copy, Clone, Eq, PartialEq)]
3284pub struct Ackctl_SPEC;
3285impl crate::sealed::RegSpec for Ackctl_SPEC {
3286 type DataType = u32;
3287}
3288
3289#[doc = "Acknowledge Control Register"]
3290pub type Ackctl = crate::RegValueT<Ackctl_SPEC>;
3291
3292impl Ackctl {
3293 #[doc = "Acknowledge Reception"]
3294 #[inline(always)]
3295 pub fn ackr(
3296 self,
3297 ) -> crate::common::RegisterField<
3298 0,
3299 0x1,
3300 1,
3301 0,
3302 ackctl::Ackr,
3303 ackctl::Ackr,
3304 Ackctl_SPEC,
3305 crate::common::R,
3306 > {
3307 crate::common::RegisterField::<
3308 0,
3309 0x1,
3310 1,
3311 0,
3312 ackctl::Ackr,
3313 ackctl::Ackr,
3314 Ackctl_SPEC,
3315 crate::common::R,
3316 >::from_register(self, 0)
3317 }
3318
3319 #[doc = "Acknowledge Transmission"]
3320 #[inline(always)]
3321 pub fn ackt(
3322 self,
3323 ) -> crate::common::RegisterField<
3324 1,
3325 0x1,
3326 1,
3327 0,
3328 ackctl::Ackt,
3329 ackctl::Ackt,
3330 Ackctl_SPEC,
3331 crate::common::RW,
3332 > {
3333 crate::common::RegisterField::<
3334 1,
3335 0x1,
3336 1,
3337 0,
3338 ackctl::Ackt,
3339 ackctl::Ackt,
3340 Ackctl_SPEC,
3341 crate::common::RW,
3342 >::from_register(self, 0)
3343 }
3344
3345 #[doc = "ACKT Write Protect"]
3346 #[inline(always)]
3347 pub fn acktwp(
3348 self,
3349 ) -> crate::common::RegisterField<
3350 2,
3351 0x1,
3352 1,
3353 0,
3354 ackctl::Acktwp,
3355 ackctl::Acktwp,
3356 Ackctl_SPEC,
3357 crate::common::W,
3358 > {
3359 crate::common::RegisterField::<
3360 2,
3361 0x1,
3362 1,
3363 0,
3364 ackctl::Acktwp,
3365 ackctl::Acktwp,
3366 Ackctl_SPEC,
3367 crate::common::W,
3368 >::from_register(self, 0)
3369 }
3370}
3371impl ::core::default::Default for Ackctl {
3372 #[inline(always)]
3373 fn default() -> Ackctl {
3374 <crate::RegValueT<Ackctl_SPEC> as RegisterValue<_>>::new(0)
3375 }
3376}
3377pub mod ackctl {
3378
3379 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3380 pub struct Ackr_SPEC;
3381 pub type Ackr = crate::EnumBitfieldStruct<u8, Ackr_SPEC>;
3382 impl Ackr {
3383 #[doc = "A 0 is received as the acknowledge bit (ACK reception)."]
3384 pub const _0: Self = Self::new(0);
3385
3386 #[doc = "A 1 is received as the acknowledge bit (NACK reception)."]
3387 pub const _1: Self = Self::new(1);
3388 }
3389 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3390 pub struct Ackt_SPEC;
3391 pub type Ackt = crate::EnumBitfieldStruct<u8, Ackt_SPEC>;
3392 impl Ackt {
3393 #[doc = "A 0 is sent as the acknowledge bit (ACK transmission)."]
3394 pub const _0: Self = Self::new(0);
3395
3396 #[doc = "A 1 is sent as the acknowledge bit (NACK transmission)."]
3397 pub const _1: Self = Self::new(1);
3398 }
3399 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3400 pub struct Acktwp_SPEC;
3401 pub type Acktwp = crate::EnumBitfieldStruct<u8, Acktwp_SPEC>;
3402 impl Acktwp {
3403 #[doc = "The ACKT bit are protected."]
3404 pub const _0: Self = Self::new(0);
3405
3406 #[doc = "The ACKT bit can be written (when writing simultaneously with the value of the target bit). This bit is read as 0."]
3407 pub const _1: Self = Self::new(1);
3408 }
3409}
3410#[doc(hidden)]
3411#[derive(Copy, Clone, Eq, PartialEq)]
3412pub struct Scstrctl_SPEC;
3413impl crate::sealed::RegSpec for Scstrctl_SPEC {
3414 type DataType = u32;
3415}
3416
3417#[doc = "SCL Stretch Control Register"]
3418pub type Scstrctl = crate::RegValueT<Scstrctl_SPEC>;
3419
3420impl Scstrctl {
3421 #[doc = "Acknowledge Transmission Wait Enable"]
3422 #[inline(always)]
3423 pub fn acktwe(
3424 self,
3425 ) -> crate::common::RegisterField<
3426 0,
3427 0x1,
3428 1,
3429 0,
3430 scstrctl::Acktwe,
3431 scstrctl::Acktwe,
3432 Scstrctl_SPEC,
3433 crate::common::RW,
3434 > {
3435 crate::common::RegisterField::<
3436 0,
3437 0x1,
3438 1,
3439 0,
3440 scstrctl::Acktwe,
3441 scstrctl::Acktwe,
3442 Scstrctl_SPEC,
3443 crate::common::RW,
3444 >::from_register(self, 0)
3445 }
3446
3447 #[doc = "Receive Wait Enable"]
3448 #[inline(always)]
3449 pub fn rwe(
3450 self,
3451 ) -> crate::common::RegisterField<
3452 1,
3453 0x1,
3454 1,
3455 0,
3456 scstrctl::Rwe,
3457 scstrctl::Rwe,
3458 Scstrctl_SPEC,
3459 crate::common::RW,
3460 > {
3461 crate::common::RegisterField::<
3462 1,
3463 0x1,
3464 1,
3465 0,
3466 scstrctl::Rwe,
3467 scstrctl::Rwe,
3468 Scstrctl_SPEC,
3469 crate::common::RW,
3470 >::from_register(self, 0)
3471 }
3472}
3473impl ::core::default::Default for Scstrctl {
3474 #[inline(always)]
3475 fn default() -> Scstrctl {
3476 <crate::RegValueT<Scstrctl_SPEC> as RegisterValue<_>>::new(0)
3477 }
3478}
3479pub mod scstrctl {
3480
3481 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3482 pub struct Acktwe_SPEC;
3483 pub type Acktwe = crate::EnumBitfieldStruct<u8, Acktwe_SPEC>;
3484 impl Acktwe {
3485 #[doc = "NTST.RDBFF0 is set at the rising edge of the ninth SCL clock cycle. (The SCLn line is not held low at the falling edge of the eighth clock cycle.)"]
3486 pub const _0: Self = Self::new(0);
3487
3488 #[doc = "NTST.RDBFF0 is set at the rising edge of the eighth SCL clock cycle. (The SCLn line is held low at the falling edge of the eighth clock cycle.) Low-hold is released by writing a value to the ACKCTL.ACKT bit."]
3489 pub const _1: Self = Self::new(1);
3490 }
3491 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3492 pub struct Rwe_SPEC;
3493 pub type Rwe = crate::EnumBitfieldStruct<u8, Rwe_SPEC>;
3494 impl Rwe {
3495 #[doc = "No WAIT (The period between ninth clock cycle and first clock cycle is not held low.)"]
3496 pub const _0: Self = Self::new(0);
3497
3498 #[doc = "WAIT (The period between ninth clock cycle and first clock cycle is held low.) Low-hold is released by reading NTDTBP0."]
3499 pub const _1: Self = Self::new(1);
3500 }
3501}
3502#[doc(hidden)]
3503#[derive(Copy, Clone, Eq, PartialEq)]
3504pub struct Scstlctl_SPEC;
3505impl crate::sealed::RegSpec for Scstlctl_SPEC {
3506 type DataType = u32;
3507}
3508
3509#[doc = "SCL Stalling Control Register"]
3510pub type Scstlctl = crate::RegValueT<Scstlctl_SPEC>;
3511
3512impl Scstlctl {
3513 #[doc = "Stalling Cycle"]
3514 #[inline(always)]
3515 pub fn stlcyc(
3516 self,
3517 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Scstlctl_SPEC, crate::common::RW>
3518 {
3519 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Scstlctl_SPEC,crate::common::RW>::from_register(self,0)
3520 }
3521
3522 #[doc = "Assigned Address Phase Enable"]
3523 #[inline(always)]
3524 pub fn aape(
3525 self,
3526 ) -> crate::common::RegisterField<
3527 28,
3528 0x1,
3529 1,
3530 0,
3531 scstlctl::Aape,
3532 scstlctl::Aape,
3533 Scstlctl_SPEC,
3534 crate::common::RW,
3535 > {
3536 crate::common::RegisterField::<
3537 28,
3538 0x1,
3539 1,
3540 0,
3541 scstlctl::Aape,
3542 scstlctl::Aape,
3543 Scstlctl_SPEC,
3544 crate::common::RW,
3545 >::from_register(self, 0)
3546 }
3547
3548 #[doc = "Transition Phase Enable"]
3549 #[inline(always)]
3550 pub fn trape(
3551 self,
3552 ) -> crate::common::RegisterField<
3553 29,
3554 0x1,
3555 1,
3556 0,
3557 scstlctl::Trape,
3558 scstlctl::Trape,
3559 Scstlctl_SPEC,
3560 crate::common::RW,
3561 > {
3562 crate::common::RegisterField::<
3563 29,
3564 0x1,
3565 1,
3566 0,
3567 scstlctl::Trape,
3568 scstlctl::Trape,
3569 Scstlctl_SPEC,
3570 crate::common::RW,
3571 >::from_register(self, 0)
3572 }
3573
3574 #[doc = "Parity Phase Enable"]
3575 #[inline(always)]
3576 pub fn parpe(
3577 self,
3578 ) -> crate::common::RegisterField<
3579 30,
3580 0x1,
3581 1,
3582 0,
3583 scstlctl::Parpe,
3584 scstlctl::Parpe,
3585 Scstlctl_SPEC,
3586 crate::common::RW,
3587 > {
3588 crate::common::RegisterField::<
3589 30,
3590 0x1,
3591 1,
3592 0,
3593 scstlctl::Parpe,
3594 scstlctl::Parpe,
3595 Scstlctl_SPEC,
3596 crate::common::RW,
3597 >::from_register(self, 0)
3598 }
3599
3600 #[doc = "ACK phase Enable"]
3601 #[inline(always)]
3602 pub fn ackpe(
3603 self,
3604 ) -> crate::common::RegisterField<
3605 31,
3606 0x1,
3607 1,
3608 0,
3609 scstlctl::Ackpe,
3610 scstlctl::Ackpe,
3611 Scstlctl_SPEC,
3612 crate::common::RW,
3613 > {
3614 crate::common::RegisterField::<
3615 31,
3616 0x1,
3617 1,
3618 0,
3619 scstlctl::Ackpe,
3620 scstlctl::Ackpe,
3621 Scstlctl_SPEC,
3622 crate::common::RW,
3623 >::from_register(self, 0)
3624 }
3625}
3626impl ::core::default::Default for Scstlctl {
3627 #[inline(always)]
3628 fn default() -> Scstlctl {
3629 <crate::RegValueT<Scstlctl_SPEC> as RegisterValue<_>>::new(0)
3630 }
3631}
3632pub mod scstlctl {
3633
3634 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3635 pub struct Aape_SPEC;
3636 pub type Aape = crate::EnumBitfieldStruct<u8, Aape_SPEC>;
3637 impl Aape {
3638 #[doc = "Does not stall the SCL clock during the address assignment phase."]
3639 pub const _0: Self = Self::new(0);
3640
3641 #[doc = "Stall the SCL clock during address assignment phase."]
3642 pub const _1: Self = Self::new(1);
3643 }
3644 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3645 pub struct Trape_SPEC;
3646 pub type Trape = crate::EnumBitfieldStruct<u8, Trape_SPEC>;
3647 impl Trape {
3648 #[doc = "Does not stall the SCL clock during the transition bit in read transfer."]
3649 pub const _0: Self = Self::new(0);
3650
3651 #[doc = "Stall the SCL clock during the transition bit in read transfer."]
3652 pub const _1: Self = Self::new(1);
3653 }
3654 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3655 pub struct Parpe_SPEC;
3656 pub type Parpe = crate::EnumBitfieldStruct<u8, Parpe_SPEC>;
3657 impl Parpe {
3658 #[doc = "Does not stall the SCL clock during the parity bit period."]
3659 pub const _0: Self = Self::new(0);
3660
3661 #[doc = "Stall the SCL clock during the parity bit period."]
3662 pub const _1: Self = Self::new(1);
3663 }
3664 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3665 pub struct Ackpe_SPEC;
3666 pub type Ackpe = crate::EnumBitfieldStruct<u8, Ackpe_SPEC>;
3667 impl Ackpe {
3668 #[doc = "Does not stall the SCL clock during the ACK/NACK phase."]
3669 pub const _0: Self = Self::new(0);
3670
3671 #[doc = "Stall the SCL clock during the ACK/NACK phase."]
3672 pub const _1: Self = Self::new(1);
3673 }
3674}
3675#[doc(hidden)]
3676#[derive(Copy, Clone, Eq, PartialEq)]
3677pub struct Svtdlg0_SPEC;
3678impl crate::sealed::RegSpec for Svtdlg0_SPEC {
3679 type DataType = u32;
3680}
3681
3682#[doc = "Slave Transfer Data Length Register 0"]
3683pub type Svtdlg0 = crate::RegValueT<Svtdlg0_SPEC>;
3684
3685impl Svtdlg0 {
3686 #[doc = "Slave Transfer Data Length"]
3687 #[inline(always)]
3688 pub fn stdlg(
3689 self,
3690 ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, u16, Svtdlg0_SPEC, crate::common::RW>
3691 {
3692 crate::common::RegisterField::<16,0xffff,1,0,u16,u16,Svtdlg0_SPEC,crate::common::RW>::from_register(self,0)
3693 }
3694}
3695impl ::core::default::Default for Svtdlg0 {
3696 #[inline(always)]
3697 fn default() -> Svtdlg0 {
3698 <crate::RegValueT<Svtdlg0_SPEC> as RegisterValue<_>>::new(0)
3699 }
3700}
3701
3702#[doc(hidden)]
3703#[derive(Copy, Clone, Eq, PartialEq)]
3704pub struct Cndctl_SPEC;
3705impl crate::sealed::RegSpec for Cndctl_SPEC {
3706 type DataType = u32;
3707}
3708
3709#[doc = "Condition Control Register"]
3710pub type Cndctl = crate::RegValueT<Cndctl_SPEC>;
3711
3712impl Cndctl {
3713 #[doc = "START (S) Condition Issuance"]
3714 #[inline(always)]
3715 pub fn stcnd(
3716 self,
3717 ) -> crate::common::RegisterField<
3718 0,
3719 0x1,
3720 1,
3721 0,
3722 cndctl::Stcnd,
3723 cndctl::Stcnd,
3724 Cndctl_SPEC,
3725 crate::common::RW,
3726 > {
3727 crate::common::RegisterField::<
3728 0,
3729 0x1,
3730 1,
3731 0,
3732 cndctl::Stcnd,
3733 cndctl::Stcnd,
3734 Cndctl_SPEC,
3735 crate::common::RW,
3736 >::from_register(self, 0)
3737 }
3738
3739 #[doc = "Repeated START (Sr) Condition Issuance"]
3740 #[inline(always)]
3741 pub fn srcnd(
3742 self,
3743 ) -> crate::common::RegisterField<
3744 1,
3745 0x1,
3746 1,
3747 0,
3748 cndctl::Srcnd,
3749 cndctl::Srcnd,
3750 Cndctl_SPEC,
3751 crate::common::RW,
3752 > {
3753 crate::common::RegisterField::<
3754 1,
3755 0x1,
3756 1,
3757 0,
3758 cndctl::Srcnd,
3759 cndctl::Srcnd,
3760 Cndctl_SPEC,
3761 crate::common::RW,
3762 >::from_register(self, 0)
3763 }
3764
3765 #[doc = "STOP (P) Condition Issuance"]
3766 #[inline(always)]
3767 pub fn spcnd(
3768 self,
3769 ) -> crate::common::RegisterField<
3770 2,
3771 0x1,
3772 1,
3773 0,
3774 cndctl::Spcnd,
3775 cndctl::Spcnd,
3776 Cndctl_SPEC,
3777 crate::common::RW,
3778 > {
3779 crate::common::RegisterField::<
3780 2,
3781 0x1,
3782 1,
3783 0,
3784 cndctl::Spcnd,
3785 cndctl::Spcnd,
3786 Cndctl_SPEC,
3787 crate::common::RW,
3788 >::from_register(self, 0)
3789 }
3790}
3791impl ::core::default::Default for Cndctl {
3792 #[inline(always)]
3793 fn default() -> Cndctl {
3794 <crate::RegValueT<Cndctl_SPEC> as RegisterValue<_>>::new(0)
3795 }
3796}
3797pub mod cndctl {
3798
3799 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3800 pub struct Stcnd_SPEC;
3801 pub type Stcnd = crate::EnumBitfieldStruct<u8, Stcnd_SPEC>;
3802 impl Stcnd {
3803 #[doc = "Does not request to issue a START condition."]
3804 pub const _0: Self = Self::new(0);
3805
3806 #[doc = "Requests to issue a START condition."]
3807 pub const _1: Self = Self::new(1);
3808 }
3809 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3810 pub struct Srcnd_SPEC;
3811 pub type Srcnd = crate::EnumBitfieldStruct<u8, Srcnd_SPEC>;
3812 impl Srcnd {
3813 #[doc = "Does not request to issue a Repeated START condition."]
3814 pub const _0: Self = Self::new(0);
3815
3816 #[doc = "Requests to issue a Repeated START condition."]
3817 pub const _1: Self = Self::new(1);
3818 }
3819 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3820 pub struct Spcnd_SPEC;
3821 pub type Spcnd = crate::EnumBitfieldStruct<u8, Spcnd_SPEC>;
3822 impl Spcnd {
3823 #[doc = "Does not request to issue a STOP condition."]
3824 pub const _0: Self = Self::new(0);
3825
3826 #[doc = "Requests to issue a STOP condition."]
3827 pub const _1: Self = Self::new(1);
3828 }
3829}
3830#[doc(hidden)]
3831#[derive(Copy, Clone, Eq, PartialEq)]
3832pub struct Ncmdqp_SPEC;
3833impl crate::sealed::RegSpec for Ncmdqp_SPEC {
3834 type DataType = u32;
3835}
3836
3837#[doc = "Normal Command Queue Port Register"]
3838pub type Ncmdqp = crate::RegValueT<Ncmdqp_SPEC>;
3839
3840impl NoBitfieldReg<Ncmdqp_SPEC> for Ncmdqp {}
3841impl ::core::default::Default for Ncmdqp {
3842 #[inline(always)]
3843 fn default() -> Ncmdqp {
3844 <crate::RegValueT<Ncmdqp_SPEC> as RegisterValue<_>>::new(0)
3845 }
3846}
3847
3848#[doc(hidden)]
3849#[derive(Copy, Clone, Eq, PartialEq)]
3850pub struct Nrspqp_SPEC;
3851impl crate::sealed::RegSpec for Nrspqp_SPEC {
3852 type DataType = u32;
3853}
3854
3855#[doc = "Normal Response Queue Port Register"]
3856pub type Nrspqp = crate::RegValueT<Nrspqp_SPEC>;
3857
3858impl NoBitfieldReg<Nrspqp_SPEC> for Nrspqp {}
3859impl ::core::default::Default for Nrspqp {
3860 #[inline(always)]
3861 fn default() -> Nrspqp {
3862 <crate::RegValueT<Nrspqp_SPEC> as RegisterValue<_>>::new(0)
3863 }
3864}
3865
3866#[doc(hidden)]
3867#[derive(Copy, Clone, Eq, PartialEq)]
3868pub struct Ntdtbp0_SPEC;
3869impl crate::sealed::RegSpec for Ntdtbp0_SPEC {
3870 type DataType = u32;
3871}
3872
3873#[doc = "Normal Transfer Data Buffer Port Register 0"]
3874pub type Ntdtbp0 = crate::RegValueT<Ntdtbp0_SPEC>;
3875
3876impl NoBitfieldReg<Ntdtbp0_SPEC> for Ntdtbp0 {}
3877impl ::core::default::Default for Ntdtbp0 {
3878 #[inline(always)]
3879 fn default() -> Ntdtbp0 {
3880 <crate::RegValueT<Ntdtbp0_SPEC> as RegisterValue<_>>::new(0)
3881 }
3882}
3883
3884#[doc(hidden)]
3885#[derive(Copy, Clone, Eq, PartialEq)]
3886pub struct Ntdtbp0By_SPEC;
3887impl crate::sealed::RegSpec for Ntdtbp0By_SPEC {
3888 type DataType = u8;
3889}
3890
3891#[doc = "Normal Transfer Data Buffer Port Register 0"]
3892pub type Ntdtbp0By = crate::RegValueT<Ntdtbp0By_SPEC>;
3893
3894impl NoBitfieldReg<Ntdtbp0By_SPEC> for Ntdtbp0By {}
3895impl ::core::default::Default for Ntdtbp0By {
3896 #[inline(always)]
3897 fn default() -> Ntdtbp0By {
3898 <crate::RegValueT<Ntdtbp0By_SPEC> as RegisterValue<_>>::new(0)
3899 }
3900}
3901
3902#[doc(hidden)]
3903#[derive(Copy, Clone, Eq, PartialEq)]
3904pub struct Nibiqp_SPEC;
3905impl crate::sealed::RegSpec for Nibiqp_SPEC {
3906 type DataType = u32;
3907}
3908
3909#[doc = "Normal IBI Queue Port Register"]
3910pub type Nibiqp = crate::RegValueT<Nibiqp_SPEC>;
3911
3912impl NoBitfieldReg<Nibiqp_SPEC> for Nibiqp {}
3913impl ::core::default::Default for Nibiqp {
3914 #[inline(always)]
3915 fn default() -> Nibiqp {
3916 <crate::RegValueT<Nibiqp_SPEC> as RegisterValue<_>>::new(0)
3917 }
3918}
3919
3920#[doc(hidden)]
3921#[derive(Copy, Clone, Eq, PartialEq)]
3922pub struct Nrsqp_SPEC;
3923impl crate::sealed::RegSpec for Nrsqp_SPEC {
3924 type DataType = u32;
3925}
3926
3927#[doc = "Normal Receive Status Queue Port Register"]
3928pub type Nrsqp = crate::RegValueT<Nrsqp_SPEC>;
3929
3930impl NoBitfieldReg<Nrsqp_SPEC> for Nrsqp {}
3931impl ::core::default::Default for Nrsqp {
3932 #[inline(always)]
3933 fn default() -> Nrsqp {
3934 <crate::RegValueT<Nrsqp_SPEC> as RegisterValue<_>>::new(0)
3935 }
3936}
3937
3938#[doc(hidden)]
3939#[derive(Copy, Clone, Eq, PartialEq)]
3940pub struct Nqthctl_SPEC;
3941impl crate::sealed::RegSpec for Nqthctl_SPEC {
3942 type DataType = u32;
3943}
3944
3945#[doc = "Normal Queue Threshold Control Register"]
3946pub type Nqthctl = crate::RegValueT<Nqthctl_SPEC>;
3947
3948impl Nqthctl {
3949 #[doc = "Normal Command Ready Queue Threshold"]
3950 #[inline(always)]
3951 pub fn cmdqth(
3952 self,
3953 ) -> crate::common::RegisterField<
3954 0,
3955 0xff,
3956 1,
3957 0,
3958 nqthctl::Cmdqth,
3959 nqthctl::Cmdqth,
3960 Nqthctl_SPEC,
3961 crate::common::RW,
3962 > {
3963 crate::common::RegisterField::<
3964 0,
3965 0xff,
3966 1,
3967 0,
3968 nqthctl::Cmdqth,
3969 nqthctl::Cmdqth,
3970 Nqthctl_SPEC,
3971 crate::common::RW,
3972 >::from_register(self, 0)
3973 }
3974
3975 #[doc = "Normal Response Queue Threshold"]
3976 #[inline(always)]
3977 pub fn rspqth(
3978 self,
3979 ) -> crate::common::RegisterField<
3980 8,
3981 0xff,
3982 1,
3983 0,
3984 nqthctl::Rspqth,
3985 nqthctl::Rspqth,
3986 Nqthctl_SPEC,
3987 crate::common::RW,
3988 > {
3989 crate::common::RegisterField::<
3990 8,
3991 0xff,
3992 1,
3993 0,
3994 nqthctl::Rspqth,
3995 nqthctl::Rspqth,
3996 Nqthctl_SPEC,
3997 crate::common::RW,
3998 >::from_register(self, 0)
3999 }
4000
4001 #[doc = "Normal IBI Data Segment Size"]
4002 #[inline(always)]
4003 pub fn ibidssz(
4004 self,
4005 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Nqthctl_SPEC, crate::common::RW> {
4006 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Nqthctl_SPEC,crate::common::RW>::from_register(self,0)
4007 }
4008
4009 #[doc = "Normal IBI Queue Threshold"]
4010 #[inline(always)]
4011 pub fn ibiqth(
4012 self,
4013 ) -> crate::common::RegisterField<
4014 24,
4015 0xff,
4016 1,
4017 0,
4018 nqthctl::Ibiqth,
4019 nqthctl::Ibiqth,
4020 Nqthctl_SPEC,
4021 crate::common::RW,
4022 > {
4023 crate::common::RegisterField::<
4024 24,
4025 0xff,
4026 1,
4027 0,
4028 nqthctl::Ibiqth,
4029 nqthctl::Ibiqth,
4030 Nqthctl_SPEC,
4031 crate::common::RW,
4032 >::from_register(self, 0)
4033 }
4034}
4035impl ::core::default::Default for Nqthctl {
4036 #[inline(always)]
4037 fn default() -> Nqthctl {
4038 <crate::RegValueT<Nqthctl_SPEC> as RegisterValue<_>>::new(16843009)
4039 }
4040}
4041pub mod nqthctl {
4042
4043 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4044 pub struct Cmdqth_SPEC;
4045 pub type Cmdqth = crate::EnumBitfieldStruct<u8, Cmdqth_SPEC>;
4046 impl Cmdqth {
4047 #[doc = "Interrupt is issued when Command Queue is completely empty."]
4048 pub const _0_X_00: Self = Self::new(0);
4049 }
4050 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4051 pub struct Rspqth_SPEC;
4052 pub type Rspqth = crate::EnumBitfieldStruct<u8, Rspqth_SPEC>;
4053 impl Rspqth {
4054 #[doc = "Interrupt is issued when Response Queue contains 1 entry (DWORD)."]
4055 pub const _0_X_00: Self = Self::new(0);
4056 }
4057 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4058 pub struct Ibiqth_SPEC;
4059 pub type Ibiqth = crate::EnumBitfieldStruct<u8, Ibiqth_SPEC>;
4060 impl Ibiqth {
4061 #[doc = "I3C Protocol mode (Master): Interrupt is generated when the Outstanding IBI Status count is 1 or more. I3C Protocol mode (Slave): Interrupt is issued when IBI Data Buffer is completely empty."]
4062 pub const _0_X_00: Self = Self::new(0);
4063 }
4064}
4065#[doc(hidden)]
4066#[derive(Copy, Clone, Eq, PartialEq)]
4067pub struct Ntbthctl0_SPEC;
4068impl crate::sealed::RegSpec for Ntbthctl0_SPEC {
4069 type DataType = u32;
4070}
4071
4072#[doc = "Normal Transfer Data Buffer Threshold Control Register 0"]
4073pub type Ntbthctl0 = crate::RegValueT<Ntbthctl0_SPEC>;
4074
4075impl Ntbthctl0 {
4076 #[doc = "Normal Transmit Data Buffer Threshold"]
4077 #[inline(always)]
4078 pub fn txdbth(
4079 self,
4080 ) -> crate::common::RegisterField<
4081 0,
4082 0x7,
4083 1,
4084 0,
4085 ntbthctl0::Txdbth,
4086 ntbthctl0::Txdbth,
4087 Ntbthctl0_SPEC,
4088 crate::common::RW,
4089 > {
4090 crate::common::RegisterField::<
4091 0,
4092 0x7,
4093 1,
4094 0,
4095 ntbthctl0::Txdbth,
4096 ntbthctl0::Txdbth,
4097 Ntbthctl0_SPEC,
4098 crate::common::RW,
4099 >::from_register(self, 0)
4100 }
4101
4102 #[doc = "Normal Receive Data Buffer Threshold"]
4103 #[inline(always)]
4104 pub fn rxdbth(
4105 self,
4106 ) -> crate::common::RegisterField<
4107 8,
4108 0x7,
4109 1,
4110 0,
4111 ntbthctl0::Rxdbth,
4112 ntbthctl0::Rxdbth,
4113 Ntbthctl0_SPEC,
4114 crate::common::RW,
4115 > {
4116 crate::common::RegisterField::<
4117 8,
4118 0x7,
4119 1,
4120 0,
4121 ntbthctl0::Rxdbth,
4122 ntbthctl0::Rxdbth,
4123 Ntbthctl0_SPEC,
4124 crate::common::RW,
4125 >::from_register(self, 0)
4126 }
4127
4128 #[doc = "Normal Tx Start Threshold"]
4129 #[inline(always)]
4130 pub fn txstth(
4131 self,
4132 ) -> crate::common::RegisterField<
4133 16,
4134 0x7,
4135 1,
4136 0,
4137 ntbthctl0::Txstth,
4138 ntbthctl0::Txstth,
4139 Ntbthctl0_SPEC,
4140 crate::common::RW,
4141 > {
4142 crate::common::RegisterField::<
4143 16,
4144 0x7,
4145 1,
4146 0,
4147 ntbthctl0::Txstth,
4148 ntbthctl0::Txstth,
4149 Ntbthctl0_SPEC,
4150 crate::common::RW,
4151 >::from_register(self, 0)
4152 }
4153
4154 #[doc = "Normal Rx Start Threshold"]
4155 #[inline(always)]
4156 pub fn rxstth(
4157 self,
4158 ) -> crate::common::RegisterField<
4159 24,
4160 0x7,
4161 1,
4162 0,
4163 ntbthctl0::Rxstth,
4164 ntbthctl0::Rxstth,
4165 Ntbthctl0_SPEC,
4166 crate::common::RW,
4167 > {
4168 crate::common::RegisterField::<
4169 24,
4170 0x7,
4171 1,
4172 0,
4173 ntbthctl0::Rxstth,
4174 ntbthctl0::Rxstth,
4175 Ntbthctl0_SPEC,
4176 crate::common::RW,
4177 >::from_register(self, 0)
4178 }
4179}
4180impl ::core::default::Default for Ntbthctl0 {
4181 #[inline(always)]
4182 fn default() -> Ntbthctl0 {
4183 <crate::RegValueT<Ntbthctl0_SPEC> as RegisterValue<_>>::new(16843009)
4184 }
4185}
4186pub mod ntbthctl0 {
4187
4188 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4189 pub struct Txdbth_SPEC;
4190 pub type Txdbth = crate::EnumBitfieldStruct<u8, Txdbth_SPEC>;
4191 impl Txdbth {
4192 #[doc = "Interrupt triggers at 2 Tx Buffer empties, DWORDs"]
4193 pub const _000: Self = Self::new(0);
4194
4195 #[doc = "Reserved"]
4196 pub const _001: Self = Self::new(1);
4197 }
4198 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4199 pub struct Rxdbth_SPEC;
4200 pub type Rxdbth = crate::EnumBitfieldStruct<u8, Rxdbth_SPEC>;
4201 impl Rxdbth {
4202 #[doc = "Interrupt triggers at 2 Rx Buffer entries, DWORDs"]
4203 pub const _000: Self = Self::new(0);
4204
4205 #[doc = "Reserved"]
4206 pub const _001: Self = Self::new(1);
4207 }
4208 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4209 pub struct Txstth_SPEC;
4210 pub type Txstth = crate::EnumBitfieldStruct<u8, Txstth_SPEC>;
4211 impl Txstth {
4212 #[doc = "Wait for 2 DWORDs"]
4213 pub const _000: Self = Self::new(0);
4214
4215 #[doc = "Reserved"]
4216 pub const _001: Self = Self::new(1);
4217 }
4218 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4219 pub struct Rxstth_SPEC;
4220 pub type Rxstth = crate::EnumBitfieldStruct<u8, Rxstth_SPEC>;
4221 impl Rxstth {
4222 #[doc = "Wait for 2 empty DWORDs"]
4223 pub const _000: Self = Self::new(0);
4224
4225 #[doc = "Reserved"]
4226 pub const _001: Self = Self::new(1);
4227 }
4228}
4229#[doc(hidden)]
4230#[derive(Copy, Clone, Eq, PartialEq)]
4231pub struct Nrqthctl_SPEC;
4232impl crate::sealed::RegSpec for Nrqthctl_SPEC {
4233 type DataType = u32;
4234}
4235
4236#[doc = "Normal Receive Status Queue Threshold Control Register"]
4237pub type Nrqthctl = crate::RegValueT<Nrqthctl_SPEC>;
4238
4239impl Nrqthctl {
4240 #[doc = "Normal Receive Status Queue Threshold"]
4241 #[inline(always)]
4242 pub fn rsqth(
4243 self,
4244 ) -> crate::common::RegisterField<
4245 0,
4246 0xff,
4247 1,
4248 0,
4249 nrqthctl::Rsqth,
4250 nrqthctl::Rsqth,
4251 Nrqthctl_SPEC,
4252 crate::common::RW,
4253 > {
4254 crate::common::RegisterField::<
4255 0,
4256 0xff,
4257 1,
4258 0,
4259 nrqthctl::Rsqth,
4260 nrqthctl::Rsqth,
4261 Nrqthctl_SPEC,
4262 crate::common::RW,
4263 >::from_register(self, 0)
4264 }
4265}
4266impl ::core::default::Default for Nrqthctl {
4267 #[inline(always)]
4268 fn default() -> Nrqthctl {
4269 <crate::RegValueT<Nrqthctl_SPEC> as RegisterValue<_>>::new(1)
4270 }
4271}
4272pub mod nrqthctl {
4273
4274 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4275 pub struct Rsqth_SPEC;
4276 pub type Rsqth = crate::EnumBitfieldStruct<u8, Rsqth_SPEC>;
4277 impl Rsqth {
4278 #[doc = "Interrupt is issued when Receive Status Queue contains 1 entry (DWORD)."]
4279 pub const _0_X_00: Self = Self::new(0);
4280 }
4281}
4282#[doc(hidden)]
4283#[derive(Copy, Clone, Eq, PartialEq)]
4284pub struct Bst_SPEC;
4285impl crate::sealed::RegSpec for Bst_SPEC {
4286 type DataType = u32;
4287}
4288
4289#[doc = "Bus Status Register"]
4290pub type Bst = crate::RegValueT<Bst_SPEC>;
4291
4292impl Bst {
4293 #[doc = "START Condition Detection Flag"]
4294 #[inline(always)]
4295 pub fn stcnddf(
4296 self,
4297 ) -> crate::common::RegisterField<
4298 0,
4299 0x1,
4300 1,
4301 0,
4302 bst::Stcnddf,
4303 bst::Stcnddf,
4304 Bst_SPEC,
4305 crate::common::RW,
4306 > {
4307 crate::common::RegisterField::<
4308 0,
4309 0x1,
4310 1,
4311 0,
4312 bst::Stcnddf,
4313 bst::Stcnddf,
4314 Bst_SPEC,
4315 crate::common::RW,
4316 >::from_register(self, 0)
4317 }
4318
4319 #[doc = "STOP Condition Detection Flag"]
4320 #[inline(always)]
4321 pub fn spcnddf(
4322 self,
4323 ) -> crate::common::RegisterField<
4324 1,
4325 0x1,
4326 1,
4327 0,
4328 bst::Spcnddf,
4329 bst::Spcnddf,
4330 Bst_SPEC,
4331 crate::common::RW,
4332 > {
4333 crate::common::RegisterField::<
4334 1,
4335 0x1,
4336 1,
4337 0,
4338 bst::Spcnddf,
4339 bst::Spcnddf,
4340 Bst_SPEC,
4341 crate::common::RW,
4342 >::from_register(self, 0)
4343 }
4344
4345 #[doc = "HDR Exit Pattern Detection Flag"]
4346 #[inline(always)]
4347 pub fn hdrexdf(
4348 self,
4349 ) -> crate::common::RegisterField<
4350 2,
4351 0x1,
4352 1,
4353 0,
4354 bst::Hdrexdf,
4355 bst::Hdrexdf,
4356 Bst_SPEC,
4357 crate::common::RW,
4358 > {
4359 crate::common::RegisterField::<
4360 2,
4361 0x1,
4362 1,
4363 0,
4364 bst::Hdrexdf,
4365 bst::Hdrexdf,
4366 Bst_SPEC,
4367 crate::common::RW,
4368 >::from_register(self, 0)
4369 }
4370
4371 #[doc = "NACK Detection Flag"]
4372 #[inline(always)]
4373 pub fn nackdf(
4374 self,
4375 ) -> crate::common::RegisterField<
4376 4,
4377 0x1,
4378 1,
4379 0,
4380 bst::Nackdf,
4381 bst::Nackdf,
4382 Bst_SPEC,
4383 crate::common::RW,
4384 > {
4385 crate::common::RegisterField::<
4386 4,
4387 0x1,
4388 1,
4389 0,
4390 bst::Nackdf,
4391 bst::Nackdf,
4392 Bst_SPEC,
4393 crate::common::RW,
4394 >::from_register(self, 0)
4395 }
4396
4397 #[doc = "Transmit End Flag"]
4398 #[inline(always)]
4399 pub fn tendf(
4400 self,
4401 ) -> crate::common::RegisterField<
4402 8,
4403 0x1,
4404 1,
4405 0,
4406 bst::Tendf,
4407 bst::Tendf,
4408 Bst_SPEC,
4409 crate::common::RW,
4410 > {
4411 crate::common::RegisterField::<
4412 8,
4413 0x1,
4414 1,
4415 0,
4416 bst::Tendf,
4417 bst::Tendf,
4418 Bst_SPEC,
4419 crate::common::RW,
4420 >::from_register(self, 0)
4421 }
4422
4423 #[doc = "Arbitration Lost Flag"]
4424 #[inline(always)]
4425 pub fn alf(
4426 self,
4427 ) -> crate::common::RegisterField<16, 0x1, 1, 0, bst::Alf, bst::Alf, Bst_SPEC, crate::common::RW>
4428 {
4429 crate::common::RegisterField::<16,0x1,1,0,bst::Alf,bst::Alf,Bst_SPEC,crate::common::RW>::from_register(self,0)
4430 }
4431
4432 #[doc = "Timeout Detection Flag"]
4433 #[inline(always)]
4434 pub fn todf(
4435 self,
4436 ) -> crate::common::RegisterField<
4437 20,
4438 0x1,
4439 1,
4440 0,
4441 bst::Todf,
4442 bst::Todf,
4443 Bst_SPEC,
4444 crate::common::RW,
4445 > {
4446 crate::common::RegisterField::<
4447 20,
4448 0x1,
4449 1,
4450 0,
4451 bst::Todf,
4452 bst::Todf,
4453 Bst_SPEC,
4454 crate::common::RW,
4455 >::from_register(self, 0)
4456 }
4457}
4458impl ::core::default::Default for Bst {
4459 #[inline(always)]
4460 fn default() -> Bst {
4461 <crate::RegValueT<Bst_SPEC> as RegisterValue<_>>::new(0)
4462 }
4463}
4464pub mod bst {
4465
4466 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4467 pub struct Stcnddf_SPEC;
4468 pub type Stcnddf = crate::EnumBitfieldStruct<u8, Stcnddf_SPEC>;
4469 impl Stcnddf {
4470 #[doc = "START condition is not detected."]
4471 pub const _0: Self = Self::new(0);
4472
4473 #[doc = "START condition is detected."]
4474 pub const _1: Self = Self::new(1);
4475 }
4476 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4477 pub struct Spcnddf_SPEC;
4478 pub type Spcnddf = crate::EnumBitfieldStruct<u8, Spcnddf_SPEC>;
4479 impl Spcnddf {
4480 #[doc = "STOP condition is not detected."]
4481 pub const _0: Self = Self::new(0);
4482
4483 #[doc = "STOP condition is detected."]
4484 pub const _1: Self = Self::new(1);
4485 }
4486 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4487 pub struct Hdrexdf_SPEC;
4488 pub type Hdrexdf = crate::EnumBitfieldStruct<u8, Hdrexdf_SPEC>;
4489 impl Hdrexdf {
4490 #[doc = "HDR Exit Pattern Detection Interrupt does not occur."]
4491 pub const _0: Self = Self::new(0);
4492
4493 #[doc = "HDR Exit Pattern Detection Interrupt occurs."]
4494 pub const _1: Self = Self::new(1);
4495 }
4496 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4497 pub struct Nackdf_SPEC;
4498 pub type Nackdf = crate::EnumBitfieldStruct<u8, Nackdf_SPEC>;
4499 impl Nackdf {
4500 #[doc = "NACK is not detected."]
4501 pub const _0: Self = Self::new(0);
4502
4503 #[doc = "NACK is detected."]
4504 pub const _1: Self = Self::new(1);
4505 }
4506 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4507 pub struct Tendf_SPEC;
4508 pub type Tendf = crate::EnumBitfieldStruct<u8, Tendf_SPEC>;
4509 impl Tendf {
4510 #[doc = "Data is being transmitted."]
4511 pub const _0: Self = Self::new(0);
4512
4513 #[doc = "Data has been transmitted."]
4514 pub const _1: Self = Self::new(1);
4515 }
4516 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4517 pub struct Alf_SPEC;
4518 pub type Alf = crate::EnumBitfieldStruct<u8, Alf_SPEC>;
4519 impl Alf {
4520 #[doc = "Arbitration is not lost"]
4521 pub const _0: Self = Self::new(0);
4522
4523 #[doc = "Arbitration is lost."]
4524 pub const _1: Self = Self::new(1);
4525 }
4526 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4527 pub struct Todf_SPEC;
4528 pub type Todf = crate::EnumBitfieldStruct<u8, Todf_SPEC>;
4529 impl Todf {
4530 #[doc = "Timeout is not detected."]
4531 pub const _0: Self = Self::new(0);
4532
4533 #[doc = "Timeout is detected."]
4534 pub const _1: Self = Self::new(1);
4535 }
4536}
4537#[doc(hidden)]
4538#[derive(Copy, Clone, Eq, PartialEq)]
4539pub struct Bste_SPEC;
4540impl crate::sealed::RegSpec for Bste_SPEC {
4541 type DataType = u32;
4542}
4543
4544#[doc = "Bus Status Enable Register"]
4545pub type Bste = crate::RegValueT<Bste_SPEC>;
4546
4547impl Bste {
4548 #[doc = "START Condition Detection Enable"]
4549 #[inline(always)]
4550 pub fn stcndde(
4551 self,
4552 ) -> crate::common::RegisterField<
4553 0,
4554 0x1,
4555 1,
4556 0,
4557 bste::Stcndde,
4558 bste::Stcndde,
4559 Bste_SPEC,
4560 crate::common::RW,
4561 > {
4562 crate::common::RegisterField::<
4563 0,
4564 0x1,
4565 1,
4566 0,
4567 bste::Stcndde,
4568 bste::Stcndde,
4569 Bste_SPEC,
4570 crate::common::RW,
4571 >::from_register(self, 0)
4572 }
4573
4574 #[doc = "STOP Condition Detection Enable"]
4575 #[inline(always)]
4576 pub fn spcndde(
4577 self,
4578 ) -> crate::common::RegisterField<
4579 1,
4580 0x1,
4581 1,
4582 0,
4583 bste::Spcndde,
4584 bste::Spcndde,
4585 Bste_SPEC,
4586 crate::common::RW,
4587 > {
4588 crate::common::RegisterField::<
4589 1,
4590 0x1,
4591 1,
4592 0,
4593 bste::Spcndde,
4594 bste::Spcndde,
4595 Bste_SPEC,
4596 crate::common::RW,
4597 >::from_register(self, 0)
4598 }
4599
4600 #[doc = "HDR Exit Pattern Detection Enable"]
4601 #[inline(always)]
4602 pub fn hdrexde(
4603 self,
4604 ) -> crate::common::RegisterField<
4605 2,
4606 0x1,
4607 1,
4608 0,
4609 bste::Hdrexde,
4610 bste::Hdrexde,
4611 Bste_SPEC,
4612 crate::common::RW,
4613 > {
4614 crate::common::RegisterField::<
4615 2,
4616 0x1,
4617 1,
4618 0,
4619 bste::Hdrexde,
4620 bste::Hdrexde,
4621 Bste_SPEC,
4622 crate::common::RW,
4623 >::from_register(self, 0)
4624 }
4625
4626 #[doc = "NACK Detection Enable"]
4627 #[inline(always)]
4628 pub fn nackde(
4629 self,
4630 ) -> crate::common::RegisterField<
4631 4,
4632 0x1,
4633 1,
4634 0,
4635 bste::Nackde,
4636 bste::Nackde,
4637 Bste_SPEC,
4638 crate::common::RW,
4639 > {
4640 crate::common::RegisterField::<
4641 4,
4642 0x1,
4643 1,
4644 0,
4645 bste::Nackde,
4646 bste::Nackde,
4647 Bste_SPEC,
4648 crate::common::RW,
4649 >::from_register(self, 0)
4650 }
4651
4652 #[doc = "Transmit End Enable"]
4653 #[inline(always)]
4654 pub fn tende(
4655 self,
4656 ) -> crate::common::RegisterField<
4657 8,
4658 0x1,
4659 1,
4660 0,
4661 bste::Tende,
4662 bste::Tende,
4663 Bste_SPEC,
4664 crate::common::RW,
4665 > {
4666 crate::common::RegisterField::<
4667 8,
4668 0x1,
4669 1,
4670 0,
4671 bste::Tende,
4672 bste::Tende,
4673 Bste_SPEC,
4674 crate::common::RW,
4675 >::from_register(self, 0)
4676 }
4677
4678 #[doc = "Arbitration Lost Enable"]
4679 #[inline(always)]
4680 pub fn ale(
4681 self,
4682 ) -> crate::common::RegisterField<
4683 16,
4684 0x1,
4685 1,
4686 0,
4687 bste::Ale,
4688 bste::Ale,
4689 Bste_SPEC,
4690 crate::common::RW,
4691 > {
4692 crate::common::RegisterField::<
4693 16,
4694 0x1,
4695 1,
4696 0,
4697 bste::Ale,
4698 bste::Ale,
4699 Bste_SPEC,
4700 crate::common::RW,
4701 >::from_register(self, 0)
4702 }
4703
4704 #[doc = "Timeout Detection Enable"]
4705 #[inline(always)]
4706 pub fn tode(
4707 self,
4708 ) -> crate::common::RegisterField<
4709 20,
4710 0x1,
4711 1,
4712 0,
4713 bste::Tode,
4714 bste::Tode,
4715 Bste_SPEC,
4716 crate::common::RW,
4717 > {
4718 crate::common::RegisterField::<
4719 20,
4720 0x1,
4721 1,
4722 0,
4723 bste::Tode,
4724 bste::Tode,
4725 Bste_SPEC,
4726 crate::common::RW,
4727 >::from_register(self, 0)
4728 }
4729}
4730impl ::core::default::Default for Bste {
4731 #[inline(always)]
4732 fn default() -> Bste {
4733 <crate::RegValueT<Bste_SPEC> as RegisterValue<_>>::new(0)
4734 }
4735}
4736pub mod bste {
4737
4738 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4739 pub struct Stcndde_SPEC;
4740 pub type Stcndde = crate::EnumBitfieldStruct<u8, Stcndde_SPEC>;
4741 impl Stcndde {
4742 #[doc = "Disables START condition Detection Interrupt Status logging."]
4743 pub const _0: Self = Self::new(0);
4744
4745 #[doc = "Enables START condition Detection Interrupt Status logging."]
4746 pub const _1: Self = Self::new(1);
4747 }
4748 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4749 pub struct Spcndde_SPEC;
4750 pub type Spcndde = crate::EnumBitfieldStruct<u8, Spcndde_SPEC>;
4751 impl Spcndde {
4752 #[doc = "Disables STOP condition Detection Interrupt Status logging."]
4753 pub const _0: Self = Self::new(0);
4754
4755 #[doc = "Enables STOP condition Detection Interrupt Status logging."]
4756 pub const _1: Self = Self::new(1);
4757 }
4758 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4759 pub struct Hdrexde_SPEC;
4760 pub type Hdrexde = crate::EnumBitfieldStruct<u8, Hdrexde_SPEC>;
4761 impl Hdrexde {
4762 #[doc = "Disables HDR Exit Pattern Detection Interrupt Status logging."]
4763 pub const _0: Self = Self::new(0);
4764
4765 #[doc = "Enables HDR Exit Pattern Detection Interrupt Status logging."]
4766 pub const _1: Self = Self::new(1);
4767 }
4768 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4769 pub struct Nackde_SPEC;
4770 pub type Nackde = crate::EnumBitfieldStruct<u8, Nackde_SPEC>;
4771 impl Nackde {
4772 #[doc = "Disables NACK Detection Interrupt Status logging."]
4773 pub const _0: Self = Self::new(0);
4774
4775 #[doc = "Enables NACK Detection Interrupt Status logging."]
4776 pub const _1: Self = Self::new(1);
4777 }
4778 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4779 pub struct Tende_SPEC;
4780 pub type Tende = crate::EnumBitfieldStruct<u8, Tende_SPEC>;
4781 impl Tende {
4782 #[doc = "Disables Transmit End Interrupt Status logging."]
4783 pub const _0: Self = Self::new(0);
4784
4785 #[doc = "Enables Transmit End Interrupt Status logging."]
4786 pub const _1: Self = Self::new(1);
4787 }
4788 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4789 pub struct Ale_SPEC;
4790 pub type Ale = crate::EnumBitfieldStruct<u8, Ale_SPEC>;
4791 impl Ale {
4792 #[doc = "Disables Arbitration Lost Interrupt Status logging."]
4793 pub const _0: Self = Self::new(0);
4794
4795 #[doc = "Enables Arbitration Lost Interrupt Status logging."]
4796 pub const _1: Self = Self::new(1);
4797 }
4798 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4799 pub struct Tode_SPEC;
4800 pub type Tode = crate::EnumBitfieldStruct<u8, Tode_SPEC>;
4801 impl Tode {
4802 #[doc = "Disables Timeout Detection Interrupt Status logging."]
4803 pub const _0: Self = Self::new(0);
4804
4805 #[doc = "Enables Timeout Detection Interrupt Status logging."]
4806 pub const _1: Self = Self::new(1);
4807 }
4808}
4809#[doc(hidden)]
4810#[derive(Copy, Clone, Eq, PartialEq)]
4811pub struct Bie_SPEC;
4812impl crate::sealed::RegSpec for Bie_SPEC {
4813 type DataType = u32;
4814}
4815
4816#[doc = "Bus Interrupt Enable Register"]
4817pub type Bie = crate::RegValueT<Bie_SPEC>;
4818
4819impl Bie {
4820 #[doc = "START Condition Detection Interrupt Enable"]
4821 #[inline(always)]
4822 pub fn stcnddie(
4823 self,
4824 ) -> crate::common::RegisterField<
4825 0,
4826 0x1,
4827 1,
4828 0,
4829 bie::Stcnddie,
4830 bie::Stcnddie,
4831 Bie_SPEC,
4832 crate::common::RW,
4833 > {
4834 crate::common::RegisterField::<
4835 0,
4836 0x1,
4837 1,
4838 0,
4839 bie::Stcnddie,
4840 bie::Stcnddie,
4841 Bie_SPEC,
4842 crate::common::RW,
4843 >::from_register(self, 0)
4844 }
4845
4846 #[doc = "STOP Condition Detection Interrupt Enable"]
4847 #[inline(always)]
4848 pub fn spcnddie(
4849 self,
4850 ) -> crate::common::RegisterField<
4851 1,
4852 0x1,
4853 1,
4854 0,
4855 bie::Spcnddie,
4856 bie::Spcnddie,
4857 Bie_SPEC,
4858 crate::common::RW,
4859 > {
4860 crate::common::RegisterField::<
4861 1,
4862 0x1,
4863 1,
4864 0,
4865 bie::Spcnddie,
4866 bie::Spcnddie,
4867 Bie_SPEC,
4868 crate::common::RW,
4869 >::from_register(self, 0)
4870 }
4871
4872 #[doc = "HDR Exit Pattern Detection Interrupt Enable"]
4873 #[inline(always)]
4874 pub fn hdrexdie(
4875 self,
4876 ) -> crate::common::RegisterField<
4877 2,
4878 0x1,
4879 1,
4880 0,
4881 bie::Hdrexdie,
4882 bie::Hdrexdie,
4883 Bie_SPEC,
4884 crate::common::RW,
4885 > {
4886 crate::common::RegisterField::<
4887 2,
4888 0x1,
4889 1,
4890 0,
4891 bie::Hdrexdie,
4892 bie::Hdrexdie,
4893 Bie_SPEC,
4894 crate::common::RW,
4895 >::from_register(self, 0)
4896 }
4897
4898 #[doc = "NACK Detection Interrupt Enable"]
4899 #[inline(always)]
4900 pub fn nackdie(
4901 self,
4902 ) -> crate::common::RegisterField<
4903 4,
4904 0x1,
4905 1,
4906 0,
4907 bie::Nackdie,
4908 bie::Nackdie,
4909 Bie_SPEC,
4910 crate::common::RW,
4911 > {
4912 crate::common::RegisterField::<
4913 4,
4914 0x1,
4915 1,
4916 0,
4917 bie::Nackdie,
4918 bie::Nackdie,
4919 Bie_SPEC,
4920 crate::common::RW,
4921 >::from_register(self, 0)
4922 }
4923
4924 #[doc = "Transmit End Interrupt Enable"]
4925 #[inline(always)]
4926 pub fn tendie(
4927 self,
4928 ) -> crate::common::RegisterField<
4929 8,
4930 0x1,
4931 1,
4932 0,
4933 bie::Tendie,
4934 bie::Tendie,
4935 Bie_SPEC,
4936 crate::common::RW,
4937 > {
4938 crate::common::RegisterField::<
4939 8,
4940 0x1,
4941 1,
4942 0,
4943 bie::Tendie,
4944 bie::Tendie,
4945 Bie_SPEC,
4946 crate::common::RW,
4947 >::from_register(self, 0)
4948 }
4949
4950 #[doc = "Arbitration Lost Interrupt Enable"]
4951 #[inline(always)]
4952 pub fn alie(
4953 self,
4954 ) -> crate::common::RegisterField<
4955 16,
4956 0x1,
4957 1,
4958 0,
4959 bie::Alie,
4960 bie::Alie,
4961 Bie_SPEC,
4962 crate::common::RW,
4963 > {
4964 crate::common::RegisterField::<
4965 16,
4966 0x1,
4967 1,
4968 0,
4969 bie::Alie,
4970 bie::Alie,
4971 Bie_SPEC,
4972 crate::common::RW,
4973 >::from_register(self, 0)
4974 }
4975
4976 #[doc = "Timeout Detection Interrupt Enable"]
4977 #[inline(always)]
4978 pub fn todie(
4979 self,
4980 ) -> crate::common::RegisterField<
4981 20,
4982 0x1,
4983 1,
4984 0,
4985 bie::Todie,
4986 bie::Todie,
4987 Bie_SPEC,
4988 crate::common::RW,
4989 > {
4990 crate::common::RegisterField::<
4991 20,
4992 0x1,
4993 1,
4994 0,
4995 bie::Todie,
4996 bie::Todie,
4997 Bie_SPEC,
4998 crate::common::RW,
4999 >::from_register(self, 0)
5000 }
5001}
5002impl ::core::default::Default for Bie {
5003 #[inline(always)]
5004 fn default() -> Bie {
5005 <crate::RegValueT<Bie_SPEC> as RegisterValue<_>>::new(0)
5006 }
5007}
5008pub mod bie {
5009
5010 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5011 pub struct Stcnddie_SPEC;
5012 pub type Stcnddie = crate::EnumBitfieldStruct<u8, Stcnddie_SPEC>;
5013 impl Stcnddie {
5014 #[doc = "Disables START condition Detection Interrupt Signal."]
5015 pub const _0: Self = Self::new(0);
5016
5017 #[doc = "Enables START condition Detection Interrupt Signal."]
5018 pub const _1: Self = Self::new(1);
5019 }
5020 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5021 pub struct Spcnddie_SPEC;
5022 pub type Spcnddie = crate::EnumBitfieldStruct<u8, Spcnddie_SPEC>;
5023 impl Spcnddie {
5024 #[doc = "Disables STOP condition Detection Interrupt Signal."]
5025 pub const _0: Self = Self::new(0);
5026
5027 #[doc = "Enables STOP condition Detection Interrupt Signal."]
5028 pub const _1: Self = Self::new(1);
5029 }
5030 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5031 pub struct Hdrexdie_SPEC;
5032 pub type Hdrexdie = crate::EnumBitfieldStruct<u8, Hdrexdie_SPEC>;
5033 impl Hdrexdie {
5034 #[doc = "Disables HDR Exit Pattern Detection Interrupt Signal."]
5035 pub const _0: Self = Self::new(0);
5036
5037 #[doc = "Enables HDR Exit Pattern Detection Interrupt Signal."]
5038 pub const _1: Self = Self::new(1);
5039 }
5040 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5041 pub struct Nackdie_SPEC;
5042 pub type Nackdie = crate::EnumBitfieldStruct<u8, Nackdie_SPEC>;
5043 impl Nackdie {
5044 #[doc = "Disables NACK Detection Interrupt Signal."]
5045 pub const _0: Self = Self::new(0);
5046
5047 #[doc = "Enables NACK Detection Interrupt Signal."]
5048 pub const _1: Self = Self::new(1);
5049 }
5050 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5051 pub struct Tendie_SPEC;
5052 pub type Tendie = crate::EnumBitfieldStruct<u8, Tendie_SPEC>;
5053 impl Tendie {
5054 #[doc = "Disables Transmit End Interrupt Signal."]
5055 pub const _0: Self = Self::new(0);
5056
5057 #[doc = "Enables Transmit End Interrupt Signal."]
5058 pub const _1: Self = Self::new(1);
5059 }
5060 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5061 pub struct Alie_SPEC;
5062 pub type Alie = crate::EnumBitfieldStruct<u8, Alie_SPEC>;
5063 impl Alie {
5064 #[doc = "Disables Arbitration Lost Interrupt Signal."]
5065 pub const _0: Self = Self::new(0);
5066
5067 #[doc = "Enables Arbitration Lost Interrupt Signal."]
5068 pub const _1: Self = Self::new(1);
5069 }
5070 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5071 pub struct Todie_SPEC;
5072 pub type Todie = crate::EnumBitfieldStruct<u8, Todie_SPEC>;
5073 impl Todie {
5074 #[doc = "Disables Timeout Detection Interrupt Signal."]
5075 pub const _0: Self = Self::new(0);
5076
5077 #[doc = "Enables Timeout Detection Interrupt Signal."]
5078 pub const _1: Self = Self::new(1);
5079 }
5080}
5081#[doc(hidden)]
5082#[derive(Copy, Clone, Eq, PartialEq)]
5083pub struct Bstfc_SPEC;
5084impl crate::sealed::RegSpec for Bstfc_SPEC {
5085 type DataType = u32;
5086}
5087
5088#[doc = "Bus Status Force Register"]
5089pub type Bstfc = crate::RegValueT<Bstfc_SPEC>;
5090
5091impl Bstfc {
5092 #[doc = "START condition Detection Force"]
5093 #[inline(always)]
5094 pub fn stcnddfc(
5095 self,
5096 ) -> crate::common::RegisterField<
5097 0,
5098 0x1,
5099 1,
5100 0,
5101 bstfc::Stcnddfc,
5102 bstfc::Stcnddfc,
5103 Bstfc_SPEC,
5104 crate::common::W,
5105 > {
5106 crate::common::RegisterField::<
5107 0,
5108 0x1,
5109 1,
5110 0,
5111 bstfc::Stcnddfc,
5112 bstfc::Stcnddfc,
5113 Bstfc_SPEC,
5114 crate::common::W,
5115 >::from_register(self, 0)
5116 }
5117
5118 #[doc = "STOP condition Detection Force"]
5119 #[inline(always)]
5120 pub fn spcnddfc(
5121 self,
5122 ) -> crate::common::RegisterField<
5123 1,
5124 0x1,
5125 1,
5126 0,
5127 bstfc::Spcnddfc,
5128 bstfc::Spcnddfc,
5129 Bstfc_SPEC,
5130 crate::common::W,
5131 > {
5132 crate::common::RegisterField::<
5133 1,
5134 0x1,
5135 1,
5136 0,
5137 bstfc::Spcnddfc,
5138 bstfc::Spcnddfc,
5139 Bstfc_SPEC,
5140 crate::common::W,
5141 >::from_register(self, 0)
5142 }
5143
5144 #[doc = "HDR Exit Pattern Detection Force"]
5145 #[inline(always)]
5146 pub fn hdrexdfc(
5147 self,
5148 ) -> crate::common::RegisterField<
5149 2,
5150 0x1,
5151 1,
5152 0,
5153 bstfc::Hdrexdfc,
5154 bstfc::Hdrexdfc,
5155 Bstfc_SPEC,
5156 crate::common::W,
5157 > {
5158 crate::common::RegisterField::<
5159 2,
5160 0x1,
5161 1,
5162 0,
5163 bstfc::Hdrexdfc,
5164 bstfc::Hdrexdfc,
5165 Bstfc_SPEC,
5166 crate::common::W,
5167 >::from_register(self, 0)
5168 }
5169
5170 #[doc = "NACK Detection Force"]
5171 #[inline(always)]
5172 pub fn nackdfc(
5173 self,
5174 ) -> crate::common::RegisterField<
5175 4,
5176 0x1,
5177 1,
5178 0,
5179 bstfc::Nackdfc,
5180 bstfc::Nackdfc,
5181 Bstfc_SPEC,
5182 crate::common::W,
5183 > {
5184 crate::common::RegisterField::<
5185 4,
5186 0x1,
5187 1,
5188 0,
5189 bstfc::Nackdfc,
5190 bstfc::Nackdfc,
5191 Bstfc_SPEC,
5192 crate::common::W,
5193 >::from_register(self, 0)
5194 }
5195
5196 #[doc = "Transmit End Force"]
5197 #[inline(always)]
5198 pub fn tendfc(
5199 self,
5200 ) -> crate::common::RegisterField<
5201 8,
5202 0x1,
5203 1,
5204 0,
5205 bstfc::Tendfc,
5206 bstfc::Tendfc,
5207 Bstfc_SPEC,
5208 crate::common::W,
5209 > {
5210 crate::common::RegisterField::<
5211 8,
5212 0x1,
5213 1,
5214 0,
5215 bstfc::Tendfc,
5216 bstfc::Tendfc,
5217 Bstfc_SPEC,
5218 crate::common::W,
5219 >::from_register(self, 0)
5220 }
5221
5222 #[doc = "Arbitration Lost Force"]
5223 #[inline(always)]
5224 pub fn alfc(
5225 self,
5226 ) -> crate::common::RegisterField<
5227 16,
5228 0x1,
5229 1,
5230 0,
5231 bstfc::Alfc,
5232 bstfc::Alfc,
5233 Bstfc_SPEC,
5234 crate::common::W,
5235 > {
5236 crate::common::RegisterField::<
5237 16,
5238 0x1,
5239 1,
5240 0,
5241 bstfc::Alfc,
5242 bstfc::Alfc,
5243 Bstfc_SPEC,
5244 crate::common::W,
5245 >::from_register(self, 0)
5246 }
5247
5248 #[doc = "Timeout Detection Force"]
5249 #[inline(always)]
5250 pub fn todfc(
5251 self,
5252 ) -> crate::common::RegisterField<
5253 20,
5254 0x1,
5255 1,
5256 0,
5257 bstfc::Todfc,
5258 bstfc::Todfc,
5259 Bstfc_SPEC,
5260 crate::common::W,
5261 > {
5262 crate::common::RegisterField::<
5263 20,
5264 0x1,
5265 1,
5266 0,
5267 bstfc::Todfc,
5268 bstfc::Todfc,
5269 Bstfc_SPEC,
5270 crate::common::W,
5271 >::from_register(self, 0)
5272 }
5273}
5274impl ::core::default::Default for Bstfc {
5275 #[inline(always)]
5276 fn default() -> Bstfc {
5277 <crate::RegValueT<Bstfc_SPEC> as RegisterValue<_>>::new(0)
5278 }
5279}
5280pub mod bstfc {
5281
5282 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5283 pub struct Stcnddfc_SPEC;
5284 pub type Stcnddfc = crate::EnumBitfieldStruct<u8, Stcnddfc_SPEC>;
5285 impl Stcnddfc {
5286 #[doc = "Not Force START condition Detection Interrupt for software testing."]
5287 pub const _0: Self = Self::new(0);
5288
5289 #[doc = "Force START condition Detection Interrupt for software testing."]
5290 pub const _1: Self = Self::new(1);
5291 }
5292 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5293 pub struct Spcnddfc_SPEC;
5294 pub type Spcnddfc = crate::EnumBitfieldStruct<u8, Spcnddfc_SPEC>;
5295 impl Spcnddfc {
5296 #[doc = "Not Force STOP condition Detection Interrupt for software testing."]
5297 pub const _0: Self = Self::new(0);
5298
5299 #[doc = "Force STOP condition Detection Interrupt for software testing."]
5300 pub const _1: Self = Self::new(1);
5301 }
5302 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5303 pub struct Hdrexdfc_SPEC;
5304 pub type Hdrexdfc = crate::EnumBitfieldStruct<u8, Hdrexdfc_SPEC>;
5305 impl Hdrexdfc {
5306 #[doc = "Not Force HDR Exit Pattern Detection Interrupt for software testing."]
5307 pub const _0: Self = Self::new(0);
5308
5309 #[doc = "Force HDR Exit Pattern Detection Interrupt for software testing."]
5310 pub const _1: Self = Self::new(1);
5311 }
5312 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5313 pub struct Nackdfc_SPEC;
5314 pub type Nackdfc = crate::EnumBitfieldStruct<u8, Nackdfc_SPEC>;
5315 impl Nackdfc {
5316 #[doc = "Not Force NACK Detection Interrupt for software testing."]
5317 pub const _0: Self = Self::new(0);
5318
5319 #[doc = "Force NACK Detection Interrupt for software testing."]
5320 pub const _1: Self = Self::new(1);
5321 }
5322 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5323 pub struct Tendfc_SPEC;
5324 pub type Tendfc = crate::EnumBitfieldStruct<u8, Tendfc_SPEC>;
5325 impl Tendfc {
5326 #[doc = "Not Force Transmit End Interrupt for software testing."]
5327 pub const _0: Self = Self::new(0);
5328
5329 #[doc = "Force Transmit End Interrupt for software testing."]
5330 pub const _1: Self = Self::new(1);
5331 }
5332 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5333 pub struct Alfc_SPEC;
5334 pub type Alfc = crate::EnumBitfieldStruct<u8, Alfc_SPEC>;
5335 impl Alfc {
5336 #[doc = "Not Force Arbitration Lost Interrupt for software testing."]
5337 pub const _0: Self = Self::new(0);
5338
5339 #[doc = "Force Arbitration Lost Interrupt for software testing."]
5340 pub const _1: Self = Self::new(1);
5341 }
5342 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5343 pub struct Todfc_SPEC;
5344 pub type Todfc = crate::EnumBitfieldStruct<u8, Todfc_SPEC>;
5345 impl Todfc {
5346 #[doc = "Not Force Timeout Detection Interrupt for software testing."]
5347 pub const _0: Self = Self::new(0);
5348
5349 #[doc = "Force Timeout Detection Interrupt for software testing."]
5350 pub const _1: Self = Self::new(1);
5351 }
5352}
5353#[doc(hidden)]
5354#[derive(Copy, Clone, Eq, PartialEq)]
5355pub struct Ntst_SPEC;
5356impl crate::sealed::RegSpec for Ntst_SPEC {
5357 type DataType = u32;
5358}
5359
5360#[doc = "Normal Transfer Status Register"]
5361pub type Ntst = crate::RegValueT<Ntst_SPEC>;
5362
5363impl Ntst {
5364 #[doc = "Normal Transmit Data Buffer Empty Flag 0"]
5365 #[inline(always)]
5366 pub fn tdbef0(
5367 self,
5368 ) -> crate::common::RegisterField<
5369 0,
5370 0x1,
5371 1,
5372 0,
5373 ntst::Tdbef0,
5374 ntst::Tdbef0,
5375 Ntst_SPEC,
5376 crate::common::RW,
5377 > {
5378 crate::common::RegisterField::<
5379 0,
5380 0x1,
5381 1,
5382 0,
5383 ntst::Tdbef0,
5384 ntst::Tdbef0,
5385 Ntst_SPEC,
5386 crate::common::RW,
5387 >::from_register(self, 0)
5388 }
5389
5390 #[doc = "Normal Receive Data Buffer Full Flag 0"]
5391 #[inline(always)]
5392 pub fn rdbff0(
5393 self,
5394 ) -> crate::common::RegisterField<
5395 1,
5396 0x1,
5397 1,
5398 0,
5399 ntst::Rdbff0,
5400 ntst::Rdbff0,
5401 Ntst_SPEC,
5402 crate::common::RW,
5403 > {
5404 crate::common::RegisterField::<
5405 1,
5406 0x1,
5407 1,
5408 0,
5409 ntst::Rdbff0,
5410 ntst::Rdbff0,
5411 Ntst_SPEC,
5412 crate::common::RW,
5413 >::from_register(self, 0)
5414 }
5415
5416 #[doc = "Normal IBI Queue Empty/Full Flag"]
5417 #[inline(always)]
5418 pub fn ibiqeff(
5419 self,
5420 ) -> crate::common::RegisterField<
5421 2,
5422 0x1,
5423 1,
5424 0,
5425 ntst::Ibiqeff,
5426 ntst::Ibiqeff,
5427 Ntst_SPEC,
5428 crate::common::RW,
5429 > {
5430 crate::common::RegisterField::<
5431 2,
5432 0x1,
5433 1,
5434 0,
5435 ntst::Ibiqeff,
5436 ntst::Ibiqeff,
5437 Ntst_SPEC,
5438 crate::common::RW,
5439 >::from_register(self, 0)
5440 }
5441
5442 #[doc = "Normal Command Queue Empty Flag"]
5443 #[inline(always)]
5444 pub fn cmdqef(
5445 self,
5446 ) -> crate::common::RegisterField<
5447 3,
5448 0x1,
5449 1,
5450 0,
5451 ntst::Cmdqef,
5452 ntst::Cmdqef,
5453 Ntst_SPEC,
5454 crate::common::RW,
5455 > {
5456 crate::common::RegisterField::<
5457 3,
5458 0x1,
5459 1,
5460 0,
5461 ntst::Cmdqef,
5462 ntst::Cmdqef,
5463 Ntst_SPEC,
5464 crate::common::RW,
5465 >::from_register(self, 0)
5466 }
5467
5468 #[doc = "Normal Response Queue Full Flag"]
5469 #[inline(always)]
5470 pub fn rspqff(
5471 self,
5472 ) -> crate::common::RegisterField<
5473 4,
5474 0x1,
5475 1,
5476 0,
5477 ntst::Rspqff,
5478 ntst::Rspqff,
5479 Ntst_SPEC,
5480 crate::common::RW,
5481 > {
5482 crate::common::RegisterField::<
5483 4,
5484 0x1,
5485 1,
5486 0,
5487 ntst::Rspqff,
5488 ntst::Rspqff,
5489 Ntst_SPEC,
5490 crate::common::RW,
5491 >::from_register(self, 0)
5492 }
5493
5494 #[doc = "Normal Transfer Abort Flag"]
5495 #[inline(always)]
5496 pub fn tabtf(
5497 self,
5498 ) -> crate::common::RegisterField<
5499 5,
5500 0x1,
5501 1,
5502 0,
5503 ntst::Tabtf,
5504 ntst::Tabtf,
5505 Ntst_SPEC,
5506 crate::common::RW,
5507 > {
5508 crate::common::RegisterField::<
5509 5,
5510 0x1,
5511 1,
5512 0,
5513 ntst::Tabtf,
5514 ntst::Tabtf,
5515 Ntst_SPEC,
5516 crate::common::RW,
5517 >::from_register(self, 0)
5518 }
5519
5520 #[doc = "Normal Transfer Error Flag"]
5521 #[inline(always)]
5522 pub fn tef(
5523 self,
5524 ) -> crate::common::RegisterField<
5525 9,
5526 0x1,
5527 1,
5528 0,
5529 ntst::Tef,
5530 ntst::Tef,
5531 Ntst_SPEC,
5532 crate::common::RW,
5533 > {
5534 crate::common::RegisterField::<
5535 9,
5536 0x1,
5537 1,
5538 0,
5539 ntst::Tef,
5540 ntst::Tef,
5541 Ntst_SPEC,
5542 crate::common::RW,
5543 >::from_register(self, 0)
5544 }
5545
5546 #[doc = "Normal Receive Status Queue Full Flag"]
5547 #[inline(always)]
5548 pub fn rsqff(
5549 self,
5550 ) -> crate::common::RegisterField<
5551 20,
5552 0x1,
5553 1,
5554 0,
5555 ntst::Rsqff,
5556 ntst::Rsqff,
5557 Ntst_SPEC,
5558 crate::common::RW,
5559 > {
5560 crate::common::RegisterField::<
5561 20,
5562 0x1,
5563 1,
5564 0,
5565 ntst::Rsqff,
5566 ntst::Rsqff,
5567 Ntst_SPEC,
5568 crate::common::RW,
5569 >::from_register(self, 0)
5570 }
5571}
5572impl ::core::default::Default for Ntst {
5573 #[inline(always)]
5574 fn default() -> Ntst {
5575 <crate::RegValueT<Ntst_SPEC> as RegisterValue<_>>::new(0)
5576 }
5577}
5578pub mod ntst {
5579
5580 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5581 pub struct Tdbef0_SPEC;
5582 pub type Tdbef0 = crate::EnumBitfieldStruct<u8, Tdbef0_SPEC>;
5583 impl Tdbef0 {
5584 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Transmit Data Buffer 0 contains transmit data. For I3C protocol mode: PRTS.PRTMD bit = 0. The number of empties in the Normal Transmit Data Buffer 0 is less than the NTBTHCTL0.TXDBTH\\[2:0\\] threshold."]
5585 pub const _0: Self = Self::new(0);
5586
5587 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Transmit Data Buffer 0 contains no transmit data. For I3C protocol mode: PRTS.PRTMD bit = 0. The number of empties in the Normal Transmit Data Buffer 0 is the NTBTHCTL0.TXDBTH\\[2:0\\] threshold or more."]
5588 pub const _1: Self = Self::new(1);
5589 }
5590 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5591 pub struct Rdbff0_SPEC;
5592 pub type Rdbff0 = crate::EnumBitfieldStruct<u8, Rdbff0_SPEC>;
5593 impl Rdbff0 {
5594 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Receive Data Buffer0 contains no receive data. For I3C Protocol mode: PRTS.PRTMD bit = 0. The number of entries in the Normal Receive Data Buffer 0 is less than the NTBTHCTL0.RXDBTH\\[2:0\\] threshold."]
5595 pub const _0: Self = Self::new(0);
5596
5597 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Receive Data Buffer0 contains receive data. For I3C Protocol mode: PRTS.PRTMD bit = 0. The number of entries in the Normal Receive Data Buffer 0 is the NTBTHCTL0.RXDBTH\\[2:0\\] threshold or more."]
5598 pub const _1: Self = Self::new(1);
5599 }
5600 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5601 pub struct Ibiqeff_SPEC;
5602 pub type Ibiqeff = crate::EnumBitfieldStruct<u8, Ibiqeff_SPEC>;
5603 impl Ibiqeff {
5604 #[doc = "For I3C protocol mode (Master): PRTS.PRTMD bit = 0, PRSST.CRMS bit = 1. The number of IBI Status Queue entries is the NQTHCTL.IBIQTH threshold or less. For I3C protocol mode (Slave) : PRTS.PRTMD bit = 0, PRSST.CRMS bit = 0. If the NQTHCTL.IBIQTH = 0: The number of IBI Data Buffer empties is less than the IBI Data Buffer size. If the NQTHCTL.IBIQTH is other than 0: The number of IBI Data Buffer empties is less than the NQTHCTL.IBIQTH threshold."]
5605 pub const _0: Self = Self::new(0);
5606
5607 #[doc = "For I3C protocol mode (Master): PRTS.PRTMD bit = 0, PRSST.CRMS bit = 1. The number of IBI Status Queue entries is more than the NQTHCTL.IBIQTH threshold. For I3C protocol mode (Slave) : PRTS.PRTMD bit = 0, PRSST.CRMS bit = 0. If the NQTHCTL.IBIQTH = 0: The number of IBI Data Buffer empties is the IBI Data Buffer size. If the NQTHCTL.IBIQTH is other than 0: The number of IBI Data Buffer empties is the NQTHCTL.IBIQTH threshold or more."]
5608 pub const _1: Self = Self::new(1);
5609 }
5610 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5611 pub struct Cmdqef_SPEC;
5612 pub type Cmdqef = crate::EnumBitfieldStruct<u8, Cmdqef_SPEC>;
5613 impl Cmdqef {
5614 #[doc = "If the NQTHCTL.CMDQTH = 0: The number of Command Queue empties is less than the Command Queue size. If the NQTHCTL.CMDQTH is other than 0: The number of Command Queue empties is less than the NQTHCTL.CMDQTH threshold."]
5615 pub const _0: Self = Self::new(0);
5616
5617 #[doc = "If the NQTHCTL.CMDQTH = 0: The number of Command Queue empties is the Command Queue size. If the NQTHCTL.CMDQTH is other than 0: 1: The number of Command Queue empties is the NQTHCTL.CMDQTH threshold or more."]
5618 pub const _1: Self = Self::new(1);
5619 }
5620 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5621 pub struct Rspqff_SPEC;
5622 pub type Rspqff = crate::EnumBitfieldStruct<u8, Rspqff_SPEC>;
5623 impl Rspqff {
5624 #[doc = "The number of Response Queue entries is the NQTHCTL.RSPQTH threshold or less."]
5625 pub const _0: Self = Self::new(0);
5626
5627 #[doc = "The number of Response Queue entries is more than the NQTHCTL.RSPQTH threshold."]
5628 pub const _1: Self = Self::new(1);
5629 }
5630 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5631 pub struct Tabtf_SPEC;
5632 pub type Tabtf = crate::EnumBitfieldStruct<u8, Tabtf_SPEC>;
5633 impl Tabtf {
5634 #[doc = "Transfer Abort does not occur."]
5635 pub const _0: Self = Self::new(0);
5636
5637 #[doc = "Transfer Abort occur. To clear, write 0 to this bit after 1 state is read."]
5638 pub const _1: Self = Self::new(1);
5639 }
5640 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5641 pub struct Tef_SPEC;
5642 pub type Tef = crate::EnumBitfieldStruct<u8, Tef_SPEC>;
5643 impl Tef {
5644 #[doc = "Transfer Error does not occur."]
5645 pub const _0: Self = Self::new(0);
5646
5647 #[doc = "Transfer Error occurs. To clear, write 0 to this bit after 1 state is read."]
5648 pub const _1: Self = Self::new(1);
5649 }
5650 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5651 pub struct Rsqff_SPEC;
5652 pub type Rsqff = crate::EnumBitfieldStruct<u8, Rsqff_SPEC>;
5653 impl Rsqff {
5654 #[doc = "The number of Receive Status Queue entries is the NRQTHCTL.RSQTH threshold or less."]
5655 pub const _0: Self = Self::new(0);
5656
5657 #[doc = "The number of Receive Status Queue entries is more than the NRQTHCTL.RSQTH threshold."]
5658 pub const _1: Self = Self::new(1);
5659 }
5660}
5661#[doc(hidden)]
5662#[derive(Copy, Clone, Eq, PartialEq)]
5663pub struct Ntste_SPEC;
5664impl crate::sealed::RegSpec for Ntste_SPEC {
5665 type DataType = u32;
5666}
5667
5668#[doc = "Normal Transfer Status Enable Register"]
5669pub type Ntste = crate::RegValueT<Ntste_SPEC>;
5670
5671impl Ntste {
5672 #[doc = "Normal Transmit Data Buffer Empty Enable 0"]
5673 #[inline(always)]
5674 pub fn tdbee0(
5675 self,
5676 ) -> crate::common::RegisterField<
5677 0,
5678 0x1,
5679 1,
5680 0,
5681 ntste::Tdbee0,
5682 ntste::Tdbee0,
5683 Ntste_SPEC,
5684 crate::common::RW,
5685 > {
5686 crate::common::RegisterField::<
5687 0,
5688 0x1,
5689 1,
5690 0,
5691 ntste::Tdbee0,
5692 ntste::Tdbee0,
5693 Ntste_SPEC,
5694 crate::common::RW,
5695 >::from_register(self, 0)
5696 }
5697
5698 #[doc = "Normal Receive Data Buffer Full Enable 0"]
5699 #[inline(always)]
5700 pub fn rdbfe0(
5701 self,
5702 ) -> crate::common::RegisterField<
5703 1,
5704 0x1,
5705 1,
5706 0,
5707 ntste::Rdbfe0,
5708 ntste::Rdbfe0,
5709 Ntste_SPEC,
5710 crate::common::RW,
5711 > {
5712 crate::common::RegisterField::<
5713 1,
5714 0x1,
5715 1,
5716 0,
5717 ntste::Rdbfe0,
5718 ntste::Rdbfe0,
5719 Ntste_SPEC,
5720 crate::common::RW,
5721 >::from_register(self, 0)
5722 }
5723
5724 #[doc = "Normal IBI Queue Empty/Full Enable"]
5725 #[inline(always)]
5726 pub fn ibiqefe(
5727 self,
5728 ) -> crate::common::RegisterField<
5729 2,
5730 0x1,
5731 1,
5732 0,
5733 ntste::Ibiqefe,
5734 ntste::Ibiqefe,
5735 Ntste_SPEC,
5736 crate::common::RW,
5737 > {
5738 crate::common::RegisterField::<
5739 2,
5740 0x1,
5741 1,
5742 0,
5743 ntste::Ibiqefe,
5744 ntste::Ibiqefe,
5745 Ntste_SPEC,
5746 crate::common::RW,
5747 >::from_register(self, 0)
5748 }
5749
5750 #[doc = "Normal Command Queue Empty Enable"]
5751 #[inline(always)]
5752 pub fn cmdqee(
5753 self,
5754 ) -> crate::common::RegisterField<
5755 3,
5756 0x1,
5757 1,
5758 0,
5759 ntste::Cmdqee,
5760 ntste::Cmdqee,
5761 Ntste_SPEC,
5762 crate::common::RW,
5763 > {
5764 crate::common::RegisterField::<
5765 3,
5766 0x1,
5767 1,
5768 0,
5769 ntste::Cmdqee,
5770 ntste::Cmdqee,
5771 Ntste_SPEC,
5772 crate::common::RW,
5773 >::from_register(self, 0)
5774 }
5775
5776 #[doc = "Normal Response Queue Full Enable"]
5777 #[inline(always)]
5778 pub fn rspqfe(
5779 self,
5780 ) -> crate::common::RegisterField<
5781 4,
5782 0x1,
5783 1,
5784 0,
5785 ntste::Rspqfe,
5786 ntste::Rspqfe,
5787 Ntste_SPEC,
5788 crate::common::RW,
5789 > {
5790 crate::common::RegisterField::<
5791 4,
5792 0x1,
5793 1,
5794 0,
5795 ntste::Rspqfe,
5796 ntste::Rspqfe,
5797 Ntste_SPEC,
5798 crate::common::RW,
5799 >::from_register(self, 0)
5800 }
5801
5802 #[doc = "Normal Transfer Abort Enable"]
5803 #[inline(always)]
5804 pub fn tabte(
5805 self,
5806 ) -> crate::common::RegisterField<
5807 5,
5808 0x1,
5809 1,
5810 0,
5811 ntste::Tabte,
5812 ntste::Tabte,
5813 Ntste_SPEC,
5814 crate::common::RW,
5815 > {
5816 crate::common::RegisterField::<
5817 5,
5818 0x1,
5819 1,
5820 0,
5821 ntste::Tabte,
5822 ntste::Tabte,
5823 Ntste_SPEC,
5824 crate::common::RW,
5825 >::from_register(self, 0)
5826 }
5827
5828 #[doc = "Normal Transfer Error Enable"]
5829 #[inline(always)]
5830 pub fn tee(
5831 self,
5832 ) -> crate::common::RegisterField<
5833 9,
5834 0x1,
5835 1,
5836 0,
5837 ntste::Tee,
5838 ntste::Tee,
5839 Ntste_SPEC,
5840 crate::common::RW,
5841 > {
5842 crate::common::RegisterField::<
5843 9,
5844 0x1,
5845 1,
5846 0,
5847 ntste::Tee,
5848 ntste::Tee,
5849 Ntste_SPEC,
5850 crate::common::RW,
5851 >::from_register(self, 0)
5852 }
5853
5854 #[doc = "Normal Receive Status Queue Full Enable"]
5855 #[inline(always)]
5856 pub fn rsqfe(
5857 self,
5858 ) -> crate::common::RegisterField<
5859 20,
5860 0x1,
5861 1,
5862 0,
5863 ntste::Rsqfe,
5864 ntste::Rsqfe,
5865 Ntste_SPEC,
5866 crate::common::RW,
5867 > {
5868 crate::common::RegisterField::<
5869 20,
5870 0x1,
5871 1,
5872 0,
5873 ntste::Rsqfe,
5874 ntste::Rsqfe,
5875 Ntste_SPEC,
5876 crate::common::RW,
5877 >::from_register(self, 0)
5878 }
5879}
5880impl ::core::default::Default for Ntste {
5881 #[inline(always)]
5882 fn default() -> Ntste {
5883 <crate::RegValueT<Ntste_SPEC> as RegisterValue<_>>::new(0)
5884 }
5885}
5886pub mod ntste {
5887
5888 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5889 pub struct Tdbee0_SPEC;
5890 pub type Tdbee0 = crate::EnumBitfieldStruct<u8, Tdbee0_SPEC>;
5891 impl Tdbee0 {
5892 #[doc = "Disables Tx0 Data Buffer Empty Interrupt Status logging."]
5893 pub const _0: Self = Self::new(0);
5894
5895 #[doc = "Enables Tx0 Data Buffer Empty Interrupt Status logging."]
5896 pub const _1: Self = Self::new(1);
5897 }
5898 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5899 pub struct Rdbfe0_SPEC;
5900 pub type Rdbfe0 = crate::EnumBitfieldStruct<u8, Rdbfe0_SPEC>;
5901 impl Rdbfe0 {
5902 #[doc = "Disables Rx0 Data Buffer Full Interrupt Status logging."]
5903 pub const _0: Self = Self::new(0);
5904
5905 #[doc = "Enables Rx0 Data Buffer Full Interrupt Status logging."]
5906 pub const _1: Self = Self::new(1);
5907 }
5908 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5909 pub struct Ibiqefe_SPEC;
5910 pub type Ibiqefe = crate::EnumBitfieldStruct<u8, Ibiqefe_SPEC>;
5911 impl Ibiqefe {
5912 #[doc = "Disables IBI Status Buffer Empty/Full Interrupt Status logging."]
5913 pub const _0: Self = Self::new(0);
5914
5915 #[doc = "Enables IBI Status Buffer Empty/Full Interrupt Status logging."]
5916 pub const _1: Self = Self::new(1);
5917 }
5918 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5919 pub struct Cmdqee_SPEC;
5920 pub type Cmdqee = crate::EnumBitfieldStruct<u8, Cmdqee_SPEC>;
5921 impl Cmdqee {
5922 #[doc = "Disables Command Buffer Empty Interrupt Status logging."]
5923 pub const _0: Self = Self::new(0);
5924
5925 #[doc = "Enables Command Buffer Empty Interrupt Status logging."]
5926 pub const _1: Self = Self::new(1);
5927 }
5928 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5929 pub struct Rspqfe_SPEC;
5930 pub type Rspqfe = crate::EnumBitfieldStruct<u8, Rspqfe_SPEC>;
5931 impl Rspqfe {
5932 #[doc = "Disables Response Buffer Full Interrupt Status logging."]
5933 pub const _0: Self = Self::new(0);
5934
5935 #[doc = "Enables Response Buffer Full Interrupt Status logging."]
5936 pub const _1: Self = Self::new(1);
5937 }
5938 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5939 pub struct Tabte_SPEC;
5940 pub type Tabte = crate::EnumBitfieldStruct<u8, Tabte_SPEC>;
5941 impl Tabte {
5942 #[doc = "Disables Transfer Abort Interrupt Status logging."]
5943 pub const _0: Self = Self::new(0);
5944
5945 #[doc = "Enables Transfer Abort Interrupt Status logging."]
5946 pub const _1: Self = Self::new(1);
5947 }
5948 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5949 pub struct Tee_SPEC;
5950 pub type Tee = crate::EnumBitfieldStruct<u8, Tee_SPEC>;
5951 impl Tee {
5952 #[doc = "Disables Transfer Error Interrupt Status logging."]
5953 pub const _0: Self = Self::new(0);
5954
5955 #[doc = "Enables Transfer Error Interrupt Status logging."]
5956 pub const _1: Self = Self::new(1);
5957 }
5958 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5959 pub struct Rsqfe_SPEC;
5960 pub type Rsqfe = crate::EnumBitfieldStruct<u8, Rsqfe_SPEC>;
5961 impl Rsqfe {
5962 #[doc = "Disables Receive Status Buffer Full Interrupt Status logging."]
5963 pub const _0: Self = Self::new(0);
5964
5965 #[doc = "Enables Receive Status Buffer Full Interrupt Status logging."]
5966 pub const _1: Self = Self::new(1);
5967 }
5968}
5969#[doc(hidden)]
5970#[derive(Copy, Clone, Eq, PartialEq)]
5971pub struct Ntie_SPEC;
5972impl crate::sealed::RegSpec for Ntie_SPEC {
5973 type DataType = u32;
5974}
5975
5976#[doc = "Normal Transfer Interrupt Enable Register"]
5977pub type Ntie = crate::RegValueT<Ntie_SPEC>;
5978
5979impl Ntie {
5980 #[doc = "Normal Transmit Data Buffer Empty Interrupt Enable 0"]
5981 #[inline(always)]
5982 pub fn tdbeie0(
5983 self,
5984 ) -> crate::common::RegisterField<
5985 0,
5986 0x1,
5987 1,
5988 0,
5989 ntie::Tdbeie0,
5990 ntie::Tdbeie0,
5991 Ntie_SPEC,
5992 crate::common::RW,
5993 > {
5994 crate::common::RegisterField::<
5995 0,
5996 0x1,
5997 1,
5998 0,
5999 ntie::Tdbeie0,
6000 ntie::Tdbeie0,
6001 Ntie_SPEC,
6002 crate::common::RW,
6003 >::from_register(self, 0)
6004 }
6005
6006 #[doc = "Normal Receive Data Buffer Full Interrupt Enable 0"]
6007 #[inline(always)]
6008 pub fn rdbfie0(
6009 self,
6010 ) -> crate::common::RegisterField<
6011 1,
6012 0x1,
6013 1,
6014 0,
6015 ntie::Rdbfie0,
6016 ntie::Rdbfie0,
6017 Ntie_SPEC,
6018 crate::common::RW,
6019 > {
6020 crate::common::RegisterField::<
6021 1,
6022 0x1,
6023 1,
6024 0,
6025 ntie::Rdbfie0,
6026 ntie::Rdbfie0,
6027 Ntie_SPEC,
6028 crate::common::RW,
6029 >::from_register(self, 0)
6030 }
6031
6032 #[doc = "Normal IBI Queue Empty/Full Interrupt Enable"]
6033 #[inline(always)]
6034 pub fn ibiqefie(
6035 self,
6036 ) -> crate::common::RegisterField<
6037 2,
6038 0x1,
6039 1,
6040 0,
6041 ntie::Ibiqefie,
6042 ntie::Ibiqefie,
6043 Ntie_SPEC,
6044 crate::common::RW,
6045 > {
6046 crate::common::RegisterField::<
6047 2,
6048 0x1,
6049 1,
6050 0,
6051 ntie::Ibiqefie,
6052 ntie::Ibiqefie,
6053 Ntie_SPEC,
6054 crate::common::RW,
6055 >::from_register(self, 0)
6056 }
6057
6058 #[doc = "Normal Command Queue Empty Interrupt Enable"]
6059 #[inline(always)]
6060 pub fn cmdqeie(
6061 self,
6062 ) -> crate::common::RegisterField<
6063 3,
6064 0x1,
6065 1,
6066 0,
6067 ntie::Cmdqeie,
6068 ntie::Cmdqeie,
6069 Ntie_SPEC,
6070 crate::common::RW,
6071 > {
6072 crate::common::RegisterField::<
6073 3,
6074 0x1,
6075 1,
6076 0,
6077 ntie::Cmdqeie,
6078 ntie::Cmdqeie,
6079 Ntie_SPEC,
6080 crate::common::RW,
6081 >::from_register(self, 0)
6082 }
6083
6084 #[doc = "Normal Response Queue Full Interrupt Enable"]
6085 #[inline(always)]
6086 pub fn rspqfie(
6087 self,
6088 ) -> crate::common::RegisterField<
6089 4,
6090 0x1,
6091 1,
6092 0,
6093 ntie::Rspqfie,
6094 ntie::Rspqfie,
6095 Ntie_SPEC,
6096 crate::common::RW,
6097 > {
6098 crate::common::RegisterField::<
6099 4,
6100 0x1,
6101 1,
6102 0,
6103 ntie::Rspqfie,
6104 ntie::Rspqfie,
6105 Ntie_SPEC,
6106 crate::common::RW,
6107 >::from_register(self, 0)
6108 }
6109
6110 #[doc = "Normal Transfer Abort Interrupt Enable"]
6111 #[inline(always)]
6112 pub fn tabtie(
6113 self,
6114 ) -> crate::common::RegisterField<
6115 5,
6116 0x1,
6117 1,
6118 0,
6119 ntie::Tabtie,
6120 ntie::Tabtie,
6121 Ntie_SPEC,
6122 crate::common::RW,
6123 > {
6124 crate::common::RegisterField::<
6125 5,
6126 0x1,
6127 1,
6128 0,
6129 ntie::Tabtie,
6130 ntie::Tabtie,
6131 Ntie_SPEC,
6132 crate::common::RW,
6133 >::from_register(self, 0)
6134 }
6135
6136 #[doc = "Normal Transfer Error Interrupt Enable"]
6137 #[inline(always)]
6138 pub fn teie(
6139 self,
6140 ) -> crate::common::RegisterField<
6141 9,
6142 0x1,
6143 1,
6144 0,
6145 ntie::Teie,
6146 ntie::Teie,
6147 Ntie_SPEC,
6148 crate::common::RW,
6149 > {
6150 crate::common::RegisterField::<
6151 9,
6152 0x1,
6153 1,
6154 0,
6155 ntie::Teie,
6156 ntie::Teie,
6157 Ntie_SPEC,
6158 crate::common::RW,
6159 >::from_register(self, 0)
6160 }
6161
6162 #[doc = "Normal Receive Status Queue Full Interrupt Enable"]
6163 #[inline(always)]
6164 pub fn rsqfie(
6165 self,
6166 ) -> crate::common::RegisterField<
6167 20,
6168 0x1,
6169 1,
6170 0,
6171 ntie::Rsqfie,
6172 ntie::Rsqfie,
6173 Ntie_SPEC,
6174 crate::common::RW,
6175 > {
6176 crate::common::RegisterField::<
6177 20,
6178 0x1,
6179 1,
6180 0,
6181 ntie::Rsqfie,
6182 ntie::Rsqfie,
6183 Ntie_SPEC,
6184 crate::common::RW,
6185 >::from_register(self, 0)
6186 }
6187}
6188impl ::core::default::Default for Ntie {
6189 #[inline(always)]
6190 fn default() -> Ntie {
6191 <crate::RegValueT<Ntie_SPEC> as RegisterValue<_>>::new(0)
6192 }
6193}
6194pub mod ntie {
6195
6196 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6197 pub struct Tdbeie0_SPEC;
6198 pub type Tdbeie0 = crate::EnumBitfieldStruct<u8, Tdbeie0_SPEC>;
6199 impl Tdbeie0 {
6200 #[doc = "Disables Tx0 Data Buffer Empty Interrupt Signal."]
6201 pub const _0: Self = Self::new(0);
6202
6203 #[doc = "Enables Tx0 Data Buffer Empty Interrupt Signal."]
6204 pub const _1: Self = Self::new(1);
6205 }
6206 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6207 pub struct Rdbfie0_SPEC;
6208 pub type Rdbfie0 = crate::EnumBitfieldStruct<u8, Rdbfie0_SPEC>;
6209 impl Rdbfie0 {
6210 #[doc = "Disables Rx0 Data Buffer Full Interrupt Signal."]
6211 pub const _0: Self = Self::new(0);
6212
6213 #[doc = "Enables Rx0 Data Buffer Full Interrupt Signal."]
6214 pub const _1: Self = Self::new(1);
6215 }
6216 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6217 pub struct Ibiqefie_SPEC;
6218 pub type Ibiqefie = crate::EnumBitfieldStruct<u8, Ibiqefie_SPEC>;
6219 impl Ibiqefie {
6220 #[doc = "Disables IBI Status Buffer Empty/Full Interrupt Signal."]
6221 pub const _0: Self = Self::new(0);
6222
6223 #[doc = "Enables IBI Status Buffer Empty/Full Interrupt Signal."]
6224 pub const _1: Self = Self::new(1);
6225 }
6226 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6227 pub struct Cmdqeie_SPEC;
6228 pub type Cmdqeie = crate::EnumBitfieldStruct<u8, Cmdqeie_SPEC>;
6229 impl Cmdqeie {
6230 #[doc = "Disables Command Buffer Empty Interrupt Signal."]
6231 pub const _0: Self = Self::new(0);
6232
6233 #[doc = "Enables Command Buffer Empty Interrupt Signal."]
6234 pub const _1: Self = Self::new(1);
6235 }
6236 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6237 pub struct Rspqfie_SPEC;
6238 pub type Rspqfie = crate::EnumBitfieldStruct<u8, Rspqfie_SPEC>;
6239 impl Rspqfie {
6240 #[doc = "Disables Response Buffer Full Interrupt Signal."]
6241 pub const _0: Self = Self::new(0);
6242
6243 #[doc = "Enables Response Buffer Full Interrupt Signal."]
6244 pub const _1: Self = Self::new(1);
6245 }
6246 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6247 pub struct Tabtie_SPEC;
6248 pub type Tabtie = crate::EnumBitfieldStruct<u8, Tabtie_SPEC>;
6249 impl Tabtie {
6250 #[doc = "Disables Transfer Abort Interrupt Signal."]
6251 pub const _0: Self = Self::new(0);
6252
6253 #[doc = "Enables Transfer Abort Interrupt Signal."]
6254 pub const _1: Self = Self::new(1);
6255 }
6256 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6257 pub struct Teie_SPEC;
6258 pub type Teie = crate::EnumBitfieldStruct<u8, Teie_SPEC>;
6259 impl Teie {
6260 #[doc = "Disables Transfer Error Interrupt Signal."]
6261 pub const _0: Self = Self::new(0);
6262
6263 #[doc = "Enables Transfer Error Interrupt Signal."]
6264 pub const _1: Self = Self::new(1);
6265 }
6266 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6267 pub struct Rsqfie_SPEC;
6268 pub type Rsqfie = crate::EnumBitfieldStruct<u8, Rsqfie_SPEC>;
6269 impl Rsqfie {
6270 #[doc = "Disables Receive Status Buffer Full Interrupt Signal."]
6271 pub const _0: Self = Self::new(0);
6272
6273 #[doc = "Enables Receive Status Buffer Full Interrupt Signal."]
6274 pub const _1: Self = Self::new(1);
6275 }
6276}
6277#[doc(hidden)]
6278#[derive(Copy, Clone, Eq, PartialEq)]
6279pub struct Ntstfc_SPEC;
6280impl crate::sealed::RegSpec for Ntstfc_SPEC {
6281 type DataType = u32;
6282}
6283
6284#[doc = "Normal Transfer Status Force Register"]
6285pub type Ntstfc = crate::RegValueT<Ntstfc_SPEC>;
6286
6287impl Ntstfc {
6288 #[doc = "Normal Transmit Data Buffer Empty Force 0"]
6289 #[inline(always)]
6290 pub fn tdbefc0(
6291 self,
6292 ) -> crate::common::RegisterField<
6293 0,
6294 0x1,
6295 1,
6296 0,
6297 ntstfc::Tdbefc0,
6298 ntstfc::Tdbefc0,
6299 Ntstfc_SPEC,
6300 crate::common::W,
6301 > {
6302 crate::common::RegisterField::<
6303 0,
6304 0x1,
6305 1,
6306 0,
6307 ntstfc::Tdbefc0,
6308 ntstfc::Tdbefc0,
6309 Ntstfc_SPEC,
6310 crate::common::W,
6311 >::from_register(self, 0)
6312 }
6313
6314 #[doc = "Normal Receive Data Buffer Full Force 0"]
6315 #[inline(always)]
6316 pub fn rdbffc0(
6317 self,
6318 ) -> crate::common::RegisterField<
6319 1,
6320 0x1,
6321 1,
6322 0,
6323 ntstfc::Rdbffc0,
6324 ntstfc::Rdbffc0,
6325 Ntstfc_SPEC,
6326 crate::common::W,
6327 > {
6328 crate::common::RegisterField::<
6329 1,
6330 0x1,
6331 1,
6332 0,
6333 ntstfc::Rdbffc0,
6334 ntstfc::Rdbffc0,
6335 Ntstfc_SPEC,
6336 crate::common::W,
6337 >::from_register(self, 0)
6338 }
6339
6340 #[doc = "Normal IBI Queue Empty/Full Force"]
6341 #[inline(always)]
6342 pub fn ibiqeffc(
6343 self,
6344 ) -> crate::common::RegisterField<
6345 2,
6346 0x1,
6347 1,
6348 0,
6349 ntstfc::Ibiqeffc,
6350 ntstfc::Ibiqeffc,
6351 Ntstfc_SPEC,
6352 crate::common::W,
6353 > {
6354 crate::common::RegisterField::<
6355 2,
6356 0x1,
6357 1,
6358 0,
6359 ntstfc::Ibiqeffc,
6360 ntstfc::Ibiqeffc,
6361 Ntstfc_SPEC,
6362 crate::common::W,
6363 >::from_register(self, 0)
6364 }
6365
6366 #[doc = "Normal Command Queue Empty Force"]
6367 #[inline(always)]
6368 pub fn cmdqefc(
6369 self,
6370 ) -> crate::common::RegisterField<
6371 3,
6372 0x1,
6373 1,
6374 0,
6375 ntstfc::Cmdqefc,
6376 ntstfc::Cmdqefc,
6377 Ntstfc_SPEC,
6378 crate::common::W,
6379 > {
6380 crate::common::RegisterField::<
6381 3,
6382 0x1,
6383 1,
6384 0,
6385 ntstfc::Cmdqefc,
6386 ntstfc::Cmdqefc,
6387 Ntstfc_SPEC,
6388 crate::common::W,
6389 >::from_register(self, 0)
6390 }
6391
6392 #[doc = "Normal Response Queue Full Force"]
6393 #[inline(always)]
6394 pub fn rspqffc(
6395 self,
6396 ) -> crate::common::RegisterField<
6397 4,
6398 0x1,
6399 1,
6400 0,
6401 ntstfc::Rspqffc,
6402 ntstfc::Rspqffc,
6403 Ntstfc_SPEC,
6404 crate::common::W,
6405 > {
6406 crate::common::RegisterField::<
6407 4,
6408 0x1,
6409 1,
6410 0,
6411 ntstfc::Rspqffc,
6412 ntstfc::Rspqffc,
6413 Ntstfc_SPEC,
6414 crate::common::W,
6415 >::from_register(self, 0)
6416 }
6417
6418 #[doc = "Normal Transfer Abort Force"]
6419 #[inline(always)]
6420 pub fn tabtfc(
6421 self,
6422 ) -> crate::common::RegisterField<
6423 5,
6424 0x1,
6425 1,
6426 0,
6427 ntstfc::Tabtfc,
6428 ntstfc::Tabtfc,
6429 Ntstfc_SPEC,
6430 crate::common::W,
6431 > {
6432 crate::common::RegisterField::<
6433 5,
6434 0x1,
6435 1,
6436 0,
6437 ntstfc::Tabtfc,
6438 ntstfc::Tabtfc,
6439 Ntstfc_SPEC,
6440 crate::common::W,
6441 >::from_register(self, 0)
6442 }
6443
6444 #[doc = "Normal Transfer Error Force"]
6445 #[inline(always)]
6446 pub fn tefc(
6447 self,
6448 ) -> crate::common::RegisterField<
6449 9,
6450 0x1,
6451 1,
6452 0,
6453 ntstfc::Tefc,
6454 ntstfc::Tefc,
6455 Ntstfc_SPEC,
6456 crate::common::W,
6457 > {
6458 crate::common::RegisterField::<
6459 9,
6460 0x1,
6461 1,
6462 0,
6463 ntstfc::Tefc,
6464 ntstfc::Tefc,
6465 Ntstfc_SPEC,
6466 crate::common::W,
6467 >::from_register(self, 0)
6468 }
6469
6470 #[doc = "Normal Receive Status Queue Full Force"]
6471 #[inline(always)]
6472 pub fn rsqffc(
6473 self,
6474 ) -> crate::common::RegisterField<
6475 20,
6476 0x1,
6477 1,
6478 0,
6479 ntstfc::Rsqffc,
6480 ntstfc::Rsqffc,
6481 Ntstfc_SPEC,
6482 crate::common::W,
6483 > {
6484 crate::common::RegisterField::<
6485 20,
6486 0x1,
6487 1,
6488 0,
6489 ntstfc::Rsqffc,
6490 ntstfc::Rsqffc,
6491 Ntstfc_SPEC,
6492 crate::common::W,
6493 >::from_register(self, 0)
6494 }
6495}
6496impl ::core::default::Default for Ntstfc {
6497 #[inline(always)]
6498 fn default() -> Ntstfc {
6499 <crate::RegValueT<Ntstfc_SPEC> as RegisterValue<_>>::new(0)
6500 }
6501}
6502pub mod ntstfc {
6503
6504 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6505 pub struct Tdbefc0_SPEC;
6506 pub type Tdbefc0 = crate::EnumBitfieldStruct<u8, Tdbefc0_SPEC>;
6507 impl Tdbefc0 {
6508 #[doc = "Not Force Tx0 Data Buffer Empty Interrupt for software testing."]
6509 pub const _0: Self = Self::new(0);
6510
6511 #[doc = "Force Tx0 Data Buffer Empty Interrupt for software testing."]
6512 pub const _1: Self = Self::new(1);
6513 }
6514 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6515 pub struct Rdbffc0_SPEC;
6516 pub type Rdbffc0 = crate::EnumBitfieldStruct<u8, Rdbffc0_SPEC>;
6517 impl Rdbffc0 {
6518 #[doc = "Not Force Rx0 Data Buffer Full Interrupt for software testing."]
6519 pub const _0: Self = Self::new(0);
6520
6521 #[doc = "Force Rx0 Data Buffer Full Interrupt for software testing."]
6522 pub const _1: Self = Self::new(1);
6523 }
6524 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6525 pub struct Ibiqeffc_SPEC;
6526 pub type Ibiqeffc = crate::EnumBitfieldStruct<u8, Ibiqeffc_SPEC>;
6527 impl Ibiqeffc {
6528 #[doc = "Not Force IBI Status Buffer Full Interrupt for software testing."]
6529 pub const _0: Self = Self::new(0);
6530
6531 #[doc = "Force IBI Status Buffer Full Interrupt for software testing."]
6532 pub const _1: Self = Self::new(1);
6533 }
6534 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6535 pub struct Cmdqefc_SPEC;
6536 pub type Cmdqefc = crate::EnumBitfieldStruct<u8, Cmdqefc_SPEC>;
6537 impl Cmdqefc {
6538 #[doc = "Not Force Command Buffer Empty Interrupt for software testing."]
6539 pub const _0: Self = Self::new(0);
6540
6541 #[doc = "Force Command Buffer Empty Interrupt for software testing."]
6542 pub const _1: Self = Self::new(1);
6543 }
6544 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6545 pub struct Rspqffc_SPEC;
6546 pub type Rspqffc = crate::EnumBitfieldStruct<u8, Rspqffc_SPEC>;
6547 impl Rspqffc {
6548 #[doc = "Not Force Response Buffer Full Interrupt for software testing."]
6549 pub const _0: Self = Self::new(0);
6550
6551 #[doc = "Force Response Buffer Full Interrupt for software testing."]
6552 pub const _1: Self = Self::new(1);
6553 }
6554 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6555 pub struct Tabtfc_SPEC;
6556 pub type Tabtfc = crate::EnumBitfieldStruct<u8, Tabtfc_SPEC>;
6557 impl Tabtfc {
6558 #[doc = "Not Force Transfer Abort Interrupt for software testing."]
6559 pub const _0: Self = Self::new(0);
6560
6561 #[doc = "Force Transfer Abort Interrupt for software testing."]
6562 pub const _1: Self = Self::new(1);
6563 }
6564 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6565 pub struct Tefc_SPEC;
6566 pub type Tefc = crate::EnumBitfieldStruct<u8, Tefc_SPEC>;
6567 impl Tefc {
6568 #[doc = "Not Force Transfer Error Interrupt for software testing."]
6569 pub const _0: Self = Self::new(0);
6570
6571 #[doc = "Force Transfer Error Interrupt for software testing."]
6572 pub const _1: Self = Self::new(1);
6573 }
6574 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6575 pub struct Rsqffc_SPEC;
6576 pub type Rsqffc = crate::EnumBitfieldStruct<u8, Rsqffc_SPEC>;
6577 impl Rsqffc {
6578 #[doc = "Not Force Receive Status Buffer Full Interrupt for software testing."]
6579 pub const _0: Self = Self::new(0);
6580
6581 #[doc = "Force Receive Status Buffer Full Interrupt for software testing."]
6582 pub const _1: Self = Self::new(1);
6583 }
6584}
6585#[doc(hidden)]
6586#[derive(Copy, Clone, Eq, PartialEq)]
6587pub struct Bcst_SPEC;
6588impl crate::sealed::RegSpec for Bcst_SPEC {
6589 type DataType = u32;
6590}
6591
6592#[doc = "Bus Condition Status Register"]
6593pub type Bcst = crate::RegValueT<Bcst_SPEC>;
6594
6595impl Bcst {
6596 #[doc = "Bus Free Detection Flag"]
6597 #[inline(always)]
6598 pub fn bfref(
6599 self,
6600 ) -> crate::common::RegisterField<
6601 0,
6602 0x1,
6603 1,
6604 0,
6605 bcst::Bfref,
6606 bcst::Bfref,
6607 Bcst_SPEC,
6608 crate::common::R,
6609 > {
6610 crate::common::RegisterField::<
6611 0,
6612 0x1,
6613 1,
6614 0,
6615 bcst::Bfref,
6616 bcst::Bfref,
6617 Bcst_SPEC,
6618 crate::common::R,
6619 >::from_register(self, 0)
6620 }
6621
6622 #[doc = "Bus Available Detection Flag"]
6623 #[inline(always)]
6624 pub fn bavlf(
6625 self,
6626 ) -> crate::common::RegisterField<
6627 1,
6628 0x1,
6629 1,
6630 0,
6631 bcst::Bavlf,
6632 bcst::Bavlf,
6633 Bcst_SPEC,
6634 crate::common::R,
6635 > {
6636 crate::common::RegisterField::<
6637 1,
6638 0x1,
6639 1,
6640 0,
6641 bcst::Bavlf,
6642 bcst::Bavlf,
6643 Bcst_SPEC,
6644 crate::common::R,
6645 >::from_register(self, 0)
6646 }
6647
6648 #[doc = "Bus Idle Detection Flag"]
6649 #[inline(always)]
6650 pub fn bidlf(
6651 self,
6652 ) -> crate::common::RegisterField<
6653 2,
6654 0x1,
6655 1,
6656 0,
6657 bcst::Bidlf,
6658 bcst::Bidlf,
6659 Bcst_SPEC,
6660 crate::common::R,
6661 > {
6662 crate::common::RegisterField::<
6663 2,
6664 0x1,
6665 1,
6666 0,
6667 bcst::Bidlf,
6668 bcst::Bidlf,
6669 Bcst_SPEC,
6670 crate::common::R,
6671 >::from_register(self, 0)
6672 }
6673}
6674impl ::core::default::Default for Bcst {
6675 #[inline(always)]
6676 fn default() -> Bcst {
6677 <crate::RegValueT<Bcst_SPEC> as RegisterValue<_>>::new(0)
6678 }
6679}
6680pub mod bcst {
6681
6682 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6683 pub struct Bfref_SPEC;
6684 pub type Bfref = crate::EnumBitfieldStruct<u8, Bfref_SPEC>;
6685 impl Bfref {
6686 #[doc = "Have not Detected Bus Free"]
6687 pub const _0: Self = Self::new(0);
6688
6689 #[doc = "Have Detected Bus Free"]
6690 pub const _1: Self = Self::new(1);
6691 }
6692 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6693 pub struct Bavlf_SPEC;
6694 pub type Bavlf = crate::EnumBitfieldStruct<u8, Bavlf_SPEC>;
6695 impl Bavlf {
6696 #[doc = "Have not Detected Bus Available"]
6697 pub const _0: Self = Self::new(0);
6698
6699 #[doc = "Have Detected Bus Available"]
6700 pub const _1: Self = Self::new(1);
6701 }
6702 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6703 pub struct Bidlf_SPEC;
6704 pub type Bidlf = crate::EnumBitfieldStruct<u8, Bidlf_SPEC>;
6705 impl Bidlf {
6706 #[doc = "Have not Detected Bus Idle"]
6707 pub const _0: Self = Self::new(0);
6708
6709 #[doc = "Have Detected Bus Idle"]
6710 pub const _1: Self = Self::new(1);
6711 }
6712}
6713#[doc(hidden)]
6714#[derive(Copy, Clone, Eq, PartialEq)]
6715pub struct Svst_SPEC;
6716impl crate::sealed::RegSpec for Svst_SPEC {
6717 type DataType = u32;
6718}
6719
6720#[doc = "Slave Status Register"]
6721pub type Svst = crate::RegValueT<Svst_SPEC>;
6722
6723impl Svst {
6724 #[doc = "General Call Address Detection Flag"]
6725 #[inline(always)]
6726 pub fn gcaf(
6727 self,
6728 ) -> crate::common::RegisterField<
6729 0,
6730 0x1,
6731 1,
6732 0,
6733 svst::Gcaf,
6734 svst::Gcaf,
6735 Svst_SPEC,
6736 crate::common::RW,
6737 > {
6738 crate::common::RegisterField::<
6739 0,
6740 0x1,
6741 1,
6742 0,
6743 svst::Gcaf,
6744 svst::Gcaf,
6745 Svst_SPEC,
6746 crate::common::RW,
6747 >::from_register(self, 0)
6748 }
6749
6750 #[doc = "Hs-mode Master Code Detection Flag"]
6751 #[inline(always)]
6752 pub fn hsmcf(
6753 self,
6754 ) -> crate::common::RegisterField<
6755 5,
6756 0x1,
6757 1,
6758 0,
6759 svst::Hsmcf,
6760 svst::Hsmcf,
6761 Svst_SPEC,
6762 crate::common::RW,
6763 > {
6764 crate::common::RegisterField::<
6765 5,
6766 0x1,
6767 1,
6768 0,
6769 svst::Hsmcf,
6770 svst::Hsmcf,
6771 Svst_SPEC,
6772 crate::common::RW,
6773 >::from_register(self, 0)
6774 }
6775
6776 #[doc = "Device-ID Address Detection Flag"]
6777 #[inline(always)]
6778 pub fn dvidf(
6779 self,
6780 ) -> crate::common::RegisterField<
6781 6,
6782 0x1,
6783 1,
6784 0,
6785 svst::Dvidf,
6786 svst::Dvidf,
6787 Svst_SPEC,
6788 crate::common::RW,
6789 > {
6790 crate::common::RegisterField::<
6791 6,
6792 0x1,
6793 1,
6794 0,
6795 svst::Dvidf,
6796 svst::Dvidf,
6797 Svst_SPEC,
6798 crate::common::RW,
6799 >::from_register(self, 0)
6800 }
6801
6802 #[doc = "Host Address Detection Flag"]
6803 #[inline(always)]
6804 pub fn hoaf(
6805 self,
6806 ) -> crate::common::RegisterField<
6807 15,
6808 0x1,
6809 1,
6810 0,
6811 svst::Hoaf,
6812 svst::Hoaf,
6813 Svst_SPEC,
6814 crate::common::RW,
6815 > {
6816 crate::common::RegisterField::<
6817 15,
6818 0x1,
6819 1,
6820 0,
6821 svst::Hoaf,
6822 svst::Hoaf,
6823 Svst_SPEC,
6824 crate::common::RW,
6825 >::from_register(self, 0)
6826 }
6827
6828 #[doc = "Slave Address Detection Flag 0"]
6829 #[inline(always)]
6830 pub fn svaf0(
6831 self,
6832 ) -> crate::common::RegisterField<
6833 16,
6834 0x1,
6835 1,
6836 0,
6837 svst::Svaf0,
6838 svst::Svaf0,
6839 Svst_SPEC,
6840 crate::common::RW,
6841 > {
6842 crate::common::RegisterField::<
6843 16,
6844 0x1,
6845 1,
6846 0,
6847 svst::Svaf0,
6848 svst::Svaf0,
6849 Svst_SPEC,
6850 crate::common::RW,
6851 >::from_register(self, 0)
6852 }
6853}
6854impl ::core::default::Default for Svst {
6855 #[inline(always)]
6856 fn default() -> Svst {
6857 <crate::RegValueT<Svst_SPEC> as RegisterValue<_>>::new(0)
6858 }
6859}
6860pub mod svst {
6861
6862 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6863 pub struct Gcaf_SPEC;
6864 pub type Gcaf = crate::EnumBitfieldStruct<u8, Gcaf_SPEC>;
6865 impl Gcaf {
6866 #[doc = "General call address does not detect."]
6867 pub const _0: Self = Self::new(0);
6868
6869 #[doc = "General call address detects."]
6870 pub const _1: Self = Self::new(1);
6871 }
6872 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6873 pub struct Hsmcf_SPEC;
6874 pub type Hsmcf = crate::EnumBitfieldStruct<u8, Hsmcf_SPEC>;
6875 impl Hsmcf {
6876 #[doc = "Hs-mode Master Code does not detect."]
6877 pub const _0: Self = Self::new(0);
6878
6879 #[doc = "Hs-mode Master Code detects."]
6880 pub const _1: Self = Self::new(1);
6881 }
6882 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6883 pub struct Dvidf_SPEC;
6884 pub type Dvidf = crate::EnumBitfieldStruct<u8, Dvidf_SPEC>;
6885 impl Dvidf {
6886 #[doc = "Device-ID command does not detect."]
6887 pub const _0: Self = Self::new(0);
6888
6889 #[doc = "Device-ID command detects. This bit set to 1 when the first frame received immediately after a START condition is detected matches a value of (device ID (1111 100) + 0\\[W\\])."]
6890 pub const _1: Self = Self::new(1);
6891 }
6892 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6893 pub struct Hoaf_SPEC;
6894 pub type Hoaf = crate::EnumBitfieldStruct<u8, Hoaf_SPEC>;
6895 impl Hoaf {
6896 #[doc = "Host address does not detect."]
6897 pub const _0: Self = Self::new(0);
6898
6899 #[doc = "Host address detects. This bit set to 1 when the received slave address matches the host address (0001 000)."]
6900 pub const _1: Self = Self::new(1);
6901 }
6902 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6903 pub struct Svaf0_SPEC;
6904 pub type Svaf0 = crate::EnumBitfieldStruct<u8, Svaf0_SPEC>;
6905 impl Svaf0 {
6906 #[doc = "Slave 0 does not detect"]
6907 pub const _0: Self = Self::new(0);
6908
6909 #[doc = "Slave 0 detect"]
6910 pub const _1: Self = Self::new(1);
6911 }
6912}
6913#[doc(hidden)]
6914#[derive(Copy, Clone, Eq, PartialEq)]
6915pub struct Datbas_SPEC;
6916impl crate::sealed::RegSpec for Datbas_SPEC {
6917 type DataType = u32;
6918}
6919
6920#[doc = "Device Address Table Basic Register %s"]
6921pub type Datbas = crate::RegValueT<Datbas_SPEC>;
6922
6923impl Datbas {
6924 #[doc = "Device Static Address"]
6925 #[inline(always)]
6926 pub fn dvstad(
6927 self,
6928 ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Datbas_SPEC, crate::common::RW> {
6929 crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Datbas_SPEC,crate::common::RW>::from_register(self,0)
6930 }
6931
6932 #[doc = "Device IBI Payload"]
6933 #[inline(always)]
6934 pub fn dvibipl(
6935 self,
6936 ) -> crate::common::RegisterField<
6937 12,
6938 0x1,
6939 1,
6940 0,
6941 datbas::Dvibipl,
6942 datbas::Dvibipl,
6943 Datbas_SPEC,
6944 crate::common::RW,
6945 > {
6946 crate::common::RegisterField::<
6947 12,
6948 0x1,
6949 1,
6950 0,
6951 datbas::Dvibipl,
6952 datbas::Dvibipl,
6953 Datbas_SPEC,
6954 crate::common::RW,
6955 >::from_register(self, 0)
6956 }
6957
6958 #[doc = "Device In-Band Slave Interrupt Request Reject"]
6959 #[inline(always)]
6960 pub fn dvsirrj(
6961 self,
6962 ) -> crate::common::RegisterField<
6963 13,
6964 0x1,
6965 1,
6966 0,
6967 datbas::Dvsirrj,
6968 datbas::Dvsirrj,
6969 Datbas_SPEC,
6970 crate::common::RW,
6971 > {
6972 crate::common::RegisterField::<
6973 13,
6974 0x1,
6975 1,
6976 0,
6977 datbas::Dvsirrj,
6978 datbas::Dvsirrj,
6979 Datbas_SPEC,
6980 crate::common::RW,
6981 >::from_register(self, 0)
6982 }
6983
6984 #[doc = "Device In-Band Master Request Reject"]
6985 #[inline(always)]
6986 pub fn dvmrrj(
6987 self,
6988 ) -> crate::common::RegisterField<
6989 14,
6990 0x1,
6991 1,
6992 0,
6993 datbas::Dvmrrj,
6994 datbas::Dvmrrj,
6995 Datbas_SPEC,
6996 crate::common::RW,
6997 > {
6998 crate::common::RegisterField::<
6999 14,
7000 0x1,
7001 1,
7002 0,
7003 datbas::Dvmrrj,
7004 datbas::Dvmrrj,
7005 Datbas_SPEC,
7006 crate::common::RW,
7007 >::from_register(self, 0)
7008 }
7009
7010 #[doc = "Device I3C Dynamic Address"]
7011 #[inline(always)]
7012 pub fn dvdyad(
7013 self,
7014 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Datbas_SPEC, crate::common::RW> {
7015 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Datbas_SPEC,crate::common::RW>::from_register(self,0)
7016 }
7017
7018 #[doc = "Device NACK Retry Count"]
7019 #[inline(always)]
7020 pub fn dvnack(
7021 self,
7022 ) -> crate::common::RegisterField<29, 0x3, 1, 0, u8, u8, Datbas_SPEC, crate::common::RW> {
7023 crate::common::RegisterField::<29,0x3,1,0,u8,u8,Datbas_SPEC,crate::common::RW>::from_register(self,0)
7024 }
7025
7026 #[doc = "Device Type"]
7027 #[inline(always)]
7028 pub fn dvtyp(
7029 self,
7030 ) -> crate::common::RegisterField<
7031 31,
7032 0x1,
7033 1,
7034 0,
7035 datbas::Dvtyp,
7036 datbas::Dvtyp,
7037 Datbas_SPEC,
7038 crate::common::RW,
7039 > {
7040 crate::common::RegisterField::<
7041 31,
7042 0x1,
7043 1,
7044 0,
7045 datbas::Dvtyp,
7046 datbas::Dvtyp,
7047 Datbas_SPEC,
7048 crate::common::RW,
7049 >::from_register(self, 0)
7050 }
7051}
7052impl ::core::default::Default for Datbas {
7053 #[inline(always)]
7054 fn default() -> Datbas {
7055 <crate::RegValueT<Datbas_SPEC> as RegisterValue<_>>::new(0)
7056 }
7057}
7058pub mod datbas {
7059
7060 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7061 pub struct Dvibipl_SPEC;
7062 pub type Dvibipl = crate::EnumBitfieldStruct<u8, Dvibipl_SPEC>;
7063 impl Dvibipl {
7064 #[doc = "IBIs from this Device do not carry a Data Payload."]
7065 pub const _0: Self = Self::new(0);
7066
7067 #[doc = "IBIs from this Device do carry a Data Payload."]
7068 pub const _1: Self = Self::new(1);
7069 }
7070 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7071 pub struct Dvsirrj_SPEC;
7072 pub type Dvsirrj = crate::EnumBitfieldStruct<u8, Dvsirrj_SPEC>;
7073 impl Dvsirrj {
7074 #[doc = "This Device shall ACK the SIR."]
7075 pub const _0: Self = Self::new(0);
7076
7077 #[doc = "This Device shall NACK the SIR and send the auto-disable CCC."]
7078 pub const _1: Self = Self::new(1);
7079 }
7080 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7081 pub struct Dvmrrj_SPEC;
7082 pub type Dvmrrj = crate::EnumBitfieldStruct<u8, Dvmrrj_SPEC>;
7083 impl Dvmrrj {
7084 #[doc = "This Device shall ACK Master Requests."]
7085 pub const _0: Self = Self::new(0);
7086
7087 #[doc = "This Device shall NACK Master Requests and send the auto-disable command."]
7088 pub const _1: Self = Self::new(1);
7089 }
7090 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7091 pub struct Dvtyp_SPEC;
7092 pub type Dvtyp = crate::EnumBitfieldStruct<u8, Dvtyp_SPEC>;
7093 impl Dvtyp {
7094 #[doc = "I3C Device"]
7095 pub const _0: Self = Self::new(0);
7096
7097 #[doc = "I2C Device"]
7098 pub const _1: Self = Self::new(1);
7099 }
7100}
7101#[doc(hidden)]
7102#[derive(Copy, Clone, Eq, PartialEq)]
7103pub struct Exdatbas_SPEC;
7104impl crate::sealed::RegSpec for Exdatbas_SPEC {
7105 type DataType = u32;
7106}
7107
7108#[doc = "Extended Device Address Table Basic Register"]
7109pub type Exdatbas = crate::RegValueT<Exdatbas_SPEC>;
7110
7111impl Exdatbas {
7112 #[doc = "Extended Device Static Address"]
7113 #[inline(always)]
7114 pub fn edstad(
7115 self,
7116 ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Exdatbas_SPEC, crate::common::RW> {
7117 crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
7118 }
7119
7120 #[doc = "Extended Device I3C Dynamic Address"]
7121 #[inline(always)]
7122 pub fn eddyad(
7123 self,
7124 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Exdatbas_SPEC, crate::common::RW>
7125 {
7126 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
7127 }
7128
7129 #[doc = "Extended Device NACK Retry Count"]
7130 #[inline(always)]
7131 pub fn ednack(
7132 self,
7133 ) -> crate::common::RegisterField<29, 0x3, 1, 0, u8, u8, Exdatbas_SPEC, crate::common::RW> {
7134 crate::common::RegisterField::<29,0x3,1,0,u8,u8,Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
7135 }
7136
7137 #[doc = "Extended Device Type"]
7138 #[inline(always)]
7139 pub fn edtyp(
7140 self,
7141 ) -> crate::common::RegisterField<
7142 31,
7143 0x1,
7144 1,
7145 0,
7146 exdatbas::Edtyp,
7147 exdatbas::Edtyp,
7148 Exdatbas_SPEC,
7149 crate::common::RW,
7150 > {
7151 crate::common::RegisterField::<
7152 31,
7153 0x1,
7154 1,
7155 0,
7156 exdatbas::Edtyp,
7157 exdatbas::Edtyp,
7158 Exdatbas_SPEC,
7159 crate::common::RW,
7160 >::from_register(self, 0)
7161 }
7162}
7163impl ::core::default::Default for Exdatbas {
7164 #[inline(always)]
7165 fn default() -> Exdatbas {
7166 <crate::RegValueT<Exdatbas_SPEC> as RegisterValue<_>>::new(0)
7167 }
7168}
7169pub mod exdatbas {
7170
7171 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7172 pub struct Edtyp_SPEC;
7173 pub type Edtyp = crate::EnumBitfieldStruct<u8, Edtyp_SPEC>;
7174 impl Edtyp {
7175 #[doc = "I3C Device"]
7176 pub const _0: Self = Self::new(0);
7177
7178 #[doc = "I2C Device"]
7179 pub const _1: Self = Self::new(1);
7180 }
7181}
7182#[doc(hidden)]
7183#[derive(Copy, Clone, Eq, PartialEq)]
7184pub struct Sdatbas0_SPEC;
7185impl crate::sealed::RegSpec for Sdatbas0_SPEC {
7186 type DataType = u32;
7187}
7188
7189#[doc = "Slave Device Address Table Basic Register 0"]
7190pub type Sdatbas0 = crate::RegValueT<Sdatbas0_SPEC>;
7191
7192impl Sdatbas0 {
7193 #[doc = "Slave Device Static Address"]
7194 #[inline(always)]
7195 pub fn sdstad(
7196 self,
7197 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Sdatbas0_SPEC, crate::common::RW>
7198 {
7199 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Sdatbas0_SPEC,crate::common::RW>::from_register(self,0)
7200 }
7201
7202 #[doc = "Slave Device Address Length Selection"]
7203 #[inline(always)]
7204 pub fn sdadls(
7205 self,
7206 ) -> crate::common::RegisterField<
7207 10,
7208 0x1,
7209 1,
7210 0,
7211 sdatbas0::Sdadls,
7212 sdatbas0::Sdadls,
7213 Sdatbas0_SPEC,
7214 crate::common::RW,
7215 > {
7216 crate::common::RegisterField::<
7217 10,
7218 0x1,
7219 1,
7220 0,
7221 sdatbas0::Sdadls,
7222 sdatbas0::Sdadls,
7223 Sdatbas0_SPEC,
7224 crate::common::RW,
7225 >::from_register(self, 0)
7226 }
7227
7228 #[doc = "Slave Device IBI Payload"]
7229 #[inline(always)]
7230 pub fn sdibipl(
7231 self,
7232 ) -> crate::common::RegisterField<
7233 12,
7234 0x1,
7235 1,
7236 0,
7237 sdatbas0::Sdibipl,
7238 sdatbas0::Sdibipl,
7239 Sdatbas0_SPEC,
7240 crate::common::R,
7241 > {
7242 crate::common::RegisterField::<
7243 12,
7244 0x1,
7245 1,
7246 0,
7247 sdatbas0::Sdibipl,
7248 sdatbas0::Sdibipl,
7249 Sdatbas0_SPEC,
7250 crate::common::R,
7251 >::from_register(self, 0)
7252 }
7253
7254 #[doc = "Slave Device I3C Dynamic Address"]
7255 #[inline(always)]
7256 pub fn sddyad(
7257 self,
7258 ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, Sdatbas0_SPEC, crate::common::RW>
7259 {
7260 crate::common::RegisterField::<16,0x7f,1,0,u8,u8,Sdatbas0_SPEC,crate::common::RW>::from_register(self,0)
7261 }
7262}
7263impl ::core::default::Default for Sdatbas0 {
7264 #[inline(always)]
7265 fn default() -> Sdatbas0 {
7266 <crate::RegValueT<Sdatbas0_SPEC> as RegisterValue<_>>::new(0)
7267 }
7268}
7269pub mod sdatbas0 {
7270
7271 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7272 pub struct Sdadls_SPEC;
7273 pub type Sdadls = crate::EnumBitfieldStruct<u8, Sdadls_SPEC>;
7274 impl Sdadls {
7275 #[doc = "Slave device address length 7 bits selected."]
7276 pub const _0: Self = Self::new(0);
7277
7278 #[doc = "Slave device address length 10 bits selected. (I2C device only)"]
7279 pub const _1: Self = Self::new(1);
7280 }
7281 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7282 pub struct Sdibipl_SPEC;
7283 pub type Sdibipl = crate::EnumBitfieldStruct<u8, Sdibipl_SPEC>;
7284 impl Sdibipl {
7285 #[doc = "IBIs from this device do not carry a data payload."]
7286 pub const _0: Self = Self::new(0);
7287
7288 #[doc = "IBIs from this device carry a data payload."]
7289 pub const _1: Self = Self::new(1);
7290 }
7291}
7292#[doc(hidden)]
7293#[derive(Copy, Clone, Eq, PartialEq)]
7294pub struct Msdct_SPEC;
7295impl crate::sealed::RegSpec for Msdct_SPEC {
7296 type DataType = u32;
7297}
7298
7299#[doc = "Master Device Characteristic Table Register %s"]
7300pub type Msdct = crate::RegValueT<Msdct_SPEC>;
7301
7302impl Msdct {
7303 #[doc = "Max Data Speed Limitation"]
7304 #[inline(always)]
7305 pub fn rbcr0(
7306 self,
7307 ) -> crate::common::RegisterField<
7308 8,
7309 0x1,
7310 1,
7311 0,
7312 msdct::Rbcr0,
7313 msdct::Rbcr0,
7314 Msdct_SPEC,
7315 crate::common::RW,
7316 > {
7317 crate::common::RegisterField::<
7318 8,
7319 0x1,
7320 1,
7321 0,
7322 msdct::Rbcr0,
7323 msdct::Rbcr0,
7324 Msdct_SPEC,
7325 crate::common::RW,
7326 >::from_register(self, 0)
7327 }
7328
7329 #[doc = "IBI Request Capable"]
7330 #[inline(always)]
7331 pub fn rbcr1(
7332 self,
7333 ) -> crate::common::RegisterField<
7334 9,
7335 0x1,
7336 1,
7337 0,
7338 msdct::Rbcr1,
7339 msdct::Rbcr1,
7340 Msdct_SPEC,
7341 crate::common::RW,
7342 > {
7343 crate::common::RegisterField::<
7344 9,
7345 0x1,
7346 1,
7347 0,
7348 msdct::Rbcr1,
7349 msdct::Rbcr1,
7350 Msdct_SPEC,
7351 crate::common::RW,
7352 >::from_register(self, 0)
7353 }
7354
7355 #[doc = "IBI Payload"]
7356 #[inline(always)]
7357 pub fn rbcr2(
7358 self,
7359 ) -> crate::common::RegisterField<
7360 10,
7361 0x1,
7362 1,
7363 0,
7364 msdct::Rbcr2,
7365 msdct::Rbcr2,
7366 Msdct_SPEC,
7367 crate::common::RW,
7368 > {
7369 crate::common::RegisterField::<
7370 10,
7371 0x1,
7372 1,
7373 0,
7374 msdct::Rbcr2,
7375 msdct::Rbcr2,
7376 Msdct_SPEC,
7377 crate::common::RW,
7378 >::from_register(self, 0)
7379 }
7380
7381 #[doc = "Offline Capable"]
7382 #[inline(always)]
7383 pub fn rbcr3(
7384 self,
7385 ) -> crate::common::RegisterField<
7386 11,
7387 0x1,
7388 1,
7389 0,
7390 msdct::Rbcr3,
7391 msdct::Rbcr3,
7392 Msdct_SPEC,
7393 crate::common::RW,
7394 > {
7395 crate::common::RegisterField::<
7396 11,
7397 0x1,
7398 1,
7399 0,
7400 msdct::Rbcr3,
7401 msdct::Rbcr3,
7402 Msdct_SPEC,
7403 crate::common::RW,
7404 >::from_register(self, 0)
7405 }
7406
7407 #[doc = "Device Role"]
7408 #[inline(always)]
7409 pub fn rbcr76(
7410 self,
7411 ) -> crate::common::RegisterField<
7412 14,
7413 0x3,
7414 1,
7415 0,
7416 msdct::Rbcr76,
7417 msdct::Rbcr76,
7418 Msdct_SPEC,
7419 crate::common::RW,
7420 > {
7421 crate::common::RegisterField::<
7422 14,
7423 0x3,
7424 1,
7425 0,
7426 msdct::Rbcr76,
7427 msdct::Rbcr76,
7428 Msdct_SPEC,
7429 crate::common::RW,
7430 >::from_register(self, 0)
7431 }
7432}
7433impl ::core::default::Default for Msdct {
7434 #[inline(always)]
7435 fn default() -> Msdct {
7436 <crate::RegValueT<Msdct_SPEC> as RegisterValue<_>>::new(0)
7437 }
7438}
7439pub mod msdct {
7440
7441 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7442 pub struct Rbcr0_SPEC;
7443 pub type Rbcr0 = crate::EnumBitfieldStruct<u8, Rbcr0_SPEC>;
7444 impl Rbcr0 {
7445 #[doc = "No Limitation"]
7446 pub const _0: Self = Self::new(0);
7447
7448 #[doc = "Limitation"]
7449 pub const _1: Self = Self::new(1);
7450 }
7451 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7452 pub struct Rbcr1_SPEC;
7453 pub type Rbcr1 = crate::EnumBitfieldStruct<u8, Rbcr1_SPEC>;
7454 impl Rbcr1 {
7455 #[doc = "Not Capable"]
7456 pub const _0: Self = Self::new(0);
7457
7458 #[doc = "Capable"]
7459 pub const _1: Self = Self::new(1);
7460 }
7461 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7462 pub struct Rbcr2_SPEC;
7463 pub type Rbcr2 = crate::EnumBitfieldStruct<u8, Rbcr2_SPEC>;
7464 impl Rbcr2 {
7465 #[doc = "No data byte follows the accepted IBI."]
7466 pub const _0: Self = Self::new(0);
7467
7468 #[doc = "Mandatory one or more data bytes follow the accepted IBI. Data byte continuation is indicated by T-Bit."]
7469 pub const _1: Self = Self::new(1);
7470 }
7471 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7472 pub struct Rbcr3_SPEC;
7473 pub type Rbcr3 = crate::EnumBitfieldStruct<u8, Rbcr3_SPEC>;
7474 impl Rbcr3 {
7475 #[doc = "Device will always respond to I3C bus commands."]
7476 pub const _0: Self = Self::new(0);
7477
7478 #[doc = "Device will not always respond to I3C bus commands."]
7479 pub const _1: Self = Self::new(1);
7480 }
7481 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7482 pub struct Rbcr76_SPEC;
7483 pub type Rbcr76 = crate::EnumBitfieldStruct<u8, Rbcr76_SPEC>;
7484 impl Rbcr76 {
7485 #[doc = "I3C Slave"]
7486 pub const _00: Self = Self::new(0);
7487
7488 #[doc = "I3C Master"]
7489 pub const _01: Self = Self::new(1);
7490 }
7491}
7492#[doc(hidden)]
7493#[derive(Copy, Clone, Eq, PartialEq)]
7494pub struct Svdct_SPEC;
7495impl crate::sealed::RegSpec for Svdct_SPEC {
7496 type DataType = u32;
7497}
7498
7499#[doc = "Slave Device Characteristic Table Register"]
7500pub type Svdct = crate::RegValueT<Svdct_SPEC>;
7501
7502impl Svdct {
7503 #[doc = "Transfar Device Characteristic Register"]
7504 #[inline(always)]
7505 pub fn tdcr(
7506 self,
7507 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Svdct_SPEC, crate::common::RW> {
7508 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Svdct_SPEC,crate::common::RW>::from_register(self,0)
7509 }
7510
7511 #[doc = "Max Data Speed Limitation"]
7512 #[inline(always)]
7513 pub fn tbcr0(
7514 self,
7515 ) -> crate::common::RegisterField<
7516 8,
7517 0x1,
7518 1,
7519 0,
7520 svdct::Tbcr0,
7521 svdct::Tbcr0,
7522 Svdct_SPEC,
7523 crate::common::RW,
7524 > {
7525 crate::common::RegisterField::<
7526 8,
7527 0x1,
7528 1,
7529 0,
7530 svdct::Tbcr0,
7531 svdct::Tbcr0,
7532 Svdct_SPEC,
7533 crate::common::RW,
7534 >::from_register(self, 0)
7535 }
7536
7537 #[doc = "IBI Request Capable"]
7538 #[inline(always)]
7539 pub fn tbcr1(
7540 self,
7541 ) -> crate::common::RegisterField<
7542 9,
7543 0x1,
7544 1,
7545 0,
7546 svdct::Tbcr1,
7547 svdct::Tbcr1,
7548 Svdct_SPEC,
7549 crate::common::RW,
7550 > {
7551 crate::common::RegisterField::<
7552 9,
7553 0x1,
7554 1,
7555 0,
7556 svdct::Tbcr1,
7557 svdct::Tbcr1,
7558 Svdct_SPEC,
7559 crate::common::RW,
7560 >::from_register(self, 0)
7561 }
7562
7563 #[doc = "IBI Payload"]
7564 #[inline(always)]
7565 pub fn tbcr2(
7566 self,
7567 ) -> crate::common::RegisterField<
7568 10,
7569 0x1,
7570 1,
7571 0,
7572 svdct::Tbcr2,
7573 svdct::Tbcr2,
7574 Svdct_SPEC,
7575 crate::common::RW,
7576 > {
7577 crate::common::RegisterField::<
7578 10,
7579 0x1,
7580 1,
7581 0,
7582 svdct::Tbcr2,
7583 svdct::Tbcr2,
7584 Svdct_SPEC,
7585 crate::common::RW,
7586 >::from_register(self, 0)
7587 }
7588
7589 #[doc = "Offline Capable"]
7590 #[inline(always)]
7591 pub fn tbcr3(
7592 self,
7593 ) -> crate::common::RegisterField<
7594 11,
7595 0x1,
7596 1,
7597 0,
7598 svdct::Tbcr3,
7599 svdct::Tbcr3,
7600 Svdct_SPEC,
7601 crate::common::RW,
7602 > {
7603 crate::common::RegisterField::<
7604 11,
7605 0x1,
7606 1,
7607 0,
7608 svdct::Tbcr3,
7609 svdct::Tbcr3,
7610 Svdct_SPEC,
7611 crate::common::RW,
7612 >::from_register(self, 0)
7613 }
7614
7615 #[doc = "Device Role"]
7616 #[inline(always)]
7617 pub fn tbcr76(
7618 self,
7619 ) -> crate::common::RegisterField<
7620 14,
7621 0x3,
7622 1,
7623 0,
7624 svdct::Tbcr76,
7625 svdct::Tbcr76,
7626 Svdct_SPEC,
7627 crate::common::RW,
7628 > {
7629 crate::common::RegisterField::<
7630 14,
7631 0x3,
7632 1,
7633 0,
7634 svdct::Tbcr76,
7635 svdct::Tbcr76,
7636 Svdct_SPEC,
7637 crate::common::RW,
7638 >::from_register(self, 0)
7639 }
7640}
7641impl ::core::default::Default for Svdct {
7642 #[inline(always)]
7643 fn default() -> Svdct {
7644 <crate::RegValueT<Svdct_SPEC> as RegisterValue<_>>::new(0)
7645 }
7646}
7647pub mod svdct {
7648
7649 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7650 pub struct Tbcr0_SPEC;
7651 pub type Tbcr0 = crate::EnumBitfieldStruct<u8, Tbcr0_SPEC>;
7652 impl Tbcr0 {
7653 #[doc = "No Limitation"]
7654 pub const _0: Self = Self::new(0);
7655
7656 #[doc = "Limitation"]
7657 pub const _1: Self = Self::new(1);
7658 }
7659 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7660 pub struct Tbcr1_SPEC;
7661 pub type Tbcr1 = crate::EnumBitfieldStruct<u8, Tbcr1_SPEC>;
7662 impl Tbcr1 {
7663 #[doc = "Not Capable"]
7664 pub const _0: Self = Self::new(0);
7665
7666 #[doc = "Capable"]
7667 pub const _1: Self = Self::new(1);
7668 }
7669 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7670 pub struct Tbcr2_SPEC;
7671 pub type Tbcr2 = crate::EnumBitfieldStruct<u8, Tbcr2_SPEC>;
7672 impl Tbcr2 {
7673 #[doc = "No data byte follows the accepted IBI."]
7674 pub const _0: Self = Self::new(0);
7675
7676 #[doc = "Mandatory one or more data bytes follow the accepted IBI. Data byte continuation is indicated by T-Bit."]
7677 pub const _1: Self = Self::new(1);
7678 }
7679 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7680 pub struct Tbcr3_SPEC;
7681 pub type Tbcr3 = crate::EnumBitfieldStruct<u8, Tbcr3_SPEC>;
7682 impl Tbcr3 {
7683 #[doc = "Device will always respond to I3C bus commands."]
7684 pub const _0: Self = Self::new(0);
7685
7686 #[doc = "Device will not always respond to I3C bus commands."]
7687 pub const _1: Self = Self::new(1);
7688 }
7689 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7690 pub struct Tbcr76_SPEC;
7691 pub type Tbcr76 = crate::EnumBitfieldStruct<u8, Tbcr76_SPEC>;
7692 impl Tbcr76 {
7693 #[doc = "I3C Slave"]
7694 pub const _00: Self = Self::new(0);
7695
7696 #[doc = "I3C Master"]
7697 pub const _01: Self = Self::new(1);
7698
7699 #[doc = "Reserved for future definition by MIPI Sensor WG"]
7700 pub const _10: Self = Self::new(2);
7701
7702 #[doc = "Reserved for future definition by MIPI Sensor WG"]
7703 pub const _11: Self = Self::new(3);
7704 }
7705}
7706#[doc(hidden)]
7707#[derive(Copy, Clone, Eq, PartialEq)]
7708pub struct Sdctpidl_SPEC;
7709impl crate::sealed::RegSpec for Sdctpidl_SPEC {
7710 type DataType = u32;
7711}
7712
7713#[doc = "Slave Device Characteristic Table Provisional ID Low Register"]
7714pub type Sdctpidl = crate::RegValueT<Sdctpidl_SPEC>;
7715
7716impl NoBitfieldReg<Sdctpidl_SPEC> for Sdctpidl {}
7717impl ::core::default::Default for Sdctpidl {
7718 #[inline(always)]
7719 fn default() -> Sdctpidl {
7720 <crate::RegValueT<Sdctpidl_SPEC> as RegisterValue<_>>::new(0)
7721 }
7722}
7723
7724#[doc(hidden)]
7725#[derive(Copy, Clone, Eq, PartialEq)]
7726pub struct Sdctpidh_SPEC;
7727impl crate::sealed::RegSpec for Sdctpidh_SPEC {
7728 type DataType = u32;
7729}
7730
7731#[doc = "Slave Device Characteristic Table Provisional ID High Register"]
7732pub type Sdctpidh = crate::RegValueT<Sdctpidh_SPEC>;
7733
7734impl NoBitfieldReg<Sdctpidh_SPEC> for Sdctpidh {}
7735impl ::core::default::Default for Sdctpidh {
7736 #[inline(always)]
7737 fn default() -> Sdctpidh {
7738 <crate::RegValueT<Sdctpidh_SPEC> as RegisterValue<_>>::new(0)
7739 }
7740}
7741
7742#[doc(hidden)]
7743#[derive(Copy, Clone, Eq, PartialEq)]
7744pub struct Svdvad0_SPEC;
7745impl crate::sealed::RegSpec for Svdvad0_SPEC {
7746 type DataType = u32;
7747}
7748
7749#[doc = "Slave Device Address Register 0"]
7750pub type Svdvad0 = crate::RegValueT<Svdvad0_SPEC>;
7751
7752impl Svdvad0 {
7753 #[doc = "Slave Address"]
7754 #[inline(always)]
7755 pub fn svad(
7756 self,
7757 ) -> crate::common::RegisterField<16, 0x3ff, 1, 0, u16, u16, Svdvad0_SPEC, crate::common::R>
7758 {
7759 crate::common::RegisterField::<16,0x3ff,1,0,u16,u16,Svdvad0_SPEC,crate::common::R>::from_register(self,0)
7760 }
7761
7762 #[doc = "Slave Address Length"]
7763 #[inline(always)]
7764 pub fn sadlg(
7765 self,
7766 ) -> crate::common::RegisterField<
7767 27,
7768 0x1,
7769 1,
7770 0,
7771 svdvad0::Sadlg,
7772 svdvad0::Sadlg,
7773 Svdvad0_SPEC,
7774 crate::common::R,
7775 > {
7776 crate::common::RegisterField::<
7777 27,
7778 0x1,
7779 1,
7780 0,
7781 svdvad0::Sadlg,
7782 svdvad0::Sadlg,
7783 Svdvad0_SPEC,
7784 crate::common::R,
7785 >::from_register(self, 0)
7786 }
7787
7788 #[doc = "Slave Static Address Valid"]
7789 #[inline(always)]
7790 pub fn sstadv(
7791 self,
7792 ) -> crate::common::RegisterField<
7793 30,
7794 0x1,
7795 1,
7796 0,
7797 svdvad0::Sstadv,
7798 svdvad0::Sstadv,
7799 Svdvad0_SPEC,
7800 crate::common::R,
7801 > {
7802 crate::common::RegisterField::<
7803 30,
7804 0x1,
7805 1,
7806 0,
7807 svdvad0::Sstadv,
7808 svdvad0::Sstadv,
7809 Svdvad0_SPEC,
7810 crate::common::R,
7811 >::from_register(self, 0)
7812 }
7813
7814 #[doc = "Slave Dynamic Address Valid"]
7815 #[inline(always)]
7816 pub fn sdyadv(
7817 self,
7818 ) -> crate::common::RegisterField<
7819 31,
7820 0x1,
7821 1,
7822 0,
7823 svdvad0::Sdyadv,
7824 svdvad0::Sdyadv,
7825 Svdvad0_SPEC,
7826 crate::common::R,
7827 > {
7828 crate::common::RegisterField::<
7829 31,
7830 0x1,
7831 1,
7832 0,
7833 svdvad0::Sdyadv,
7834 svdvad0::Sdyadv,
7835 Svdvad0_SPEC,
7836 crate::common::R,
7837 >::from_register(self, 0)
7838 }
7839}
7840impl ::core::default::Default for Svdvad0 {
7841 #[inline(always)]
7842 fn default() -> Svdvad0 {
7843 <crate::RegValueT<Svdvad0_SPEC> as RegisterValue<_>>::new(0)
7844 }
7845}
7846pub mod svdvad0 {
7847
7848 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7849 pub struct Sadlg_SPEC;
7850 pub type Sadlg = crate::EnumBitfieldStruct<u8, Sadlg_SPEC>;
7851 impl Sadlg {
7852 #[doc = "The 7-bit address format is selected."]
7853 pub const _0: Self = Self::new(0);
7854
7855 #[doc = "The 10-bit address format is selected."]
7856 pub const _1: Self = Self::new(1);
7857 }
7858 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7859 pub struct Sstadv_SPEC;
7860 pub type Sstadv = crate::EnumBitfieldStruct<u8, Sstadv_SPEC>;
7861 impl Sstadv {
7862 #[doc = "Slave address is disabled."]
7863 pub const _0: Self = Self::new(0);
7864
7865 #[doc = "Slave address is enabled."]
7866 pub const _1: Self = Self::new(1);
7867 }
7868 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7869 pub struct Sdyadv_SPEC;
7870 pub type Sdyadv = crate::EnumBitfieldStruct<u8, Sdyadv_SPEC>;
7871 impl Sdyadv {
7872 #[doc = "Dynamic Address is disabled."]
7873 pub const _0: Self = Self::new(0);
7874
7875 #[doc = "Dynamic Address is enabled."]
7876 pub const _1: Self = Self::new(1);
7877 }
7878}
7879#[doc(hidden)]
7880#[derive(Copy, Clone, Eq, PartialEq)]
7881pub struct Csecmd_SPEC;
7882impl crate::sealed::RegSpec for Csecmd_SPEC {
7883 type DataType = u32;
7884}
7885
7886#[doc = "CCC Slave Events Command Register"]
7887pub type Csecmd = crate::RegValueT<Csecmd_SPEC>;
7888
7889impl Csecmd {
7890 #[doc = "Slave Interrupt Requests Enable"]
7891 #[inline(always)]
7892 pub fn svirqe(
7893 self,
7894 ) -> crate::common::RegisterField<
7895 0,
7896 0x1,
7897 1,
7898 0,
7899 csecmd::Svirqe,
7900 csecmd::Svirqe,
7901 Csecmd_SPEC,
7902 crate::common::RW,
7903 > {
7904 crate::common::RegisterField::<
7905 0,
7906 0x1,
7907 1,
7908 0,
7909 csecmd::Svirqe,
7910 csecmd::Svirqe,
7911 Csecmd_SPEC,
7912 crate::common::RW,
7913 >::from_register(self, 0)
7914 }
7915
7916 #[doc = "Mastership Requests Enable"]
7917 #[inline(always)]
7918 pub fn msrqe(
7919 self,
7920 ) -> crate::common::RegisterField<
7921 1,
7922 0x1,
7923 1,
7924 0,
7925 csecmd::Msrqe,
7926 csecmd::Msrqe,
7927 Csecmd_SPEC,
7928 crate::common::RW,
7929 > {
7930 crate::common::RegisterField::<
7931 1,
7932 0x1,
7933 1,
7934 0,
7935 csecmd::Msrqe,
7936 csecmd::Msrqe,
7937 Csecmd_SPEC,
7938 crate::common::RW,
7939 >::from_register(self, 0)
7940 }
7941
7942 #[doc = "Hot-Join Event Enable"]
7943 #[inline(always)]
7944 pub fn hjeve(
7945 self,
7946 ) -> crate::common::RegisterField<
7947 3,
7948 0x1,
7949 1,
7950 0,
7951 csecmd::Hjeve,
7952 csecmd::Hjeve,
7953 Csecmd_SPEC,
7954 crate::common::RW,
7955 > {
7956 crate::common::RegisterField::<
7957 3,
7958 0x1,
7959 1,
7960 0,
7961 csecmd::Hjeve,
7962 csecmd::Hjeve,
7963 Csecmd_SPEC,
7964 crate::common::RW,
7965 >::from_register(self, 0)
7966 }
7967}
7968impl ::core::default::Default for Csecmd {
7969 #[inline(always)]
7970 fn default() -> Csecmd {
7971 <crate::RegValueT<Csecmd_SPEC> as RegisterValue<_>>::new(0)
7972 }
7973}
7974pub mod csecmd {
7975
7976 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7977 pub struct Svirqe_SPEC;
7978 pub type Svirqe = crate::EnumBitfieldStruct<u8, Svirqe_SPEC>;
7979 impl Svirqe {
7980 #[doc = "DISABLED: Slave-initiated Interrupts is Disabled by the Master to control."]
7981 pub const _0: Self = Self::new(0);
7982
7983 #[doc = "ENABLED: Slave-initiated Interrupts is Enabled by the Master to control."]
7984 pub const _1: Self = Self::new(1);
7985 }
7986 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7987 pub struct Msrqe_SPEC;
7988 pub type Msrqe = crate::EnumBitfieldStruct<u8, Msrqe_SPEC>;
7989 impl Msrqe {
7990 #[doc = "DISABLED: Mastership requests from Secondary Masters is Disabled by the Current Master to control."]
7991 pub const _0: Self = Self::new(0);
7992
7993 #[doc = "ENABLED: Mastership requests from Secondary Masters is Enabled by the Current Master to control."]
7994 pub const _1: Self = Self::new(1);
7995 }
7996 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7997 pub struct Hjeve_SPEC;
7998 pub type Hjeve = crate::EnumBitfieldStruct<u8, Hjeve_SPEC>;
7999 impl Hjeve {
8000 #[doc = "DISABLED: Slave-initiated Hot-Join is Disabled by the Master to control."]
8001 pub const _0: Self = Self::new(0);
8002
8003 #[doc = "ENABLED: Slave-initiated Hot-Join is Enabled by the Master to control."]
8004 pub const _1: Self = Self::new(1);
8005 }
8006}
8007#[doc(hidden)]
8008#[derive(Copy, Clone, Eq, PartialEq)]
8009pub struct Ceactst_SPEC;
8010impl crate::sealed::RegSpec for Ceactst_SPEC {
8011 type DataType = u32;
8012}
8013
8014#[doc = "CCC Enter Activity State Register"]
8015pub type Ceactst = crate::RegValueT<Ceactst_SPEC>;
8016
8017impl Ceactst {
8018 #[doc = "Activity State"]
8019 #[inline(always)]
8020 pub fn actst(
8021 self,
8022 ) -> crate::common::RegisterField<
8023 0,
8024 0xf,
8025 1,
8026 0,
8027 ceactst::Actst,
8028 ceactst::Actst,
8029 Ceactst_SPEC,
8030 crate::common::RW,
8031 > {
8032 crate::common::RegisterField::<
8033 0,
8034 0xf,
8035 1,
8036 0,
8037 ceactst::Actst,
8038 ceactst::Actst,
8039 Ceactst_SPEC,
8040 crate::common::RW,
8041 >::from_register(self, 0)
8042 }
8043}
8044impl ::core::default::Default for Ceactst {
8045 #[inline(always)]
8046 fn default() -> Ceactst {
8047 <crate::RegValueT<Ceactst_SPEC> as RegisterValue<_>>::new(0)
8048 }
8049}
8050pub mod ceactst {
8051
8052 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8053 pub struct Actst_SPEC;
8054 pub type Actst = crate::EnumBitfieldStruct<u8, Actst_SPEC>;
8055 impl Actst {
8056 #[doc = "ENTAS0 (1µs: Latency-free operation)"]
8057 pub const _0_X_1: Self = Self::new(1);
8058
8059 #[doc = "ENTAS1 (100 µs)"]
8060 pub const _0_X_2: Self = Self::new(2);
8061
8062 #[doc = "ENTAS2 (2 ms)"]
8063 pub const _0_X_4: Self = Self::new(4);
8064
8065 #[doc = "ENTAS3 (50 ms: Lowest-activity operation)"]
8066 pub const _0_X_8: Self = Self::new(8);
8067 }
8068}
8069#[doc(hidden)]
8070#[derive(Copy, Clone, Eq, PartialEq)]
8071pub struct Cmwlg_SPEC;
8072impl crate::sealed::RegSpec for Cmwlg_SPEC {
8073 type DataType = u32;
8074}
8075
8076#[doc = "CCC Max Write Length Register"]
8077pub type Cmwlg = crate::RegValueT<Cmwlg_SPEC>;
8078
8079impl Cmwlg {
8080 #[doc = "Max Write Length"]
8081 #[inline(always)]
8082 pub fn mwlg(
8083 self,
8084 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Cmwlg_SPEC, crate::common::RW>
8085 {
8086 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Cmwlg_SPEC,crate::common::RW>::from_register(self,0)
8087 }
8088}
8089impl ::core::default::Default for Cmwlg {
8090 #[inline(always)]
8091 fn default() -> Cmwlg {
8092 <crate::RegValueT<Cmwlg_SPEC> as RegisterValue<_>>::new(0)
8093 }
8094}
8095
8096#[doc(hidden)]
8097#[derive(Copy, Clone, Eq, PartialEq)]
8098pub struct Cmrlg_SPEC;
8099impl crate::sealed::RegSpec for Cmrlg_SPEC {
8100 type DataType = u32;
8101}
8102
8103#[doc = "CCC Max Read Length Register"]
8104pub type Cmrlg = crate::RegValueT<Cmrlg_SPEC>;
8105
8106impl Cmrlg {
8107 #[doc = "Max Read Length"]
8108 #[inline(always)]
8109 pub fn mrlg(
8110 self,
8111 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Cmrlg_SPEC, crate::common::RW>
8112 {
8113 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Cmrlg_SPEC,crate::common::RW>::from_register(self,0)
8114 }
8115
8116 #[doc = "IBI Payload Size"]
8117 #[inline(always)]
8118 pub fn ibipsz(
8119 self,
8120 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Cmrlg_SPEC, crate::common::RW> {
8121 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Cmrlg_SPEC,crate::common::RW>::from_register(self,0)
8122 }
8123}
8124impl ::core::default::Default for Cmrlg {
8125 #[inline(always)]
8126 fn default() -> Cmrlg {
8127 <crate::RegValueT<Cmrlg_SPEC> as RegisterValue<_>>::new(0)
8128 }
8129}
8130
8131#[doc(hidden)]
8132#[derive(Copy, Clone, Eq, PartialEq)]
8133pub struct Cetstmd_SPEC;
8134impl crate::sealed::RegSpec for Cetstmd_SPEC {
8135 type DataType = u32;
8136}
8137
8138#[doc = "CCC Enter Test Mode Register"]
8139pub type Cetstmd = crate::RegValueT<Cetstmd_SPEC>;
8140
8141impl Cetstmd {
8142 #[doc = "Test Mode"]
8143 #[inline(always)]
8144 pub fn tstmd(
8145 self,
8146 ) -> crate::common::RegisterField<
8147 0,
8148 0xff,
8149 1,
8150 0,
8151 cetstmd::Tstmd,
8152 cetstmd::Tstmd,
8153 Cetstmd_SPEC,
8154 crate::common::R,
8155 > {
8156 crate::common::RegisterField::<
8157 0,
8158 0xff,
8159 1,
8160 0,
8161 cetstmd::Tstmd,
8162 cetstmd::Tstmd,
8163 Cetstmd_SPEC,
8164 crate::common::R,
8165 >::from_register(self, 0)
8166 }
8167}
8168impl ::core::default::Default for Cetstmd {
8169 #[inline(always)]
8170 fn default() -> Cetstmd {
8171 <crate::RegValueT<Cetstmd_SPEC> as RegisterValue<_>>::new(0)
8172 }
8173}
8174pub mod cetstmd {
8175
8176 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8177 pub struct Tstmd_SPEC;
8178 pub type Tstmd = crate::EnumBitfieldStruct<u8, Tstmd_SPEC>;
8179 impl Tstmd {
8180 #[doc = "Exit Test Mode This value removes all I3C devices from Test Mode."]
8181 pub const _0_X_00: Self = Self::new(0);
8182
8183 #[doc = "Vendor Test Mode This value indicates that I3C devices shall return a random 32bit value in the provisional ID during the Dynamic Address Assignment procedure."]
8184 pub const _0_X_01: Self = Self::new(1);
8185 }
8186}
8187#[doc(hidden)]
8188#[derive(Copy, Clone, Eq, PartialEq)]
8189pub struct Cgdvst_SPEC;
8190impl crate::sealed::RegSpec for Cgdvst_SPEC {
8191 type DataType = u32;
8192}
8193
8194#[doc = "CCC Get Device Status Register"]
8195pub type Cgdvst = crate::RegValueT<Cgdvst_SPEC>;
8196
8197impl Cgdvst {
8198 #[doc = "Pending Interrupt"]
8199 #[inline(always)]
8200 pub fn pndint(
8201 self,
8202 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Cgdvst_SPEC, crate::common::RW> {
8203 crate::common::RegisterField::<0,0xf,1,0,u8,u8,Cgdvst_SPEC,crate::common::RW>::from_register(self,0)
8204 }
8205
8206 #[doc = "Protocol Error"]
8207 #[inline(always)]
8208 pub fn prte(
8209 self,
8210 ) -> crate::common::RegisterField<
8211 5,
8212 0x1,
8213 1,
8214 0,
8215 cgdvst::Prte,
8216 cgdvst::Prte,
8217 Cgdvst_SPEC,
8218 crate::common::R,
8219 > {
8220 crate::common::RegisterField::<
8221 5,
8222 0x1,
8223 1,
8224 0,
8225 cgdvst::Prte,
8226 cgdvst::Prte,
8227 Cgdvst_SPEC,
8228 crate::common::R,
8229 >::from_register(self, 0)
8230 }
8231
8232 #[doc = "Slave Device’s current Activity Mode"]
8233 #[inline(always)]
8234 pub fn actmd(
8235 self,
8236 ) -> crate::common::RegisterField<
8237 6,
8238 0x3,
8239 1,
8240 0,
8241 cgdvst::Actmd,
8242 cgdvst::Actmd,
8243 Cgdvst_SPEC,
8244 crate::common::RW,
8245 > {
8246 crate::common::RegisterField::<
8247 6,
8248 0x3,
8249 1,
8250 0,
8251 cgdvst::Actmd,
8252 cgdvst::Actmd,
8253 Cgdvst_SPEC,
8254 crate::common::RW,
8255 >::from_register(self, 0)
8256 }
8257
8258 #[doc = "Vendor Reserved"]
8259 #[inline(always)]
8260 pub fn vdrsv(
8261 self,
8262 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Cgdvst_SPEC, crate::common::RW> {
8263 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Cgdvst_SPEC,crate::common::RW>::from_register(self,0)
8264 }
8265}
8266impl ::core::default::Default for Cgdvst {
8267 #[inline(always)]
8268 fn default() -> Cgdvst {
8269 <crate::RegValueT<Cgdvst_SPEC> as RegisterValue<_>>::new(0)
8270 }
8271}
8272pub mod cgdvst {
8273
8274 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8275 pub struct Prte_SPEC;
8276 pub type Prte = crate::EnumBitfieldStruct<u8, Prte_SPEC>;
8277 impl Prte {
8278 #[doc = "The Slave has not detected a protocol error since the last Status read."]
8279 pub const _0: Self = Self::new(0);
8280
8281 #[doc = "The Slave has detected a protocol error since the last Status read."]
8282 pub const _1: Self = Self::new(1);
8283 }
8284 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8285 pub struct Actmd_SPEC;
8286 pub type Actmd = crate::EnumBitfieldStruct<u8, Actmd_SPEC>;
8287 impl Actmd {
8288 #[doc = "Activity Mode 0"]
8289 pub const _00: Self = Self::new(0);
8290
8291 #[doc = "Activity Mode 1"]
8292 pub const _01: Self = Self::new(1);
8293
8294 #[doc = "Activity Mode 2"]
8295 pub const _10: Self = Self::new(2);
8296
8297 #[doc = "Activity Mode 3"]
8298 pub const _11: Self = Self::new(3);
8299 }
8300}
8301#[doc(hidden)]
8302#[derive(Copy, Clone, Eq, PartialEq)]
8303pub struct Cmdspw_SPEC;
8304impl crate::sealed::RegSpec for Cmdspw_SPEC {
8305 type DataType = u32;
8306}
8307
8308#[doc = "CCC Max Data Speed W (Write) Register"]
8309pub type Cmdspw = crate::RegValueT<Cmdspw_SPEC>;
8310
8311impl Cmdspw {
8312 #[doc = "Maximum Sustained Write Data Rate"]
8313 #[inline(always)]
8314 pub fn mswdr(
8315 self,
8316 ) -> crate::common::RegisterField<
8317 0,
8318 0x7,
8319 1,
8320 0,
8321 cmdspw::Mswdr,
8322 cmdspw::Mswdr,
8323 Cmdspw_SPEC,
8324 crate::common::RW,
8325 > {
8326 crate::common::RegisterField::<
8327 0,
8328 0x7,
8329 1,
8330 0,
8331 cmdspw::Mswdr,
8332 cmdspw::Mswdr,
8333 Cmdspw_SPEC,
8334 crate::common::RW,
8335 >::from_register(self, 0)
8336 }
8337}
8338impl ::core::default::Default for Cmdspw {
8339 #[inline(always)]
8340 fn default() -> Cmdspw {
8341 <crate::RegValueT<Cmdspw_SPEC> as RegisterValue<_>>::new(0)
8342 }
8343}
8344pub mod cmdspw {
8345
8346 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8347 pub struct Mswdr_SPEC;
8348 pub type Mswdr = crate::EnumBitfieldStruct<u8, Mswdr_SPEC>;
8349 impl Mswdr {
8350 #[doc = "fscl Max (default value)"]
8351 pub const _000: Self = Self::new(0);
8352
8353 #[doc = "8 MHz"]
8354 pub const _001: Self = Self::new(1);
8355
8356 #[doc = "6 MHz"]
8357 pub const _010: Self = Self::new(2);
8358
8359 #[doc = "4 MHz"]
8360 pub const _011: Self = Self::new(3);
8361
8362 #[doc = "2 MHz"]
8363 pub const _100: Self = Self::new(4);
8364 }
8365}
8366#[doc(hidden)]
8367#[derive(Copy, Clone, Eq, PartialEq)]
8368pub struct Cmdspr_SPEC;
8369impl crate::sealed::RegSpec for Cmdspr_SPEC {
8370 type DataType = u32;
8371}
8372
8373#[doc = "CCC Max Data Speed R (Read) Register"]
8374pub type Cmdspr = crate::RegValueT<Cmdspr_SPEC>;
8375
8376impl Cmdspr {
8377 #[doc = "Maximum Sustained Read Data Rate"]
8378 #[inline(always)]
8379 pub fn msrdr(
8380 self,
8381 ) -> crate::common::RegisterField<
8382 0,
8383 0x7,
8384 1,
8385 0,
8386 cmdspr::Msrdr,
8387 cmdspr::Msrdr,
8388 Cmdspr_SPEC,
8389 crate::common::RW,
8390 > {
8391 crate::common::RegisterField::<
8392 0,
8393 0x7,
8394 1,
8395 0,
8396 cmdspr::Msrdr,
8397 cmdspr::Msrdr,
8398 Cmdspr_SPEC,
8399 crate::common::RW,
8400 >::from_register(self, 0)
8401 }
8402
8403 #[doc = "Clock to Data Turnaround Time (TSCO)"]
8404 #[inline(always)]
8405 pub fn cdttim(
8406 self,
8407 ) -> crate::common::RegisterField<
8408 3,
8409 0x7,
8410 1,
8411 0,
8412 cmdspr::Cdttim,
8413 cmdspr::Cdttim,
8414 Cmdspr_SPEC,
8415 crate::common::RW,
8416 > {
8417 crate::common::RegisterField::<
8418 3,
8419 0x7,
8420 1,
8421 0,
8422 cmdspr::Cdttim,
8423 cmdspr::Cdttim,
8424 Cmdspr_SPEC,
8425 crate::common::RW,
8426 >::from_register(self, 0)
8427 }
8428}
8429impl ::core::default::Default for Cmdspr {
8430 #[inline(always)]
8431 fn default() -> Cmdspr {
8432 <crate::RegValueT<Cmdspr_SPEC> as RegisterValue<_>>::new(0)
8433 }
8434}
8435pub mod cmdspr {
8436
8437 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8438 pub struct Msrdr_SPEC;
8439 pub type Msrdr = crate::EnumBitfieldStruct<u8, Msrdr_SPEC>;
8440 impl Msrdr {
8441 #[doc = "fscl Max (default value)"]
8442 pub const _000: Self = Self::new(0);
8443
8444 #[doc = "8 MHz"]
8445 pub const _001: Self = Self::new(1);
8446
8447 #[doc = "6 MHz"]
8448 pub const _010: Self = Self::new(2);
8449
8450 #[doc = "4 MHz"]
8451 pub const _011: Self = Self::new(3);
8452
8453 #[doc = "2 MHz"]
8454 pub const _100: Self = Self::new(4);
8455 }
8456 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8457 pub struct Cdttim_SPEC;
8458 pub type Cdttim = crate::EnumBitfieldStruct<u8, Cdttim_SPEC>;
8459 impl Cdttim {
8460 #[doc = "8 ns or less (default value)"]
8461 pub const _000: Self = Self::new(0);
8462
8463 #[doc = "9 ns or less"]
8464 pub const _001: Self = Self::new(1);
8465
8466 #[doc = "10 ns or less"]
8467 pub const _010: Self = Self::new(2);
8468
8469 #[doc = "11 ns or less"]
8470 pub const _011: Self = Self::new(3);
8471
8472 #[doc = "12 ns or less"]
8473 pub const _100: Self = Self::new(4);
8474
8475 #[doc = "TSCO is more than 12 ns, and is reported by private agreement."]
8476 pub const _111: Self = Self::new(7);
8477 }
8478}
8479#[doc(hidden)]
8480#[derive(Copy, Clone, Eq, PartialEq)]
8481pub struct Cmdspt_SPEC;
8482impl crate::sealed::RegSpec for Cmdspt_SPEC {
8483 type DataType = u32;
8484}
8485
8486#[doc = "CCC Max Data Speed T (Turnaround) Register"]
8487pub type Cmdspt = crate::RegValueT<Cmdspt_SPEC>;
8488
8489impl Cmdspt {
8490 #[doc = "Maximum Read Turnaround Time"]
8491 #[inline(always)]
8492 pub fn mrttim(
8493 self,
8494 ) -> crate::common::RegisterField<0, 0xffffff, 1, 0, u32, u32, Cmdspt_SPEC, crate::common::RW>
8495 {
8496 crate::common::RegisterField::<0,0xffffff,1,0,u32,u32,Cmdspt_SPEC,crate::common::RW>::from_register(self,0)
8497 }
8498
8499 #[doc = "Maximum Read Turnaround Time Enable"]
8500 #[inline(always)]
8501 pub fn mrte(
8502 self,
8503 ) -> crate::common::RegisterField<
8504 31,
8505 0x1,
8506 1,
8507 0,
8508 cmdspt::Mrte,
8509 cmdspt::Mrte,
8510 Cmdspt_SPEC,
8511 crate::common::RW,
8512 > {
8513 crate::common::RegisterField::<
8514 31,
8515 0x1,
8516 1,
8517 0,
8518 cmdspt::Mrte,
8519 cmdspt::Mrte,
8520 Cmdspt_SPEC,
8521 crate::common::RW,
8522 >::from_register(self, 0)
8523 }
8524}
8525impl ::core::default::Default for Cmdspt {
8526 #[inline(always)]
8527 fn default() -> Cmdspt {
8528 <crate::RegValueT<Cmdspt_SPEC> as RegisterValue<_>>::new(0)
8529 }
8530}
8531pub mod cmdspt {
8532
8533 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8534 pub struct Mrte_SPEC;
8535 pub type Mrte = crate::EnumBitfieldStruct<u8, Mrte_SPEC>;
8536 impl Mrte {
8537 #[doc = "Disables transmission of the Maximum Read Turnaround Time. (GETMXDS Format 1: Without Turnaround)"]
8538 pub const _0: Self = Self::new(0);
8539
8540 #[doc = "Enables transmission of the Maximum Read Turnaround Time. (GETMXDS Format 2: With Turnaround)"]
8541 pub const _1: Self = Self::new(1);
8542 }
8543}
8544#[doc(hidden)]
8545#[derive(Copy, Clone, Eq, PartialEq)]
8546pub struct Cetsm_SPEC;
8547impl crate::sealed::RegSpec for Cetsm_SPEC {
8548 type DataType = u32;
8549}
8550
8551#[doc = "CCC Exchange Timing Support Information M (Mode) Register"]
8552pub type Cetsm = crate::RegValueT<Cetsm_SPEC>;
8553
8554impl Cetsm {
8555 #[doc = "Frequency Byte"]
8556 #[inline(always)]
8557 pub fn freq(
8558 self,
8559 ) -> crate::common::RegisterField<
8560 8,
8561 0xff,
8562 1,
8563 0,
8564 cetsm::Freq,
8565 cetsm::Freq,
8566 Cetsm_SPEC,
8567 crate::common::RW,
8568 > {
8569 crate::common::RegisterField::<
8570 8,
8571 0xff,
8572 1,
8573 0,
8574 cetsm::Freq,
8575 cetsm::Freq,
8576 Cetsm_SPEC,
8577 crate::common::RW,
8578 >::from_register(self, 0)
8579 }
8580
8581 #[doc = "Inaccuracy Byte"]
8582 #[inline(always)]
8583 pub fn inac(
8584 self,
8585 ) -> crate::common::RegisterField<
8586 16,
8587 0xff,
8588 1,
8589 0,
8590 cetsm::Inac,
8591 cetsm::Inac,
8592 Cetsm_SPEC,
8593 crate::common::RW,
8594 > {
8595 crate::common::RegisterField::<
8596 16,
8597 0xff,
8598 1,
8599 0,
8600 cetsm::Inac,
8601 cetsm::Inac,
8602 Cetsm_SPEC,
8603 crate::common::RW,
8604 >::from_register(self, 0)
8605 }
8606}
8607impl ::core::default::Default for Cetsm {
8608 #[inline(always)]
8609 fn default() -> Cetsm {
8610 <crate::RegValueT<Cetsm_SPEC> as RegisterValue<_>>::new(0)
8611 }
8612}
8613pub mod cetsm {
8614
8615 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8616 pub struct Freq_SPEC;
8617 pub type Freq = crate::EnumBitfieldStruct<u8, Freq_SPEC>;
8618 impl Freq {
8619 #[doc = "32.0 KHz"]
8620 pub const _0_X_00: Self = Self::new(0);
8621
8622 #[doc = "7.5 MHz"]
8623 pub const _0_X_0_F: Self = Self::new(15);
8624
8625 #[doc = "15.5 MHz"]
8626 pub const _0_X_1_F: Self = Self::new(31);
8627
8628 #[doc = "23.5 MHz"]
8629 pub const _0_X_2_F: Self = Self::new(47);
8630
8631 #[doc = "31.5 MHz"]
8632 pub const _0_X_3_F: Self = Self::new(63);
8633
8634 #[doc = "39.5 MHz"]
8635 pub const _0_X_4_F: Self = Self::new(79);
8636
8637 #[doc = "47.5 MHz"]
8638 pub const _0_X_5_F: Self = Self::new(95);
8639
8640 #[doc = "55.5 MHz"]
8641 pub const _0_X_6_F: Self = Self::new(111);
8642
8643 #[doc = "63.5 MHz"]
8644 pub const _0_X_7_F: Self = Self::new(127);
8645 }
8646 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8647 pub struct Inac_SPEC;
8648 pub type Inac = crate::EnumBitfieldStruct<u8, Inac_SPEC>;
8649 impl Inac {
8650 #[doc = "0.0%"]
8651 pub const _0_X_00: Self = Self::new(0);
8652
8653 #[doc = "1.5%"]
8654 pub const _0_X_0_F: Self = Self::new(15);
8655
8656 #[doc = "3.1%"]
8657 pub const _0_X_1_F: Self = Self::new(31);
8658
8659 #[doc = "4.7%"]
8660 pub const _0_X_2_F: Self = Self::new(47);
8661
8662 #[doc = "6.3%"]
8663 pub const _0_X_3_F: Self = Self::new(63);
8664
8665 #[doc = "7.9%"]
8666 pub const _0_X_4_F: Self = Self::new(79);
8667
8668 #[doc = "9.5%"]
8669 pub const _0_X_5_F: Self = Self::new(95);
8670
8671 #[doc = "11.1%"]
8672 pub const _0_X_6_F: Self = Self::new(111);
8673
8674 #[doc = "12.7%"]
8675 pub const _0_X_7_F: Self = Self::new(127);
8676
8677 #[doc = "14.3%"]
8678 pub const _0_X_8_F: Self = Self::new(143);
8679
8680 #[doc = "15.9%"]
8681 pub const _0_X_9_F: Self = Self::new(159);
8682
8683 #[doc = "17.5%"]
8684 pub const _0_X_AF: Self = Self::new(175);
8685
8686 #[doc = "19.1%"]
8687 pub const _0_X_BF: Self = Self::new(191);
8688
8689 #[doc = "20.7%"]
8690 pub const _0_X_CF: Self = Self::new(207);
8691
8692 #[doc = "22.3%"]
8693 pub const _0_X_DF: Self = Self::new(223);
8694
8695 #[doc = "23.9%"]
8696 pub const _0_X_EF: Self = Self::new(239);
8697
8698 #[doc = "25.5%"]
8699 pub const _0_X_FF: Self = Self::new(255);
8700 }
8701}
8702#[doc(hidden)]
8703#[derive(Copy, Clone, Eq, PartialEq)]
8704pub struct Bitcnt_SPEC;
8705impl crate::sealed::RegSpec for Bitcnt_SPEC {
8706 type DataType = u32;
8707}
8708
8709#[doc = "Bit Count Register"]
8710pub type Bitcnt = crate::RegValueT<Bitcnt_SPEC>;
8711
8712impl Bitcnt {
8713 #[doc = "Bit Counter"]
8714 #[inline(always)]
8715 pub fn bcnt(
8716 self,
8717 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Bitcnt_SPEC, crate::common::R> {
8718 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Bitcnt_SPEC,crate::common::R>::from_register(self,0)
8719 }
8720}
8721impl ::core::default::Default for Bitcnt {
8722 #[inline(always)]
8723 fn default() -> Bitcnt {
8724 <crate::RegValueT<Bitcnt_SPEC> as RegisterValue<_>>::new(0)
8725 }
8726}
8727
8728#[doc(hidden)]
8729#[derive(Copy, Clone, Eq, PartialEq)]
8730pub struct Nqstlv_SPEC;
8731impl crate::sealed::RegSpec for Nqstlv_SPEC {
8732 type DataType = u32;
8733}
8734
8735#[doc = "Normal Queue Status Level Register"]
8736pub type Nqstlv = crate::RegValueT<Nqstlv_SPEC>;
8737
8738impl Nqstlv {
8739 #[doc = "Normal Command Queue Free Level"]
8740 #[inline(always)]
8741 pub fn cmdqflv(
8742 self,
8743 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
8744 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
8745 }
8746
8747 #[doc = "Normal Response Queue Level"]
8748 #[inline(always)]
8749 pub fn rspqlv(
8750 self,
8751 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
8752 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
8753 }
8754
8755 #[doc = "Normal IBI Queue Level"]
8756 #[inline(always)]
8757 pub fn ibiqlv(
8758 self,
8759 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
8760 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
8761 }
8762
8763 #[doc = "Normal IBI Status Count"]
8764 #[inline(always)]
8765 pub fn ibiscnt(
8766 self,
8767 ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
8768 crate::common::RegisterField::<24,0x1f,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
8769 }
8770}
8771impl ::core::default::Default for Nqstlv {
8772 #[inline(always)]
8773 fn default() -> Nqstlv {
8774 <crate::RegValueT<Nqstlv_SPEC> as RegisterValue<_>>::new(2)
8775 }
8776}
8777
8778#[doc(hidden)]
8779#[derive(Copy, Clone, Eq, PartialEq)]
8780pub struct Ndbstlv0_SPEC;
8781impl crate::sealed::RegSpec for Ndbstlv0_SPEC {
8782 type DataType = u32;
8783}
8784
8785#[doc = "Normal Data Buffer Status Level Register 0"]
8786pub type Ndbstlv0 = crate::RegValueT<Ndbstlv0_SPEC>;
8787
8788impl Ndbstlv0 {
8789 #[doc = "Normal Transmit Data Buffer Free Level"]
8790 #[inline(always)]
8791 pub fn tdbflv(
8792 self,
8793 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ndbstlv0_SPEC, crate::common::R> {
8794 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ndbstlv0_SPEC,crate::common::R>::from_register(self,0)
8795 }
8796
8797 #[doc = "Normal Receive Data Buffer Level"]
8798 #[inline(always)]
8799 pub fn rdblv(
8800 self,
8801 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ndbstlv0_SPEC, crate::common::R> {
8802 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ndbstlv0_SPEC,crate::common::R>::from_register(self,0)
8803 }
8804}
8805impl ::core::default::Default for Ndbstlv0 {
8806 #[inline(always)]
8807 fn default() -> Ndbstlv0 {
8808 <crate::RegValueT<Ndbstlv0_SPEC> as RegisterValue<_>>::new(1)
8809 }
8810}
8811
8812#[doc(hidden)]
8813#[derive(Copy, Clone, Eq, PartialEq)]
8814pub struct Nrsqstlv_SPEC;
8815impl crate::sealed::RegSpec for Nrsqstlv_SPEC {
8816 type DataType = u32;
8817}
8818
8819#[doc = "Normal Receive Status Queue Status Level Register"]
8820pub type Nrsqstlv = crate::RegValueT<Nrsqstlv_SPEC>;
8821
8822impl Nrsqstlv {
8823 #[doc = "Normal Receive Status Queue Level"]
8824 #[inline(always)]
8825 pub fn rsqlv(
8826 self,
8827 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Nrsqstlv_SPEC, crate::common::R> {
8828 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Nrsqstlv_SPEC,crate::common::R>::from_register(self,0)
8829 }
8830}
8831impl ::core::default::Default for Nrsqstlv {
8832 #[inline(always)]
8833 fn default() -> Nrsqstlv {
8834 <crate::RegValueT<Nrsqstlv_SPEC> as RegisterValue<_>>::new(0)
8835 }
8836}
8837
8838#[doc(hidden)]
8839#[derive(Copy, Clone, Eq, PartialEq)]
8840pub struct Prstdbg_SPEC;
8841impl crate::sealed::RegSpec for Prstdbg_SPEC {
8842 type DataType = u32;
8843}
8844
8845#[doc = "Present State Debug Register"]
8846pub type Prstdbg = crate::RegValueT<Prstdbg_SPEC>;
8847
8848impl Prstdbg {
8849 #[doc = "SCL Line Signal Level"]
8850 #[inline(always)]
8851 pub fn scilv(
8852 self,
8853 ) -> crate::common::RegisterFieldBool<0, 1, 0, Prstdbg_SPEC, crate::common::R> {
8854 crate::common::RegisterFieldBool::<0, 1, 0, Prstdbg_SPEC, crate::common::R>::from_register(
8855 self, 0,
8856 )
8857 }
8858
8859 #[doc = "SDA Line Signal Level"]
8860 #[inline(always)]
8861 pub fn sdilv(
8862 self,
8863 ) -> crate::common::RegisterFieldBool<1, 1, 0, Prstdbg_SPEC, crate::common::R> {
8864 crate::common::RegisterFieldBool::<1, 1, 0, Prstdbg_SPEC, crate::common::R>::from_register(
8865 self, 0,
8866 )
8867 }
8868
8869 #[doc = "SCL Output Level"]
8870 #[inline(always)]
8871 pub fn scolv(
8872 self,
8873 ) -> crate::common::RegisterField<
8874 2,
8875 0x1,
8876 1,
8877 0,
8878 prstdbg::Scolv,
8879 prstdbg::Scolv,
8880 Prstdbg_SPEC,
8881 crate::common::R,
8882 > {
8883 crate::common::RegisterField::<
8884 2,
8885 0x1,
8886 1,
8887 0,
8888 prstdbg::Scolv,
8889 prstdbg::Scolv,
8890 Prstdbg_SPEC,
8891 crate::common::R,
8892 >::from_register(self, 0)
8893 }
8894
8895 #[doc = "SDA Output Level"]
8896 #[inline(always)]
8897 pub fn sdolv(
8898 self,
8899 ) -> crate::common::RegisterField<
8900 3,
8901 0x1,
8902 1,
8903 0,
8904 prstdbg::Sdolv,
8905 prstdbg::Sdolv,
8906 Prstdbg_SPEC,
8907 crate::common::R,
8908 > {
8909 crate::common::RegisterField::<
8910 3,
8911 0x1,
8912 1,
8913 0,
8914 prstdbg::Sdolv,
8915 prstdbg::Sdolv,
8916 Prstdbg_SPEC,
8917 crate::common::R,
8918 >::from_register(self, 0)
8919 }
8920}
8921impl ::core::default::Default for Prstdbg {
8922 #[inline(always)]
8923 fn default() -> Prstdbg {
8924 <crate::RegValueT<Prstdbg_SPEC> as RegisterValue<_>>::new(15)
8925 }
8926}
8927pub mod prstdbg {
8928
8929 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8930 pub struct Scolv_SPEC;
8931 pub type Scolv = crate::EnumBitfieldStruct<u8, Scolv_SPEC>;
8932 impl Scolv {
8933 #[doc = "I3C has driven the SCL pin low."]
8934 pub const _0: Self = Self::new(0);
8935
8936 #[doc = "I3C has released the SCL pin."]
8937 pub const _1: Self = Self::new(1);
8938 }
8939 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8940 pub struct Sdolv_SPEC;
8941 pub type Sdolv = crate::EnumBitfieldStruct<u8, Sdolv_SPEC>;
8942 impl Sdolv {
8943 #[doc = "I3C has driven the SDA pin low."]
8944 pub const _0: Self = Self::new(0);
8945
8946 #[doc = "I3C has released the SDA pin."]
8947 pub const _1: Self = Self::new(1);
8948 }
8949}
8950#[doc(hidden)]
8951#[derive(Copy, Clone, Eq, PartialEq)]
8952pub struct Mserrcnt_SPEC;
8953impl crate::sealed::RegSpec for Mserrcnt_SPEC {
8954 type DataType = u32;
8955}
8956
8957#[doc = "Master Error Counters Register"]
8958pub type Mserrcnt = crate::RegValueT<Mserrcnt_SPEC>;
8959
8960impl Mserrcnt {
8961 #[doc = "M2 Error Counter"]
8962 #[inline(always)]
8963 pub fn m2ecnt(
8964 self,
8965 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mserrcnt_SPEC, crate::common::R> {
8966 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mserrcnt_SPEC,crate::common::R>::from_register(self,0)
8967 }
8968}
8969impl ::core::default::Default for Mserrcnt {
8970 #[inline(always)]
8971 fn default() -> Mserrcnt {
8972 <crate::RegValueT<Mserrcnt_SPEC> as RegisterValue<_>>::new(0)
8973 }
8974}