ra2e2_pac/
sysc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.40.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:46:37 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Standby Control Register"]
38    #[inline(always)]
39    pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(12usize),
43            )
44        }
45    }
46
47    #[doc = "Module Stop Control Register A"]
48    #[inline(always)]
49    pub const fn mstpcra(
50        &self,
51    ) -> &'static crate::common::Reg<self::Mstpcra_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Mstpcra_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(28usize),
55            )
56        }
57    }
58
59    #[doc = "System Clock Division Control Register"]
60    #[inline(always)]
61    pub const fn sckdivcr(
62        &self,
63    ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(32usize),
67            )
68        }
69    }
70
71    #[doc = "System Clock Source Control Register"]
72    #[inline(always)]
73    pub const fn sckscr(
74        &self,
75    ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(38usize),
79            )
80        }
81    }
82
83    #[doc = "Memory Wait Cycle Control Register for Code Flash"]
84    #[inline(always)]
85    pub const fn memwait(
86        &self,
87    ) -> &'static crate::common::Reg<self::Memwait_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::Memwait_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(49usize),
91            )
92        }
93    }
94
95    #[doc = "High-Speed On-Chip Oscillator Control Register"]
96    #[inline(always)]
97    pub const fn hococr(
98        &self,
99    ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(54usize),
103            )
104        }
105    }
106
107    #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
108    #[inline(always)]
109    pub const fn mococr(
110        &self,
111    ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(56usize),
115            )
116        }
117    }
118
119    #[doc = "Oscillation Stabilization Flag Register"]
120    #[inline(always)]
121    pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
122        unsafe {
123            crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
124                self._svd2pac_as_ptr().add(60usize),
125            )
126        }
127    }
128
129    #[doc = "Clock Out Control Register"]
130    #[inline(always)]
131    pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
132        unsafe {
133            crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
134                self._svd2pac_as_ptr().add(62usize),
135            )
136        }
137    }
138
139    #[doc = "Lower Power Operation Control Register"]
140    #[inline(always)]
141    pub const fn lpopt(&self) -> &'static crate::common::Reg<self::Lpopt_SPEC, crate::common::RW> {
142        unsafe {
143            crate::common::Reg::<self::Lpopt_SPEC, crate::common::RW>::from_ptr(
144                self._svd2pac_as_ptr().add(76usize),
145            )
146        }
147    }
148
149    #[doc = "MOCO User Trimming Control Register"]
150    #[inline(always)]
151    pub const fn mocoutcr(
152        &self,
153    ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
154        unsafe {
155            crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
156                self._svd2pac_as_ptr().add(97usize),
157            )
158        }
159    }
160
161    #[doc = "HOCO User Trimming Control Register"]
162    #[inline(always)]
163    pub const fn hocoutcr(
164        &self,
165    ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
166        unsafe {
167            crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
168                self._svd2pac_as_ptr().add(98usize),
169            )
170        }
171    }
172
173    #[doc = "Snooze Control Register"]
174    #[inline(always)]
175    pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
176        unsafe {
177            crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
178                self._svd2pac_as_ptr().add(146usize),
179            )
180        }
181    }
182
183    #[doc = "Snooze End Control Register 0"]
184    #[inline(always)]
185    pub const fn snzedcr0(
186        &self,
187    ) -> &'static crate::common::Reg<self::Snzedcr0_SPEC, crate::common::RW> {
188        unsafe {
189            crate::common::Reg::<self::Snzedcr0_SPEC, crate::common::RW>::from_ptr(
190                self._svd2pac_as_ptr().add(148usize),
191            )
192        }
193    }
194
195    #[doc = "Snooze Request Control Register 0"]
196    #[inline(always)]
197    pub const fn snzreqcr0(
198        &self,
199    ) -> &'static crate::common::Reg<self::Snzreqcr0_SPEC, crate::common::RW> {
200        unsafe {
201            crate::common::Reg::<self::Snzreqcr0_SPEC, crate::common::RW>::from_ptr(
202                self._svd2pac_as_ptr().add(152usize),
203            )
204        }
205    }
206
207    #[doc = "Power Save Memory Control Register"]
208    #[inline(always)]
209    pub const fn psmcr(&self) -> &'static crate::common::Reg<self::Psmcr_SPEC, crate::common::RW> {
210        unsafe {
211            crate::common::Reg::<self::Psmcr_SPEC, crate::common::RW>::from_ptr(
212                self._svd2pac_as_ptr().add(159usize),
213            )
214        }
215    }
216
217    #[doc = "Operating Power Control Register"]
218    #[inline(always)]
219    pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
220        unsafe {
221            crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
222                self._svd2pac_as_ptr().add(160usize),
223            )
224        }
225    }
226
227    #[doc = "High-Speed On-Chip Oscillator Wait Control Register"]
228    #[inline(always)]
229    pub const fn hocowtcr(
230        &self,
231    ) -> &'static crate::common::Reg<self::Hocowtcr_SPEC, crate::common::RW> {
232        unsafe {
233            crate::common::Reg::<self::Hocowtcr_SPEC, crate::common::RW>::from_ptr(
234                self._svd2pac_as_ptr().add(165usize),
235            )
236        }
237    }
238
239    #[doc = "Sub Operating Power Control Register"]
240    #[inline(always)]
241    pub const fn sopccr(
242        &self,
243    ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
244        unsafe {
245            crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
246                self._svd2pac_as_ptr().add(170usize),
247            )
248        }
249    }
250
251    #[doc = "Reset Status Register 1"]
252    #[inline(always)]
253    pub const fn rstsr1(
254        &self,
255    ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
256        unsafe {
257            crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
258                self._svd2pac_as_ptr().add(192usize),
259            )
260        }
261    }
262
263    #[doc = "Voltage Monitor 1 Circuit Control Register"]
264    #[inline(always)]
265    pub const fn lvd1cr1(
266        &self,
267    ) -> &'static crate::common::Reg<self::Lvd1Cr1_SPEC, crate::common::RW> {
268        unsafe {
269            crate::common::Reg::<self::Lvd1Cr1_SPEC, crate::common::RW>::from_ptr(
270                self._svd2pac_as_ptr().add(224usize),
271            )
272        }
273    }
274
275    #[doc = "Voltage Monitor 1 Circuit Status Register"]
276    #[inline(always)]
277    pub const fn lvd1sr(
278        &self,
279    ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
280        unsafe {
281            crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
282                self._svd2pac_as_ptr().add(225usize),
283            )
284        }
285    }
286
287    #[doc = "Voltage Monitor 2 Circuit Control Register 1"]
288    #[inline(always)]
289    pub const fn lvd2cr1(
290        &self,
291    ) -> &'static crate::common::Reg<self::Lvd2Cr1_SPEC, crate::common::RW> {
292        unsafe {
293            crate::common::Reg::<self::Lvd2Cr1_SPEC, crate::common::RW>::from_ptr(
294                self._svd2pac_as_ptr().add(226usize),
295            )
296        }
297    }
298
299    #[doc = "Voltage Monitor 2 Circuit Status Register"]
300    #[inline(always)]
301    pub const fn lvd2sr(
302        &self,
303    ) -> &'static crate::common::Reg<self::Lvd2Sr_SPEC, crate::common::RW> {
304        unsafe {
305            crate::common::Reg::<self::Lvd2Sr_SPEC, crate::common::RW>::from_ptr(
306                self._svd2pac_as_ptr().add(227usize),
307            )
308        }
309    }
310
311    #[doc = "Protect Register"]
312    #[inline(always)]
313    pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
314        unsafe {
315            crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
316                self._svd2pac_as_ptr().add(1022usize),
317            )
318        }
319    }
320
321    #[doc = "System Control OCD Control Register"]
322    #[inline(always)]
323    pub const fn syocdcr(
324        &self,
325    ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
326        unsafe {
327            crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
328                self._svd2pac_as_ptr().add(1038usize),
329            )
330        }
331    }
332
333    #[doc = "Reset Status Register 0"]
334    #[inline(always)]
335    pub const fn rstsr0(
336        &self,
337    ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
338        unsafe {
339            crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
340                self._svd2pac_as_ptr().add(1040usize),
341            )
342        }
343    }
344
345    #[doc = "Reset Status Register 2"]
346    #[inline(always)]
347    pub const fn rstsr2(
348        &self,
349    ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
350        unsafe {
351            crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
352                self._svd2pac_as_ptr().add(1041usize),
353            )
354        }
355    }
356
357    #[doc = "Voltage Monitor Circuit Control Register"]
358    #[inline(always)]
359    pub const fn lvcmpcr(
360        &self,
361    ) -> &'static crate::common::Reg<self::Lvcmpcr_SPEC, crate::common::RW> {
362        unsafe {
363            crate::common::Reg::<self::Lvcmpcr_SPEC, crate::common::RW>::from_ptr(
364                self._svd2pac_as_ptr().add(1047usize),
365            )
366        }
367    }
368
369    #[doc = "Voltage Detection Level Select Register"]
370    #[inline(always)]
371    pub const fn lvdlvlr(
372        &self,
373    ) -> &'static crate::common::Reg<self::Lvdlvlr_SPEC, crate::common::RW> {
374        unsafe {
375            crate::common::Reg::<self::Lvdlvlr_SPEC, crate::common::RW>::from_ptr(
376                self._svd2pac_as_ptr().add(1048usize),
377            )
378        }
379    }
380
381    #[doc = "Voltage Monitor 1 Circuit Control Register 0"]
382    #[inline(always)]
383    pub const fn lvd1cr0(
384        &self,
385    ) -> &'static crate::common::Reg<self::Lvd1Cr0_SPEC, crate::common::RW> {
386        unsafe {
387            crate::common::Reg::<self::Lvd1Cr0_SPEC, crate::common::RW>::from_ptr(
388                self._svd2pac_as_ptr().add(1050usize),
389            )
390        }
391    }
392
393    #[doc = "Voltage Monitor 2 Circuit Control Register 0"]
394    #[inline(always)]
395    pub const fn lvd2cr0(
396        &self,
397    ) -> &'static crate::common::Reg<self::Lvd2Cr0_SPEC, crate::common::RW> {
398        unsafe {
399            crate::common::Reg::<self::Lvd2Cr0_SPEC, crate::common::RW>::from_ptr(
400                self._svd2pac_as_ptr().add(1051usize),
401            )
402        }
403    }
404
405    #[doc = "Low-Speed On-Chip Oscillator Control Register"]
406    #[inline(always)]
407    pub const fn lococr(
408        &self,
409    ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
410        unsafe {
411            crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
412                self._svd2pac_as_ptr().add(1168usize),
413            )
414        }
415    }
416
417    #[doc = "LOCO User Trimming Control Register"]
418    #[inline(always)]
419    pub const fn locoutcr(
420        &self,
421    ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
422        unsafe {
423            crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
424                self._svd2pac_as_ptr().add(1170usize),
425            )
426        }
427    }
428}
429#[doc(hidden)]
430#[derive(Copy, Clone, Eq, PartialEq)]
431pub struct Sbycr_SPEC;
432impl crate::sealed::RegSpec for Sbycr_SPEC {
433    type DataType = u16;
434}
435
436#[doc = "Standby Control Register"]
437pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
438
439impl Sbycr {
440    #[doc = "Software Standby Mode Select"]
441    #[inline(always)]
442    pub fn ssby(
443        self,
444    ) -> crate::common::RegisterField<
445        15,
446        0x1,
447        1,
448        0,
449        sbycr::Ssby,
450        sbycr::Ssby,
451        Sbycr_SPEC,
452        crate::common::RW,
453    > {
454        crate::common::RegisterField::<
455            15,
456            0x1,
457            1,
458            0,
459            sbycr::Ssby,
460            sbycr::Ssby,
461            Sbycr_SPEC,
462            crate::common::RW,
463        >::from_register(self, 0)
464    }
465}
466impl ::core::default::Default for Sbycr {
467    #[inline(always)]
468    fn default() -> Sbycr {
469        <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(0)
470    }
471}
472pub mod sbycr {
473
474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
475    pub struct Ssby_SPEC;
476    pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
477    impl Ssby {
478        #[doc = "Sleep mode"]
479        pub const _0: Self = Self::new(0);
480
481        #[doc = "Software Standby mode."]
482        pub const _1: Self = Self::new(1);
483    }
484}
485#[doc(hidden)]
486#[derive(Copy, Clone, Eq, PartialEq)]
487pub struct Mstpcra_SPEC;
488impl crate::sealed::RegSpec for Mstpcra_SPEC {
489    type DataType = u32;
490}
491
492#[doc = "Module Stop Control Register A"]
493pub type Mstpcra = crate::RegValueT<Mstpcra_SPEC>;
494
495impl Mstpcra {
496    #[doc = "DTC Module Stop"]
497    #[inline(always)]
498    pub fn mstpa22(
499        self,
500    ) -> crate::common::RegisterField<
501        22,
502        0x1,
503        1,
504        0,
505        mstpcra::Mstpa22,
506        mstpcra::Mstpa22,
507        Mstpcra_SPEC,
508        crate::common::RW,
509    > {
510        crate::common::RegisterField::<
511            22,
512            0x1,
513            1,
514            0,
515            mstpcra::Mstpa22,
516            mstpcra::Mstpa22,
517            Mstpcra_SPEC,
518            crate::common::RW,
519        >::from_register(self, 0)
520    }
521}
522impl ::core::default::Default for Mstpcra {
523    #[inline(always)]
524    fn default() -> Mstpcra {
525        <crate::RegValueT<Mstpcra_SPEC> as RegisterValue<_>>::new(4290772991)
526    }
527}
528pub mod mstpcra {
529
530    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
531    pub struct Mstpa22_SPEC;
532    pub type Mstpa22 = crate::EnumBitfieldStruct<u8, Mstpa22_SPEC>;
533    impl Mstpa22 {
534        #[doc = "Cancel the module-stop state"]
535        pub const _0: Self = Self::new(0);
536
537        #[doc = "Enter the module-stop state"]
538        pub const _1: Self = Self::new(1);
539    }
540}
541#[doc(hidden)]
542#[derive(Copy, Clone, Eq, PartialEq)]
543pub struct Sckdivcr_SPEC;
544impl crate::sealed::RegSpec for Sckdivcr_SPEC {
545    type DataType = u32;
546}
547
548#[doc = "System Clock Division Control Register"]
549pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
550
551impl Sckdivcr {
552    #[doc = "Peripheral Module Clock D (PCLKD) Select"]
553    #[inline(always)]
554    pub fn pckd(
555        self,
556    ) -> crate::common::RegisterField<
557        0,
558        0x7,
559        1,
560        0,
561        sckdivcr::Pckd,
562        sckdivcr::Pckd,
563        Sckdivcr_SPEC,
564        crate::common::RW,
565    > {
566        crate::common::RegisterField::<
567            0,
568            0x7,
569            1,
570            0,
571            sckdivcr::Pckd,
572            sckdivcr::Pckd,
573            Sckdivcr_SPEC,
574            crate::common::RW,
575        >::from_register(self, 0)
576    }
577
578    #[doc = "Peripheral Module Clock B (PCLKB) Select"]
579    #[inline(always)]
580    pub fn pckb(
581        self,
582    ) -> crate::common::RegisterField<
583        8,
584        0x7,
585        1,
586        0,
587        sckdivcr::Pckb,
588        sckdivcr::Pckb,
589        Sckdivcr_SPEC,
590        crate::common::RW,
591    > {
592        crate::common::RegisterField::<
593            8,
594            0x7,
595            1,
596            0,
597            sckdivcr::Pckb,
598            sckdivcr::Pckb,
599            Sckdivcr_SPEC,
600            crate::common::RW,
601        >::from_register(self, 0)
602    }
603
604    #[doc = "System Clock (ICLK) Select"]
605    #[inline(always)]
606    pub fn ick(
607        self,
608    ) -> crate::common::RegisterField<
609        24,
610        0x7,
611        1,
612        0,
613        sckdivcr::Ick,
614        sckdivcr::Ick,
615        Sckdivcr_SPEC,
616        crate::common::RW,
617    > {
618        crate::common::RegisterField::<
619            24,
620            0x7,
621            1,
622            0,
623            sckdivcr::Ick,
624            sckdivcr::Ick,
625            Sckdivcr_SPEC,
626            crate::common::RW,
627        >::from_register(self, 0)
628    }
629}
630impl ::core::default::Default for Sckdivcr {
631    #[inline(always)]
632    fn default() -> Sckdivcr {
633        <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(67109892)
634    }
635}
636pub mod sckdivcr {
637
638    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
639    pub struct Pckd_SPEC;
640    pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
641    impl Pckd {
642        #[doc = "x 1/1"]
643        pub const _000: Self = Self::new(0);
644
645        #[doc = "x 1/2"]
646        pub const _001: Self = Self::new(1);
647
648        #[doc = "x 1/4"]
649        pub const _010: Self = Self::new(2);
650
651        #[doc = "x 1/8"]
652        pub const _011: Self = Self::new(3);
653
654        #[doc = "x 1/16"]
655        pub const _100: Self = Self::new(4);
656
657        #[doc = "x 1/32"]
658        pub const _101: Self = Self::new(5);
659
660        #[doc = "x 1/64"]
661        pub const _110: Self = Self::new(6);
662
663        #[doc = "Settings prohibited"]
664        pub const OTHERS: Self = Self::new(0);
665    }
666    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
667    pub struct Pckb_SPEC;
668    pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
669    impl Pckb {
670        #[doc = "x 1/1"]
671        pub const _000: Self = Self::new(0);
672
673        #[doc = "x 1/2"]
674        pub const _001: Self = Self::new(1);
675
676        #[doc = "x 1/4"]
677        pub const _010: Self = Self::new(2);
678
679        #[doc = "x 1/8"]
680        pub const _011: Self = Self::new(3);
681
682        #[doc = "x 1/16"]
683        pub const _100: Self = Self::new(4);
684
685        #[doc = "x 1/32"]
686        pub const _101: Self = Self::new(5);
687
688        #[doc = "x 1/64"]
689        pub const _110: Self = Self::new(6);
690
691        #[doc = "Settings prohibited"]
692        pub const OTHERS: Self = Self::new(0);
693    }
694    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
695    pub struct Ick_SPEC;
696    pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
697    impl Ick {
698        #[doc = "x 1/1"]
699        pub const _000: Self = Self::new(0);
700
701        #[doc = "x 1/2"]
702        pub const _001: Self = Self::new(1);
703
704        #[doc = "x 1/4"]
705        pub const _010: Self = Self::new(2);
706
707        #[doc = "x 1/8"]
708        pub const _011: Self = Self::new(3);
709
710        #[doc = "x 1/16"]
711        pub const _100: Self = Self::new(4);
712
713        #[doc = "x 1/32"]
714        pub const _101: Self = Self::new(5);
715
716        #[doc = "x 1/64"]
717        pub const _110: Self = Self::new(6);
718
719        #[doc = "Settings prohibited"]
720        pub const OTHERS: Self = Self::new(0);
721    }
722}
723#[doc(hidden)]
724#[derive(Copy, Clone, Eq, PartialEq)]
725pub struct Sckscr_SPEC;
726impl crate::sealed::RegSpec for Sckscr_SPEC {
727    type DataType = u8;
728}
729
730#[doc = "System Clock Source Control Register"]
731pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
732
733impl Sckscr {
734    #[doc = "Clock Source Select"]
735    #[inline(always)]
736    pub fn cksel(
737        self,
738    ) -> crate::common::RegisterField<
739        0,
740        0x7,
741        1,
742        0,
743        sckscr::Cksel,
744        sckscr::Cksel,
745        Sckscr_SPEC,
746        crate::common::RW,
747    > {
748        crate::common::RegisterField::<
749            0,
750            0x7,
751            1,
752            0,
753            sckscr::Cksel,
754            sckscr::Cksel,
755            Sckscr_SPEC,
756            crate::common::RW,
757        >::from_register(self, 0)
758    }
759}
760impl ::core::default::Default for Sckscr {
761    #[inline(always)]
762    fn default() -> Sckscr {
763        <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
764    }
765}
766pub mod sckscr {
767
768    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
769    pub struct Cksel_SPEC;
770    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
771    impl Cksel {
772        #[doc = "HOCO"]
773        pub const _000: Self = Self::new(0);
774
775        #[doc = "MOCO"]
776        pub const _001: Self = Self::new(1);
777
778        #[doc = "LOCO"]
779        pub const _010: Self = Self::new(2);
780
781        #[doc = "Setting prohibited"]
782        pub const _011: Self = Self::new(3);
783
784        #[doc = "Setting prohibited"]
785        pub const _100: Self = Self::new(4);
786
787        #[doc = "Setting prohibited"]
788        pub const _101: Self = Self::new(5);
789
790        #[doc = "Setting prohibited"]
791        pub const _110: Self = Self::new(6);
792
793        #[doc = "Setting prohibited"]
794        pub const _111: Self = Self::new(7);
795    }
796}
797#[doc(hidden)]
798#[derive(Copy, Clone, Eq, PartialEq)]
799pub struct Memwait_SPEC;
800impl crate::sealed::RegSpec for Memwait_SPEC {
801    type DataType = u8;
802}
803
804#[doc = "Memory Wait Cycle Control Register for Code Flash"]
805pub type Memwait = crate::RegValueT<Memwait_SPEC>;
806
807impl Memwait {
808    #[doc = "Memory Wait Cycle Select for Code Flash"]
809    #[inline(always)]
810    pub fn memwait(
811        self,
812    ) -> crate::common::RegisterField<
813        0,
814        0x1,
815        1,
816        0,
817        memwait::Memwait,
818        memwait::Memwait,
819        Memwait_SPEC,
820        crate::common::RW,
821    > {
822        crate::common::RegisterField::<
823            0,
824            0x1,
825            1,
826            0,
827            memwait::Memwait,
828            memwait::Memwait,
829            Memwait_SPEC,
830            crate::common::RW,
831        >::from_register(self, 0)
832    }
833}
834impl ::core::default::Default for Memwait {
835    #[inline(always)]
836    fn default() -> Memwait {
837        <crate::RegValueT<Memwait_SPEC> as RegisterValue<_>>::new(0)
838    }
839}
840pub mod memwait {
841
842    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
843    pub struct Memwait_SPEC;
844    pub type Memwait = crate::EnumBitfieldStruct<u8, Memwait_SPEC>;
845    impl Memwait {
846        #[doc = "No wait"]
847        pub const _0: Self = Self::new(0);
848
849        #[doc = "Wait"]
850        pub const _1: Self = Self::new(1);
851    }
852}
853#[doc(hidden)]
854#[derive(Copy, Clone, Eq, PartialEq)]
855pub struct Hococr_SPEC;
856impl crate::sealed::RegSpec for Hococr_SPEC {
857    type DataType = u8;
858}
859
860#[doc = "High-Speed On-Chip Oscillator Control Register"]
861pub type Hococr = crate::RegValueT<Hococr_SPEC>;
862
863impl Hococr {
864    #[doc = "HOCO Stop"]
865    #[inline(always)]
866    pub fn hcstp(
867        self,
868    ) -> crate::common::RegisterField<
869        0,
870        0x1,
871        1,
872        0,
873        hococr::Hcstp,
874        hococr::Hcstp,
875        Hococr_SPEC,
876        crate::common::RW,
877    > {
878        crate::common::RegisterField::<
879            0,
880            0x1,
881            1,
882            0,
883            hococr::Hcstp,
884            hococr::Hcstp,
885            Hococr_SPEC,
886            crate::common::RW,
887        >::from_register(self, 0)
888    }
889}
890impl ::core::default::Default for Hococr {
891    #[inline(always)]
892    fn default() -> Hococr {
893        <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
894    }
895}
896pub mod hococr {
897
898    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
899    pub struct Hcstp_SPEC;
900    pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
901    impl Hcstp {
902        #[doc = "Operate the HOCO clock"]
903        pub const _0: Self = Self::new(0);
904
905        #[doc = "Stop the HOCO clock"]
906        pub const _1: Self = Self::new(1);
907    }
908}
909#[doc(hidden)]
910#[derive(Copy, Clone, Eq, PartialEq)]
911pub struct Mococr_SPEC;
912impl crate::sealed::RegSpec for Mococr_SPEC {
913    type DataType = u8;
914}
915
916#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
917pub type Mococr = crate::RegValueT<Mococr_SPEC>;
918
919impl Mococr {
920    #[doc = "MOCO Stop"]
921    #[inline(always)]
922    pub fn mcstp(
923        self,
924    ) -> crate::common::RegisterField<
925        0,
926        0x1,
927        1,
928        0,
929        mococr::Mcstp,
930        mococr::Mcstp,
931        Mococr_SPEC,
932        crate::common::RW,
933    > {
934        crate::common::RegisterField::<
935            0,
936            0x1,
937            1,
938            0,
939            mococr::Mcstp,
940            mococr::Mcstp,
941            Mococr_SPEC,
942            crate::common::RW,
943        >::from_register(self, 0)
944    }
945}
946impl ::core::default::Default for Mococr {
947    #[inline(always)]
948    fn default() -> Mococr {
949        <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
950    }
951}
952pub mod mococr {
953
954    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
955    pub struct Mcstp_SPEC;
956    pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
957    impl Mcstp {
958        #[doc = "MOCO clock is operating"]
959        pub const _0: Self = Self::new(0);
960
961        #[doc = "MOCO clock is stopped"]
962        pub const _1: Self = Self::new(1);
963    }
964}
965#[doc(hidden)]
966#[derive(Copy, Clone, Eq, PartialEq)]
967pub struct Oscsf_SPEC;
968impl crate::sealed::RegSpec for Oscsf_SPEC {
969    type DataType = u8;
970}
971
972#[doc = "Oscillation Stabilization Flag Register"]
973pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
974
975impl Oscsf {
976    #[doc = "HOCO Clock Oscillation Stabilization Flag"]
977    #[inline(always)]
978    pub fn hocosf(
979        self,
980    ) -> crate::common::RegisterField<
981        0,
982        0x1,
983        1,
984        0,
985        oscsf::Hocosf,
986        oscsf::Hocosf,
987        Oscsf_SPEC,
988        crate::common::R,
989    > {
990        crate::common::RegisterField::<
991            0,
992            0x1,
993            1,
994            0,
995            oscsf::Hocosf,
996            oscsf::Hocosf,
997            Oscsf_SPEC,
998            crate::common::R,
999        >::from_register(self, 0)
1000    }
1001}
1002impl ::core::default::Default for Oscsf {
1003    #[inline(always)]
1004    fn default() -> Oscsf {
1005        <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
1006    }
1007}
1008pub mod oscsf {
1009
1010    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1011    pub struct Hocosf_SPEC;
1012    pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
1013    impl Hocosf {
1014        #[doc = "The HOCO clock is stopped or is not yet stable"]
1015        pub const _0: Self = Self::new(0);
1016
1017        #[doc = "The HOCO clock is stable, so is available for use as the system clock"]
1018        pub const _1: Self = Self::new(1);
1019    }
1020}
1021#[doc(hidden)]
1022#[derive(Copy, Clone, Eq, PartialEq)]
1023pub struct Ckocr_SPEC;
1024impl crate::sealed::RegSpec for Ckocr_SPEC {
1025    type DataType = u8;
1026}
1027
1028#[doc = "Clock Out Control Register"]
1029pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
1030
1031impl Ckocr {
1032    #[doc = "Clock Out Source Select"]
1033    #[inline(always)]
1034    pub fn ckosel(
1035        self,
1036    ) -> crate::common::RegisterField<
1037        0,
1038        0x7,
1039        1,
1040        0,
1041        ckocr::Ckosel,
1042        ckocr::Ckosel,
1043        Ckocr_SPEC,
1044        crate::common::RW,
1045    > {
1046        crate::common::RegisterField::<
1047            0,
1048            0x7,
1049            1,
1050            0,
1051            ckocr::Ckosel,
1052            ckocr::Ckosel,
1053            Ckocr_SPEC,
1054            crate::common::RW,
1055        >::from_register(self, 0)
1056    }
1057
1058    #[doc = "Clock Output Frequency Division Ratio"]
1059    #[inline(always)]
1060    pub fn ckodiv(
1061        self,
1062    ) -> crate::common::RegisterField<
1063        4,
1064        0x7,
1065        1,
1066        0,
1067        ckocr::Ckodiv,
1068        ckocr::Ckodiv,
1069        Ckocr_SPEC,
1070        crate::common::RW,
1071    > {
1072        crate::common::RegisterField::<
1073            4,
1074            0x7,
1075            1,
1076            0,
1077            ckocr::Ckodiv,
1078            ckocr::Ckodiv,
1079            Ckocr_SPEC,
1080            crate::common::RW,
1081        >::from_register(self, 0)
1082    }
1083
1084    #[doc = "Clock Out Enable"]
1085    #[inline(always)]
1086    pub fn ckoen(
1087        self,
1088    ) -> crate::common::RegisterField<
1089        7,
1090        0x1,
1091        1,
1092        0,
1093        ckocr::Ckoen,
1094        ckocr::Ckoen,
1095        Ckocr_SPEC,
1096        crate::common::RW,
1097    > {
1098        crate::common::RegisterField::<
1099            7,
1100            0x1,
1101            1,
1102            0,
1103            ckocr::Ckoen,
1104            ckocr::Ckoen,
1105            Ckocr_SPEC,
1106            crate::common::RW,
1107        >::from_register(self, 0)
1108    }
1109}
1110impl ::core::default::Default for Ckocr {
1111    #[inline(always)]
1112    fn default() -> Ckocr {
1113        <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
1114    }
1115}
1116pub mod ckocr {
1117
1118    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1119    pub struct Ckosel_SPEC;
1120    pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
1121    impl Ckosel {
1122        #[doc = "HOCO (value after reset)"]
1123        pub const _000: Self = Self::new(0);
1124
1125        #[doc = "MOCO"]
1126        pub const _001: Self = Self::new(1);
1127
1128        #[doc = "LOCO"]
1129        pub const _010: Self = Self::new(2);
1130
1131        #[doc = "Setting prohibited"]
1132        pub const _011: Self = Self::new(3);
1133
1134        #[doc = "Setting prohibited"]
1135        pub const _100: Self = Self::new(4);
1136
1137        #[doc = "Setting prohibited"]
1138        pub const _101: Self = Self::new(5);
1139
1140        #[doc = "Setting prohibited"]
1141        pub const OTHERS: Self = Self::new(0);
1142    }
1143    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1144    pub struct Ckodiv_SPEC;
1145    pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
1146    impl Ckodiv {
1147        #[doc = "x 1/1"]
1148        pub const _000: Self = Self::new(0);
1149
1150        #[doc = "x 1/2"]
1151        pub const _001: Self = Self::new(1);
1152
1153        #[doc = "x 1/4"]
1154        pub const _010: Self = Self::new(2);
1155
1156        #[doc = "x 1/8"]
1157        pub const _011: Self = Self::new(3);
1158
1159        #[doc = "x 1/16"]
1160        pub const _100: Self = Self::new(4);
1161
1162        #[doc = "x 1/32"]
1163        pub const _101: Self = Self::new(5);
1164
1165        #[doc = "x 1/64"]
1166        pub const _110: Self = Self::new(6);
1167
1168        #[doc = "x 1/128"]
1169        pub const _111: Self = Self::new(7);
1170    }
1171    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1172    pub struct Ckoen_SPEC;
1173    pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
1174    impl Ckoen {
1175        #[doc = "Disable clock out"]
1176        pub const _0: Self = Self::new(0);
1177
1178        #[doc = "Enable clock out"]
1179        pub const _1: Self = Self::new(1);
1180    }
1181}
1182#[doc(hidden)]
1183#[derive(Copy, Clone, Eq, PartialEq)]
1184pub struct Lpopt_SPEC;
1185impl crate::sealed::RegSpec for Lpopt_SPEC {
1186    type DataType = u8;
1187}
1188
1189#[doc = "Lower Power Operation Control Register"]
1190pub type Lpopt = crate::RegValueT<Lpopt_SPEC>;
1191
1192impl Lpopt {
1193    #[doc = "MPU Clock Disable Control"]
1194    #[inline(always)]
1195    pub fn mpudis(
1196        self,
1197    ) -> crate::common::RegisterField<
1198        0,
1199        0x1,
1200        1,
1201        0,
1202        lpopt::Mpudis,
1203        lpopt::Mpudis,
1204        Lpopt_SPEC,
1205        crate::common::RW,
1206    > {
1207        crate::common::RegisterField::<
1208            0,
1209            0x1,
1210            1,
1211            0,
1212            lpopt::Mpudis,
1213            lpopt::Mpudis,
1214            Lpopt_SPEC,
1215            crate::common::RW,
1216        >::from_register(self, 0)
1217    }
1218
1219    #[doc = "Debug Clock Disable Control"]
1220    #[inline(always)]
1221    pub fn dclkdis(
1222        self,
1223    ) -> crate::common::RegisterField<
1224        1,
1225        0x3,
1226        1,
1227        0,
1228        lpopt::Dclkdis,
1229        lpopt::Dclkdis,
1230        Lpopt_SPEC,
1231        crate::common::RW,
1232    > {
1233        crate::common::RegisterField::<
1234            1,
1235            0x3,
1236            1,
1237            0,
1238            lpopt::Dclkdis,
1239            lpopt::Dclkdis,
1240            Lpopt_SPEC,
1241            crate::common::RW,
1242        >::from_register(self, 0)
1243    }
1244
1245    #[doc = "BPF Clock Disable Control"]
1246    #[inline(always)]
1247    pub fn bpfclkdis(
1248        self,
1249    ) -> crate::common::RegisterField<
1250        3,
1251        0x1,
1252        1,
1253        0,
1254        lpopt::Bpfclkdis,
1255        lpopt::Bpfclkdis,
1256        Lpopt_SPEC,
1257        crate::common::RW,
1258    > {
1259        crate::common::RegisterField::<
1260            3,
1261            0x1,
1262            1,
1263            0,
1264            lpopt::Bpfclkdis,
1265            lpopt::Bpfclkdis,
1266            Lpopt_SPEC,
1267            crate::common::RW,
1268        >::from_register(self, 0)
1269    }
1270
1271    #[doc = "Lower Power Operation Enable"]
1272    #[inline(always)]
1273    pub fn lpopten(
1274        self,
1275    ) -> crate::common::RegisterField<
1276        7,
1277        0x1,
1278        1,
1279        0,
1280        lpopt::Lpopten,
1281        lpopt::Lpopten,
1282        Lpopt_SPEC,
1283        crate::common::RW,
1284    > {
1285        crate::common::RegisterField::<
1286            7,
1287            0x1,
1288            1,
1289            0,
1290            lpopt::Lpopten,
1291            lpopt::Lpopten,
1292            Lpopt_SPEC,
1293            crate::common::RW,
1294        >::from_register(self, 0)
1295    }
1296}
1297impl ::core::default::Default for Lpopt {
1298    #[inline(always)]
1299    fn default() -> Lpopt {
1300        <crate::RegValueT<Lpopt_SPEC> as RegisterValue<_>>::new(64)
1301    }
1302}
1303pub mod lpopt {
1304
1305    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1306    pub struct Mpudis_SPEC;
1307    pub type Mpudis = crate::EnumBitfieldStruct<u8, Mpudis_SPEC>;
1308    impl Mpudis {
1309        #[doc = "MPU operates as normal"]
1310        pub const _0: Self = Self::new(0);
1311
1312        #[doc = "MPU operate clock stops (MPU function disable)."]
1313        pub const _1: Self = Self::new(1);
1314    }
1315    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1316    pub struct Dclkdis_SPEC;
1317    pub type Dclkdis = crate::EnumBitfieldStruct<u8, Dclkdis_SPEC>;
1318    impl Dclkdis {
1319        #[doc = "Debug clock does not stop"]
1320        pub const _00: Self = Self::new(0);
1321
1322        #[doc = "Debug clock stops (valid only when LPOPT.LPOPTEN = 1)"]
1323        pub const OTHERS: Self = Self::new(0);
1324    }
1325    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1326    pub struct Bpfclkdis_SPEC;
1327    pub type Bpfclkdis = crate::EnumBitfieldStruct<u8, Bpfclkdis_SPEC>;
1328    impl Bpfclkdis {
1329        #[doc = "Flash register R/W clock operates as normal"]
1330        pub const _0: Self = Self::new(0);
1331
1332        #[doc = "Flash register R/W clock stops."]
1333        pub const _1: Self = Self::new(1);
1334    }
1335    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1336    pub struct Lpopten_SPEC;
1337    pub type Lpopten = crate::EnumBitfieldStruct<u8, Lpopten_SPEC>;
1338    impl Lpopten {
1339        #[doc = "All lower power counter measure disable"]
1340        pub const _0: Self = Self::new(0);
1341
1342        #[doc = "All lower power counter measure enable"]
1343        pub const _1: Self = Self::new(1);
1344    }
1345}
1346#[doc(hidden)]
1347#[derive(Copy, Clone, Eq, PartialEq)]
1348pub struct Mocoutcr_SPEC;
1349impl crate::sealed::RegSpec for Mocoutcr_SPEC {
1350    type DataType = u8;
1351}
1352
1353#[doc = "MOCO User Trimming Control Register"]
1354pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
1355
1356impl Mocoutcr {
1357    #[doc = "MOCO User Trimming"]
1358    #[inline(always)]
1359    pub fn mocoutrm(
1360        self,
1361    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
1362        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
1363    }
1364}
1365impl ::core::default::Default for Mocoutcr {
1366    #[inline(always)]
1367    fn default() -> Mocoutcr {
1368        <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
1369    }
1370}
1371
1372#[doc(hidden)]
1373#[derive(Copy, Clone, Eq, PartialEq)]
1374pub struct Hocoutcr_SPEC;
1375impl crate::sealed::RegSpec for Hocoutcr_SPEC {
1376    type DataType = u8;
1377}
1378
1379#[doc = "HOCO User Trimming Control Register"]
1380pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
1381
1382impl Hocoutcr {
1383    #[doc = "HOCO User Trimming"]
1384    #[inline(always)]
1385    pub fn hocoutrm(
1386        self,
1387    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
1388        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
1389    }
1390}
1391impl ::core::default::Default for Hocoutcr {
1392    #[inline(always)]
1393    fn default() -> Hocoutcr {
1394        <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
1395    }
1396}
1397
1398#[doc(hidden)]
1399#[derive(Copy, Clone, Eq, PartialEq)]
1400pub struct Snzcr_SPEC;
1401impl crate::sealed::RegSpec for Snzcr_SPEC {
1402    type DataType = u8;
1403}
1404
1405#[doc = "Snooze Control Register"]
1406pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
1407
1408impl Snzcr {
1409    #[doc = "DTC Enable in Snooze mode"]
1410    #[inline(always)]
1411    pub fn snzdtcen(
1412        self,
1413    ) -> crate::common::RegisterField<
1414        1,
1415        0x1,
1416        1,
1417        0,
1418        snzcr::Snzdtcen,
1419        snzcr::Snzdtcen,
1420        Snzcr_SPEC,
1421        crate::common::RW,
1422    > {
1423        crate::common::RegisterField::<
1424            1,
1425            0x1,
1426            1,
1427            0,
1428            snzcr::Snzdtcen,
1429            snzcr::Snzdtcen,
1430            Snzcr_SPEC,
1431            crate::common::RW,
1432        >::from_register(self, 0)
1433    }
1434
1435    #[doc = "Snooze mode Enable"]
1436    #[inline(always)]
1437    pub fn snze(
1438        self,
1439    ) -> crate::common::RegisterField<
1440        7,
1441        0x1,
1442        1,
1443        0,
1444        snzcr::Snze,
1445        snzcr::Snze,
1446        Snzcr_SPEC,
1447        crate::common::RW,
1448    > {
1449        crate::common::RegisterField::<
1450            7,
1451            0x1,
1452            1,
1453            0,
1454            snzcr::Snze,
1455            snzcr::Snze,
1456            Snzcr_SPEC,
1457            crate::common::RW,
1458        >::from_register(self, 0)
1459    }
1460}
1461impl ::core::default::Default for Snzcr {
1462    #[inline(always)]
1463    fn default() -> Snzcr {
1464        <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
1465    }
1466}
1467pub mod snzcr {
1468
1469    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1470    pub struct Snzdtcen_SPEC;
1471    pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
1472    impl Snzdtcen {
1473        #[doc = "Disable DTC operation"]
1474        pub const _0: Self = Self::new(0);
1475
1476        #[doc = "Enable DTC operation"]
1477        pub const _1: Self = Self::new(1);
1478    }
1479    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1480    pub struct Snze_SPEC;
1481    pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
1482    impl Snze {
1483        #[doc = "Disable Snooze mode"]
1484        pub const _0: Self = Self::new(0);
1485
1486        #[doc = "Enable Snooze mode"]
1487        pub const _1: Self = Self::new(1);
1488    }
1489}
1490#[doc(hidden)]
1491#[derive(Copy, Clone, Eq, PartialEq)]
1492pub struct Snzedcr0_SPEC;
1493impl crate::sealed::RegSpec for Snzedcr0_SPEC {
1494    type DataType = u8;
1495}
1496
1497#[doc = "Snooze End Control Register 0"]
1498pub type Snzedcr0 = crate::RegValueT<Snzedcr0_SPEC>;
1499
1500impl Snzedcr0 {
1501    #[doc = "AGT1 Underflow Snooze End Enable"]
1502    #[inline(always)]
1503    pub fn agtunfed(
1504        self,
1505    ) -> crate::common::RegisterField<
1506        0,
1507        0x1,
1508        1,
1509        0,
1510        snzedcr0::Agtunfed,
1511        snzedcr0::Agtunfed,
1512        Snzedcr0_SPEC,
1513        crate::common::RW,
1514    > {
1515        crate::common::RegisterField::<
1516            0,
1517            0x1,
1518            1,
1519            0,
1520            snzedcr0::Agtunfed,
1521            snzedcr0::Agtunfed,
1522            Snzedcr0_SPEC,
1523            crate::common::RW,
1524        >::from_register(self, 0)
1525    }
1526
1527    #[doc = "Last DTC Transmission Completion Snooze End Enable"]
1528    #[inline(always)]
1529    pub fn dtczred(
1530        self,
1531    ) -> crate::common::RegisterField<
1532        1,
1533        0x1,
1534        1,
1535        0,
1536        snzedcr0::Dtczred,
1537        snzedcr0::Dtczred,
1538        Snzedcr0_SPEC,
1539        crate::common::RW,
1540    > {
1541        crate::common::RegisterField::<
1542            1,
1543            0x1,
1544            1,
1545            0,
1546            snzedcr0::Dtczred,
1547            snzedcr0::Dtczred,
1548            Snzedcr0_SPEC,
1549            crate::common::RW,
1550        >::from_register(self, 0)
1551    }
1552
1553    #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
1554    #[inline(always)]
1555    pub fn dtcnzred(
1556        self,
1557    ) -> crate::common::RegisterField<
1558        2,
1559        0x1,
1560        1,
1561        0,
1562        snzedcr0::Dtcnzred,
1563        snzedcr0::Dtcnzred,
1564        Snzedcr0_SPEC,
1565        crate::common::RW,
1566    > {
1567        crate::common::RegisterField::<
1568            2,
1569            0x1,
1570            1,
1571            0,
1572            snzedcr0::Dtcnzred,
1573            snzedcr0::Dtcnzred,
1574            Snzedcr0_SPEC,
1575            crate::common::RW,
1576        >::from_register(self, 0)
1577    }
1578
1579    #[doc = "ADC12 Compare Match Snooze End Enable"]
1580    #[inline(always)]
1581    pub fn ad0mated(
1582        self,
1583    ) -> crate::common::RegisterField<
1584        3,
1585        0x1,
1586        1,
1587        0,
1588        snzedcr0::Ad0Mated,
1589        snzedcr0::Ad0Mated,
1590        Snzedcr0_SPEC,
1591        crate::common::RW,
1592    > {
1593        crate::common::RegisterField::<
1594            3,
1595            0x1,
1596            1,
1597            0,
1598            snzedcr0::Ad0Mated,
1599            snzedcr0::Ad0Mated,
1600            Snzedcr0_SPEC,
1601            crate::common::RW,
1602        >::from_register(self, 0)
1603    }
1604
1605    #[doc = "ADC12 Compare Mismatch Snooze End Enable"]
1606    #[inline(always)]
1607    pub fn ad0umted(
1608        self,
1609    ) -> crate::common::RegisterField<
1610        4,
1611        0x1,
1612        1,
1613        0,
1614        snzedcr0::Ad0Umted,
1615        snzedcr0::Ad0Umted,
1616        Snzedcr0_SPEC,
1617        crate::common::RW,
1618    > {
1619        crate::common::RegisterField::<
1620            4,
1621            0x1,
1622            1,
1623            0,
1624            snzedcr0::Ad0Umted,
1625            snzedcr0::Ad0Umted,
1626            Snzedcr0_SPEC,
1627            crate::common::RW,
1628        >::from_register(self, 0)
1629    }
1630}
1631impl ::core::default::Default for Snzedcr0 {
1632    #[inline(always)]
1633    fn default() -> Snzedcr0 {
1634        <crate::RegValueT<Snzedcr0_SPEC> as RegisterValue<_>>::new(0)
1635    }
1636}
1637pub mod snzedcr0 {
1638
1639    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1640    pub struct Agtunfed_SPEC;
1641    pub type Agtunfed = crate::EnumBitfieldStruct<u8, Agtunfed_SPEC>;
1642    impl Agtunfed {
1643        #[doc = "Disable the snooze end request"]
1644        pub const _0: Self = Self::new(0);
1645
1646        #[doc = "Enable the snooze end request"]
1647        pub const _1: Self = Self::new(1);
1648    }
1649    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1650    pub struct Dtczred_SPEC;
1651    pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
1652    impl Dtczred {
1653        #[doc = "Disable the snooze end request"]
1654        pub const _0: Self = Self::new(0);
1655
1656        #[doc = "Enable the snooze end request"]
1657        pub const _1: Self = Self::new(1);
1658    }
1659    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1660    pub struct Dtcnzred_SPEC;
1661    pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
1662    impl Dtcnzred {
1663        #[doc = "Disable the snooze end request"]
1664        pub const _0: Self = Self::new(0);
1665
1666        #[doc = "Enable the snooze end request"]
1667        pub const _1: Self = Self::new(1);
1668    }
1669    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1670    pub struct Ad0Mated_SPEC;
1671    pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
1672    impl Ad0Mated {
1673        #[doc = "Disable the snooze end request"]
1674        pub const _0: Self = Self::new(0);
1675
1676        #[doc = "Enable the snooze end request"]
1677        pub const _1: Self = Self::new(1);
1678    }
1679    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1680    pub struct Ad0Umted_SPEC;
1681    pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
1682    impl Ad0Umted {
1683        #[doc = "Disable the snooze end request"]
1684        pub const _0: Self = Self::new(0);
1685
1686        #[doc = "Enable the snooze end request"]
1687        pub const _1: Self = Self::new(1);
1688    }
1689}
1690#[doc(hidden)]
1691#[derive(Copy, Clone, Eq, PartialEq)]
1692pub struct Snzreqcr0_SPEC;
1693impl crate::sealed::RegSpec for Snzreqcr0_SPEC {
1694    type DataType = u32;
1695}
1696
1697#[doc = "Snooze Request Control Register 0"]
1698pub type Snzreqcr0 = crate::RegValueT<Snzreqcr0_SPEC>;
1699
1700impl Snzreqcr0 {
1701    #[doc = "Enable IRQ0 pin snooze request"]
1702    #[inline(always)]
1703    pub fn snzreqen0(
1704        self,
1705    ) -> crate::common::RegisterField<
1706        0,
1707        0x1,
1708        1,
1709        0,
1710        snzreqcr0::Snzreqen0,
1711        snzreqcr0::Snzreqen0,
1712        Snzreqcr0_SPEC,
1713        crate::common::RW,
1714    > {
1715        crate::common::RegisterField::<
1716            0,
1717            0x1,
1718            1,
1719            0,
1720            snzreqcr0::Snzreqen0,
1721            snzreqcr0::Snzreqen0,
1722            Snzreqcr0_SPEC,
1723            crate::common::RW,
1724        >::from_register(self, 0)
1725    }
1726
1727    #[doc = "Enable IRQ1 pin snooze request"]
1728    #[inline(always)]
1729    pub fn snzreqen1(
1730        self,
1731    ) -> crate::common::RegisterField<
1732        1,
1733        0x1,
1734        1,
1735        0,
1736        snzreqcr0::Snzreqen1,
1737        snzreqcr0::Snzreqen1,
1738        Snzreqcr0_SPEC,
1739        crate::common::RW,
1740    > {
1741        crate::common::RegisterField::<
1742            1,
1743            0x1,
1744            1,
1745            0,
1746            snzreqcr0::Snzreqen1,
1747            snzreqcr0::Snzreqen1,
1748            Snzreqcr0_SPEC,
1749            crate::common::RW,
1750        >::from_register(self, 0)
1751    }
1752
1753    #[doc = "Enable IRQ2 pin snooze request"]
1754    #[inline(always)]
1755    pub fn snzreqen2(
1756        self,
1757    ) -> crate::common::RegisterField<
1758        2,
1759        0x1,
1760        1,
1761        0,
1762        snzreqcr0::Snzreqen2,
1763        snzreqcr0::Snzreqen2,
1764        Snzreqcr0_SPEC,
1765        crate::common::RW,
1766    > {
1767        crate::common::RegisterField::<
1768            2,
1769            0x1,
1770            1,
1771            0,
1772            snzreqcr0::Snzreqen2,
1773            snzreqcr0::Snzreqen2,
1774            Snzreqcr0_SPEC,
1775            crate::common::RW,
1776        >::from_register(self, 0)
1777    }
1778
1779    #[doc = "Enable IRQ3 pin snooze request"]
1780    #[inline(always)]
1781    pub fn snzreqen3(
1782        self,
1783    ) -> crate::common::RegisterField<
1784        3,
1785        0x1,
1786        1,
1787        0,
1788        snzreqcr0::Snzreqen3,
1789        snzreqcr0::Snzreqen3,
1790        Snzreqcr0_SPEC,
1791        crate::common::RW,
1792    > {
1793        crate::common::RegisterField::<
1794            3,
1795            0x1,
1796            1,
1797            0,
1798            snzreqcr0::Snzreqen3,
1799            snzreqcr0::Snzreqen3,
1800            Snzreqcr0_SPEC,
1801            crate::common::RW,
1802        >::from_register(self, 0)
1803    }
1804
1805    #[doc = "Enable IRQ4 pin snooze request"]
1806    #[inline(always)]
1807    pub fn snzreqen4(
1808        self,
1809    ) -> crate::common::RegisterField<
1810        4,
1811        0x1,
1812        1,
1813        0,
1814        snzreqcr0::Snzreqen4,
1815        snzreqcr0::Snzreqen4,
1816        Snzreqcr0_SPEC,
1817        crate::common::RW,
1818    > {
1819        crate::common::RegisterField::<
1820            4,
1821            0x1,
1822            1,
1823            0,
1824            snzreqcr0::Snzreqen4,
1825            snzreqcr0::Snzreqen4,
1826            Snzreqcr0_SPEC,
1827            crate::common::RW,
1828        >::from_register(self, 0)
1829    }
1830
1831    #[doc = "Enable IRQ5 pin snooze request"]
1832    #[inline(always)]
1833    pub fn snzreqen5(
1834        self,
1835    ) -> crate::common::RegisterField<
1836        5,
1837        0x1,
1838        1,
1839        0,
1840        snzreqcr0::Snzreqen5,
1841        snzreqcr0::Snzreqen5,
1842        Snzreqcr0_SPEC,
1843        crate::common::RW,
1844    > {
1845        crate::common::RegisterField::<
1846            5,
1847            0x1,
1848            1,
1849            0,
1850            snzreqcr0::Snzreqen5,
1851            snzreqcr0::Snzreqen5,
1852            Snzreqcr0_SPEC,
1853            crate::common::RW,
1854        >::from_register(self, 0)
1855    }
1856
1857    #[doc = "Enable IRQ6 pin snooze request"]
1858    #[inline(always)]
1859    pub fn snzreqen6(
1860        self,
1861    ) -> crate::common::RegisterField<
1862        6,
1863        0x1,
1864        1,
1865        0,
1866        snzreqcr0::Snzreqen6,
1867        snzreqcr0::Snzreqen6,
1868        Snzreqcr0_SPEC,
1869        crate::common::RW,
1870    > {
1871        crate::common::RegisterField::<
1872            6,
1873            0x1,
1874            1,
1875            0,
1876            snzreqcr0::Snzreqen6,
1877            snzreqcr0::Snzreqen6,
1878            Snzreqcr0_SPEC,
1879            crate::common::RW,
1880        >::from_register(self, 0)
1881    }
1882
1883    #[doc = "Enable IRQ7 pin snooze request"]
1884    #[inline(always)]
1885    pub fn snzreqen7(
1886        self,
1887    ) -> crate::common::RegisterField<
1888        7,
1889        0x1,
1890        1,
1891        0,
1892        snzreqcr0::Snzreqen7,
1893        snzreqcr0::Snzreqen7,
1894        Snzreqcr0_SPEC,
1895        crate::common::RW,
1896    > {
1897        crate::common::RegisterField::<
1898            7,
1899            0x1,
1900            1,
1901            0,
1902            snzreqcr0::Snzreqen7,
1903            snzreqcr0::Snzreqen7,
1904            Snzreqcr0_SPEC,
1905            crate::common::RW,
1906        >::from_register(self, 0)
1907    }
1908
1909    #[doc = "Enable KEY_INTKR snooze request"]
1910    #[inline(always)]
1911    pub fn snzreqen17(
1912        self,
1913    ) -> crate::common::RegisterField<
1914        17,
1915        0x1,
1916        1,
1917        0,
1918        snzreqcr0::Snzreqen17,
1919        snzreqcr0::Snzreqen17,
1920        Snzreqcr0_SPEC,
1921        crate::common::RW,
1922    > {
1923        crate::common::RegisterField::<
1924            17,
1925            0x1,
1926            1,
1927            0,
1928            snzreqcr0::Snzreqen17,
1929            snzreqcr0::Snzreqen17,
1930            Snzreqcr0_SPEC,
1931            crate::common::RW,
1932        >::from_register(self, 0)
1933    }
1934
1935    #[doc = "Enable AGT1 underflow snooze request"]
1936    #[inline(always)]
1937    pub fn snzreqen28(
1938        self,
1939    ) -> crate::common::RegisterField<
1940        28,
1941        0x1,
1942        1,
1943        0,
1944        snzreqcr0::Snzreqen28,
1945        snzreqcr0::Snzreqen28,
1946        Snzreqcr0_SPEC,
1947        crate::common::RW,
1948    > {
1949        crate::common::RegisterField::<
1950            28,
1951            0x1,
1952            1,
1953            0,
1954            snzreqcr0::Snzreqen28,
1955            snzreqcr0::Snzreqen28,
1956            Snzreqcr0_SPEC,
1957            crate::common::RW,
1958        >::from_register(self, 0)
1959    }
1960
1961    #[doc = "Enable AGT1 compare match A snooze request"]
1962    #[inline(always)]
1963    pub fn snzreqen29(
1964        self,
1965    ) -> crate::common::RegisterField<
1966        29,
1967        0x1,
1968        1,
1969        0,
1970        snzreqcr0::Snzreqen29,
1971        snzreqcr0::Snzreqen29,
1972        Snzreqcr0_SPEC,
1973        crate::common::RW,
1974    > {
1975        crate::common::RegisterField::<
1976            29,
1977            0x1,
1978            1,
1979            0,
1980            snzreqcr0::Snzreqen29,
1981            snzreqcr0::Snzreqen29,
1982            Snzreqcr0_SPEC,
1983            crate::common::RW,
1984        >::from_register(self, 0)
1985    }
1986
1987    #[doc = "Enable AGT1 compare match B snooze request"]
1988    #[inline(always)]
1989    pub fn snzreqen30(
1990        self,
1991    ) -> crate::common::RegisterField<
1992        30,
1993        0x1,
1994        1,
1995        0,
1996        snzreqcr0::Snzreqen30,
1997        snzreqcr0::Snzreqen30,
1998        Snzreqcr0_SPEC,
1999        crate::common::RW,
2000    > {
2001        crate::common::RegisterField::<
2002            30,
2003            0x1,
2004            1,
2005            0,
2006            snzreqcr0::Snzreqen30,
2007            snzreqcr0::Snzreqen30,
2008            Snzreqcr0_SPEC,
2009            crate::common::RW,
2010        >::from_register(self, 0)
2011    }
2012}
2013impl ::core::default::Default for Snzreqcr0 {
2014    #[inline(always)]
2015    fn default() -> Snzreqcr0 {
2016        <crate::RegValueT<Snzreqcr0_SPEC> as RegisterValue<_>>::new(0)
2017    }
2018}
2019pub mod snzreqcr0 {
2020
2021    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2022    pub struct Snzreqen0_SPEC;
2023    pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
2024    impl Snzreqen0 {
2025        #[doc = "Disable the snooze request"]
2026        pub const _0: Self = Self::new(0);
2027
2028        #[doc = "Enable the snooze request"]
2029        pub const _1: Self = Self::new(1);
2030    }
2031    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2032    pub struct Snzreqen1_SPEC;
2033    pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
2034    impl Snzreqen1 {
2035        #[doc = "Disable the snooze request"]
2036        pub const _0: Self = Self::new(0);
2037
2038        #[doc = "Enable the snooze request"]
2039        pub const _1: Self = Self::new(1);
2040    }
2041    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2042    pub struct Snzreqen2_SPEC;
2043    pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
2044    impl Snzreqen2 {
2045        #[doc = "Disable the snooze request"]
2046        pub const _0: Self = Self::new(0);
2047
2048        #[doc = "Enable the snooze request"]
2049        pub const _1: Self = Self::new(1);
2050    }
2051    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2052    pub struct Snzreqen3_SPEC;
2053    pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
2054    impl Snzreqen3 {
2055        #[doc = "Disable the snooze request"]
2056        pub const _0: Self = Self::new(0);
2057
2058        #[doc = "Enable the snooze request"]
2059        pub const _1: Self = Self::new(1);
2060    }
2061    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2062    pub struct Snzreqen4_SPEC;
2063    pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
2064    impl Snzreqen4 {
2065        #[doc = "Disable the snooze request"]
2066        pub const _0: Self = Self::new(0);
2067
2068        #[doc = "Enable the snooze request"]
2069        pub const _1: Self = Self::new(1);
2070    }
2071    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2072    pub struct Snzreqen5_SPEC;
2073    pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
2074    impl Snzreqen5 {
2075        #[doc = "Disable the snooze request"]
2076        pub const _0: Self = Self::new(0);
2077
2078        #[doc = "Enable the snooze request"]
2079        pub const _1: Self = Self::new(1);
2080    }
2081    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2082    pub struct Snzreqen6_SPEC;
2083    pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
2084    impl Snzreqen6 {
2085        #[doc = "Disable the snooze request"]
2086        pub const _0: Self = Self::new(0);
2087
2088        #[doc = "Enable the snooze request"]
2089        pub const _1: Self = Self::new(1);
2090    }
2091    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2092    pub struct Snzreqen7_SPEC;
2093    pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
2094    impl Snzreqen7 {
2095        #[doc = "Disable the snooze request"]
2096        pub const _0: Self = Self::new(0);
2097
2098        #[doc = "Enable the snooze request"]
2099        pub const _1: Self = Self::new(1);
2100    }
2101    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2102    pub struct Snzreqen17_SPEC;
2103    pub type Snzreqen17 = crate::EnumBitfieldStruct<u8, Snzreqen17_SPEC>;
2104    impl Snzreqen17 {
2105        #[doc = "Disable the snooze request"]
2106        pub const _0: Self = Self::new(0);
2107
2108        #[doc = "Enable the snooze request"]
2109        pub const _1: Self = Self::new(1);
2110    }
2111    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2112    pub struct Snzreqen28_SPEC;
2113    pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
2114    impl Snzreqen28 {
2115        #[doc = "Disable the snooze request"]
2116        pub const _0: Self = Self::new(0);
2117
2118        #[doc = "Enable the snooze request"]
2119        pub const _1: Self = Self::new(1);
2120    }
2121    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2122    pub struct Snzreqen29_SPEC;
2123    pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
2124    impl Snzreqen29 {
2125        #[doc = "Disable the snooze request"]
2126        pub const _0: Self = Self::new(0);
2127
2128        #[doc = "Enable the snooze request"]
2129        pub const _1: Self = Self::new(1);
2130    }
2131    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2132    pub struct Snzreqen30_SPEC;
2133    pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
2134    impl Snzreqen30 {
2135        #[doc = "Disable the snooze request"]
2136        pub const _0: Self = Self::new(0);
2137
2138        #[doc = "Enable the snooze request"]
2139        pub const _1: Self = Self::new(1);
2140    }
2141}
2142#[doc(hidden)]
2143#[derive(Copy, Clone, Eq, PartialEq)]
2144pub struct Psmcr_SPEC;
2145impl crate::sealed::RegSpec for Psmcr_SPEC {
2146    type DataType = u8;
2147}
2148
2149#[doc = "Power Save Memory Control Register"]
2150pub type Psmcr = crate::RegValueT<Psmcr_SPEC>;
2151
2152impl Psmcr {
2153    #[doc = "Power Save Memory Control"]
2154    #[inline(always)]
2155    pub fn psmc(
2156        self,
2157    ) -> crate::common::RegisterField<
2158        0,
2159        0x3,
2160        1,
2161        0,
2162        psmcr::Psmc,
2163        psmcr::Psmc,
2164        Psmcr_SPEC,
2165        crate::common::RW,
2166    > {
2167        crate::common::RegisterField::<
2168            0,
2169            0x3,
2170            1,
2171            0,
2172            psmcr::Psmc,
2173            psmcr::Psmc,
2174            Psmcr_SPEC,
2175            crate::common::RW,
2176        >::from_register(self, 0)
2177    }
2178}
2179impl ::core::default::Default for Psmcr {
2180    #[inline(always)]
2181    fn default() -> Psmcr {
2182        <crate::RegValueT<Psmcr_SPEC> as RegisterValue<_>>::new(0)
2183    }
2184}
2185pub mod psmcr {
2186
2187    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2188    pub struct Psmc_SPEC;
2189    pub type Psmc = crate::EnumBitfieldStruct<u8, Psmc_SPEC>;
2190    impl Psmc {
2191        #[doc = "All SRAMs are on in Software Standby mode"]
2192        pub const _00: Self = Self::new(0);
2193
2194        #[doc = "4 KB SRAM (0x2000_4000 to 0x2000_4FFF) is on in Software Standby mode"]
2195        pub const _01: Self = Self::new(1);
2196
2197        #[doc = "Setting prohibited"]
2198        pub const _10: Self = Self::new(2);
2199
2200        #[doc = "Setting prohibited"]
2201        pub const _11: Self = Self::new(3);
2202    }
2203}
2204#[doc(hidden)]
2205#[derive(Copy, Clone, Eq, PartialEq)]
2206pub struct Opccr_SPEC;
2207impl crate::sealed::RegSpec for Opccr_SPEC {
2208    type DataType = u8;
2209}
2210
2211#[doc = "Operating Power Control Register"]
2212pub type Opccr = crate::RegValueT<Opccr_SPEC>;
2213
2214impl Opccr {
2215    #[doc = "Operating Power Control Mode Select"]
2216    #[inline(always)]
2217    pub fn opcm(
2218        self,
2219    ) -> crate::common::RegisterField<
2220        0,
2221        0x3,
2222        1,
2223        0,
2224        opccr::Opcm,
2225        opccr::Opcm,
2226        Opccr_SPEC,
2227        crate::common::RW,
2228    > {
2229        crate::common::RegisterField::<
2230            0,
2231            0x3,
2232            1,
2233            0,
2234            opccr::Opcm,
2235            opccr::Opcm,
2236            Opccr_SPEC,
2237            crate::common::RW,
2238        >::from_register(self, 0)
2239    }
2240
2241    #[doc = "Operating Power Control Mode Transition Status Flag"]
2242    #[inline(always)]
2243    pub fn opcmtsf(
2244        self,
2245    ) -> crate::common::RegisterField<
2246        4,
2247        0x1,
2248        1,
2249        0,
2250        opccr::Opcmtsf,
2251        opccr::Opcmtsf,
2252        Opccr_SPEC,
2253        crate::common::R,
2254    > {
2255        crate::common::RegisterField::<
2256            4,
2257            0x1,
2258            1,
2259            0,
2260            opccr::Opcmtsf,
2261            opccr::Opcmtsf,
2262            Opccr_SPEC,
2263            crate::common::R,
2264        >::from_register(self, 0)
2265    }
2266}
2267impl ::core::default::Default for Opccr {
2268    #[inline(always)]
2269    fn default() -> Opccr {
2270        <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(1)
2271    }
2272}
2273pub mod opccr {
2274
2275    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2276    pub struct Opcm_SPEC;
2277    pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
2278    impl Opcm {
2279        #[doc = "High-speed mode"]
2280        pub const _00: Self = Self::new(0);
2281
2282        #[doc = "Middle-speed mode"]
2283        pub const _01: Self = Self::new(1);
2284
2285        #[doc = "Setting prohibited"]
2286        pub const _10: Self = Self::new(2);
2287
2288        #[doc = "Low-speed mode"]
2289        pub const _11: Self = Self::new(3);
2290    }
2291    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2292    pub struct Opcmtsf_SPEC;
2293    pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
2294    impl Opcmtsf {
2295        #[doc = "Transition completed"]
2296        pub const _0: Self = Self::new(0);
2297
2298        #[doc = "During transition"]
2299        pub const _1: Self = Self::new(1);
2300    }
2301}
2302#[doc(hidden)]
2303#[derive(Copy, Clone, Eq, PartialEq)]
2304pub struct Hocowtcr_SPEC;
2305impl crate::sealed::RegSpec for Hocowtcr_SPEC {
2306    type DataType = u8;
2307}
2308
2309#[doc = "High-Speed On-Chip Oscillator Wait Control Register"]
2310pub type Hocowtcr = crate::RegValueT<Hocowtcr_SPEC>;
2311
2312impl Hocowtcr {
2313    #[doc = "HOCO Wait Time Setting"]
2314    #[inline(always)]
2315    pub fn hsts(
2316        self,
2317    ) -> crate::common::RegisterField<
2318        0,
2319        0x7,
2320        1,
2321        0,
2322        hocowtcr::Hsts,
2323        hocowtcr::Hsts,
2324        Hocowtcr_SPEC,
2325        crate::common::RW,
2326    > {
2327        crate::common::RegisterField::<
2328            0,
2329            0x7,
2330            1,
2331            0,
2332            hocowtcr::Hsts,
2333            hocowtcr::Hsts,
2334            Hocowtcr_SPEC,
2335            crate::common::RW,
2336        >::from_register(self, 0)
2337    }
2338}
2339impl ::core::default::Default for Hocowtcr {
2340    #[inline(always)]
2341    fn default() -> Hocowtcr {
2342        <crate::RegValueT<Hocowtcr_SPEC> as RegisterValue<_>>::new(5)
2343    }
2344}
2345pub mod hocowtcr {
2346
2347    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2348    pub struct Hsts_SPEC;
2349    pub type Hsts = crate::EnumBitfieldStruct<u8, Hsts_SPEC>;
2350    impl Hsts {
2351        #[doc = "Value after reset."]
2352        pub const _101: Self = Self::new(5);
2353
2354        #[doc = "Before starting high-speed on-chip oscillator by setting HOCOCR.HCSTP bit, the HSTS\\[2:0\\] bits must be set to 011b beforehand. Wait time = 46 cycles (5.75 µs) Wait time is calculated at MOCO = 8 MHz (typically 0.125 µs)."]
2355        pub const _011: Self = Self::new(3);
2356
2357        #[doc = "Setting prohibited"]
2358        pub const OTHERS: Self = Self::new(0);
2359    }
2360}
2361#[doc(hidden)]
2362#[derive(Copy, Clone, Eq, PartialEq)]
2363pub struct Sopccr_SPEC;
2364impl crate::sealed::RegSpec for Sopccr_SPEC {
2365    type DataType = u8;
2366}
2367
2368#[doc = "Sub Operating Power Control Register"]
2369pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
2370
2371impl Sopccr {
2372    #[doc = "Sub Operating Power Control Mode Select"]
2373    #[inline(always)]
2374    pub fn sopcm(
2375        self,
2376    ) -> crate::common::RegisterField<
2377        0,
2378        0x1,
2379        1,
2380        0,
2381        sopccr::Sopcm,
2382        sopccr::Sopcm,
2383        Sopccr_SPEC,
2384        crate::common::RW,
2385    > {
2386        crate::common::RegisterField::<
2387            0,
2388            0x1,
2389            1,
2390            0,
2391            sopccr::Sopcm,
2392            sopccr::Sopcm,
2393            Sopccr_SPEC,
2394            crate::common::RW,
2395        >::from_register(self, 0)
2396    }
2397
2398    #[doc = "Operating Power Control Mode Transition Status Flag"]
2399    #[inline(always)]
2400    pub fn sopcmtsf(
2401        self,
2402    ) -> crate::common::RegisterField<
2403        4,
2404        0x1,
2405        1,
2406        0,
2407        sopccr::Sopcmtsf,
2408        sopccr::Sopcmtsf,
2409        Sopccr_SPEC,
2410        crate::common::R,
2411    > {
2412        crate::common::RegisterField::<
2413            4,
2414            0x1,
2415            1,
2416            0,
2417            sopccr::Sopcmtsf,
2418            sopccr::Sopcmtsf,
2419            Sopccr_SPEC,
2420            crate::common::R,
2421        >::from_register(self, 0)
2422    }
2423}
2424impl ::core::default::Default for Sopccr {
2425    #[inline(always)]
2426    fn default() -> Sopccr {
2427        <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
2428    }
2429}
2430pub mod sopccr {
2431
2432    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2433    pub struct Sopcm_SPEC;
2434    pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
2435    impl Sopcm {
2436        #[doc = "Other than Subosc-speed mode"]
2437        pub const _0: Self = Self::new(0);
2438
2439        #[doc = "Subosc-speed mode"]
2440        pub const _1: Self = Self::new(1);
2441    }
2442    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2443    pub struct Sopcmtsf_SPEC;
2444    pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
2445    impl Sopcmtsf {
2446        #[doc = "Transition completed"]
2447        pub const _0: Self = Self::new(0);
2448
2449        #[doc = "During transition"]
2450        pub const _1: Self = Self::new(1);
2451    }
2452}
2453#[doc(hidden)]
2454#[derive(Copy, Clone, Eq, PartialEq)]
2455pub struct Rstsr1_SPEC;
2456impl crate::sealed::RegSpec for Rstsr1_SPEC {
2457    type DataType = u16;
2458}
2459
2460#[doc = "Reset Status Register 1"]
2461pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
2462
2463impl Rstsr1 {
2464    #[doc = "Independent Watchdog Timer Reset Detect Flag"]
2465    #[inline(always)]
2466    pub fn iwdtrf(
2467        self,
2468    ) -> crate::common::RegisterField<
2469        0,
2470        0x1,
2471        1,
2472        0,
2473        rstsr1::Iwdtrf,
2474        rstsr1::Iwdtrf,
2475        Rstsr1_SPEC,
2476        crate::common::RW,
2477    > {
2478        crate::common::RegisterField::<
2479            0,
2480            0x1,
2481            1,
2482            0,
2483            rstsr1::Iwdtrf,
2484            rstsr1::Iwdtrf,
2485            Rstsr1_SPEC,
2486            crate::common::RW,
2487        >::from_register(self, 0)
2488    }
2489
2490    #[doc = "Watchdog Timer Reset Detect Flag"]
2491    #[inline(always)]
2492    pub fn wdtrf(
2493        self,
2494    ) -> crate::common::RegisterField<
2495        1,
2496        0x1,
2497        1,
2498        0,
2499        rstsr1::Wdtrf,
2500        rstsr1::Wdtrf,
2501        Rstsr1_SPEC,
2502        crate::common::RW,
2503    > {
2504        crate::common::RegisterField::<
2505            1,
2506            0x1,
2507            1,
2508            0,
2509            rstsr1::Wdtrf,
2510            rstsr1::Wdtrf,
2511            Rstsr1_SPEC,
2512            crate::common::RW,
2513        >::from_register(self, 0)
2514    }
2515
2516    #[doc = "Software Reset Detect Flag"]
2517    #[inline(always)]
2518    pub fn swrf(
2519        self,
2520    ) -> crate::common::RegisterField<
2521        2,
2522        0x1,
2523        1,
2524        0,
2525        rstsr1::Swrf,
2526        rstsr1::Swrf,
2527        Rstsr1_SPEC,
2528        crate::common::RW,
2529    > {
2530        crate::common::RegisterField::<
2531            2,
2532            0x1,
2533            1,
2534            0,
2535            rstsr1::Swrf,
2536            rstsr1::Swrf,
2537            Rstsr1_SPEC,
2538            crate::common::RW,
2539        >::from_register(self, 0)
2540    }
2541
2542    #[doc = "SRAM Parity Error Reset Detect Flag"]
2543    #[inline(always)]
2544    pub fn rperf(
2545        self,
2546    ) -> crate::common::RegisterField<
2547        8,
2548        0x1,
2549        1,
2550        0,
2551        rstsr1::Rperf,
2552        rstsr1::Rperf,
2553        Rstsr1_SPEC,
2554        crate::common::RW,
2555    > {
2556        crate::common::RegisterField::<
2557            8,
2558            0x1,
2559            1,
2560            0,
2561            rstsr1::Rperf,
2562            rstsr1::Rperf,
2563            Rstsr1_SPEC,
2564            crate::common::RW,
2565        >::from_register(self, 0)
2566    }
2567
2568    #[doc = "Bus Slave MPU Error Reset Detect Flag"]
2569    #[inline(always)]
2570    pub fn bussrf(
2571        self,
2572    ) -> crate::common::RegisterField<
2573        10,
2574        0x1,
2575        1,
2576        0,
2577        rstsr1::Bussrf,
2578        rstsr1::Bussrf,
2579        Rstsr1_SPEC,
2580        crate::common::RW,
2581    > {
2582        crate::common::RegisterField::<
2583            10,
2584            0x1,
2585            1,
2586            0,
2587            rstsr1::Bussrf,
2588            rstsr1::Bussrf,
2589            Rstsr1_SPEC,
2590            crate::common::RW,
2591        >::from_register(self, 0)
2592    }
2593
2594    #[doc = "Bus Master MPU Error Reset Detect Flag"]
2595    #[inline(always)]
2596    pub fn busmrf(
2597        self,
2598    ) -> crate::common::RegisterField<
2599        11,
2600        0x1,
2601        1,
2602        0,
2603        rstsr1::Busmrf,
2604        rstsr1::Busmrf,
2605        Rstsr1_SPEC,
2606        crate::common::RW,
2607    > {
2608        crate::common::RegisterField::<
2609            11,
2610            0x1,
2611            1,
2612            0,
2613            rstsr1::Busmrf,
2614            rstsr1::Busmrf,
2615            Rstsr1_SPEC,
2616            crate::common::RW,
2617        >::from_register(self, 0)
2618    }
2619
2620    #[doc = "CPU Stack Pointer Error Reset Detect Flag"]
2621    #[inline(always)]
2622    pub fn sperf(
2623        self,
2624    ) -> crate::common::RegisterField<
2625        12,
2626        0x1,
2627        1,
2628        0,
2629        rstsr1::Sperf,
2630        rstsr1::Sperf,
2631        Rstsr1_SPEC,
2632        crate::common::RW,
2633    > {
2634        crate::common::RegisterField::<
2635            12,
2636            0x1,
2637            1,
2638            0,
2639            rstsr1::Sperf,
2640            rstsr1::Sperf,
2641            Rstsr1_SPEC,
2642            crate::common::RW,
2643        >::from_register(self, 0)
2644    }
2645}
2646impl ::core::default::Default for Rstsr1 {
2647    #[inline(always)]
2648    fn default() -> Rstsr1 {
2649        <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
2650    }
2651}
2652pub mod rstsr1 {
2653
2654    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2655    pub struct Iwdtrf_SPEC;
2656    pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
2657    impl Iwdtrf {
2658        #[doc = "Independent watchdog timer reset not detected"]
2659        pub const _0: Self = Self::new(0);
2660
2661        #[doc = "Independent watchdog timer reset detected"]
2662        pub const _1: Self = Self::new(1);
2663    }
2664    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2665    pub struct Wdtrf_SPEC;
2666    pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
2667    impl Wdtrf {
2668        #[doc = "Watchdog timer reset not detected"]
2669        pub const _0: Self = Self::new(0);
2670
2671        #[doc = "Watchdog timer reset detected"]
2672        pub const _1: Self = Self::new(1);
2673    }
2674    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2675    pub struct Swrf_SPEC;
2676    pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
2677    impl Swrf {
2678        #[doc = "Software reset not detected"]
2679        pub const _0: Self = Self::new(0);
2680
2681        #[doc = "Software reset detected"]
2682        pub const _1: Self = Self::new(1);
2683    }
2684    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2685    pub struct Rperf_SPEC;
2686    pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
2687    impl Rperf {
2688        #[doc = "SRAM parity error reset not detected"]
2689        pub const _0: Self = Self::new(0);
2690
2691        #[doc = "SRAM parity error reset detected"]
2692        pub const _1: Self = Self::new(1);
2693    }
2694    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2695    pub struct Bussrf_SPEC;
2696    pub type Bussrf = crate::EnumBitfieldStruct<u8, Bussrf_SPEC>;
2697    impl Bussrf {
2698        #[doc = "Bus slave MPU error reset not detected"]
2699        pub const _0: Self = Self::new(0);
2700
2701        #[doc = "Bus slave MPU error reset detected"]
2702        pub const _1: Self = Self::new(1);
2703    }
2704    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2705    pub struct Busmrf_SPEC;
2706    pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
2707    impl Busmrf {
2708        #[doc = "Bus master MPU error reset not detected"]
2709        pub const _0: Self = Self::new(0);
2710
2711        #[doc = "Bus master MPU error reset detected"]
2712        pub const _1: Self = Self::new(1);
2713    }
2714    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2715    pub struct Sperf_SPEC;
2716    pub type Sperf = crate::EnumBitfieldStruct<u8, Sperf_SPEC>;
2717    impl Sperf {
2718        #[doc = "CPU stack pointer error reset not detected"]
2719        pub const _0: Self = Self::new(0);
2720
2721        #[doc = "CPU stack pointer error reset detected"]
2722        pub const _1: Self = Self::new(1);
2723    }
2724}
2725#[doc(hidden)]
2726#[derive(Copy, Clone, Eq, PartialEq)]
2727pub struct Lvd1Cr1_SPEC;
2728impl crate::sealed::RegSpec for Lvd1Cr1_SPEC {
2729    type DataType = u8;
2730}
2731
2732#[doc = "Voltage Monitor 1 Circuit Control Register"]
2733pub type Lvd1Cr1 = crate::RegValueT<Lvd1Cr1_SPEC>;
2734
2735impl Lvd1Cr1 {
2736    #[doc = "Voltage Monitor 1 Interrupt Generation Condition Select"]
2737    #[inline(always)]
2738    pub fn idtsel(
2739        self,
2740    ) -> crate::common::RegisterField<
2741        0,
2742        0x3,
2743        1,
2744        0,
2745        lvd1cr1::Idtsel,
2746        lvd1cr1::Idtsel,
2747        Lvd1Cr1_SPEC,
2748        crate::common::RW,
2749    > {
2750        crate::common::RegisterField::<
2751            0,
2752            0x3,
2753            1,
2754            0,
2755            lvd1cr1::Idtsel,
2756            lvd1cr1::Idtsel,
2757            Lvd1Cr1_SPEC,
2758            crate::common::RW,
2759        >::from_register(self, 0)
2760    }
2761
2762    #[doc = "Voltage Monitor 1 Interrupt Type Select"]
2763    #[inline(always)]
2764    pub fn irqsel(
2765        self,
2766    ) -> crate::common::RegisterField<
2767        2,
2768        0x1,
2769        1,
2770        0,
2771        lvd1cr1::Irqsel,
2772        lvd1cr1::Irqsel,
2773        Lvd1Cr1_SPEC,
2774        crate::common::RW,
2775    > {
2776        crate::common::RegisterField::<
2777            2,
2778            0x1,
2779            1,
2780            0,
2781            lvd1cr1::Irqsel,
2782            lvd1cr1::Irqsel,
2783            Lvd1Cr1_SPEC,
2784            crate::common::RW,
2785        >::from_register(self, 0)
2786    }
2787}
2788impl ::core::default::Default for Lvd1Cr1 {
2789    #[inline(always)]
2790    fn default() -> Lvd1Cr1 {
2791        <crate::RegValueT<Lvd1Cr1_SPEC> as RegisterValue<_>>::new(1)
2792    }
2793}
2794pub mod lvd1cr1 {
2795
2796    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2797    pub struct Idtsel_SPEC;
2798    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
2799    impl Idtsel {
2800        #[doc = "When VCC >= Vdet1 (rise) is detected"]
2801        pub const _00: Self = Self::new(0);
2802
2803        #[doc = "When VCC < Vdet1 (fall) is detected"]
2804        pub const _01: Self = Self::new(1);
2805
2806        #[doc = "When fall and rise are detected"]
2807        pub const _10: Self = Self::new(2);
2808
2809        #[doc = "Settings prohibited"]
2810        pub const _11: Self = Self::new(3);
2811    }
2812    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2813    pub struct Irqsel_SPEC;
2814    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
2815    impl Irqsel {
2816        #[doc = "Non-maskable interrupt"]
2817        pub const _0: Self = Self::new(0);
2818
2819        #[doc = "Maskable interrupt"]
2820        pub const _1: Self = Self::new(1);
2821    }
2822}
2823#[doc(hidden)]
2824#[derive(Copy, Clone, Eq, PartialEq)]
2825pub struct Lvd1Sr_SPEC;
2826impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
2827    type DataType = u8;
2828}
2829
2830#[doc = "Voltage Monitor 1 Circuit Status Register"]
2831pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
2832
2833impl Lvd1Sr {
2834    #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
2835    #[inline(always)]
2836    pub fn det(
2837        self,
2838    ) -> crate::common::RegisterField<
2839        0,
2840        0x1,
2841        1,
2842        0,
2843        lvd1sr::Det,
2844        lvd1sr::Det,
2845        Lvd1Sr_SPEC,
2846        crate::common::RW,
2847    > {
2848        crate::common::RegisterField::<
2849            0,
2850            0x1,
2851            1,
2852            0,
2853            lvd1sr::Det,
2854            lvd1sr::Det,
2855            Lvd1Sr_SPEC,
2856            crate::common::RW,
2857        >::from_register(self, 0)
2858    }
2859
2860    #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
2861    #[inline(always)]
2862    pub fn mon(
2863        self,
2864    ) -> crate::common::RegisterField<
2865        1,
2866        0x1,
2867        1,
2868        0,
2869        lvd1sr::Mon,
2870        lvd1sr::Mon,
2871        Lvd1Sr_SPEC,
2872        crate::common::R,
2873    > {
2874        crate::common::RegisterField::<
2875            1,
2876            0x1,
2877            1,
2878            0,
2879            lvd1sr::Mon,
2880            lvd1sr::Mon,
2881            Lvd1Sr_SPEC,
2882            crate::common::R,
2883        >::from_register(self, 0)
2884    }
2885}
2886impl ::core::default::Default for Lvd1Sr {
2887    #[inline(always)]
2888    fn default() -> Lvd1Sr {
2889        <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
2890    }
2891}
2892pub mod lvd1sr {
2893
2894    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2895    pub struct Det_SPEC;
2896    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
2897    impl Det {
2898        #[doc = "Not detected"]
2899        pub const _0: Self = Self::new(0);
2900
2901        #[doc = "Vdet1 crossing is detected"]
2902        pub const _1: Self = Self::new(1);
2903    }
2904    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2905    pub struct Mon_SPEC;
2906    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
2907    impl Mon {
2908        #[doc = "VCC < Vdet1"]
2909        pub const _0: Self = Self::new(0);
2910
2911        #[doc = "VCC >= Vdet1 or MON is disabled"]
2912        pub const _1: Self = Self::new(1);
2913    }
2914}
2915#[doc(hidden)]
2916#[derive(Copy, Clone, Eq, PartialEq)]
2917pub struct Lvd2Cr1_SPEC;
2918impl crate::sealed::RegSpec for Lvd2Cr1_SPEC {
2919    type DataType = u8;
2920}
2921
2922#[doc = "Voltage Monitor 2 Circuit Control Register 1"]
2923pub type Lvd2Cr1 = crate::RegValueT<Lvd2Cr1_SPEC>;
2924
2925impl Lvd2Cr1 {
2926    #[doc = "Voltage Monitor 2 Interrupt Generation Condition Select"]
2927    #[inline(always)]
2928    pub fn idtsel(
2929        self,
2930    ) -> crate::common::RegisterField<
2931        0,
2932        0x3,
2933        1,
2934        0,
2935        lvd2cr1::Idtsel,
2936        lvd2cr1::Idtsel,
2937        Lvd2Cr1_SPEC,
2938        crate::common::RW,
2939    > {
2940        crate::common::RegisterField::<
2941            0,
2942            0x3,
2943            1,
2944            0,
2945            lvd2cr1::Idtsel,
2946            lvd2cr1::Idtsel,
2947            Lvd2Cr1_SPEC,
2948            crate::common::RW,
2949        >::from_register(self, 0)
2950    }
2951
2952    #[doc = "Voltage Monitor 2 Interrupt Type Select"]
2953    #[inline(always)]
2954    pub fn irqsel(
2955        self,
2956    ) -> crate::common::RegisterField<
2957        2,
2958        0x1,
2959        1,
2960        0,
2961        lvd2cr1::Irqsel,
2962        lvd2cr1::Irqsel,
2963        Lvd2Cr1_SPEC,
2964        crate::common::RW,
2965    > {
2966        crate::common::RegisterField::<
2967            2,
2968            0x1,
2969            1,
2970            0,
2971            lvd2cr1::Irqsel,
2972            lvd2cr1::Irqsel,
2973            Lvd2Cr1_SPEC,
2974            crate::common::RW,
2975        >::from_register(self, 0)
2976    }
2977}
2978impl ::core::default::Default for Lvd2Cr1 {
2979    #[inline(always)]
2980    fn default() -> Lvd2Cr1 {
2981        <crate::RegValueT<Lvd2Cr1_SPEC> as RegisterValue<_>>::new(1)
2982    }
2983}
2984pub mod lvd2cr1 {
2985
2986    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2987    pub struct Idtsel_SPEC;
2988    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
2989    impl Idtsel {
2990        #[doc = "When VCC>= Vdet2 (rise) is detected"]
2991        pub const _00: Self = Self::new(0);
2992
2993        #[doc = "When VCC < Vdet2 (fall) is detected"]
2994        pub const _01: Self = Self::new(1);
2995
2996        #[doc = "When fall and rise are detected"]
2997        pub const _10: Self = Self::new(2);
2998
2999        #[doc = "Settings prohibited"]
3000        pub const _11: Self = Self::new(3);
3001    }
3002    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3003    pub struct Irqsel_SPEC;
3004    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
3005    impl Irqsel {
3006        #[doc = "Non-maskable interrupt"]
3007        pub const _0: Self = Self::new(0);
3008
3009        #[doc = "Maskable interrupt"]
3010        pub const _1: Self = Self::new(1);
3011    }
3012}
3013#[doc(hidden)]
3014#[derive(Copy, Clone, Eq, PartialEq)]
3015pub struct Lvd2Sr_SPEC;
3016impl crate::sealed::RegSpec for Lvd2Sr_SPEC {
3017    type DataType = u8;
3018}
3019
3020#[doc = "Voltage Monitor 2 Circuit Status Register"]
3021pub type Lvd2Sr = crate::RegValueT<Lvd2Sr_SPEC>;
3022
3023impl Lvd2Sr {
3024    #[doc = "Voltage Monitor 2 Voltage Variation Detection Flag"]
3025    #[inline(always)]
3026    pub fn det(
3027        self,
3028    ) -> crate::common::RegisterField<
3029        0,
3030        0x1,
3031        1,
3032        0,
3033        lvd2sr::Det,
3034        lvd2sr::Det,
3035        Lvd2Sr_SPEC,
3036        crate::common::RW,
3037    > {
3038        crate::common::RegisterField::<
3039            0,
3040            0x1,
3041            1,
3042            0,
3043            lvd2sr::Det,
3044            lvd2sr::Det,
3045            Lvd2Sr_SPEC,
3046            crate::common::RW,
3047        >::from_register(self, 0)
3048    }
3049
3050    #[doc = "Voltage Monitor 2 Signal Monitor Flag"]
3051    #[inline(always)]
3052    pub fn mon(
3053        self,
3054    ) -> crate::common::RegisterField<
3055        1,
3056        0x1,
3057        1,
3058        0,
3059        lvd2sr::Mon,
3060        lvd2sr::Mon,
3061        Lvd2Sr_SPEC,
3062        crate::common::R,
3063    > {
3064        crate::common::RegisterField::<
3065            1,
3066            0x1,
3067            1,
3068            0,
3069            lvd2sr::Mon,
3070            lvd2sr::Mon,
3071            Lvd2Sr_SPEC,
3072            crate::common::R,
3073        >::from_register(self, 0)
3074    }
3075}
3076impl ::core::default::Default for Lvd2Sr {
3077    #[inline(always)]
3078    fn default() -> Lvd2Sr {
3079        <crate::RegValueT<Lvd2Sr_SPEC> as RegisterValue<_>>::new(2)
3080    }
3081}
3082pub mod lvd2sr {
3083
3084    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3085    pub struct Det_SPEC;
3086    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
3087    impl Det {
3088        #[doc = "Not detected"]
3089        pub const _0: Self = Self::new(0);
3090
3091        #[doc = "Vdet2 crossing is detected"]
3092        pub const _1: Self = Self::new(1);
3093    }
3094    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3095    pub struct Mon_SPEC;
3096    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
3097    impl Mon {
3098        #[doc = "VCC < Vdet2"]
3099        pub const _0: Self = Self::new(0);
3100
3101        #[doc = "VCC>= Vdet2 or MON is disabled"]
3102        pub const _1: Self = Self::new(1);
3103    }
3104}
3105#[doc(hidden)]
3106#[derive(Copy, Clone, Eq, PartialEq)]
3107pub struct Prcr_SPEC;
3108impl crate::sealed::RegSpec for Prcr_SPEC {
3109    type DataType = u16;
3110}
3111
3112#[doc = "Protect Register"]
3113pub type Prcr = crate::RegValueT<Prcr_SPEC>;
3114
3115impl Prcr {
3116    #[doc = "Enable writing to the registers related to the clock generation circuit"]
3117    #[inline(always)]
3118    pub fn prc0(
3119        self,
3120    ) -> crate::common::RegisterField<
3121        0,
3122        0x1,
3123        1,
3124        0,
3125        prcr::Prc0,
3126        prcr::Prc0,
3127        Prcr_SPEC,
3128        crate::common::RW,
3129    > {
3130        crate::common::RegisterField::<
3131            0,
3132            0x1,
3133            1,
3134            0,
3135            prcr::Prc0,
3136            prcr::Prc0,
3137            Prcr_SPEC,
3138            crate::common::RW,
3139        >::from_register(self, 0)
3140    }
3141
3142    #[doc = "Enable writing to the registers related to the low power modes"]
3143    #[inline(always)]
3144    pub fn prc1(
3145        self,
3146    ) -> crate::common::RegisterField<
3147        1,
3148        0x1,
3149        1,
3150        0,
3151        prcr::Prc1,
3152        prcr::Prc1,
3153        Prcr_SPEC,
3154        crate::common::RW,
3155    > {
3156        crate::common::RegisterField::<
3157            1,
3158            0x1,
3159            1,
3160            0,
3161            prcr::Prc1,
3162            prcr::Prc1,
3163            Prcr_SPEC,
3164            crate::common::RW,
3165        >::from_register(self, 0)
3166    }
3167
3168    #[doc = "Enable writing to the registers related to the LVD"]
3169    #[inline(always)]
3170    pub fn prc3(
3171        self,
3172    ) -> crate::common::RegisterField<
3173        3,
3174        0x1,
3175        1,
3176        0,
3177        prcr::Prc3,
3178        prcr::Prc3,
3179        Prcr_SPEC,
3180        crate::common::RW,
3181    > {
3182        crate::common::RegisterField::<
3183            3,
3184            0x1,
3185            1,
3186            0,
3187            prcr::Prc3,
3188            prcr::Prc3,
3189            Prcr_SPEC,
3190            crate::common::RW,
3191        >::from_register(self, 0)
3192    }
3193
3194    #[doc = "PRC Key Code"]
3195    #[inline(always)]
3196    pub fn prkey(
3197        self,
3198    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Prcr_SPEC, crate::common::W> {
3199        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Prcr_SPEC,crate::common::W>::from_register(self,0)
3200    }
3201}
3202impl ::core::default::Default for Prcr {
3203    #[inline(always)]
3204    fn default() -> Prcr {
3205        <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
3206    }
3207}
3208pub mod prcr {
3209
3210    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3211    pub struct Prc0_SPEC;
3212    pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
3213    impl Prc0 {
3214        #[doc = "Disable writes"]
3215        pub const _0: Self = Self::new(0);
3216
3217        #[doc = "Enable writes"]
3218        pub const _1: Self = Self::new(1);
3219    }
3220    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3221    pub struct Prc1_SPEC;
3222    pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
3223    impl Prc1 {
3224        #[doc = "Disable writes"]
3225        pub const _0: Self = Self::new(0);
3226
3227        #[doc = "Enable writes"]
3228        pub const _1: Self = Self::new(1);
3229    }
3230    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3231    pub struct Prc3_SPEC;
3232    pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
3233    impl Prc3 {
3234        #[doc = "Disable writes"]
3235        pub const _0: Self = Self::new(0);
3236
3237        #[doc = "Enable writes"]
3238        pub const _1: Self = Self::new(1);
3239    }
3240}
3241#[doc(hidden)]
3242#[derive(Copy, Clone, Eq, PartialEq)]
3243pub struct Syocdcr_SPEC;
3244impl crate::sealed::RegSpec for Syocdcr_SPEC {
3245    type DataType = u8;
3246}
3247
3248#[doc = "System Control OCD Control Register"]
3249pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
3250
3251impl Syocdcr {
3252    #[doc = "Debugger Enable bit"]
3253    #[inline(always)]
3254    pub fn dbgen(
3255        self,
3256    ) -> crate::common::RegisterField<
3257        7,
3258        0x1,
3259        1,
3260        0,
3261        syocdcr::Dbgen,
3262        syocdcr::Dbgen,
3263        Syocdcr_SPEC,
3264        crate::common::RW,
3265    > {
3266        crate::common::RegisterField::<
3267            7,
3268            0x1,
3269            1,
3270            0,
3271            syocdcr::Dbgen,
3272            syocdcr::Dbgen,
3273            Syocdcr_SPEC,
3274            crate::common::RW,
3275        >::from_register(self, 0)
3276    }
3277}
3278impl ::core::default::Default for Syocdcr {
3279    #[inline(always)]
3280    fn default() -> Syocdcr {
3281        <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
3282    }
3283}
3284pub mod syocdcr {
3285
3286    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3287    pub struct Dbgen_SPEC;
3288    pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
3289    impl Dbgen {
3290        #[doc = "On-chip debugger is disabled"]
3291        pub const _0: Self = Self::new(0);
3292
3293        #[doc = "On-chip debugger is enabled"]
3294        pub const _1: Self = Self::new(1);
3295    }
3296}
3297#[doc(hidden)]
3298#[derive(Copy, Clone, Eq, PartialEq)]
3299pub struct Rstsr0_SPEC;
3300impl crate::sealed::RegSpec for Rstsr0_SPEC {
3301    type DataType = u8;
3302}
3303
3304#[doc = "Reset Status Register 0"]
3305pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
3306
3307impl Rstsr0 {
3308    #[doc = "Power-On Reset Detect Flag"]
3309    #[inline(always)]
3310    pub fn porf(
3311        self,
3312    ) -> crate::common::RegisterField<
3313        0,
3314        0x1,
3315        1,
3316        0,
3317        rstsr0::Porf,
3318        rstsr0::Porf,
3319        Rstsr0_SPEC,
3320        crate::common::RW,
3321    > {
3322        crate::common::RegisterField::<
3323            0,
3324            0x1,
3325            1,
3326            0,
3327            rstsr0::Porf,
3328            rstsr0::Porf,
3329            Rstsr0_SPEC,
3330            crate::common::RW,
3331        >::from_register(self, 0)
3332    }
3333
3334    #[doc = "Voltage Monitor 0 Reset Detect Flag"]
3335    #[inline(always)]
3336    pub fn lvd0rf(
3337        self,
3338    ) -> crate::common::RegisterField<
3339        1,
3340        0x1,
3341        1,
3342        0,
3343        rstsr0::Lvd0Rf,
3344        rstsr0::Lvd0Rf,
3345        Rstsr0_SPEC,
3346        crate::common::RW,
3347    > {
3348        crate::common::RegisterField::<
3349            1,
3350            0x1,
3351            1,
3352            0,
3353            rstsr0::Lvd0Rf,
3354            rstsr0::Lvd0Rf,
3355            Rstsr0_SPEC,
3356            crate::common::RW,
3357        >::from_register(self, 0)
3358    }
3359
3360    #[doc = "Voltage Monitor 1 Reset Detect Flag"]
3361    #[inline(always)]
3362    pub fn lvd1rf(
3363        self,
3364    ) -> crate::common::RegisterField<
3365        2,
3366        0x1,
3367        1,
3368        0,
3369        rstsr0::Lvd1Rf,
3370        rstsr0::Lvd1Rf,
3371        Rstsr0_SPEC,
3372        crate::common::RW,
3373    > {
3374        crate::common::RegisterField::<
3375            2,
3376            0x1,
3377            1,
3378            0,
3379            rstsr0::Lvd1Rf,
3380            rstsr0::Lvd1Rf,
3381            Rstsr0_SPEC,
3382            crate::common::RW,
3383        >::from_register(self, 0)
3384    }
3385
3386    #[doc = "Voltage Monitor 2 Reset Detect Flag"]
3387    #[inline(always)]
3388    pub fn lvd2rf(
3389        self,
3390    ) -> crate::common::RegisterField<
3391        3,
3392        0x1,
3393        1,
3394        0,
3395        rstsr0::Lvd2Rf,
3396        rstsr0::Lvd2Rf,
3397        Rstsr0_SPEC,
3398        crate::common::RW,
3399    > {
3400        crate::common::RegisterField::<
3401            3,
3402            0x1,
3403            1,
3404            0,
3405            rstsr0::Lvd2Rf,
3406            rstsr0::Lvd2Rf,
3407            Rstsr0_SPEC,
3408            crate::common::RW,
3409        >::from_register(self, 0)
3410    }
3411}
3412impl ::core::default::Default for Rstsr0 {
3413    #[inline(always)]
3414    fn default() -> Rstsr0 {
3415        <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
3416    }
3417}
3418pub mod rstsr0 {
3419
3420    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3421    pub struct Porf_SPEC;
3422    pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
3423    impl Porf {
3424        #[doc = "Power-on reset not detected"]
3425        pub const _0: Self = Self::new(0);
3426
3427        #[doc = "Power-on reset detected"]
3428        pub const _1: Self = Self::new(1);
3429    }
3430    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3431    pub struct Lvd0Rf_SPEC;
3432    pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
3433    impl Lvd0Rf {
3434        #[doc = "Voltage monitor 0 reset not detected"]
3435        pub const _0: Self = Self::new(0);
3436
3437        #[doc = "Voltage monitor 0 reset detected"]
3438        pub const _1: Self = Self::new(1);
3439    }
3440    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3441    pub struct Lvd1Rf_SPEC;
3442    pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
3443    impl Lvd1Rf {
3444        #[doc = "Voltage monitor 1 reset not detected"]
3445        pub const _0: Self = Self::new(0);
3446
3447        #[doc = "Voltage monitor 1 reset detected"]
3448        pub const _1: Self = Self::new(1);
3449    }
3450    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3451    pub struct Lvd2Rf_SPEC;
3452    pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
3453    impl Lvd2Rf {
3454        #[doc = "Voltage monitor 2 reset not detected"]
3455        pub const _0: Self = Self::new(0);
3456
3457        #[doc = "Voltage monitor 2 reset detected"]
3458        pub const _1: Self = Self::new(1);
3459    }
3460}
3461#[doc(hidden)]
3462#[derive(Copy, Clone, Eq, PartialEq)]
3463pub struct Rstsr2_SPEC;
3464impl crate::sealed::RegSpec for Rstsr2_SPEC {
3465    type DataType = u8;
3466}
3467
3468#[doc = "Reset Status Register 2"]
3469pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
3470
3471impl Rstsr2 {
3472    #[doc = "Cold/Warm Start Determination Flag"]
3473    #[inline(always)]
3474    pub fn cwsf(
3475        self,
3476    ) -> crate::common::RegisterField<
3477        0,
3478        0x1,
3479        1,
3480        0,
3481        rstsr2::Cwsf,
3482        rstsr2::Cwsf,
3483        Rstsr2_SPEC,
3484        crate::common::RW,
3485    > {
3486        crate::common::RegisterField::<
3487            0,
3488            0x1,
3489            1,
3490            0,
3491            rstsr2::Cwsf,
3492            rstsr2::Cwsf,
3493            Rstsr2_SPEC,
3494            crate::common::RW,
3495        >::from_register(self, 0)
3496    }
3497}
3498impl ::core::default::Default for Rstsr2 {
3499    #[inline(always)]
3500    fn default() -> Rstsr2 {
3501        <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
3502    }
3503}
3504pub mod rstsr2 {
3505
3506    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3507    pub struct Cwsf_SPEC;
3508    pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
3509    impl Cwsf {
3510        #[doc = "Cold start"]
3511        pub const _0: Self = Self::new(0);
3512
3513        #[doc = "Warm start"]
3514        pub const _1: Self = Self::new(1);
3515    }
3516}
3517#[doc(hidden)]
3518#[derive(Copy, Clone, Eq, PartialEq)]
3519pub struct Lvcmpcr_SPEC;
3520impl crate::sealed::RegSpec for Lvcmpcr_SPEC {
3521    type DataType = u8;
3522}
3523
3524#[doc = "Voltage Monitor Circuit Control Register"]
3525pub type Lvcmpcr = crate::RegValueT<Lvcmpcr_SPEC>;
3526
3527impl Lvcmpcr {
3528    #[doc = "Voltage Detection 1 Enable"]
3529    #[inline(always)]
3530    pub fn lvd1e(
3531        self,
3532    ) -> crate::common::RegisterField<
3533        5,
3534        0x1,
3535        1,
3536        0,
3537        lvcmpcr::Lvd1E,
3538        lvcmpcr::Lvd1E,
3539        Lvcmpcr_SPEC,
3540        crate::common::RW,
3541    > {
3542        crate::common::RegisterField::<
3543            5,
3544            0x1,
3545            1,
3546            0,
3547            lvcmpcr::Lvd1E,
3548            lvcmpcr::Lvd1E,
3549            Lvcmpcr_SPEC,
3550            crate::common::RW,
3551        >::from_register(self, 0)
3552    }
3553
3554    #[doc = "Voltage Detection 2 Enable"]
3555    #[inline(always)]
3556    pub fn lvd2e(
3557        self,
3558    ) -> crate::common::RegisterField<
3559        6,
3560        0x1,
3561        1,
3562        0,
3563        lvcmpcr::Lvd2E,
3564        lvcmpcr::Lvd2E,
3565        Lvcmpcr_SPEC,
3566        crate::common::RW,
3567    > {
3568        crate::common::RegisterField::<
3569            6,
3570            0x1,
3571            1,
3572            0,
3573            lvcmpcr::Lvd2E,
3574            lvcmpcr::Lvd2E,
3575            Lvcmpcr_SPEC,
3576            crate::common::RW,
3577        >::from_register(self, 0)
3578    }
3579}
3580impl ::core::default::Default for Lvcmpcr {
3581    #[inline(always)]
3582    fn default() -> Lvcmpcr {
3583        <crate::RegValueT<Lvcmpcr_SPEC> as RegisterValue<_>>::new(0)
3584    }
3585}
3586pub mod lvcmpcr {
3587
3588    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3589    pub struct Lvd1E_SPEC;
3590    pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
3591    impl Lvd1E {
3592        #[doc = "Voltage detection 1 circuit disabled"]
3593        pub const _0: Self = Self::new(0);
3594
3595        #[doc = "Voltage detection 1 circuit enabled"]
3596        pub const _1: Self = Self::new(1);
3597    }
3598    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3599    pub struct Lvd2E_SPEC;
3600    pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
3601    impl Lvd2E {
3602        #[doc = "Voltage detection 2 circuit disabled"]
3603        pub const _0: Self = Self::new(0);
3604
3605        #[doc = "Voltage detection 2 circuit enabled"]
3606        pub const _1: Self = Self::new(1);
3607    }
3608}
3609#[doc(hidden)]
3610#[derive(Copy, Clone, Eq, PartialEq)]
3611pub struct Lvdlvlr_SPEC;
3612impl crate::sealed::RegSpec for Lvdlvlr_SPEC {
3613    type DataType = u8;
3614}
3615
3616#[doc = "Voltage Detection Level Select Register"]
3617pub type Lvdlvlr = crate::RegValueT<Lvdlvlr_SPEC>;
3618
3619impl Lvdlvlr {
3620    #[doc = "Voltage Detection 1 Level Select (Standard voltage during fall in voltage)"]
3621    #[inline(always)]
3622    pub fn lvd1lvl(
3623        self,
3624    ) -> crate::common::RegisterField<
3625        0,
3626        0x1f,
3627        1,
3628        0,
3629        lvdlvlr::Lvd1Lvl,
3630        lvdlvlr::Lvd1Lvl,
3631        Lvdlvlr_SPEC,
3632        crate::common::RW,
3633    > {
3634        crate::common::RegisterField::<
3635            0,
3636            0x1f,
3637            1,
3638            0,
3639            lvdlvlr::Lvd1Lvl,
3640            lvdlvlr::Lvd1Lvl,
3641            Lvdlvlr_SPEC,
3642            crate::common::RW,
3643        >::from_register(self, 0)
3644    }
3645
3646    #[doc = "Voltage Detection 2 Level Select (Standard voltage during fall in voltage)"]
3647    #[inline(always)]
3648    pub fn lvd2lvl(
3649        self,
3650    ) -> crate::common::RegisterField<
3651        5,
3652        0x7,
3653        1,
3654        0,
3655        lvdlvlr::Lvd2Lvl,
3656        lvdlvlr::Lvd2Lvl,
3657        Lvdlvlr_SPEC,
3658        crate::common::RW,
3659    > {
3660        crate::common::RegisterField::<
3661            5,
3662            0x7,
3663            1,
3664            0,
3665            lvdlvlr::Lvd2Lvl,
3666            lvdlvlr::Lvd2Lvl,
3667            Lvdlvlr_SPEC,
3668            crate::common::RW,
3669        >::from_register(self, 0)
3670    }
3671}
3672impl ::core::default::Default for Lvdlvlr {
3673    #[inline(always)]
3674    fn default() -> Lvdlvlr {
3675        <crate::RegValueT<Lvdlvlr_SPEC> as RegisterValue<_>>::new(7)
3676    }
3677}
3678pub mod lvdlvlr {
3679
3680    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3681    pub struct Lvd1Lvl_SPEC;
3682    pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
3683    impl Lvd1Lvl {
3684        #[doc = "Vdet1_0"]
3685        pub const _0_X_00: Self = Self::new(0);
3686
3687        #[doc = "Vdet1_1"]
3688        pub const _0_X_01: Self = Self::new(1);
3689
3690        #[doc = "Vdet1_2"]
3691        pub const _0_X_02: Self = Self::new(2);
3692
3693        #[doc = "Vdet1_3"]
3694        pub const _0_X_03: Self = Self::new(3);
3695
3696        #[doc = "Vdet1_4"]
3697        pub const _0_X_04: Self = Self::new(4);
3698
3699        #[doc = "Vdet1_5"]
3700        pub const _0_X_05: Self = Self::new(5);
3701
3702        #[doc = "Vdet1_6"]
3703        pub const _0_X_06: Self = Self::new(6);
3704
3705        #[doc = "Vdet1_7"]
3706        pub const _0_X_07: Self = Self::new(7);
3707
3708        #[doc = "Vdet1_8"]
3709        pub const _0_X_08: Self = Self::new(8);
3710
3711        #[doc = "Vdet1_9"]
3712        pub const _0_X_09: Self = Self::new(9);
3713
3714        #[doc = "Vdet1_A"]
3715        pub const _0_X_0_A: Self = Self::new(10);
3716
3717        #[doc = "Vdet1_B"]
3718        pub const _0_X_0_B: Self = Self::new(11);
3719
3720        #[doc = "Vdet1_C"]
3721        pub const _0_X_0_C: Self = Self::new(12);
3722
3723        #[doc = "Vdet1_D"]
3724        pub const _0_X_0_D: Self = Self::new(13);
3725
3726        #[doc = "Vdet1_E"]
3727        pub const _0_X_0_E: Self = Self::new(14);
3728
3729        #[doc = "Vdet1_F"]
3730        pub const _0_X_0_F: Self = Self::new(15);
3731
3732        #[doc = "Setting prohibited"]
3733        pub const OTHERS: Self = Self::new(0);
3734    }
3735    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3736    pub struct Lvd2Lvl_SPEC;
3737    pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
3738    impl Lvd2Lvl {
3739        #[doc = "Vdet2_0"]
3740        pub const _000: Self = Self::new(0);
3741
3742        #[doc = "Vdet2_1"]
3743        pub const _001: Self = Self::new(1);
3744
3745        #[doc = "Vdet2_2"]
3746        pub const _010: Self = Self::new(2);
3747
3748        #[doc = "Vdet2_3"]
3749        pub const _011: Self = Self::new(3);
3750
3751        #[doc = "Setting prohibited"]
3752        pub const OTHERS: Self = Self::new(0);
3753    }
3754}
3755#[doc(hidden)]
3756#[derive(Copy, Clone, Eq, PartialEq)]
3757pub struct Lvd1Cr0_SPEC;
3758impl crate::sealed::RegSpec for Lvd1Cr0_SPEC {
3759    type DataType = u8;
3760}
3761
3762#[doc = "Voltage Monitor 1 Circuit Control Register 0"]
3763pub type Lvd1Cr0 = crate::RegValueT<Lvd1Cr0_SPEC>;
3764
3765impl Lvd1Cr0 {
3766    #[doc = "Voltage Monitor 1 Interrupt/Reset Enable"]
3767    #[inline(always)]
3768    pub fn rie(
3769        self,
3770    ) -> crate::common::RegisterField<
3771        0,
3772        0x1,
3773        1,
3774        0,
3775        lvd1cr0::Rie,
3776        lvd1cr0::Rie,
3777        Lvd1Cr0_SPEC,
3778        crate::common::RW,
3779    > {
3780        crate::common::RegisterField::<
3781            0,
3782            0x1,
3783            1,
3784            0,
3785            lvd1cr0::Rie,
3786            lvd1cr0::Rie,
3787            Lvd1Cr0_SPEC,
3788            crate::common::RW,
3789        >::from_register(self, 0)
3790    }
3791
3792    #[doc = "Voltage Monitor 1 Circuit Comparison Result Output Enable"]
3793    #[inline(always)]
3794    pub fn cmpe(
3795        self,
3796    ) -> crate::common::RegisterField<
3797        2,
3798        0x1,
3799        1,
3800        0,
3801        lvd1cr0::Cmpe,
3802        lvd1cr0::Cmpe,
3803        Lvd1Cr0_SPEC,
3804        crate::common::RW,
3805    > {
3806        crate::common::RegisterField::<
3807            2,
3808            0x1,
3809            1,
3810            0,
3811            lvd1cr0::Cmpe,
3812            lvd1cr0::Cmpe,
3813            Lvd1Cr0_SPEC,
3814            crate::common::RW,
3815        >::from_register(self, 0)
3816    }
3817
3818    #[doc = "Voltage Monitor 1 Circuit Mode Select"]
3819    #[inline(always)]
3820    pub fn ri(
3821        self,
3822    ) -> crate::common::RegisterField<
3823        6,
3824        0x1,
3825        1,
3826        0,
3827        lvd1cr0::Ri,
3828        lvd1cr0::Ri,
3829        Lvd1Cr0_SPEC,
3830        crate::common::RW,
3831    > {
3832        crate::common::RegisterField::<
3833            6,
3834            0x1,
3835            1,
3836            0,
3837            lvd1cr0::Ri,
3838            lvd1cr0::Ri,
3839            Lvd1Cr0_SPEC,
3840            crate::common::RW,
3841        >::from_register(self, 0)
3842    }
3843
3844    #[doc = "Voltage Monitor 1 Reset Negate Select"]
3845    #[inline(always)]
3846    pub fn rn(
3847        self,
3848    ) -> crate::common::RegisterField<
3849        7,
3850        0x1,
3851        1,
3852        0,
3853        lvd1cr0::Rn,
3854        lvd1cr0::Rn,
3855        Lvd1Cr0_SPEC,
3856        crate::common::RW,
3857    > {
3858        crate::common::RegisterField::<
3859            7,
3860            0x1,
3861            1,
3862            0,
3863            lvd1cr0::Rn,
3864            lvd1cr0::Rn,
3865            Lvd1Cr0_SPEC,
3866            crate::common::RW,
3867        >::from_register(self, 0)
3868    }
3869}
3870impl ::core::default::Default for Lvd1Cr0 {
3871    #[inline(always)]
3872    fn default() -> Lvd1Cr0 {
3873        <crate::RegValueT<Lvd1Cr0_SPEC> as RegisterValue<_>>::new(128)
3874    }
3875}
3876pub mod lvd1cr0 {
3877
3878    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3879    pub struct Rie_SPEC;
3880    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
3881    impl Rie {
3882        #[doc = "Disable"]
3883        pub const _0: Self = Self::new(0);
3884
3885        #[doc = "Enable"]
3886        pub const _1: Self = Self::new(1);
3887    }
3888    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3889    pub struct Cmpe_SPEC;
3890    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
3891    impl Cmpe {
3892        #[doc = "Disable voltage monitor 1 circuit comparison result output"]
3893        pub const _0: Self = Self::new(0);
3894
3895        #[doc = "Enable voltage monitor 1 circuit comparison result output"]
3896        pub const _1: Self = Self::new(1);
3897    }
3898    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3899    pub struct Ri_SPEC;
3900    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
3901    impl Ri {
3902        #[doc = "Generate voltage monitor 1 interrupt on Vdet1 crossing"]
3903        pub const _0: Self = Self::new(0);
3904
3905        #[doc = "Enable voltage monitor 1 reset when the voltage falls to and below Vdet1"]
3906        pub const _1: Self = Self::new(1);
3907    }
3908    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3909    pub struct Rn_SPEC;
3910    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
3911    impl Rn {
3912        #[doc = "Negate after a stabilization time (tLVD1) when VCC > Vdet1 is detected"]
3913        pub const _0: Self = Self::new(0);
3914
3915        #[doc = "Negate after a stabilization time (tLVD1) on assertion of the LVD1 reset"]
3916        pub const _1: Self = Self::new(1);
3917    }
3918}
3919#[doc(hidden)]
3920#[derive(Copy, Clone, Eq, PartialEq)]
3921pub struct Lvd2Cr0_SPEC;
3922impl crate::sealed::RegSpec for Lvd2Cr0_SPEC {
3923    type DataType = u8;
3924}
3925
3926#[doc = "Voltage Monitor 2 Circuit Control Register 0"]
3927pub type Lvd2Cr0 = crate::RegValueT<Lvd2Cr0_SPEC>;
3928
3929impl Lvd2Cr0 {
3930    #[doc = "Voltage Monitor 2 Interrupt/Reset Enable"]
3931    #[inline(always)]
3932    pub fn rie(
3933        self,
3934    ) -> crate::common::RegisterField<
3935        0,
3936        0x1,
3937        1,
3938        0,
3939        lvd2cr0::Rie,
3940        lvd2cr0::Rie,
3941        Lvd2Cr0_SPEC,
3942        crate::common::RW,
3943    > {
3944        crate::common::RegisterField::<
3945            0,
3946            0x1,
3947            1,
3948            0,
3949            lvd2cr0::Rie,
3950            lvd2cr0::Rie,
3951            Lvd2Cr0_SPEC,
3952            crate::common::RW,
3953        >::from_register(self, 0)
3954    }
3955
3956    #[doc = "Voltage Monitor 2 Circuit Comparison Result Output Enable"]
3957    #[inline(always)]
3958    pub fn cmpe(
3959        self,
3960    ) -> crate::common::RegisterField<
3961        2,
3962        0x1,
3963        1,
3964        0,
3965        lvd2cr0::Cmpe,
3966        lvd2cr0::Cmpe,
3967        Lvd2Cr0_SPEC,
3968        crate::common::RW,
3969    > {
3970        crate::common::RegisterField::<
3971            2,
3972            0x1,
3973            1,
3974            0,
3975            lvd2cr0::Cmpe,
3976            lvd2cr0::Cmpe,
3977            Lvd2Cr0_SPEC,
3978            crate::common::RW,
3979        >::from_register(self, 0)
3980    }
3981
3982    #[doc = "Voltage Monitor 2 Circuit Mode Select"]
3983    #[inline(always)]
3984    pub fn ri(
3985        self,
3986    ) -> crate::common::RegisterField<
3987        6,
3988        0x1,
3989        1,
3990        0,
3991        lvd2cr0::Ri,
3992        lvd2cr0::Ri,
3993        Lvd2Cr0_SPEC,
3994        crate::common::RW,
3995    > {
3996        crate::common::RegisterField::<
3997            6,
3998            0x1,
3999            1,
4000            0,
4001            lvd2cr0::Ri,
4002            lvd2cr0::Ri,
4003            Lvd2Cr0_SPEC,
4004            crate::common::RW,
4005        >::from_register(self, 0)
4006    }
4007
4008    #[doc = "Voltage Monitor 2 Reset Negate Select"]
4009    #[inline(always)]
4010    pub fn rn(
4011        self,
4012    ) -> crate::common::RegisterField<
4013        7,
4014        0x1,
4015        1,
4016        0,
4017        lvd2cr0::Rn,
4018        lvd2cr0::Rn,
4019        Lvd2Cr0_SPEC,
4020        crate::common::RW,
4021    > {
4022        crate::common::RegisterField::<
4023            7,
4024            0x1,
4025            1,
4026            0,
4027            lvd2cr0::Rn,
4028            lvd2cr0::Rn,
4029            Lvd2Cr0_SPEC,
4030            crate::common::RW,
4031        >::from_register(self, 0)
4032    }
4033}
4034impl ::core::default::Default for Lvd2Cr0 {
4035    #[inline(always)]
4036    fn default() -> Lvd2Cr0 {
4037        <crate::RegValueT<Lvd2Cr0_SPEC> as RegisterValue<_>>::new(128)
4038    }
4039}
4040pub mod lvd2cr0 {
4041
4042    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4043    pub struct Rie_SPEC;
4044    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
4045    impl Rie {
4046        #[doc = "Disable"]
4047        pub const _0: Self = Self::new(0);
4048
4049        #[doc = "Enable"]
4050        pub const _1: Self = Self::new(1);
4051    }
4052    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4053    pub struct Cmpe_SPEC;
4054    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
4055    impl Cmpe {
4056        #[doc = "Disable voltage monitor 2 circuit comparison result output"]
4057        pub const _0: Self = Self::new(0);
4058
4059        #[doc = "Enable voltage monitor 2 circuit comparison result output"]
4060        pub const _1: Self = Self::new(1);
4061    }
4062    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4063    pub struct Ri_SPEC;
4064    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
4065    impl Ri {
4066        #[doc = "Generate voltage monitor 2 interrupt on Vdet2 crossing"]
4067        pub const _0: Self = Self::new(0);
4068
4069        #[doc = "Enable voltage monitor 2 reset when the voltage falls to and below Vdet2"]
4070        pub const _1: Self = Self::new(1);
4071    }
4072    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4073    pub struct Rn_SPEC;
4074    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
4075    impl Rn {
4076        #[doc = "Negate after a stabilization time (tLVD2) when VCC > Vdet2 is detected"]
4077        pub const _0: Self = Self::new(0);
4078
4079        #[doc = "Negate after a stabilization time (tLVD2) on assertion of the LVD2 reset"]
4080        pub const _1: Self = Self::new(1);
4081    }
4082}
4083#[doc(hidden)]
4084#[derive(Copy, Clone, Eq, PartialEq)]
4085pub struct Lococr_SPEC;
4086impl crate::sealed::RegSpec for Lococr_SPEC {
4087    type DataType = u8;
4088}
4089
4090#[doc = "Low-Speed On-Chip Oscillator Control Register"]
4091pub type Lococr = crate::RegValueT<Lococr_SPEC>;
4092
4093impl Lococr {
4094    #[doc = "LOCO Stop"]
4095    #[inline(always)]
4096    pub fn lcstp(
4097        self,
4098    ) -> crate::common::RegisterField<
4099        0,
4100        0x1,
4101        1,
4102        0,
4103        lococr::Lcstp,
4104        lococr::Lcstp,
4105        Lococr_SPEC,
4106        crate::common::RW,
4107    > {
4108        crate::common::RegisterField::<
4109            0,
4110            0x1,
4111            1,
4112            0,
4113            lococr::Lcstp,
4114            lococr::Lcstp,
4115            Lococr_SPEC,
4116            crate::common::RW,
4117        >::from_register(self, 0)
4118    }
4119}
4120impl ::core::default::Default for Lococr {
4121    #[inline(always)]
4122    fn default() -> Lococr {
4123        <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
4124    }
4125}
4126pub mod lococr {
4127
4128    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4129    pub struct Lcstp_SPEC;
4130    pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
4131    impl Lcstp {
4132        #[doc = "Operate the LOCO clock"]
4133        pub const _0: Self = Self::new(0);
4134
4135        #[doc = "Stop the LOCO clock"]
4136        pub const _1: Self = Self::new(1);
4137    }
4138}
4139#[doc(hidden)]
4140#[derive(Copy, Clone, Eq, PartialEq)]
4141pub struct Locoutcr_SPEC;
4142impl crate::sealed::RegSpec for Locoutcr_SPEC {
4143    type DataType = u8;
4144}
4145
4146#[doc = "LOCO User Trimming Control Register"]
4147pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
4148
4149impl Locoutcr {
4150    #[doc = "LOCO User Trimming"]
4151    #[inline(always)]
4152    pub fn locoutrm(
4153        self,
4154    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
4155        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
4156    }
4157}
4158impl ::core::default::Default for Locoutcr {
4159    #[inline(always)]
4160    fn default() -> Locoutcr {
4161        <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
4162    }
4163}