1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Flash I/O Registers"]
28unsafe impl ::core::marker::Send for super::Flcn {}
29unsafe impl ::core::marker::Sync for super::Flcn {}
30impl super::Flcn {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Data Flash Control Register"]
38 #[inline(always)]
39 pub const fn dflctl(
40 &self,
41 ) -> &'static crate::common::Reg<self::Dflctl_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Dflctl_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(144usize),
45 )
46 }
47 }
48
49 #[doc = "Flash P/E Mode Control Register"]
50 #[inline(always)]
51 pub const fn fpmcr(&self) -> &'static crate::common::Reg<self::Fpmcr_SPEC, crate::common::RW> {
52 unsafe {
53 crate::common::Reg::<self::Fpmcr_SPEC, crate::common::RW>::from_ptr(
54 self._svd2pac_as_ptr().add(256usize),
55 )
56 }
57 }
58
59 #[doc = "Flash Area Select Register"]
60 #[inline(always)]
61 pub const fn fasr(&self) -> &'static crate::common::Reg<self::Fasr_SPEC, crate::common::RW> {
62 unsafe {
63 crate::common::Reg::<self::Fasr_SPEC, crate::common::RW>::from_ptr(
64 self._svd2pac_as_ptr().add(260usize),
65 )
66 }
67 }
68
69 #[doc = "Flash Processing Start Address Register L"]
70 #[inline(always)]
71 pub const fn fsarl(&self) -> &'static crate::common::Reg<self::Fsarl_SPEC, crate::common::RW> {
72 unsafe {
73 crate::common::Reg::<self::Fsarl_SPEC, crate::common::RW>::from_ptr(
74 self._svd2pac_as_ptr().add(264usize),
75 )
76 }
77 }
78
79 #[doc = "Flash Processing Start Address Register H"]
80 #[inline(always)]
81 pub const fn fsarh(&self) -> &'static crate::common::Reg<self::Fsarh_SPEC, crate::common::RW> {
82 unsafe {
83 crate::common::Reg::<self::Fsarh_SPEC, crate::common::RW>::from_ptr(
84 self._svd2pac_as_ptr().add(272usize),
85 )
86 }
87 }
88
89 #[doc = "Flash Control Register"]
90 #[inline(always)]
91 pub const fn fcr(&self) -> &'static crate::common::Reg<self::Fcr_SPEC, crate::common::RW> {
92 unsafe {
93 crate::common::Reg::<self::Fcr_SPEC, crate::common::RW>::from_ptr(
94 self._svd2pac_as_ptr().add(276usize),
95 )
96 }
97 }
98
99 #[doc = "Flash Processing End Address Register L"]
100 #[inline(always)]
101 pub const fn fearl(&self) -> &'static crate::common::Reg<self::Fearl_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::Fearl_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(280usize),
105 )
106 }
107 }
108
109 #[doc = "Flash Processing End Address Register H"]
110 #[inline(always)]
111 pub const fn fearh(&self) -> &'static crate::common::Reg<self::Fearh_SPEC, crate::common::RW> {
112 unsafe {
113 crate::common::Reg::<self::Fearh_SPEC, crate::common::RW>::from_ptr(
114 self._svd2pac_as_ptr().add(288usize),
115 )
116 }
117 }
118
119 #[doc = "Flash Reset Register"]
120 #[inline(always)]
121 pub const fn fresetr(
122 &self,
123 ) -> &'static crate::common::Reg<self::Fresetr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Fresetr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(292usize),
127 )
128 }
129 }
130
131 #[doc = "Flash Status Register 1"]
132 #[inline(always)]
133 pub const fn fstatr1(
134 &self,
135 ) -> &'static crate::common::Reg<self::Fstatr1_SPEC, crate::common::R> {
136 unsafe {
137 crate::common::Reg::<self::Fstatr1_SPEC, crate::common::R>::from_ptr(
138 self._svd2pac_as_ptr().add(300usize),
139 )
140 }
141 }
142
143 #[doc = "Flash Write Buffer Register L0"]
144 #[inline(always)]
145 pub const fn fwbl0(&self) -> &'static crate::common::Reg<self::Fwbl0_SPEC, crate::common::RW> {
146 unsafe {
147 crate::common::Reg::<self::Fwbl0_SPEC, crate::common::RW>::from_ptr(
148 self._svd2pac_as_ptr().add(304usize),
149 )
150 }
151 }
152
153 #[doc = "Flash Write Buffer Register H0"]
154 #[inline(always)]
155 pub const fn fwbh0(&self) -> &'static crate::common::Reg<self::Fwbh0_SPEC, crate::common::RW> {
156 unsafe {
157 crate::common::Reg::<self::Fwbh0_SPEC, crate::common::RW>::from_ptr(
158 self._svd2pac_as_ptr().add(312usize),
159 )
160 }
161 }
162
163 #[doc = "Protection Unlock Register"]
164 #[inline(always)]
165 pub const fn fpr(&self) -> &'static crate::common::Reg<self::Fpr_SPEC, crate::common::RW> {
166 unsafe {
167 crate::common::Reg::<self::Fpr_SPEC, crate::common::RW>::from_ptr(
168 self._svd2pac_as_ptr().add(384usize),
169 )
170 }
171 }
172
173 #[doc = "Protection Unlock Status Register"]
174 #[inline(always)]
175 pub const fn fpsr(&self) -> &'static crate::common::Reg<self::Fpsr_SPEC, crate::common::R> {
176 unsafe {
177 crate::common::Reg::<self::Fpsr_SPEC, crate::common::R>::from_ptr(
178 self._svd2pac_as_ptr().add(388usize),
179 )
180 }
181 }
182
183 #[doc = "Flash Read Buffer Register L0"]
184 #[inline(always)]
185 pub const fn frbl0(&self) -> &'static crate::common::Reg<self::Frbl0_SPEC, crate::common::R> {
186 unsafe {
187 crate::common::Reg::<self::Frbl0_SPEC, crate::common::R>::from_ptr(
188 self._svd2pac_as_ptr().add(392usize),
189 )
190 }
191 }
192
193 #[doc = "Flash Read Buffer Register H0"]
194 #[inline(always)]
195 pub const fn frbh0(&self) -> &'static crate::common::Reg<self::Frbh0_SPEC, crate::common::R> {
196 unsafe {
197 crate::common::Reg::<self::Frbh0_SPEC, crate::common::R>::from_ptr(
198 self._svd2pac_as_ptr().add(400usize),
199 )
200 }
201 }
202
203 #[doc = "Flash Start-Up Setting Monitor Register"]
204 #[inline(always)]
205 pub const fn fscmr(&self) -> &'static crate::common::Reg<self::Fscmr_SPEC, crate::common::R> {
206 unsafe {
207 crate::common::Reg::<self::Fscmr_SPEC, crate::common::R>::from_ptr(
208 self._svd2pac_as_ptr().add(448usize),
209 )
210 }
211 }
212
213 #[doc = "Flash Access Window Start Address Monitor Register"]
214 #[inline(always)]
215 pub const fn fawsmr(&self) -> &'static crate::common::Reg<self::Fawsmr_SPEC, crate::common::R> {
216 unsafe {
217 crate::common::Reg::<self::Fawsmr_SPEC, crate::common::R>::from_ptr(
218 self._svd2pac_as_ptr().add(456usize),
219 )
220 }
221 }
222
223 #[doc = "Flash Access Window End Address Monitor Register"]
224 #[inline(always)]
225 pub const fn fawemr(&self) -> &'static crate::common::Reg<self::Fawemr_SPEC, crate::common::R> {
226 unsafe {
227 crate::common::Reg::<self::Fawemr_SPEC, crate::common::R>::from_ptr(
228 self._svd2pac_as_ptr().add(464usize),
229 )
230 }
231 }
232
233 #[doc = "Flash Initial Setting Register"]
234 #[inline(always)]
235 pub const fn fisr(&self) -> &'static crate::common::Reg<self::Fisr_SPEC, crate::common::RW> {
236 unsafe {
237 crate::common::Reg::<self::Fisr_SPEC, crate::common::RW>::from_ptr(
238 self._svd2pac_as_ptr().add(472usize),
239 )
240 }
241 }
242
243 #[doc = "Flash Extra Area Control Register"]
244 #[inline(always)]
245 pub const fn fexcr(&self) -> &'static crate::common::Reg<self::Fexcr_SPEC, crate::common::RW> {
246 unsafe {
247 crate::common::Reg::<self::Fexcr_SPEC, crate::common::RW>::from_ptr(
248 self._svd2pac_as_ptr().add(476usize),
249 )
250 }
251 }
252
253 #[doc = "Flash Error Address Monitor Register L"]
254 #[inline(always)]
255 pub const fn feaml(&self) -> &'static crate::common::Reg<self::Feaml_SPEC, crate::common::RW> {
256 unsafe {
257 crate::common::Reg::<self::Feaml_SPEC, crate::common::RW>::from_ptr(
258 self._svd2pac_as_ptr().add(480usize),
259 )
260 }
261 }
262
263 #[doc = "Flash Error Address Monitor Register H"]
264 #[inline(always)]
265 pub const fn feamh(&self) -> &'static crate::common::Reg<self::Feamh_SPEC, crate::common::RW> {
266 unsafe {
267 crate::common::Reg::<self::Feamh_SPEC, crate::common::RW>::from_ptr(
268 self._svd2pac_as_ptr().add(488usize),
269 )
270 }
271 }
272
273 #[doc = "Flash Status Register 2"]
274 #[inline(always)]
275 pub const fn fstatr2(
276 &self,
277 ) -> &'static crate::common::Reg<self::Fstatr2_SPEC, crate::common::R> {
278 unsafe {
279 crate::common::Reg::<self::Fstatr2_SPEC, crate::common::R>::from_ptr(
280 self._svd2pac_as_ptr().add(496usize),
281 )
282 }
283 }
284
285 #[doc = "Temperature Sensor Calibration Data Register"]
286 #[inline(always)]
287 pub const fn tscdr(&self) -> &'static crate::common::Reg<self::Tscdr_SPEC, crate::common::R> {
288 unsafe {
289 crate::common::Reg::<self::Tscdr_SPEC, crate::common::R>::from_ptr(
290 self._svd2pac_as_ptr().add(552usize),
291 )
292 }
293 }
294
295 #[doc = "Flash P/E Mode Entry Register"]
296 #[inline(always)]
297 pub const fn fentryr(
298 &self,
299 ) -> &'static crate::common::Reg<self::Fentryr_SPEC, crate::common::RW> {
300 unsafe {
301 crate::common::Reg::<self::Fentryr_SPEC, crate::common::RW>::from_ptr(
302 self._svd2pac_as_ptr().add(16304usize),
303 )
304 }
305 }
306
307 #[doc = "Memory Wait Cycle Control Register for Data Flash"]
308 #[inline(always)]
309 pub const fn fldwaitr(
310 &self,
311 ) -> &'static crate::common::Reg<self::Fldwaitr_SPEC, crate::common::RW> {
312 unsafe {
313 crate::common::Reg::<self::Fldwaitr_SPEC, crate::common::RW>::from_ptr(
314 self._svd2pac_as_ptr().add(16324usize),
315 )
316 }
317 }
318
319 #[doc = "Prefetch Buffer Enable Register"]
320 #[inline(always)]
321 pub const fn pfber(&self) -> &'static crate::common::Reg<self::Pfber_SPEC, crate::common::RW> {
322 unsafe {
323 crate::common::Reg::<self::Pfber_SPEC, crate::common::RW>::from_ptr(
324 self._svd2pac_as_ptr().add(16328usize),
325 )
326 }
327 }
328}
329#[doc(hidden)]
330#[derive(Copy, Clone, Eq, PartialEq)]
331pub struct Dflctl_SPEC;
332impl crate::sealed::RegSpec for Dflctl_SPEC {
333 type DataType = u8;
334}
335
336#[doc = "Data Flash Control Register"]
337pub type Dflctl = crate::RegValueT<Dflctl_SPEC>;
338
339impl Dflctl {
340 #[doc = "Data Flash Access Enable"]
341 #[inline(always)]
342 pub fn dflen(
343 self,
344 ) -> crate::common::RegisterField<
345 0,
346 0x1,
347 1,
348 0,
349 dflctl::Dflen,
350 dflctl::Dflen,
351 Dflctl_SPEC,
352 crate::common::RW,
353 > {
354 crate::common::RegisterField::<
355 0,
356 0x1,
357 1,
358 0,
359 dflctl::Dflen,
360 dflctl::Dflen,
361 Dflctl_SPEC,
362 crate::common::RW,
363 >::from_register(self, 0)
364 }
365}
366impl ::core::default::Default for Dflctl {
367 #[inline(always)]
368 fn default() -> Dflctl {
369 <crate::RegValueT<Dflctl_SPEC> as RegisterValue<_>>::new(0)
370 }
371}
372pub mod dflctl {
373
374 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
375 pub struct Dflen_SPEC;
376 pub type Dflen = crate::EnumBitfieldStruct<u8, Dflen_SPEC>;
377 impl Dflen {
378 #[doc = "Access to the data flash is disabled"]
379 pub const _0: Self = Self::new(0);
380
381 #[doc = "Access to the data flash is enabled"]
382 pub const _1: Self = Self::new(1);
383 }
384}
385#[doc(hidden)]
386#[derive(Copy, Clone, Eq, PartialEq)]
387pub struct Fpmcr_SPEC;
388impl crate::sealed::RegSpec for Fpmcr_SPEC {
389 type DataType = u8;
390}
391
392#[doc = "Flash P/E Mode Control Register"]
393pub type Fpmcr = crate::RegValueT<Fpmcr_SPEC>;
394
395impl Fpmcr {
396 #[doc = "Flash Operating Mode Select 0"]
397 #[inline(always)]
398 pub fn fms0(
399 self,
400 ) -> crate::common::RegisterField<
401 1,
402 0x1,
403 1,
404 0,
405 fpmcr::Fms0,
406 fpmcr::Fms0,
407 Fpmcr_SPEC,
408 crate::common::RW,
409 > {
410 crate::common::RegisterField::<
411 1,
412 0x1,
413 1,
414 0,
415 fpmcr::Fms0,
416 fpmcr::Fms0,
417 Fpmcr_SPEC,
418 crate::common::RW,
419 >::from_register(self, 0)
420 }
421
422 #[doc = "Code Flash P/E Disable"]
423 #[inline(always)]
424 pub fn rpdis(
425 self,
426 ) -> crate::common::RegisterField<
427 3,
428 0x1,
429 1,
430 0,
431 fpmcr::Rpdis,
432 fpmcr::Rpdis,
433 Fpmcr_SPEC,
434 crate::common::RW,
435 > {
436 crate::common::RegisterField::<
437 3,
438 0x1,
439 1,
440 0,
441 fpmcr::Rpdis,
442 fpmcr::Rpdis,
443 Fpmcr_SPEC,
444 crate::common::RW,
445 >::from_register(self, 0)
446 }
447
448 #[doc = "Flash Operating Mode Select 1"]
449 #[inline(always)]
450 pub fn fms1(self) -> crate::common::RegisterFieldBool<4, 1, 0, Fpmcr_SPEC, crate::common::RW> {
451 crate::common::RegisterFieldBool::<4, 1, 0, Fpmcr_SPEC, crate::common::RW>::from_register(
452 self, 0,
453 )
454 }
455}
456impl ::core::default::Default for Fpmcr {
457 #[inline(always)]
458 fn default() -> Fpmcr {
459 <crate::RegValueT<Fpmcr_SPEC> as RegisterValue<_>>::new(8)
460 }
461}
462pub mod fpmcr {
463
464 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
465 pub struct Fms0_SPEC;
466 pub type Fms0 = crate::EnumBitfieldStruct<u8, Fms0_SPEC>;
467 impl Fms0 {
468 #[doc = "FMS1 = 0: Read mode FMS1 = 1: Data flash P/E mode."]
469 pub const _0: Self = Self::new(0);
470
471 #[doc = "FMS1 = 0: Code flash P/E mode FMS1 = 1: Setting prohibited."]
472 pub const _1: Self = Self::new(1);
473 }
474 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
475 pub struct Rpdis_SPEC;
476 pub type Rpdis = crate::EnumBitfieldStruct<u8, Rpdis_SPEC>;
477 impl Rpdis {
478 #[doc = "Programming of the code flash is enabled"]
479 pub const _0: Self = Self::new(0);
480
481 #[doc = "Programming of the code flash is disabled."]
482 pub const _1: Self = Self::new(1);
483 }
484}
485#[doc(hidden)]
486#[derive(Copy, Clone, Eq, PartialEq)]
487pub struct Fasr_SPEC;
488impl crate::sealed::RegSpec for Fasr_SPEC {
489 type DataType = u8;
490}
491
492#[doc = "Flash Area Select Register"]
493pub type Fasr = crate::RegValueT<Fasr_SPEC>;
494
495impl Fasr {
496 #[doc = "Extra Area Select"]
497 #[inline(always)]
498 pub fn exs(
499 self,
500 ) -> crate::common::RegisterField<
501 0,
502 0x1,
503 1,
504 0,
505 fasr::Exs,
506 fasr::Exs,
507 Fasr_SPEC,
508 crate::common::RW,
509 > {
510 crate::common::RegisterField::<
511 0,
512 0x1,
513 1,
514 0,
515 fasr::Exs,
516 fasr::Exs,
517 Fasr_SPEC,
518 crate::common::RW,
519 >::from_register(self, 0)
520 }
521}
522impl ::core::default::Default for Fasr {
523 #[inline(always)]
524 fn default() -> Fasr {
525 <crate::RegValueT<Fasr_SPEC> as RegisterValue<_>>::new(0)
526 }
527}
528pub mod fasr {
529
530 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
531 pub struct Exs_SPEC;
532 pub type Exs = crate::EnumBitfieldStruct<u8, Exs_SPEC>;
533 impl Exs {
534 #[doc = "User area or data area"]
535 pub const _0: Self = Self::new(0);
536
537 #[doc = "Extra area."]
538 pub const _1: Self = Self::new(1);
539 }
540}
541#[doc(hidden)]
542#[derive(Copy, Clone, Eq, PartialEq)]
543pub struct Fsarl_SPEC;
544impl crate::sealed::RegSpec for Fsarl_SPEC {
545 type DataType = u16;
546}
547
548#[doc = "Flash Processing Start Address Register L"]
549pub type Fsarl = crate::RegValueT<Fsarl_SPEC>;
550
551impl Fsarl {
552 #[doc = "Flash Processing Start Address L"]
553 #[inline(always)]
554 pub fn fsarl(
555 self,
556 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fsarl_SPEC, crate::common::RW>
557 {
558 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fsarl_SPEC,crate::common::RW>::from_register(self,0)
559 }
560}
561impl ::core::default::Default for Fsarl {
562 #[inline(always)]
563 fn default() -> Fsarl {
564 <crate::RegValueT<Fsarl_SPEC> as RegisterValue<_>>::new(0)
565 }
566}
567
568#[doc(hidden)]
569#[derive(Copy, Clone, Eq, PartialEq)]
570pub struct Fsarh_SPEC;
571impl crate::sealed::RegSpec for Fsarh_SPEC {
572 type DataType = u16;
573}
574
575#[doc = "Flash Processing Start Address Register H"]
576pub type Fsarh = crate::RegValueT<Fsarh_SPEC>;
577
578impl Fsarh {
579 #[doc = "Flash Processing Start Address H"]
580 #[inline(always)]
581 pub fn fsarh(
582 self,
583 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fsarh_SPEC, crate::common::RW>
584 {
585 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fsarh_SPEC,crate::common::RW>::from_register(self,0)
586 }
587}
588impl ::core::default::Default for Fsarh {
589 #[inline(always)]
590 fn default() -> Fsarh {
591 <crate::RegValueT<Fsarh_SPEC> as RegisterValue<_>>::new(0)
592 }
593}
594
595#[doc(hidden)]
596#[derive(Copy, Clone, Eq, PartialEq)]
597pub struct Fcr_SPEC;
598impl crate::sealed::RegSpec for Fcr_SPEC {
599 type DataType = u8;
600}
601
602#[doc = "Flash Control Register"]
603pub type Fcr = crate::RegValueT<Fcr_SPEC>;
604
605impl Fcr {
606 #[doc = "Software Command Setting"]
607 #[inline(always)]
608 pub fn cmd(
609 self,
610 ) -> crate::common::RegisterField<0, 0xf, 1, 0, fcr::Cmd, fcr::Cmd, Fcr_SPEC, crate::common::RW>
611 {
612 crate::common::RegisterField::<0,0xf,1,0,fcr::Cmd,fcr::Cmd,Fcr_SPEC,crate::common::RW>::from_register(self,0)
613 }
614
615 #[doc = "Data Read Completion"]
616 #[inline(always)]
617 pub fn drc(
618 self,
619 ) -> crate::common::RegisterField<4, 0x1, 1, 0, fcr::Drc, fcr::Drc, Fcr_SPEC, crate::common::RW>
620 {
621 crate::common::RegisterField::<4,0x1,1,0,fcr::Drc,fcr::Drc,Fcr_SPEC,crate::common::RW>::from_register(self,0)
622 }
623
624 #[doc = "Forced Processing Stop"]
625 #[inline(always)]
626 pub fn stop(self) -> crate::common::RegisterFieldBool<6, 1, 0, Fcr_SPEC, crate::common::RW> {
627 crate::common::RegisterFieldBool::<6, 1, 0, Fcr_SPEC, crate::common::RW>::from_register(
628 self, 0,
629 )
630 }
631
632 #[doc = "Processing Start"]
633 #[inline(always)]
634 pub fn opst(
635 self,
636 ) -> crate::common::RegisterField<7, 0x1, 1, 0, fcr::Opst, fcr::Opst, Fcr_SPEC, crate::common::RW>
637 {
638 crate::common::RegisterField::<
639 7,
640 0x1,
641 1,
642 0,
643 fcr::Opst,
644 fcr::Opst,
645 Fcr_SPEC,
646 crate::common::RW,
647 >::from_register(self, 0)
648 }
649}
650impl ::core::default::Default for Fcr {
651 #[inline(always)]
652 fn default() -> Fcr {
653 <crate::RegValueT<Fcr_SPEC> as RegisterValue<_>>::new(0)
654 }
655}
656pub mod fcr {
657
658 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
659 pub struct Cmd_SPEC;
660 pub type Cmd = crate::EnumBitfieldStruct<u8, Cmd_SPEC>;
661 impl Cmd {
662 #[doc = "Program"]
663 pub const _0_X_1: Self = Self::new(1);
664
665 #[doc = "Blank check (code flash)"]
666 pub const _0_X_3: Self = Self::new(3);
667
668 #[doc = "Block erase"]
669 pub const _0_X_4: Self = Self::new(4);
670
671 #[doc = "Consecutive read"]
672 pub const _0_X_5: Self = Self::new(5);
673
674 #[doc = "Chip erase"]
675 pub const _0_X_6: Self = Self::new(6);
676
677 #[doc = "Blank check (data flash)"]
678 pub const _0_X_B: Self = Self::new(11);
679
680 #[doc = "Setting prohibited."]
681 pub const OTHERS: Self = Self::new(0);
682 }
683 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
684 pub struct Drc_SPEC;
685 pub type Drc = crate::EnumBitfieldStruct<u8, Drc_SPEC>;
686 impl Drc {
687 #[doc = "Data is not read or next data is requested"]
688 pub const _0: Self = Self::new(0);
689
690 #[doc = "Data reading is complete."]
691 pub const _1: Self = Self::new(1);
692 }
693 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
694 pub struct Opst_SPEC;
695 pub type Opst = crate::EnumBitfieldStruct<u8, Opst_SPEC>;
696 impl Opst {
697 #[doc = "Processing stops"]
698 pub const _0: Self = Self::new(0);
699
700 #[doc = "Processing starts."]
701 pub const _1: Self = Self::new(1);
702 }
703}
704#[doc(hidden)]
705#[derive(Copy, Clone, Eq, PartialEq)]
706pub struct Fearl_SPEC;
707impl crate::sealed::RegSpec for Fearl_SPEC {
708 type DataType = u16;
709}
710
711#[doc = "Flash Processing End Address Register L"]
712pub type Fearl = crate::RegValueT<Fearl_SPEC>;
713
714impl Fearl {
715 #[doc = "Flash Processing End Address L"]
716 #[inline(always)]
717 pub fn fearl(
718 self,
719 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fearl_SPEC, crate::common::RW>
720 {
721 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fearl_SPEC,crate::common::RW>::from_register(self,0)
722 }
723}
724impl ::core::default::Default for Fearl {
725 #[inline(always)]
726 fn default() -> Fearl {
727 <crate::RegValueT<Fearl_SPEC> as RegisterValue<_>>::new(0)
728 }
729}
730
731#[doc(hidden)]
732#[derive(Copy, Clone, Eq, PartialEq)]
733pub struct Fearh_SPEC;
734impl crate::sealed::RegSpec for Fearh_SPEC {
735 type DataType = u16;
736}
737
738#[doc = "Flash Processing End Address Register H"]
739pub type Fearh = crate::RegValueT<Fearh_SPEC>;
740
741impl Fearh {
742 #[doc = "Flash Processing End Address H"]
743 #[inline(always)]
744 pub fn fearh(
745 self,
746 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fearh_SPEC, crate::common::RW>
747 {
748 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fearh_SPEC,crate::common::RW>::from_register(self,0)
749 }
750}
751impl ::core::default::Default for Fearh {
752 #[inline(always)]
753 fn default() -> Fearh {
754 <crate::RegValueT<Fearh_SPEC> as RegisterValue<_>>::new(0)
755 }
756}
757
758#[doc(hidden)]
759#[derive(Copy, Clone, Eq, PartialEq)]
760pub struct Fresetr_SPEC;
761impl crate::sealed::RegSpec for Fresetr_SPEC {
762 type DataType = u8;
763}
764
765#[doc = "Flash Reset Register"]
766pub type Fresetr = crate::RegValueT<Fresetr_SPEC>;
767
768impl Fresetr {
769 #[doc = "Software reset of the registers"]
770 #[inline(always)]
771 pub fn freset(
772 self,
773 ) -> crate::common::RegisterField<
774 0,
775 0x1,
776 1,
777 0,
778 fresetr::Freset,
779 fresetr::Freset,
780 Fresetr_SPEC,
781 crate::common::RW,
782 > {
783 crate::common::RegisterField::<
784 0,
785 0x1,
786 1,
787 0,
788 fresetr::Freset,
789 fresetr::Freset,
790 Fresetr_SPEC,
791 crate::common::RW,
792 >::from_register(self, 0)
793 }
794}
795impl ::core::default::Default for Fresetr {
796 #[inline(always)]
797 fn default() -> Fresetr {
798 <crate::RegValueT<Fresetr_SPEC> as RegisterValue<_>>::new(0)
799 }
800}
801pub mod fresetr {
802
803 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
804 pub struct Freset_SPEC;
805 pub type Freset = crate::EnumBitfieldStruct<u8, Freset_SPEC>;
806 impl Freset {
807 #[doc = "The registers related to the flash programming are not reset"]
808 pub const _0: Self = Self::new(0);
809
810 #[doc = "The registers related to the flash programming are reset."]
811 pub const _1: Self = Self::new(1);
812 }
813}
814#[doc(hidden)]
815#[derive(Copy, Clone, Eq, PartialEq)]
816pub struct Fstatr1_SPEC;
817impl crate::sealed::RegSpec for Fstatr1_SPEC {
818 type DataType = u8;
819}
820
821#[doc = "Flash Status Register 1"]
822pub type Fstatr1 = crate::RegValueT<Fstatr1_SPEC>;
823
824impl Fstatr1 {
825 #[doc = "Data Read Ready Flag"]
826 #[inline(always)]
827 pub fn drrdy(
828 self,
829 ) -> crate::common::RegisterField<
830 1,
831 0x1,
832 1,
833 0,
834 fstatr1::Drrdy,
835 fstatr1::Drrdy,
836 Fstatr1_SPEC,
837 crate::common::R,
838 > {
839 crate::common::RegisterField::<
840 1,
841 0x1,
842 1,
843 0,
844 fstatr1::Drrdy,
845 fstatr1::Drrdy,
846 Fstatr1_SPEC,
847 crate::common::R,
848 >::from_register(self, 0)
849 }
850
851 #[doc = "Flash Ready Flag"]
852 #[inline(always)]
853 pub fn frdy(
854 self,
855 ) -> crate::common::RegisterField<
856 6,
857 0x1,
858 1,
859 0,
860 fstatr1::Frdy,
861 fstatr1::Frdy,
862 Fstatr1_SPEC,
863 crate::common::R,
864 > {
865 crate::common::RegisterField::<
866 6,
867 0x1,
868 1,
869 0,
870 fstatr1::Frdy,
871 fstatr1::Frdy,
872 Fstatr1_SPEC,
873 crate::common::R,
874 >::from_register(self, 0)
875 }
876
877 #[doc = "Extra Area Ready Flag"]
878 #[inline(always)]
879 pub fn exrdy(
880 self,
881 ) -> crate::common::RegisterField<
882 7,
883 0x1,
884 1,
885 0,
886 fstatr1::Exrdy,
887 fstatr1::Exrdy,
888 Fstatr1_SPEC,
889 crate::common::R,
890 > {
891 crate::common::RegisterField::<
892 7,
893 0x1,
894 1,
895 0,
896 fstatr1::Exrdy,
897 fstatr1::Exrdy,
898 Fstatr1_SPEC,
899 crate::common::R,
900 >::from_register(self, 0)
901 }
902}
903impl ::core::default::Default for Fstatr1 {
904 #[inline(always)]
905 fn default() -> Fstatr1 {
906 <crate::RegValueT<Fstatr1_SPEC> as RegisterValue<_>>::new(4)
907 }
908}
909pub mod fstatr1 {
910
911 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
912 pub struct Drrdy_SPEC;
913 pub type Drrdy = crate::EnumBitfieldStruct<u8, Drrdy_SPEC>;
914 impl Drrdy {
915 #[doc = "The read processing of the consecutive read command at each address is not terminated."]
916 pub const _0: Self = Self::new(0);
917
918 #[doc = "The read processing of the consecutive read command at each address is terminated and read data is stored to the FRBH and FRBL registers."]
919 pub const _1: Self = Self::new(1);
920 }
921 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
922 pub struct Frdy_SPEC;
923 pub type Frdy = crate::EnumBitfieldStruct<u8, Frdy_SPEC>;
924 impl Frdy {
925 #[doc = "The software command of the FCR register is not terminated."]
926 pub const _0: Self = Self::new(0);
927
928 #[doc = "The software command of the FCR register is terminated."]
929 pub const _1: Self = Self::new(1);
930 }
931 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
932 pub struct Exrdy_SPEC;
933 pub type Exrdy = crate::EnumBitfieldStruct<u8, Exrdy_SPEC>;
934 impl Exrdy {
935 #[doc = "The software command of the FEXCR register is not terminated."]
936 pub const _0: Self = Self::new(0);
937
938 #[doc = "The software command of the FEXCR register is terminated."]
939 pub const _1: Self = Self::new(1);
940 }
941}
942#[doc(hidden)]
943#[derive(Copy, Clone, Eq, PartialEq)]
944pub struct Fwbl0_SPEC;
945impl crate::sealed::RegSpec for Fwbl0_SPEC {
946 type DataType = u16;
947}
948
949#[doc = "Flash Write Buffer Register L0"]
950pub type Fwbl0 = crate::RegValueT<Fwbl0_SPEC>;
951
952impl Fwbl0 {
953 #[doc = "Flash Write Buffer L0"]
954 #[inline(always)]
955 pub fn wdata(
956 self,
957 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fwbl0_SPEC, crate::common::RW>
958 {
959 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fwbl0_SPEC,crate::common::RW>::from_register(self,0)
960 }
961}
962impl ::core::default::Default for Fwbl0 {
963 #[inline(always)]
964 fn default() -> Fwbl0 {
965 <crate::RegValueT<Fwbl0_SPEC> as RegisterValue<_>>::new(0)
966 }
967}
968
969#[doc(hidden)]
970#[derive(Copy, Clone, Eq, PartialEq)]
971pub struct Fwbh0_SPEC;
972impl crate::sealed::RegSpec for Fwbh0_SPEC {
973 type DataType = u16;
974}
975
976#[doc = "Flash Write Buffer Register H0"]
977pub type Fwbh0 = crate::RegValueT<Fwbh0_SPEC>;
978
979impl Fwbh0 {
980 #[doc = "Flash Write Buffer H0"]
981 #[inline(always)]
982 pub fn wdata(
983 self,
984 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fwbh0_SPEC, crate::common::RW>
985 {
986 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fwbh0_SPEC,crate::common::RW>::from_register(self,0)
987 }
988}
989impl ::core::default::Default for Fwbh0 {
990 #[inline(always)]
991 fn default() -> Fwbh0 {
992 <crate::RegValueT<Fwbh0_SPEC> as RegisterValue<_>>::new(0)
993 }
994}
995
996#[doc(hidden)]
997#[derive(Copy, Clone, Eq, PartialEq)]
998pub struct Fpr_SPEC;
999impl crate::sealed::RegSpec for Fpr_SPEC {
1000 type DataType = u8;
1001}
1002
1003#[doc = "Protection Unlock Register"]
1004pub type Fpr = crate::RegValueT<Fpr_SPEC>;
1005
1006impl Fpr {
1007 #[doc = "Protection Unlock"]
1008 #[inline(always)]
1009 pub fn fpr(
1010 self,
1011 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Fpr_SPEC, crate::common::RW> {
1012 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Fpr_SPEC,crate::common::RW>::from_register(self,0)
1013 }
1014}
1015impl ::core::default::Default for Fpr {
1016 #[inline(always)]
1017 fn default() -> Fpr {
1018 <crate::RegValueT<Fpr_SPEC> as RegisterValue<_>>::new(0)
1019 }
1020}
1021
1022#[doc(hidden)]
1023#[derive(Copy, Clone, Eq, PartialEq)]
1024pub struct Fpsr_SPEC;
1025impl crate::sealed::RegSpec for Fpsr_SPEC {
1026 type DataType = u8;
1027}
1028
1029#[doc = "Protection Unlock Status Register"]
1030pub type Fpsr = crate::RegValueT<Fpsr_SPEC>;
1031
1032impl Fpsr {
1033 #[doc = "Protect Error Flag"]
1034 #[inline(always)]
1035 pub fn perr(
1036 self,
1037 ) -> crate::common::RegisterField<
1038 0,
1039 0x1,
1040 1,
1041 0,
1042 fpsr::Perr,
1043 fpsr::Perr,
1044 Fpsr_SPEC,
1045 crate::common::R,
1046 > {
1047 crate::common::RegisterField::<
1048 0,
1049 0x1,
1050 1,
1051 0,
1052 fpsr::Perr,
1053 fpsr::Perr,
1054 Fpsr_SPEC,
1055 crate::common::R,
1056 >::from_register(self, 0)
1057 }
1058}
1059impl ::core::default::Default for Fpsr {
1060 #[inline(always)]
1061 fn default() -> Fpsr {
1062 <crate::RegValueT<Fpsr_SPEC> as RegisterValue<_>>::new(0)
1063 }
1064}
1065pub mod fpsr {
1066
1067 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1068 pub struct Perr_SPEC;
1069 pub type Perr = crate::EnumBitfieldStruct<u8, Perr_SPEC>;
1070 impl Perr {
1071 #[doc = "No error"]
1072 pub const _0: Self = Self::new(0);
1073
1074 #[doc = "An error occurs"]
1075 pub const _1: Self = Self::new(1);
1076 }
1077}
1078#[doc(hidden)]
1079#[derive(Copy, Clone, Eq, PartialEq)]
1080pub struct Frbl0_SPEC;
1081impl crate::sealed::RegSpec for Frbl0_SPEC {
1082 type DataType = u16;
1083}
1084
1085#[doc = "Flash Read Buffer Register L0"]
1086pub type Frbl0 = crate::RegValueT<Frbl0_SPEC>;
1087
1088impl Frbl0 {
1089 #[doc = "Flash Read Buffer L0"]
1090 #[inline(always)]
1091 pub fn rdata(
1092 self,
1093 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Frbl0_SPEC, crate::common::R> {
1094 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Frbl0_SPEC,crate::common::R>::from_register(self,0)
1095 }
1096}
1097impl ::core::default::Default for Frbl0 {
1098 #[inline(always)]
1099 fn default() -> Frbl0 {
1100 <crate::RegValueT<Frbl0_SPEC> as RegisterValue<_>>::new(0)
1101 }
1102}
1103
1104#[doc(hidden)]
1105#[derive(Copy, Clone, Eq, PartialEq)]
1106pub struct Frbh0_SPEC;
1107impl crate::sealed::RegSpec for Frbh0_SPEC {
1108 type DataType = u16;
1109}
1110
1111#[doc = "Flash Read Buffer Register H0"]
1112pub type Frbh0 = crate::RegValueT<Frbh0_SPEC>;
1113
1114impl Frbh0 {
1115 #[doc = "Flash Read Buffer H0"]
1116 #[inline(always)]
1117 pub fn rdata(
1118 self,
1119 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Frbh0_SPEC, crate::common::R> {
1120 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Frbh0_SPEC,crate::common::R>::from_register(self,0)
1121 }
1122}
1123impl ::core::default::Default for Frbh0 {
1124 #[inline(always)]
1125 fn default() -> Frbh0 {
1126 <crate::RegValueT<Frbh0_SPEC> as RegisterValue<_>>::new(0)
1127 }
1128}
1129
1130#[doc(hidden)]
1131#[derive(Copy, Clone, Eq, PartialEq)]
1132pub struct Fscmr_SPEC;
1133impl crate::sealed::RegSpec for Fscmr_SPEC {
1134 type DataType = u16;
1135}
1136
1137#[doc = "Flash Start-Up Setting Monitor Register"]
1138pub type Fscmr = crate::RegValueT<Fscmr_SPEC>;
1139
1140impl Fscmr {
1141 #[doc = "Startup Area Setting Monitor Flag"]
1142 #[inline(always)]
1143 pub fn sasmf(
1144 self,
1145 ) -> crate::common::RegisterField<
1146 8,
1147 0x1,
1148 1,
1149 0,
1150 fscmr::Sasmf,
1151 fscmr::Sasmf,
1152 Fscmr_SPEC,
1153 crate::common::R,
1154 > {
1155 crate::common::RegisterField::<
1156 8,
1157 0x1,
1158 1,
1159 0,
1160 fscmr::Sasmf,
1161 fscmr::Sasmf,
1162 Fscmr_SPEC,
1163 crate::common::R,
1164 >::from_register(self, 0)
1165 }
1166
1167 #[doc = "Access Window Protection Flag"]
1168 #[inline(always)]
1169 pub fn fspr(
1170 self,
1171 ) -> crate::common::RegisterField<
1172 14,
1173 0x1,
1174 1,
1175 0,
1176 fscmr::Fspr,
1177 fscmr::Fspr,
1178 Fscmr_SPEC,
1179 crate::common::R,
1180 > {
1181 crate::common::RegisterField::<
1182 14,
1183 0x1,
1184 1,
1185 0,
1186 fscmr::Fspr,
1187 fscmr::Fspr,
1188 Fscmr_SPEC,
1189 crate::common::R,
1190 >::from_register(self, 0)
1191 }
1192}
1193impl ::core::default::Default for Fscmr {
1194 #[inline(always)]
1195 fn default() -> Fscmr {
1196 <crate::RegValueT<Fscmr_SPEC> as RegisterValue<_>>::new(0)
1197 }
1198}
1199pub mod fscmr {
1200
1201 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1202 pub struct Sasmf_SPEC;
1203 pub type Sasmf = crate::EnumBitfieldStruct<u8, Sasmf_SPEC>;
1204 impl Sasmf {
1205 #[doc = "Setting to start up using the alternative area"]
1206 pub const _0: Self = Self::new(0);
1207
1208 #[doc = "Setting to start up using the default area"]
1209 pub const _1: Self = Self::new(1);
1210 }
1211 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1212 pub struct Fspr_SPEC;
1213 pub type Fspr = crate::EnumBitfieldStruct<u8, Fspr_SPEC>;
1214 impl Fspr {
1215 #[doc = "Access window setting disabled."]
1216 pub const _0: Self = Self::new(0);
1217
1218 #[doc = "Access window setting enabled."]
1219 pub const _1: Self = Self::new(1);
1220 }
1221}
1222#[doc(hidden)]
1223#[derive(Copy, Clone, Eq, PartialEq)]
1224pub struct Fawsmr_SPEC;
1225impl crate::sealed::RegSpec for Fawsmr_SPEC {
1226 type DataType = u16;
1227}
1228
1229#[doc = "Flash Access Window Start Address Monitor Register"]
1230pub type Fawsmr = crate::RegValueT<Fawsmr_SPEC>;
1231
1232impl Fawsmr {
1233 #[doc = "Access Window Start Address"]
1234 #[inline(always)]
1235 pub fn faws(
1236 self,
1237 ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fawsmr_SPEC, crate::common::R> {
1238 crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fawsmr_SPEC,crate::common::R>::from_register(self,0)
1239 }
1240
1241 #[doc = "Access Window Protection Flag"]
1242 #[inline(always)]
1243 pub fn fspr(self) -> crate::common::RegisterFieldBool<15, 1, 0, Fawsmr_SPEC, crate::common::R> {
1244 crate::common::RegisterFieldBool::<15, 1, 0, Fawsmr_SPEC, crate::common::R>::from_register(
1245 self, 0,
1246 )
1247 }
1248}
1249impl ::core::default::Default for Fawsmr {
1250 #[inline(always)]
1251 fn default() -> Fawsmr {
1252 <crate::RegValueT<Fawsmr_SPEC> as RegisterValue<_>>::new(0)
1253 }
1254}
1255
1256#[doc(hidden)]
1257#[derive(Copy, Clone, Eq, PartialEq)]
1258pub struct Fawemr_SPEC;
1259impl crate::sealed::RegSpec for Fawemr_SPEC {
1260 type DataType = u16;
1261}
1262
1263#[doc = "Flash Access Window End Address Monitor Register"]
1264pub type Fawemr = crate::RegValueT<Fawemr_SPEC>;
1265
1266impl Fawemr {
1267 #[doc = "Access Window End Address"]
1268 #[inline(always)]
1269 pub fn fawe(
1270 self,
1271 ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fawemr_SPEC, crate::common::R> {
1272 crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fawemr_SPEC,crate::common::R>::from_register(self,0)
1273 }
1274
1275 #[doc = "Startup Area Setting Monitor Flag"]
1276 #[inline(always)]
1277 pub fn sasmf(
1278 self,
1279 ) -> crate::common::RegisterFieldBool<15, 1, 0, Fawemr_SPEC, crate::common::R> {
1280 crate::common::RegisterFieldBool::<15, 1, 0, Fawemr_SPEC, crate::common::R>::from_register(
1281 self, 0,
1282 )
1283 }
1284}
1285impl ::core::default::Default for Fawemr {
1286 #[inline(always)]
1287 fn default() -> Fawemr {
1288 <crate::RegValueT<Fawemr_SPEC> as RegisterValue<_>>::new(0)
1289 }
1290}
1291
1292#[doc(hidden)]
1293#[derive(Copy, Clone, Eq, PartialEq)]
1294pub struct Fisr_SPEC;
1295impl crate::sealed::RegSpec for Fisr_SPEC {
1296 type DataType = u8;
1297}
1298
1299#[doc = "Flash Initial Setting Register"]
1300pub type Fisr = crate::RegValueT<Fisr_SPEC>;
1301
1302impl Fisr {
1303 #[doc = "Flash-IF Clock Notification"]
1304 #[inline(always)]
1305 pub fn pcka(
1306 self,
1307 ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Fisr_SPEC, crate::common::RW> {
1308 crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Fisr_SPEC,crate::common::RW>::from_register(self,0)
1309 }
1310
1311 #[doc = "Startup Area Select"]
1312 #[inline(always)]
1313 pub fn sas(
1314 self,
1315 ) -> crate::common::RegisterField<
1316 6,
1317 0x3,
1318 1,
1319 0,
1320 fisr::Sas,
1321 fisr::Sas,
1322 Fisr_SPEC,
1323 crate::common::RW,
1324 > {
1325 crate::common::RegisterField::<
1326 6,
1327 0x3,
1328 1,
1329 0,
1330 fisr::Sas,
1331 fisr::Sas,
1332 Fisr_SPEC,
1333 crate::common::RW,
1334 >::from_register(self, 0)
1335 }
1336}
1337impl ::core::default::Default for Fisr {
1338 #[inline(always)]
1339 fn default() -> Fisr {
1340 <crate::RegValueT<Fisr_SPEC> as RegisterValue<_>>::new(0)
1341 }
1342}
1343pub mod fisr {
1344
1345 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1346 pub struct Sas_SPEC;
1347 pub type Sas = crate::EnumBitfieldStruct<u8, Sas_SPEC>;
1348 impl Sas {
1349 #[doc = "The startup area is switched to the default area temporarily"]
1350 pub const _10: Self = Self::new(2);
1351
1352 #[doc = "The startup area is switched to the alternate area temporarily."]
1353 pub const _11: Self = Self::new(3);
1354
1355 #[doc = "The startup area is selected according to the settings of the extra area."]
1356 pub const OTHERS: Self = Self::new(0);
1357 }
1358}
1359#[doc(hidden)]
1360#[derive(Copy, Clone, Eq, PartialEq)]
1361pub struct Fexcr_SPEC;
1362impl crate::sealed::RegSpec for Fexcr_SPEC {
1363 type DataType = u8;
1364}
1365
1366#[doc = "Flash Extra Area Control Register"]
1367pub type Fexcr = crate::RegValueT<Fexcr_SPEC>;
1368
1369impl Fexcr {
1370 #[doc = "Software Command Setting"]
1371 #[inline(always)]
1372 pub fn cmd(
1373 self,
1374 ) -> crate::common::RegisterField<
1375 0,
1376 0x7,
1377 1,
1378 0,
1379 fexcr::Cmd,
1380 fexcr::Cmd,
1381 Fexcr_SPEC,
1382 crate::common::RW,
1383 > {
1384 crate::common::RegisterField::<
1385 0,
1386 0x7,
1387 1,
1388 0,
1389 fexcr::Cmd,
1390 fexcr::Cmd,
1391 Fexcr_SPEC,
1392 crate::common::RW,
1393 >::from_register(self, 0)
1394 }
1395
1396 #[doc = "Processing Start"]
1397 #[inline(always)]
1398 pub fn opst(
1399 self,
1400 ) -> crate::common::RegisterField<
1401 7,
1402 0x1,
1403 1,
1404 0,
1405 fexcr::Opst,
1406 fexcr::Opst,
1407 Fexcr_SPEC,
1408 crate::common::RW,
1409 > {
1410 crate::common::RegisterField::<
1411 7,
1412 0x1,
1413 1,
1414 0,
1415 fexcr::Opst,
1416 fexcr::Opst,
1417 Fexcr_SPEC,
1418 crate::common::RW,
1419 >::from_register(self, 0)
1420 }
1421}
1422impl ::core::default::Default for Fexcr {
1423 #[inline(always)]
1424 fn default() -> Fexcr {
1425 <crate::RegValueT<Fexcr_SPEC> as RegisterValue<_>>::new(0)
1426 }
1427}
1428pub mod fexcr {
1429
1430 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1431 pub struct Cmd_SPEC;
1432 pub type Cmd = crate::EnumBitfieldStruct<u8, Cmd_SPEC>;
1433 impl Cmd {
1434 #[doc = "Access window information program Startup area selection and security setting"]
1435 pub const _010: Self = Self::new(2);
1436
1437 #[doc = "OCDID1 program"]
1438 pub const _011: Self = Self::new(3);
1439
1440 #[doc = "OCDID2 program"]
1441 pub const _100: Self = Self::new(4);
1442
1443 #[doc = "OCDID3 program"]
1444 pub const _101: Self = Self::new(5);
1445
1446 #[doc = "OCDID4 program"]
1447 pub const _110: Self = Self::new(6);
1448
1449 #[doc = "Setting prohibited."]
1450 pub const OTHERS: Self = Self::new(0);
1451 }
1452 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1453 pub struct Opst_SPEC;
1454 pub type Opst = crate::EnumBitfieldStruct<u8, Opst_SPEC>;
1455 impl Opst {
1456 #[doc = "Processing stops"]
1457 pub const _0: Self = Self::new(0);
1458
1459 #[doc = "Processing starts."]
1460 pub const _1: Self = Self::new(1);
1461 }
1462}
1463#[doc(hidden)]
1464#[derive(Copy, Clone, Eq, PartialEq)]
1465pub struct Feaml_SPEC;
1466impl crate::sealed::RegSpec for Feaml_SPEC {
1467 type DataType = u16;
1468}
1469
1470#[doc = "Flash Error Address Monitor Register L"]
1471pub type Feaml = crate::RegValueT<Feaml_SPEC>;
1472
1473impl Feaml {
1474 #[doc = "Flash Error Address Monitor Register L"]
1475 #[inline(always)]
1476 pub fn feaml(
1477 self,
1478 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Feaml_SPEC, crate::common::RW>
1479 {
1480 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Feaml_SPEC,crate::common::RW>::from_register(self,0)
1481 }
1482}
1483impl ::core::default::Default for Feaml {
1484 #[inline(always)]
1485 fn default() -> Feaml {
1486 <crate::RegValueT<Feaml_SPEC> as RegisterValue<_>>::new(0)
1487 }
1488}
1489
1490#[doc(hidden)]
1491#[derive(Copy, Clone, Eq, PartialEq)]
1492pub struct Feamh_SPEC;
1493impl crate::sealed::RegSpec for Feamh_SPEC {
1494 type DataType = u16;
1495}
1496
1497#[doc = "Flash Error Address Monitor Register H"]
1498pub type Feamh = crate::RegValueT<Feamh_SPEC>;
1499
1500impl Feamh {
1501 #[doc = "Flash Error Address Monitor Register H"]
1502 #[inline(always)]
1503 pub fn feamh(
1504 self,
1505 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Feamh_SPEC, crate::common::RW>
1506 {
1507 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Feamh_SPEC,crate::common::RW>::from_register(self,0)
1508 }
1509}
1510impl ::core::default::Default for Feamh {
1511 #[inline(always)]
1512 fn default() -> Feamh {
1513 <crate::RegValueT<Feamh_SPEC> as RegisterValue<_>>::new(0)
1514 }
1515}
1516
1517#[doc(hidden)]
1518#[derive(Copy, Clone, Eq, PartialEq)]
1519pub struct Fstatr2_SPEC;
1520impl crate::sealed::RegSpec for Fstatr2_SPEC {
1521 type DataType = u16;
1522}
1523
1524#[doc = "Flash Status Register 2"]
1525pub type Fstatr2 = crate::RegValueT<Fstatr2_SPEC>;
1526
1527impl Fstatr2 {
1528 #[doc = "Erase Error Flag"]
1529 #[inline(always)]
1530 pub fn ererr(
1531 self,
1532 ) -> crate::common::RegisterField<
1533 0,
1534 0x1,
1535 1,
1536 0,
1537 fstatr2::Ererr,
1538 fstatr2::Ererr,
1539 Fstatr2_SPEC,
1540 crate::common::R,
1541 > {
1542 crate::common::RegisterField::<
1543 0,
1544 0x1,
1545 1,
1546 0,
1547 fstatr2::Ererr,
1548 fstatr2::Ererr,
1549 Fstatr2_SPEC,
1550 crate::common::R,
1551 >::from_register(self, 0)
1552 }
1553
1554 #[doc = "Program Error Flag"]
1555 #[inline(always)]
1556 pub fn prgerr(
1557 self,
1558 ) -> crate::common::RegisterField<
1559 1,
1560 0x1,
1561 1,
1562 0,
1563 fstatr2::Prgerr,
1564 fstatr2::Prgerr,
1565 Fstatr2_SPEC,
1566 crate::common::R,
1567 > {
1568 crate::common::RegisterField::<
1569 1,
1570 0x1,
1571 1,
1572 0,
1573 fstatr2::Prgerr,
1574 fstatr2::Prgerr,
1575 Fstatr2_SPEC,
1576 crate::common::R,
1577 >::from_register(self, 0)
1578 }
1579
1580 #[doc = "Program Error Flag 01"]
1581 #[inline(always)]
1582 pub fn prgerr01(
1583 self,
1584 ) -> crate::common::RegisterField<
1585 2,
1586 0x1,
1587 1,
1588 0,
1589 fstatr2::Prgerr01,
1590 fstatr2::Prgerr01,
1591 Fstatr2_SPEC,
1592 crate::common::R,
1593 > {
1594 crate::common::RegisterField::<
1595 2,
1596 0x1,
1597 1,
1598 0,
1599 fstatr2::Prgerr01,
1600 fstatr2::Prgerr01,
1601 Fstatr2_SPEC,
1602 crate::common::R,
1603 >::from_register(self, 0)
1604 }
1605
1606 #[doc = "Blank Check Error Flag"]
1607 #[inline(always)]
1608 pub fn bcerr(
1609 self,
1610 ) -> crate::common::RegisterField<
1611 3,
1612 0x1,
1613 1,
1614 0,
1615 fstatr2::Bcerr,
1616 fstatr2::Bcerr,
1617 Fstatr2_SPEC,
1618 crate::common::R,
1619 > {
1620 crate::common::RegisterField::<
1621 3,
1622 0x1,
1623 1,
1624 0,
1625 fstatr2::Bcerr,
1626 fstatr2::Bcerr,
1627 Fstatr2_SPEC,
1628 crate::common::R,
1629 >::from_register(self, 0)
1630 }
1631
1632 #[doc = "Illegal Command Error Flag"]
1633 #[inline(always)]
1634 pub fn ilglerr(
1635 self,
1636 ) -> crate::common::RegisterField<
1637 4,
1638 0x1,
1639 1,
1640 0,
1641 fstatr2::Ilglerr,
1642 fstatr2::Ilglerr,
1643 Fstatr2_SPEC,
1644 crate::common::R,
1645 > {
1646 crate::common::RegisterField::<
1647 4,
1648 0x1,
1649 1,
1650 0,
1651 fstatr2::Ilglerr,
1652 fstatr2::Ilglerr,
1653 Fstatr2_SPEC,
1654 crate::common::R,
1655 >::from_register(self, 0)
1656 }
1657
1658 #[doc = "Extra Area Illegal Command Error Flag"]
1659 #[inline(always)]
1660 pub fn eilglerr(
1661 self,
1662 ) -> crate::common::RegisterField<
1663 5,
1664 0x1,
1665 1,
1666 0,
1667 fstatr2::Eilglerr,
1668 fstatr2::Eilglerr,
1669 Fstatr2_SPEC,
1670 crate::common::R,
1671 > {
1672 crate::common::RegisterField::<
1673 5,
1674 0x1,
1675 1,
1676 0,
1677 fstatr2::Eilglerr,
1678 fstatr2::Eilglerr,
1679 Fstatr2_SPEC,
1680 crate::common::R,
1681 >::from_register(self, 0)
1682 }
1683}
1684impl ::core::default::Default for Fstatr2 {
1685 #[inline(always)]
1686 fn default() -> Fstatr2 {
1687 <crate::RegValueT<Fstatr2_SPEC> as RegisterValue<_>>::new(0)
1688 }
1689}
1690pub mod fstatr2 {
1691
1692 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1693 pub struct Ererr_SPEC;
1694 pub type Ererr = crate::EnumBitfieldStruct<u8, Ererr_SPEC>;
1695 impl Ererr {
1696 #[doc = "Erasure terminates normally"]
1697 pub const _0: Self = Self::new(0);
1698
1699 #[doc = "An error occurs during erasure"]
1700 pub const _1: Self = Self::new(1);
1701 }
1702 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1703 pub struct Prgerr_SPEC;
1704 pub type Prgerr = crate::EnumBitfieldStruct<u8, Prgerr_SPEC>;
1705 impl Prgerr {
1706 #[doc = "Programming terminates normally"]
1707 pub const _0: Self = Self::new(0);
1708
1709 #[doc = "An error occurs during programming."]
1710 pub const _1: Self = Self::new(1);
1711 }
1712 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1713 pub struct Prgerr01_SPEC;
1714 pub type Prgerr01 = crate::EnumBitfieldStruct<u8, Prgerr01_SPEC>;
1715 impl Prgerr01 {
1716 #[doc = "Programming by the FEXCR register terminates normally"]
1717 pub const _0: Self = Self::new(0);
1718
1719 #[doc = "An error occurs during programming."]
1720 pub const _1: Self = Self::new(1);
1721 }
1722 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1723 pub struct Bcerr_SPEC;
1724 pub type Bcerr = crate::EnumBitfieldStruct<u8, Bcerr_SPEC>;
1725 impl Bcerr {
1726 #[doc = "Blank checking terminates normally"]
1727 pub const _0: Self = Self::new(0);
1728
1729 #[doc = "An error occurs during blank checking."]
1730 pub const _1: Self = Self::new(1);
1731 }
1732 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1733 pub struct Ilglerr_SPEC;
1734 pub type Ilglerr = crate::EnumBitfieldStruct<u8, Ilglerr_SPEC>;
1735 impl Ilglerr {
1736 #[doc = "No illegal software command or illegal access is detected"]
1737 pub const _0: Self = Self::new(0);
1738
1739 #[doc = "An illegal command or illegal access is detected."]
1740 pub const _1: Self = Self::new(1);
1741 }
1742 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1743 pub struct Eilglerr_SPEC;
1744 pub type Eilglerr = crate::EnumBitfieldStruct<u8, Eilglerr_SPEC>;
1745 impl Eilglerr {
1746 #[doc = "No illegal command or illegal access to the extra area is detected"]
1747 pub const _0: Self = Self::new(0);
1748
1749 #[doc = "An illegal command or illegal access to the extra area is detected."]
1750 pub const _1: Self = Self::new(1);
1751 }
1752}
1753#[doc(hidden)]
1754#[derive(Copy, Clone, Eq, PartialEq)]
1755pub struct Tscdr_SPEC;
1756impl crate::sealed::RegSpec for Tscdr_SPEC {
1757 type DataType = u16;
1758}
1759
1760#[doc = "Temperature Sensor Calibration Data Register"]
1761pub type Tscdr = crate::RegValueT<Tscdr_SPEC>;
1762
1763impl Tscdr {
1764 #[doc = "Temperature Sensor Calibration Data"]
1765 #[inline(always)]
1766 pub fn tscdr(
1767 self,
1768 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Tscdr_SPEC, crate::common::R> {
1769 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Tscdr_SPEC,crate::common::R>::from_register(self,0)
1770 }
1771}
1772impl ::core::default::Default for Tscdr {
1773 #[inline(always)]
1774 fn default() -> Tscdr {
1775 <crate::RegValueT<Tscdr_SPEC> as RegisterValue<_>>::new(0)
1776 }
1777}
1778
1779#[doc(hidden)]
1780#[derive(Copy, Clone, Eq, PartialEq)]
1781pub struct Fentryr_SPEC;
1782impl crate::sealed::RegSpec for Fentryr_SPEC {
1783 type DataType = u16;
1784}
1785
1786#[doc = "Flash P/E Mode Entry Register"]
1787pub type Fentryr = crate::RegValueT<Fentryr_SPEC>;
1788
1789impl Fentryr {
1790 #[doc = "Code Flash P/E Mode Entry 0"]
1791 #[inline(always)]
1792 pub fn fentry0(
1793 self,
1794 ) -> crate::common::RegisterField<
1795 0,
1796 0x1,
1797 1,
1798 0,
1799 fentryr::Fentry0,
1800 fentryr::Fentry0,
1801 Fentryr_SPEC,
1802 crate::common::RW,
1803 > {
1804 crate::common::RegisterField::<
1805 0,
1806 0x1,
1807 1,
1808 0,
1809 fentryr::Fentry0,
1810 fentryr::Fentry0,
1811 Fentryr_SPEC,
1812 crate::common::RW,
1813 >::from_register(self, 0)
1814 }
1815
1816 #[doc = "Data Flash P/E Mode Entry"]
1817 #[inline(always)]
1818 pub fn fentryd(
1819 self,
1820 ) -> crate::common::RegisterField<
1821 7,
1822 0x1,
1823 1,
1824 0,
1825 fentryr::Fentryd,
1826 fentryr::Fentryd,
1827 Fentryr_SPEC,
1828 crate::common::RW,
1829 > {
1830 crate::common::RegisterField::<
1831 7,
1832 0x1,
1833 1,
1834 0,
1835 fentryr::Fentryd,
1836 fentryr::Fentryd,
1837 Fentryr_SPEC,
1838 crate::common::RW,
1839 >::from_register(self, 0)
1840 }
1841
1842 #[doc = "Key Code"]
1843 #[inline(always)]
1844 pub fn fekey(
1845 self,
1846 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fentryr_SPEC, crate::common::W> {
1847 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fentryr_SPEC,crate::common::W>::from_register(self,0)
1848 }
1849}
1850impl ::core::default::Default for Fentryr {
1851 #[inline(always)]
1852 fn default() -> Fentryr {
1853 <crate::RegValueT<Fentryr_SPEC> as RegisterValue<_>>::new(0)
1854 }
1855}
1856pub mod fentryr {
1857
1858 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1859 pub struct Fentry0_SPEC;
1860 pub type Fentry0 = crate::EnumBitfieldStruct<u8, Fentry0_SPEC>;
1861 impl Fentry0 {
1862 #[doc = "The code flash is the read mode"]
1863 pub const _0: Self = Self::new(0);
1864
1865 #[doc = "The code flash is the P/E mode."]
1866 pub const _1: Self = Self::new(1);
1867 }
1868 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1869 pub struct Fentryd_SPEC;
1870 pub type Fentryd = crate::EnumBitfieldStruct<u8, Fentryd_SPEC>;
1871 impl Fentryd {
1872 #[doc = "The data flash is the read mode"]
1873 pub const _0: Self = Self::new(0);
1874
1875 #[doc = "The data flash is the P/E mode."]
1876 pub const _1: Self = Self::new(1);
1877 }
1878}
1879#[doc(hidden)]
1880#[derive(Copy, Clone, Eq, PartialEq)]
1881pub struct Fldwaitr_SPEC;
1882impl crate::sealed::RegSpec for Fldwaitr_SPEC {
1883 type DataType = u8;
1884}
1885
1886#[doc = "Memory Wait Cycle Control Register for Data Flash"]
1887pub type Fldwaitr = crate::RegValueT<Fldwaitr_SPEC>;
1888
1889impl Fldwaitr {
1890 #[doc = "Memory Wait Cycle Select for Data Flash"]
1891 #[inline(always)]
1892 pub fn fldwait1(
1893 self,
1894 ) -> crate::common::RegisterField<
1895 0,
1896 0x1,
1897 1,
1898 0,
1899 fldwaitr::Fldwait1,
1900 fldwaitr::Fldwait1,
1901 Fldwaitr_SPEC,
1902 crate::common::RW,
1903 > {
1904 crate::common::RegisterField::<
1905 0,
1906 0x1,
1907 1,
1908 0,
1909 fldwaitr::Fldwait1,
1910 fldwaitr::Fldwait1,
1911 Fldwaitr_SPEC,
1912 crate::common::RW,
1913 >::from_register(self, 0)
1914 }
1915}
1916impl ::core::default::Default for Fldwaitr {
1917 #[inline(always)]
1918 fn default() -> Fldwaitr {
1919 <crate::RegValueT<Fldwaitr_SPEC> as RegisterValue<_>>::new(0)
1920 }
1921}
1922pub mod fldwaitr {
1923
1924 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1925 pub struct Fldwait1_SPEC;
1926 pub type Fldwait1 = crate::EnumBitfieldStruct<u8, Fldwait1_SPEC>;
1927 impl Fldwait1 {
1928 #[doc = "1 wait access (Default)"]
1929 pub const _0: Self = Self::new(0);
1930
1931 #[doc = "2 wait access"]
1932 pub const _1: Self = Self::new(1);
1933 }
1934}
1935#[doc(hidden)]
1936#[derive(Copy, Clone, Eq, PartialEq)]
1937pub struct Pfber_SPEC;
1938impl crate::sealed::RegSpec for Pfber_SPEC {
1939 type DataType = u8;
1940}
1941
1942#[doc = "Prefetch Buffer Enable Register"]
1943pub type Pfber = crate::RegValueT<Pfber_SPEC>;
1944
1945impl Pfber {
1946 #[doc = "Prefetch Buffer Enable bit"]
1947 #[inline(always)]
1948 pub fn pfbe(
1949 self,
1950 ) -> crate::common::RegisterField<
1951 0,
1952 0x1,
1953 1,
1954 0,
1955 pfber::Pfbe,
1956 pfber::Pfbe,
1957 Pfber_SPEC,
1958 crate::common::RW,
1959 > {
1960 crate::common::RegisterField::<
1961 0,
1962 0x1,
1963 1,
1964 0,
1965 pfber::Pfbe,
1966 pfber::Pfbe,
1967 Pfber_SPEC,
1968 crate::common::RW,
1969 >::from_register(self, 0)
1970 }
1971}
1972impl ::core::default::Default for Pfber {
1973 #[inline(always)]
1974 fn default() -> Pfber {
1975 <crate::RegValueT<Pfber_SPEC> as RegisterValue<_>>::new(0)
1976 }
1977}
1978pub mod pfber {
1979
1980 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1981 pub struct Pfbe_SPEC;
1982 pub type Pfbe = crate::EnumBitfieldStruct<u8, Pfbe_SPEC>;
1983 impl Pfbe {
1984 #[doc = "Prefetch buffer is disabled"]
1985 pub const _0: Self = Self::new(0);
1986
1987 #[doc = "Prefetch buffer is enabled"]
1988 pub const _1: Self = Self::new(1);
1989 }
1990}