ra2e2_pac/
agtw0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.40.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:46:37 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Low Power Asynchronous General Purpose Timer 0"]
28unsafe impl ::core::marker::Send for super::Agtw0 {}
29unsafe impl ::core::marker::Sync for super::Agtw0 {}
30impl super::Agtw0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "AGT Counter Register"]
38    #[inline(always)]
39    pub const fn agt(&self) -> &'static crate::common::Reg<self::Agt_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Agt_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "AGT CounterCompare Match A Register"]
48    #[inline(always)]
49    pub const fn agtcma(
50        &self,
51    ) -> &'static crate::common::Reg<self::Agtcma_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Agtcma_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(4usize),
55            )
56        }
57    }
58
59    #[doc = "AGT CounterCompare Match B Register"]
60    #[inline(always)]
61    pub const fn agtcmb(
62        &self,
63    ) -> &'static crate::common::Reg<self::Agtcmb_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Agtcmb_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(8usize),
67            )
68        }
69    }
70
71    #[doc = "AGT Control Register"]
72    #[inline(always)]
73    pub const fn agtcr(&self) -> &'static crate::common::Reg<self::Agtcr_SPEC, crate::common::RW> {
74        unsafe {
75            crate::common::Reg::<self::Agtcr_SPEC, crate::common::RW>::from_ptr(
76                self._svd2pac_as_ptr().add(12usize),
77            )
78        }
79    }
80
81    #[doc = "AGT Mode Register 1"]
82    #[inline(always)]
83    pub const fn agtmr1(
84        &self,
85    ) -> &'static crate::common::Reg<self::Agtmr1_SPEC, crate::common::RW> {
86        unsafe {
87            crate::common::Reg::<self::Agtmr1_SPEC, crate::common::RW>::from_ptr(
88                self._svd2pac_as_ptr().add(13usize),
89            )
90        }
91    }
92
93    #[doc = "AGT Mode Register 2"]
94    #[inline(always)]
95    pub const fn agtmr2(
96        &self,
97    ) -> &'static crate::common::Reg<self::Agtmr2_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Agtmr2_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(14usize),
101            )
102        }
103    }
104
105    #[doc = "AGT Pin Select Register"]
106    #[inline(always)]
107    pub const fn agtiosel(
108        &self,
109    ) -> &'static crate::common::Reg<self::Agtiosel_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Agtiosel_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(15usize),
113            )
114        }
115    }
116
117    #[doc = "AGT I/O Control Register"]
118    #[inline(always)]
119    pub const fn agtioc(
120        &self,
121    ) -> &'static crate::common::Reg<self::Agtioc_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Agtioc_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(16usize),
125            )
126        }
127    }
128
129    #[doc = "AGT Event Pin Select Register"]
130    #[inline(always)]
131    pub const fn agtisr(
132        &self,
133    ) -> &'static crate::common::Reg<self::Agtisr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Agtisr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(17usize),
137            )
138        }
139    }
140
141    #[doc = "AGT Compare Match Function Select Register"]
142    #[inline(always)]
143    pub const fn agtcmsr(
144        &self,
145    ) -> &'static crate::common::Reg<self::Agtcmsr_SPEC, crate::common::RW> {
146        unsafe {
147            crate::common::Reg::<self::Agtcmsr_SPEC, crate::common::RW>::from_ptr(
148                self._svd2pac_as_ptr().add(18usize),
149            )
150        }
151    }
152}
153#[doc(hidden)]
154#[derive(Copy, Clone, Eq, PartialEq)]
155pub struct Agt_SPEC;
156impl crate::sealed::RegSpec for Agt_SPEC {
157    type DataType = u32;
158}
159
160#[doc = "AGT Counter Register"]
161pub type Agt = crate::RegValueT<Agt_SPEC>;
162
163impl NoBitfieldReg<Agt_SPEC> for Agt {}
164impl ::core::default::Default for Agt {
165    #[inline(always)]
166    fn default() -> Agt {
167        <crate::RegValueT<Agt_SPEC> as RegisterValue<_>>::new(4294967295)
168    }
169}
170
171#[doc(hidden)]
172#[derive(Copy, Clone, Eq, PartialEq)]
173pub struct Agtcma_SPEC;
174impl crate::sealed::RegSpec for Agtcma_SPEC {
175    type DataType = u32;
176}
177
178#[doc = "AGT CounterCompare Match A Register"]
179pub type Agtcma = crate::RegValueT<Agtcma_SPEC>;
180
181impl NoBitfieldReg<Agtcma_SPEC> for Agtcma {}
182impl ::core::default::Default for Agtcma {
183    #[inline(always)]
184    fn default() -> Agtcma {
185        <crate::RegValueT<Agtcma_SPEC> as RegisterValue<_>>::new(4294967295)
186    }
187}
188
189#[doc(hidden)]
190#[derive(Copy, Clone, Eq, PartialEq)]
191pub struct Agtcmb_SPEC;
192impl crate::sealed::RegSpec for Agtcmb_SPEC {
193    type DataType = u32;
194}
195
196#[doc = "AGT CounterCompare Match B Register"]
197pub type Agtcmb = crate::RegValueT<Agtcmb_SPEC>;
198
199impl NoBitfieldReg<Agtcmb_SPEC> for Agtcmb {}
200impl ::core::default::Default for Agtcmb {
201    #[inline(always)]
202    fn default() -> Agtcmb {
203        <crate::RegValueT<Agtcmb_SPEC> as RegisterValue<_>>::new(4294967295)
204    }
205}
206
207#[doc(hidden)]
208#[derive(Copy, Clone, Eq, PartialEq)]
209pub struct Agtcr_SPEC;
210impl crate::sealed::RegSpec for Agtcr_SPEC {
211    type DataType = u8;
212}
213
214#[doc = "AGT Control Register"]
215pub type Agtcr = crate::RegValueT<Agtcr_SPEC>;
216
217impl Agtcr {
218    #[doc = "AGT Count Start"]
219    #[inline(always)]
220    pub fn tstart(
221        self,
222    ) -> crate::common::RegisterField<
223        0,
224        0x1,
225        1,
226        0,
227        agtcr::Tstart,
228        agtcr::Tstart,
229        Agtcr_SPEC,
230        crate::common::RW,
231    > {
232        crate::common::RegisterField::<
233            0,
234            0x1,
235            1,
236            0,
237            agtcr::Tstart,
238            agtcr::Tstart,
239            Agtcr_SPEC,
240            crate::common::RW,
241        >::from_register(self, 0)
242    }
243
244    #[doc = "AGT Count Status Flag"]
245    #[inline(always)]
246    pub fn tcstf(
247        self,
248    ) -> crate::common::RegisterField<
249        1,
250        0x1,
251        1,
252        0,
253        agtcr::Tcstf,
254        agtcr::Tcstf,
255        Agtcr_SPEC,
256        crate::common::R,
257    > {
258        crate::common::RegisterField::<
259            1,
260            0x1,
261            1,
262            0,
263            agtcr::Tcstf,
264            agtcr::Tcstf,
265            Agtcr_SPEC,
266            crate::common::R,
267        >::from_register(self, 0)
268    }
269
270    #[doc = "AGT Count Forced Stop"]
271    #[inline(always)]
272    pub fn tstop(
273        self,
274    ) -> crate::common::RegisterField<
275        2,
276        0x1,
277        1,
278        0,
279        agtcr::Tstop,
280        agtcr::Tstop,
281        Agtcr_SPEC,
282        crate::common::W,
283    > {
284        crate::common::RegisterField::<
285            2,
286            0x1,
287            1,
288            0,
289            agtcr::Tstop,
290            agtcr::Tstop,
291            Agtcr_SPEC,
292            crate::common::W,
293        >::from_register(self, 0)
294    }
295
296    #[doc = "Active Edge Judgment Flag"]
297    #[inline(always)]
298    pub fn tedgf(
299        self,
300    ) -> crate::common::RegisterField<
301        4,
302        0x1,
303        1,
304        0,
305        agtcr::Tedgf,
306        agtcr::Tedgf,
307        Agtcr_SPEC,
308        crate::common::RW,
309    > {
310        crate::common::RegisterField::<
311            4,
312            0x1,
313            1,
314            0,
315            agtcr::Tedgf,
316            agtcr::Tedgf,
317            Agtcr_SPEC,
318            crate::common::RW,
319        >::from_register(self, 0)
320    }
321
322    #[doc = "Underflow Flag"]
323    #[inline(always)]
324    pub fn tundf(
325        self,
326    ) -> crate::common::RegisterField<
327        5,
328        0x1,
329        1,
330        0,
331        agtcr::Tundf,
332        agtcr::Tundf,
333        Agtcr_SPEC,
334        crate::common::RW,
335    > {
336        crate::common::RegisterField::<
337            5,
338            0x1,
339            1,
340            0,
341            agtcr::Tundf,
342            agtcr::Tundf,
343            Agtcr_SPEC,
344            crate::common::RW,
345        >::from_register(self, 0)
346    }
347
348    #[doc = "Compare Match A Flag"]
349    #[inline(always)]
350    pub fn tcmaf(
351        self,
352    ) -> crate::common::RegisterField<
353        6,
354        0x1,
355        1,
356        0,
357        agtcr::Tcmaf,
358        agtcr::Tcmaf,
359        Agtcr_SPEC,
360        crate::common::RW,
361    > {
362        crate::common::RegisterField::<
363            6,
364            0x1,
365            1,
366            0,
367            agtcr::Tcmaf,
368            agtcr::Tcmaf,
369            Agtcr_SPEC,
370            crate::common::RW,
371        >::from_register(self, 0)
372    }
373
374    #[doc = "Compare Match B Flag"]
375    #[inline(always)]
376    pub fn tcmbf(
377        self,
378    ) -> crate::common::RegisterField<
379        7,
380        0x1,
381        1,
382        0,
383        agtcr::Tcmbf,
384        agtcr::Tcmbf,
385        Agtcr_SPEC,
386        crate::common::RW,
387    > {
388        crate::common::RegisterField::<
389            7,
390            0x1,
391            1,
392            0,
393            agtcr::Tcmbf,
394            agtcr::Tcmbf,
395            Agtcr_SPEC,
396            crate::common::RW,
397        >::from_register(self, 0)
398    }
399}
400impl ::core::default::Default for Agtcr {
401    #[inline(always)]
402    fn default() -> Agtcr {
403        <crate::RegValueT<Agtcr_SPEC> as RegisterValue<_>>::new(0)
404    }
405}
406pub mod agtcr {
407
408    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
409    pub struct Tstart_SPEC;
410    pub type Tstart = crate::EnumBitfieldStruct<u8, Tstart_SPEC>;
411    impl Tstart {
412        #[doc = "Count stops"]
413        pub const _0: Self = Self::new(0);
414
415        #[doc = "Count starts"]
416        pub const _1: Self = Self::new(1);
417    }
418    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
419    pub struct Tcstf_SPEC;
420    pub type Tcstf = crate::EnumBitfieldStruct<u8, Tcstf_SPEC>;
421    impl Tcstf {
422        #[doc = "Count stopped"]
423        pub const _0: Self = Self::new(0);
424
425        #[doc = "Count in progress"]
426        pub const _1: Self = Self::new(1);
427    }
428    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
429    pub struct Tstop_SPEC;
430    pub type Tstop = crate::EnumBitfieldStruct<u8, Tstop_SPEC>;
431    impl Tstop {
432        #[doc = "Writing is invalid"]
433        pub const _0: Self = Self::new(0);
434
435        #[doc = "The count is forcibly stopped"]
436        pub const _1: Self = Self::new(1);
437    }
438    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
439    pub struct Tedgf_SPEC;
440    pub type Tedgf = crate::EnumBitfieldStruct<u8, Tedgf_SPEC>;
441    impl Tedgf {
442        #[doc = "No active edge received"]
443        pub const _0: Self = Self::new(0);
444
445        #[doc = "Active edge received"]
446        pub const _1: Self = Self::new(1);
447    }
448    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
449    pub struct Tundf_SPEC;
450    pub type Tundf = crate::EnumBitfieldStruct<u8, Tundf_SPEC>;
451    impl Tundf {
452        #[doc = "No underflow"]
453        pub const _0: Self = Self::new(0);
454
455        #[doc = "Underflow"]
456        pub const _1: Self = Self::new(1);
457    }
458    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
459    pub struct Tcmaf_SPEC;
460    pub type Tcmaf = crate::EnumBitfieldStruct<u8, Tcmaf_SPEC>;
461    impl Tcmaf {
462        #[doc = "No match"]
463        pub const _0: Self = Self::new(0);
464
465        #[doc = "Match"]
466        pub const _1: Self = Self::new(1);
467    }
468    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
469    pub struct Tcmbf_SPEC;
470    pub type Tcmbf = crate::EnumBitfieldStruct<u8, Tcmbf_SPEC>;
471    impl Tcmbf {
472        #[doc = "No match"]
473        pub const _0: Self = Self::new(0);
474
475        #[doc = "Match"]
476        pub const _1: Self = Self::new(1);
477    }
478}
479#[doc(hidden)]
480#[derive(Copy, Clone, Eq, PartialEq)]
481pub struct Agtmr1_SPEC;
482impl crate::sealed::RegSpec for Agtmr1_SPEC {
483    type DataType = u8;
484}
485
486#[doc = "AGT Mode Register 1"]
487pub type Agtmr1 = crate::RegValueT<Agtmr1_SPEC>;
488
489impl Agtmr1 {
490    #[doc = "Operating Mode"]
491    #[inline(always)]
492    pub fn tmod(
493        self,
494    ) -> crate::common::RegisterField<
495        0,
496        0x7,
497        1,
498        0,
499        agtmr1::Tmod,
500        agtmr1::Tmod,
501        Agtmr1_SPEC,
502        crate::common::RW,
503    > {
504        crate::common::RegisterField::<
505            0,
506            0x7,
507            1,
508            0,
509            agtmr1::Tmod,
510            agtmr1::Tmod,
511            Agtmr1_SPEC,
512            crate::common::RW,
513        >::from_register(self, 0)
514    }
515
516    #[doc = "Edge Polarity"]
517    #[inline(always)]
518    pub fn tedgpl(
519        self,
520    ) -> crate::common::RegisterField<
521        3,
522        0x1,
523        1,
524        0,
525        agtmr1::Tedgpl,
526        agtmr1::Tedgpl,
527        Agtmr1_SPEC,
528        crate::common::RW,
529    > {
530        crate::common::RegisterField::<
531            3,
532            0x1,
533            1,
534            0,
535            agtmr1::Tedgpl,
536            agtmr1::Tedgpl,
537            Agtmr1_SPEC,
538            crate::common::RW,
539        >::from_register(self, 0)
540    }
541
542    #[doc = "Count Source"]
543    #[inline(always)]
544    pub fn tck(
545        self,
546    ) -> crate::common::RegisterField<
547        4,
548        0x7,
549        1,
550        0,
551        agtmr1::Tck,
552        agtmr1::Tck,
553        Agtmr1_SPEC,
554        crate::common::RW,
555    > {
556        crate::common::RegisterField::<
557            4,
558            0x7,
559            1,
560            0,
561            agtmr1::Tck,
562            agtmr1::Tck,
563            Agtmr1_SPEC,
564            crate::common::RW,
565        >::from_register(self, 0)
566    }
567}
568impl ::core::default::Default for Agtmr1 {
569    #[inline(always)]
570    fn default() -> Agtmr1 {
571        <crate::RegValueT<Agtmr1_SPEC> as RegisterValue<_>>::new(64)
572    }
573}
574pub mod agtmr1 {
575
576    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
577    pub struct Tmod_SPEC;
578    pub type Tmod = crate::EnumBitfieldStruct<u8, Tmod_SPEC>;
579    impl Tmod {
580        #[doc = "Timer mode"]
581        pub const _000: Self = Self::new(0);
582
583        #[doc = "Pulse output mode"]
584        pub const _001: Self = Self::new(1);
585
586        #[doc = "Event counter mode"]
587        pub const _010: Self = Self::new(2);
588
589        #[doc = "Pulse width measurement mode"]
590        pub const _011: Self = Self::new(3);
591
592        #[doc = "Pulse period measurement mode"]
593        pub const _100: Self = Self::new(4);
594
595        #[doc = "Setting prohibited"]
596        pub const OTHERS: Self = Self::new(0);
597    }
598    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
599    pub struct Tedgpl_SPEC;
600    pub type Tedgpl = crate::EnumBitfieldStruct<u8, Tedgpl_SPEC>;
601    impl Tedgpl {
602        #[doc = "Single-edge"]
603        pub const _0: Self = Self::new(0);
604
605        #[doc = "Both-edge"]
606        pub const _1: Self = Self::new(1);
607    }
608    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
609    pub struct Tck_SPEC;
610    pub type Tck = crate::EnumBitfieldStruct<u8, Tck_SPEC>;
611    impl Tck {
612        #[doc = "PCLKB"]
613        pub const _000: Self = Self::new(0);
614
615        #[doc = "PCLKB/8"]
616        pub const _001: Self = Self::new(1);
617
618        #[doc = "PCLKB/2"]
619        pub const _011: Self = Self::new(3);
620
621        #[doc = "Divided clock AGTLCLK specified by CKS\\[2:0\\] bits in the AGTMR2 register"]
622        pub const _100: Self = Self::new(4);
623
624        #[doc = "Underflow event signal from AGTW0"]
625        pub const _101: Self = Self::new(5);
626
627        #[doc = "Setting prohibited"]
628        pub const _110: Self = Self::new(6);
629
630        #[doc = "Setting prohibited"]
631        pub const OTHERS: Self = Self::new(0);
632    }
633}
634#[doc(hidden)]
635#[derive(Copy, Clone, Eq, PartialEq)]
636pub struct Agtmr2_SPEC;
637impl crate::sealed::RegSpec for Agtmr2_SPEC {
638    type DataType = u8;
639}
640
641#[doc = "AGT Mode Register 2"]
642pub type Agtmr2 = crate::RegValueT<Agtmr2_SPEC>;
643
644impl Agtmr2 {
645    #[doc = "AGTLCLK Count Source Clock Frequency Division Ratio"]
646    #[inline(always)]
647    pub fn cks(
648        self,
649    ) -> crate::common::RegisterField<
650        0,
651        0x7,
652        1,
653        0,
654        agtmr2::Cks,
655        agtmr2::Cks,
656        Agtmr2_SPEC,
657        crate::common::RW,
658    > {
659        crate::common::RegisterField::<
660            0,
661            0x7,
662            1,
663            0,
664            agtmr2::Cks,
665            agtmr2::Cks,
666            Agtmr2_SPEC,
667            crate::common::RW,
668        >::from_register(self, 0)
669    }
670
671    #[doc = "Low Power Mode"]
672    #[inline(always)]
673    pub fn lpm(
674        self,
675    ) -> crate::common::RegisterField<
676        7,
677        0x1,
678        1,
679        0,
680        agtmr2::Lpm,
681        agtmr2::Lpm,
682        Agtmr2_SPEC,
683        crate::common::RW,
684    > {
685        crate::common::RegisterField::<
686            7,
687            0x1,
688            1,
689            0,
690            agtmr2::Lpm,
691            agtmr2::Lpm,
692            Agtmr2_SPEC,
693            crate::common::RW,
694        >::from_register(self, 0)
695    }
696}
697impl ::core::default::Default for Agtmr2 {
698    #[inline(always)]
699    fn default() -> Agtmr2 {
700        <crate::RegValueT<Agtmr2_SPEC> as RegisterValue<_>>::new(0)
701    }
702}
703pub mod agtmr2 {
704
705    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
706    pub struct Cks_SPEC;
707    pub type Cks = crate::EnumBitfieldStruct<u8, Cks_SPEC>;
708    impl Cks {
709        #[doc = "1/1"]
710        pub const _000: Self = Self::new(0);
711
712        #[doc = "1/2"]
713        pub const _001: Self = Self::new(1);
714
715        #[doc = "1/4"]
716        pub const _010: Self = Self::new(2);
717
718        #[doc = "1/8"]
719        pub const _011: Self = Self::new(3);
720
721        #[doc = "1/16"]
722        pub const _100: Self = Self::new(4);
723
724        #[doc = "1/32"]
725        pub const _101: Self = Self::new(5);
726
727        #[doc = "1/64"]
728        pub const _110: Self = Self::new(6);
729
730        #[doc = "1/128"]
731        pub const _111: Self = Self::new(7);
732    }
733    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
734    pub struct Lpm_SPEC;
735    pub type Lpm = crate::EnumBitfieldStruct<u8, Lpm_SPEC>;
736    impl Lpm {
737        #[doc = "Normal mode"]
738        pub const _0: Self = Self::new(0);
739
740        #[doc = "Low power mode"]
741        pub const _1: Self = Self::new(1);
742    }
743}
744#[doc(hidden)]
745#[derive(Copy, Clone, Eq, PartialEq)]
746pub struct Agtiosel_SPEC;
747impl crate::sealed::RegSpec for Agtiosel_SPEC {
748    type DataType = u8;
749}
750
751#[doc = "AGT Pin Select Register"]
752pub type Agtiosel = crate::RegValueT<Agtiosel_SPEC>;
753
754impl Agtiosel {
755    #[doc = "AGTIOn Pin Input Enable"]
756    #[inline(always)]
757    pub fn ties(
758        self,
759    ) -> crate::common::RegisterField<
760        4,
761        0x1,
762        1,
763        0,
764        agtiosel::Ties,
765        agtiosel::Ties,
766        Agtiosel_SPEC,
767        crate::common::RW,
768    > {
769        crate::common::RegisterField::<
770            4,
771            0x1,
772            1,
773            0,
774            agtiosel::Ties,
775            agtiosel::Ties,
776            Agtiosel_SPEC,
777            crate::common::RW,
778        >::from_register(self, 0)
779    }
780}
781impl ::core::default::Default for Agtiosel {
782    #[inline(always)]
783    fn default() -> Agtiosel {
784        <crate::RegValueT<Agtiosel_SPEC> as RegisterValue<_>>::new(0)
785    }
786}
787pub mod agtiosel {
788
789    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
790    pub struct Ties_SPEC;
791    pub type Ties = crate::EnumBitfieldStruct<u8, Ties_SPEC>;
792    impl Ties {
793        #[doc = "External event input is disabled during Software Standby mode"]
794        pub const _0: Self = Self::new(0);
795
796        #[doc = "External event input is enabled during Software Standby mode"]
797        pub const _1: Self = Self::new(1);
798    }
799}
800#[doc(hidden)]
801#[derive(Copy, Clone, Eq, PartialEq)]
802pub struct Agtioc_SPEC;
803impl crate::sealed::RegSpec for Agtioc_SPEC {
804    type DataType = u8;
805}
806
807#[doc = "AGT I/O Control Register"]
808pub type Agtioc = crate::RegValueT<Agtioc_SPEC>;
809
810impl Agtioc {
811    #[doc = "I/O Polarity Switch"]
812    #[inline(always)]
813    pub fn tedgsel(
814        self,
815    ) -> crate::common::RegisterFieldBool<0, 1, 0, Agtioc_SPEC, crate::common::RW> {
816        crate::common::RegisterFieldBool::<0, 1, 0, Agtioc_SPEC, crate::common::RW>::from_register(
817            self, 0,
818        )
819    }
820
821    #[doc = "AGTOn pin Output Enable"]
822    #[inline(always)]
823    pub fn toe(
824        self,
825    ) -> crate::common::RegisterField<
826        2,
827        0x1,
828        1,
829        0,
830        agtioc::Toe,
831        agtioc::Toe,
832        Agtioc_SPEC,
833        crate::common::RW,
834    > {
835        crate::common::RegisterField::<
836            2,
837            0x1,
838            1,
839            0,
840            agtioc::Toe,
841            agtioc::Toe,
842            Agtioc_SPEC,
843            crate::common::RW,
844        >::from_register(self, 0)
845    }
846
847    #[doc = "Input Filter"]
848    #[inline(always)]
849    pub fn tipf(
850        self,
851    ) -> crate::common::RegisterField<
852        4,
853        0x3,
854        1,
855        0,
856        agtioc::Tipf,
857        agtioc::Tipf,
858        Agtioc_SPEC,
859        crate::common::RW,
860    > {
861        crate::common::RegisterField::<
862            4,
863            0x3,
864            1,
865            0,
866            agtioc::Tipf,
867            agtioc::Tipf,
868            Agtioc_SPEC,
869            crate::common::RW,
870        >::from_register(self, 0)
871    }
872
873    #[doc = "Count Control"]
874    #[inline(always)]
875    pub fn tiogt(
876        self,
877    ) -> crate::common::RegisterField<
878        6,
879        0x3,
880        1,
881        0,
882        agtioc::Tiogt,
883        agtioc::Tiogt,
884        Agtioc_SPEC,
885        crate::common::RW,
886    > {
887        crate::common::RegisterField::<
888            6,
889            0x3,
890            1,
891            0,
892            agtioc::Tiogt,
893            agtioc::Tiogt,
894            Agtioc_SPEC,
895            crate::common::RW,
896        >::from_register(self, 0)
897    }
898}
899impl ::core::default::Default for Agtioc {
900    #[inline(always)]
901    fn default() -> Agtioc {
902        <crate::RegValueT<Agtioc_SPEC> as RegisterValue<_>>::new(0)
903    }
904}
905pub mod agtioc {
906
907    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
908    pub struct Toe_SPEC;
909    pub type Toe = crate::EnumBitfieldStruct<u8, Toe_SPEC>;
910    impl Toe {
911        #[doc = "AGTOn pin output disabled"]
912        pub const _0: Self = Self::new(0);
913
914        #[doc = "AGTOn pin output enabled"]
915        pub const _1: Self = Self::new(1);
916    }
917    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
918    pub struct Tipf_SPEC;
919    pub type Tipf = crate::EnumBitfieldStruct<u8, Tipf_SPEC>;
920    impl Tipf {
921        #[doc = "No filter"]
922        pub const _00: Self = Self::new(0);
923
924        #[doc = "Filter sampled at PCLKB"]
925        pub const _01: Self = Self::new(1);
926
927        #[doc = "Filter sampled at PCLKB/8"]
928        pub const _10: Self = Self::new(2);
929
930        #[doc = "Filter sampled at PCLKB/32"]
931        pub const _11: Self = Self::new(3);
932    }
933    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
934    pub struct Tiogt_SPEC;
935    pub type Tiogt = crate::EnumBitfieldStruct<u8, Tiogt_SPEC>;
936    impl Tiogt {
937        #[doc = "Event is always counted"]
938        pub const _00: Self = Self::new(0);
939
940        #[doc = "Event is counted during polarity period specified for AGTEEn pin"]
941        pub const _01: Self = Self::new(1);
942
943        #[doc = "Setting prohibited"]
944        pub const OTHERS: Self = Self::new(0);
945    }
946}
947#[doc(hidden)]
948#[derive(Copy, Clone, Eq, PartialEq)]
949pub struct Agtisr_SPEC;
950impl crate::sealed::RegSpec for Agtisr_SPEC {
951    type DataType = u8;
952}
953
954#[doc = "AGT Event Pin Select Register"]
955pub type Agtisr = crate::RegValueT<Agtisr_SPEC>;
956
957impl Agtisr {
958    #[doc = "AGTEEn Polarity Selection"]
959    #[inline(always)]
960    pub fn eeps(
961        self,
962    ) -> crate::common::RegisterField<
963        2,
964        0x1,
965        1,
966        0,
967        agtisr::Eeps,
968        agtisr::Eeps,
969        Agtisr_SPEC,
970        crate::common::RW,
971    > {
972        crate::common::RegisterField::<
973            2,
974            0x1,
975            1,
976            0,
977            agtisr::Eeps,
978            agtisr::Eeps,
979            Agtisr_SPEC,
980            crate::common::RW,
981        >::from_register(self, 0)
982    }
983}
984impl ::core::default::Default for Agtisr {
985    #[inline(always)]
986    fn default() -> Agtisr {
987        <crate::RegValueT<Agtisr_SPEC> as RegisterValue<_>>::new(0)
988    }
989}
990pub mod agtisr {
991
992    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
993    pub struct Eeps_SPEC;
994    pub type Eeps = crate::EnumBitfieldStruct<u8, Eeps_SPEC>;
995    impl Eeps {
996        #[doc = "An event is counted during the low-level period"]
997        pub const _0: Self = Self::new(0);
998
999        #[doc = "An event is counted during the high-level period"]
1000        pub const _1: Self = Self::new(1);
1001    }
1002}
1003#[doc(hidden)]
1004#[derive(Copy, Clone, Eq, PartialEq)]
1005pub struct Agtcmsr_SPEC;
1006impl crate::sealed::RegSpec for Agtcmsr_SPEC {
1007    type DataType = u8;
1008}
1009
1010#[doc = "AGT Compare Match Function Select Register"]
1011pub type Agtcmsr = crate::RegValueT<Agtcmsr_SPEC>;
1012
1013impl Agtcmsr {
1014    #[doc = "AGT Compare Match A Register Enable"]
1015    #[inline(always)]
1016    pub fn tcmea(
1017        self,
1018    ) -> crate::common::RegisterField<
1019        0,
1020        0x1,
1021        1,
1022        0,
1023        agtcmsr::Tcmea,
1024        agtcmsr::Tcmea,
1025        Agtcmsr_SPEC,
1026        crate::common::RW,
1027    > {
1028        crate::common::RegisterField::<
1029            0,
1030            0x1,
1031            1,
1032            0,
1033            agtcmsr::Tcmea,
1034            agtcmsr::Tcmea,
1035            Agtcmsr_SPEC,
1036            crate::common::RW,
1037        >::from_register(self, 0)
1038    }
1039
1040    #[doc = "AGTOAn Pin Output Enable"]
1041    #[inline(always)]
1042    pub fn toea(
1043        self,
1044    ) -> crate::common::RegisterField<
1045        1,
1046        0x1,
1047        1,
1048        0,
1049        agtcmsr::Toea,
1050        agtcmsr::Toea,
1051        Agtcmsr_SPEC,
1052        crate::common::RW,
1053    > {
1054        crate::common::RegisterField::<
1055            1,
1056            0x1,
1057            1,
1058            0,
1059            agtcmsr::Toea,
1060            agtcmsr::Toea,
1061            Agtcmsr_SPEC,
1062            crate::common::RW,
1063        >::from_register(self, 0)
1064    }
1065
1066    #[doc = "AGTOAn Pin Polarity Select"]
1067    #[inline(always)]
1068    pub fn topola(
1069        self,
1070    ) -> crate::common::RegisterField<
1071        2,
1072        0x1,
1073        1,
1074        0,
1075        agtcmsr::Topola,
1076        agtcmsr::Topola,
1077        Agtcmsr_SPEC,
1078        crate::common::RW,
1079    > {
1080        crate::common::RegisterField::<
1081            2,
1082            0x1,
1083            1,
1084            0,
1085            agtcmsr::Topola,
1086            agtcmsr::Topola,
1087            Agtcmsr_SPEC,
1088            crate::common::RW,
1089        >::from_register(self, 0)
1090    }
1091
1092    #[doc = "AGT Compare Match B Register Enable"]
1093    #[inline(always)]
1094    pub fn tcmeb(
1095        self,
1096    ) -> crate::common::RegisterField<
1097        4,
1098        0x1,
1099        1,
1100        0,
1101        agtcmsr::Tcmeb,
1102        agtcmsr::Tcmeb,
1103        Agtcmsr_SPEC,
1104        crate::common::RW,
1105    > {
1106        crate::common::RegisterField::<
1107            4,
1108            0x1,
1109            1,
1110            0,
1111            agtcmsr::Tcmeb,
1112            agtcmsr::Tcmeb,
1113            Agtcmsr_SPEC,
1114            crate::common::RW,
1115        >::from_register(self, 0)
1116    }
1117
1118    #[doc = "AGTOBn Pin Output Enable"]
1119    #[inline(always)]
1120    pub fn toeb(
1121        self,
1122    ) -> crate::common::RegisterField<
1123        5,
1124        0x1,
1125        1,
1126        0,
1127        agtcmsr::Toeb,
1128        agtcmsr::Toeb,
1129        Agtcmsr_SPEC,
1130        crate::common::RW,
1131    > {
1132        crate::common::RegisterField::<
1133            5,
1134            0x1,
1135            1,
1136            0,
1137            agtcmsr::Toeb,
1138            agtcmsr::Toeb,
1139            Agtcmsr_SPEC,
1140            crate::common::RW,
1141        >::from_register(self, 0)
1142    }
1143
1144    #[doc = "AGTOBn Pin Polarity Select"]
1145    #[inline(always)]
1146    pub fn topolb(
1147        self,
1148    ) -> crate::common::RegisterField<
1149        6,
1150        0x1,
1151        1,
1152        0,
1153        agtcmsr::Topolb,
1154        agtcmsr::Topolb,
1155        Agtcmsr_SPEC,
1156        crate::common::RW,
1157    > {
1158        crate::common::RegisterField::<
1159            6,
1160            0x1,
1161            1,
1162            0,
1163            agtcmsr::Topolb,
1164            agtcmsr::Topolb,
1165            Agtcmsr_SPEC,
1166            crate::common::RW,
1167        >::from_register(self, 0)
1168    }
1169}
1170impl ::core::default::Default for Agtcmsr {
1171    #[inline(always)]
1172    fn default() -> Agtcmsr {
1173        <crate::RegValueT<Agtcmsr_SPEC> as RegisterValue<_>>::new(0)
1174    }
1175}
1176pub mod agtcmsr {
1177
1178    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1179    pub struct Tcmea_SPEC;
1180    pub type Tcmea = crate::EnumBitfieldStruct<u8, Tcmea_SPEC>;
1181    impl Tcmea {
1182        #[doc = "AGT Compare match A register disabled"]
1183        pub const _0: Self = Self::new(0);
1184
1185        #[doc = "AGT Compare match A register enabled"]
1186        pub const _1: Self = Self::new(1);
1187    }
1188    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1189    pub struct Toea_SPEC;
1190    pub type Toea = crate::EnumBitfieldStruct<u8, Toea_SPEC>;
1191    impl Toea {
1192        #[doc = "AGTOAn pin output disabled"]
1193        pub const _0: Self = Self::new(0);
1194
1195        #[doc = "AGTOAn pin output enabled"]
1196        pub const _1: Self = Self::new(1);
1197    }
1198    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1199    pub struct Topola_SPEC;
1200    pub type Topola = crate::EnumBitfieldStruct<u8, Topola_SPEC>;
1201    impl Topola {
1202        #[doc = "AGTOAn pin output is started on low. i.e. normal output"]
1203        pub const _0: Self = Self::new(0);
1204
1205        #[doc = "AGTOAn pin output is started on high. i.e. inverted output"]
1206        pub const _1: Self = Self::new(1);
1207    }
1208    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1209    pub struct Tcmeb_SPEC;
1210    pub type Tcmeb = crate::EnumBitfieldStruct<u8, Tcmeb_SPEC>;
1211    impl Tcmeb {
1212        #[doc = "Compare match B register disabled"]
1213        pub const _0: Self = Self::new(0);
1214
1215        #[doc = "Compare match B register enabled"]
1216        pub const _1: Self = Self::new(1);
1217    }
1218    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1219    pub struct Toeb_SPEC;
1220    pub type Toeb = crate::EnumBitfieldStruct<u8, Toeb_SPEC>;
1221    impl Toeb {
1222        #[doc = "AGTOBn pin output disabled"]
1223        pub const _0: Self = Self::new(0);
1224
1225        #[doc = "AGTOBn pin output enabled"]
1226        pub const _1: Self = Self::new(1);
1227    }
1228    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1229    pub struct Topolb_SPEC;
1230    pub type Topolb = crate::EnumBitfieldStruct<u8, Topolb_SPEC>;
1231    impl Topolb {
1232        #[doc = "AGTOBn pin output is started on low. i.e. normal output"]
1233        pub const _0: Self = Self::new(0);
1234
1235        #[doc = "AGTOBn pin output is started on high. i.e. inverted output"]
1236        pub const _1: Self = Self::new(1);
1237    }
1238}
ra2e2_pac/agtw0.rs

ra2e2_pac/
agtw0.rs
