ra2e1/agt0/
agtiosel.rs

1#[doc = "Register `AGTIOSEL` reader"]
2pub struct R(crate::R<AGTIOSEL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<AGTIOSEL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<AGTIOSEL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<AGTIOSEL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `AGTIOSEL` writer"]
17pub struct W(crate::W<AGTIOSEL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<AGTIOSEL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<AGTIOSEL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<AGTIOSEL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SEL` reader - AGTIOn Pin Select"]
38pub type SEL_R = crate::FieldReader<u8, SEL_A>;
39#[doc = "AGTIOn Pin Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum SEL_A {
43    #[doc = "0: Select the AGTIOn except for the following pins"]
44    _00 = 0,
45    #[doc = "1: Setting prohibited"]
46    _01 = 1,
47    #[doc = "2: Select the P402/AGTIOn P402/AGTIOn as input only. It cannot be used for output."]
48    _10 = 2,
49    #[doc = "3: Select the P403/AGTIOn P403/AGTIOn as input only. It cannot be used for output."]
50    _11 = 3,
51}
52impl From<SEL_A> for u8 {
53    #[inline(always)]
54    fn from(variant: SEL_A) -> Self {
55        variant as _
56    }
57}
58impl SEL_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> SEL_A {
62        match self.bits {
63            0 => SEL_A::_00,
64            1 => SEL_A::_01,
65            2 => SEL_A::_10,
66            3 => SEL_A::_11,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `_00`"]
71    #[inline(always)]
72    pub fn is_00(&self) -> bool {
73        *self == SEL_A::_00
74    }
75    #[doc = "Checks if the value of the field is `_01`"]
76    #[inline(always)]
77    pub fn is_01(&self) -> bool {
78        *self == SEL_A::_01
79    }
80    #[doc = "Checks if the value of the field is `_10`"]
81    #[inline(always)]
82    pub fn is_10(&self) -> bool {
83        *self == SEL_A::_10
84    }
85    #[doc = "Checks if the value of the field is `_11`"]
86    #[inline(always)]
87    pub fn is_11(&self) -> bool {
88        *self == SEL_A::_11
89    }
90}
91#[doc = "Field `SEL` writer - AGTIOn Pin Select"]
92pub type SEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, AGTIOSEL_SPEC, u8, SEL_A, 2, O>;
93impl<'a, const O: u8> SEL_W<'a, O> {
94    #[doc = "Select the AGTIOn except for the following pins"]
95    #[inline(always)]
96    pub fn _00(self) -> &'a mut W {
97        self.variant(SEL_A::_00)
98    }
99    #[doc = "Setting prohibited"]
100    #[inline(always)]
101    pub fn _01(self) -> &'a mut W {
102        self.variant(SEL_A::_01)
103    }
104    #[doc = "Select the P402/AGTIOn P402/AGTIOn as input only. It cannot be used for output."]
105    #[inline(always)]
106    pub fn _10(self) -> &'a mut W {
107        self.variant(SEL_A::_10)
108    }
109    #[doc = "Select the P403/AGTIOn P403/AGTIOn as input only. It cannot be used for output."]
110    #[inline(always)]
111    pub fn _11(self) -> &'a mut W {
112        self.variant(SEL_A::_11)
113    }
114}
115#[doc = "Field `TIES` reader - AGTIOn Pin Input Enable"]
116pub type TIES_R = crate::BitReader<TIES_A>;
117#[doc = "AGTIOn Pin Input Enable\n\nValue on reset: 0"]
118#[derive(Clone, Copy, Debug, PartialEq, Eq)]
119pub enum TIES_A {
120    #[doc = "0: External event input is disabled during Software Standby mode"]
121    _0 = 0,
122    #[doc = "1: External event input is enabled during Software Standby mode"]
123    _1 = 1,
124}
125impl From<TIES_A> for bool {
126    #[inline(always)]
127    fn from(variant: TIES_A) -> Self {
128        variant as u8 != 0
129    }
130}
131impl TIES_R {
132    #[doc = "Get enumerated values variant"]
133    #[inline(always)]
134    pub fn variant(&self) -> TIES_A {
135        match self.bits {
136            false => TIES_A::_0,
137            true => TIES_A::_1,
138        }
139    }
140    #[doc = "Checks if the value of the field is `_0`"]
141    #[inline(always)]
142    pub fn is_0(&self) -> bool {
143        *self == TIES_A::_0
144    }
145    #[doc = "Checks if the value of the field is `_1`"]
146    #[inline(always)]
147    pub fn is_1(&self) -> bool {
148        *self == TIES_A::_1
149    }
150}
151#[doc = "Field `TIES` writer - AGTIOn Pin Input Enable"]
152pub type TIES_W<'a, const O: u8> = crate::BitWriter<'a, u8, AGTIOSEL_SPEC, TIES_A, O>;
153impl<'a, const O: u8> TIES_W<'a, O> {
154    #[doc = "External event input is disabled during Software Standby mode"]
155    #[inline(always)]
156    pub fn _0(self) -> &'a mut W {
157        self.variant(TIES_A::_0)
158    }
159    #[doc = "External event input is enabled during Software Standby mode"]
160    #[inline(always)]
161    pub fn _1(self) -> &'a mut W {
162        self.variant(TIES_A::_1)
163    }
164}
165impl R {
166    #[doc = "Bits 0:1 - AGTIOn Pin Select"]
167    #[inline(always)]
168    pub fn sel(&self) -> SEL_R {
169        SEL_R::new(self.bits & 3)
170    }
171    #[doc = "Bit 4 - AGTIOn Pin Input Enable"]
172    #[inline(always)]
173    pub fn ties(&self) -> TIES_R {
174        TIES_R::new(((self.bits >> 4) & 1) != 0)
175    }
176}
177impl W {
178    #[doc = "Bits 0:1 - AGTIOn Pin Select"]
179    #[inline(always)]
180    #[must_use]
181    pub fn sel(&mut self) -> SEL_W<0> {
182        SEL_W::new(self)
183    }
184    #[doc = "Bit 4 - AGTIOn Pin Input Enable"]
185    #[inline(always)]
186    #[must_use]
187    pub fn ties(&mut self) -> TIES_W<4> {
188        TIES_W::new(self)
189    }
190    #[doc = "Writes raw bits to the register."]
191    #[inline(always)]
192    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
193        self.0.bits(bits);
194        self
195    }
196}
197#[doc = "AGT Pin Select Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [agtiosel](index.html) module"]
198pub struct AGTIOSEL_SPEC;
199impl crate::RegisterSpec for AGTIOSEL_SPEC {
200    type Ux = u8;
201}
202#[doc = "`read()` method returns [agtiosel::R](R) reader structure"]
203impl crate::Readable for AGTIOSEL_SPEC {
204    type Reader = R;
205}
206#[doc = "`write(|w| ..)` method takes [agtiosel::W](W) writer structure"]
207impl crate::Writable for AGTIOSEL_SPEC {
208    type Writer = W;
209    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
210    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
211}
212#[doc = "`reset()` method sets AGTIOSEL to value 0"]
213impl crate::Resettable for AGTIOSEL_SPEC {
214    const RESET_VALUE: Self::Ux = 0;
215}
ra2e1/agt0/agtiosel.rs

ra2e1/agt0/
agtiosel.rs
