1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"ICU for CPU"]
28unsafe impl ::core::marker::Send for super::Icu {}
29unsafe impl ::core::marker::Sync for super::Icu {}
30impl super::Icu {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "IRQ Control Register %s"]
38 #[inline(always)]
39 pub const fn irqcr(
40 &self,
41 ) -> &'static crate::common::ClusterRegisterArray<
42 crate::common::Reg<self::Irqcr_SPEC, crate::common::RW>,
43 8,
44 0x1,
45 > {
46 unsafe {
47 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x0usize))
48 }
49 }
50 #[inline(always)]
51 pub const fn irqcr0(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
52 unsafe {
53 crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
54 self._svd2pac_as_ptr().add(0x0usize),
55 )
56 }
57 }
58 #[inline(always)]
59 pub const fn irqcr1(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(0x1usize),
63 )
64 }
65 }
66 #[inline(always)]
67 pub const fn irqcr2(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
68 unsafe {
69 crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
70 self._svd2pac_as_ptr().add(0x2usize),
71 )
72 }
73 }
74 #[inline(always)]
75 pub const fn irqcr3(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
76 unsafe {
77 crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
78 self._svd2pac_as_ptr().add(0x3usize),
79 )
80 }
81 }
82 #[inline(always)]
83 pub const fn irqcr4(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
84 unsafe {
85 crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
86 self._svd2pac_as_ptr().add(0x4usize),
87 )
88 }
89 }
90 #[inline(always)]
91 pub const fn irqcr5(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
92 unsafe {
93 crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
94 self._svd2pac_as_ptr().add(0x5usize),
95 )
96 }
97 }
98 #[inline(always)]
99 pub const fn irqcr6(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
100 unsafe {
101 crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
102 self._svd2pac_as_ptr().add(0x6usize),
103 )
104 }
105 }
106 #[inline(always)]
107 pub const fn irqcr7(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
108 unsafe {
109 crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
110 self._svd2pac_as_ptr().add(0x7usize),
111 )
112 }
113 }
114
115 #[doc = "NMI Pin Interrupt Control Register"]
116 #[inline(always)]
117 pub const fn nmicr(&self) -> &'static crate::common::Reg<self::Nmicr_SPEC, crate::common::RW> {
118 unsafe {
119 crate::common::Reg::<self::Nmicr_SPEC, crate::common::RW>::from_ptr(
120 self._svd2pac_as_ptr().add(256usize),
121 )
122 }
123 }
124
125 #[doc = "Non-Maskable Interrupt Enable Register"]
126 #[inline(always)]
127 pub const fn nmier(&self) -> &'static crate::common::Reg<self::Nmier_SPEC, crate::common::RW> {
128 unsafe {
129 crate::common::Reg::<self::Nmier_SPEC, crate::common::RW>::from_ptr(
130 self._svd2pac_as_ptr().add(288usize),
131 )
132 }
133 }
134
135 #[doc = "Non-Maskable Interrupt Status Clear Register"]
136 #[inline(always)]
137 pub const fn nmiclr(
138 &self,
139 ) -> &'static crate::common::Reg<self::Nmiclr_SPEC, crate::common::RW> {
140 unsafe {
141 crate::common::Reg::<self::Nmiclr_SPEC, crate::common::RW>::from_ptr(
142 self._svd2pac_as_ptr().add(304usize),
143 )
144 }
145 }
146
147 #[doc = "Non-Maskable Interrupt Status Register"]
148 #[inline(always)]
149 pub const fn nmisr(&self) -> &'static crate::common::Reg<self::Nmisr_SPEC, crate::common::R> {
150 unsafe {
151 crate::common::Reg::<self::Nmisr_SPEC, crate::common::R>::from_ptr(
152 self._svd2pac_as_ptr().add(320usize),
153 )
154 }
155 }
156
157 #[doc = "Wake Up Interrupt Enable Register"]
158 #[inline(always)]
159 pub const fn wupen(&self) -> &'static crate::common::Reg<self::Wupen_SPEC, crate::common::RW> {
160 unsafe {
161 crate::common::Reg::<self::Wupen_SPEC, crate::common::RW>::from_ptr(
162 self._svd2pac_as_ptr().add(416usize),
163 )
164 }
165 }
166
167 #[doc = "ICU event Enable Register"]
168 #[inline(always)]
169 pub const fn ielen(&self) -> &'static crate::common::Reg<self::Ielen_SPEC, crate::common::RW> {
170 unsafe {
171 crate::common::Reg::<self::Ielen_SPEC, crate::common::RW>::from_ptr(
172 self._svd2pac_as_ptr().add(448usize),
173 )
174 }
175 }
176
177 #[doc = "SYS Event Link Setting Register"]
178 #[inline(always)]
179 pub const fn selsr0(
180 &self,
181 ) -> &'static crate::common::Reg<self::Selsr0_SPEC, crate::common::RW> {
182 unsafe {
183 crate::common::Reg::<self::Selsr0_SPEC, crate::common::RW>::from_ptr(
184 self._svd2pac_as_ptr().add(512usize),
185 )
186 }
187 }
188
189 #[doc = "ICU Event Link Setting Register %s"]
190 #[inline(always)]
191 pub const fn ielsr(
192 &self,
193 ) -> &'static crate::common::ClusterRegisterArray<
194 crate::common::Reg<self::Ielsr_SPEC, crate::common::RW>,
195 32,
196 0x4,
197 > {
198 unsafe {
199 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x300usize))
200 }
201 }
202 #[inline(always)]
203 pub const fn ielsr0(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
204 unsafe {
205 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
206 self._svd2pac_as_ptr().add(0x300usize),
207 )
208 }
209 }
210 #[inline(always)]
211 pub const fn ielsr1(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
212 unsafe {
213 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
214 self._svd2pac_as_ptr().add(0x304usize),
215 )
216 }
217 }
218 #[inline(always)]
219 pub const fn ielsr2(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
220 unsafe {
221 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
222 self._svd2pac_as_ptr().add(0x308usize),
223 )
224 }
225 }
226 #[inline(always)]
227 pub const fn ielsr3(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
228 unsafe {
229 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
230 self._svd2pac_as_ptr().add(0x30cusize),
231 )
232 }
233 }
234 #[inline(always)]
235 pub const fn ielsr4(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
236 unsafe {
237 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
238 self._svd2pac_as_ptr().add(0x310usize),
239 )
240 }
241 }
242 #[inline(always)]
243 pub const fn ielsr5(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
244 unsafe {
245 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
246 self._svd2pac_as_ptr().add(0x314usize),
247 )
248 }
249 }
250 #[inline(always)]
251 pub const fn ielsr6(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
252 unsafe {
253 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
254 self._svd2pac_as_ptr().add(0x318usize),
255 )
256 }
257 }
258 #[inline(always)]
259 pub const fn ielsr7(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
260 unsafe {
261 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
262 self._svd2pac_as_ptr().add(0x31cusize),
263 )
264 }
265 }
266 #[inline(always)]
267 pub const fn ielsr8(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
268 unsafe {
269 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
270 self._svd2pac_as_ptr().add(0x320usize),
271 )
272 }
273 }
274 #[inline(always)]
275 pub const fn ielsr9(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
276 unsafe {
277 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
278 self._svd2pac_as_ptr().add(0x324usize),
279 )
280 }
281 }
282 #[inline(always)]
283 pub const fn ielsr10(
284 &self,
285 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
286 unsafe {
287 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
288 self._svd2pac_as_ptr().add(0x328usize),
289 )
290 }
291 }
292 #[inline(always)]
293 pub const fn ielsr11(
294 &self,
295 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
296 unsafe {
297 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
298 self._svd2pac_as_ptr().add(0x32cusize),
299 )
300 }
301 }
302 #[inline(always)]
303 pub const fn ielsr12(
304 &self,
305 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
306 unsafe {
307 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
308 self._svd2pac_as_ptr().add(0x330usize),
309 )
310 }
311 }
312 #[inline(always)]
313 pub const fn ielsr13(
314 &self,
315 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
316 unsafe {
317 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
318 self._svd2pac_as_ptr().add(0x334usize),
319 )
320 }
321 }
322 #[inline(always)]
323 pub const fn ielsr14(
324 &self,
325 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
326 unsafe {
327 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
328 self._svd2pac_as_ptr().add(0x338usize),
329 )
330 }
331 }
332 #[inline(always)]
333 pub const fn ielsr15(
334 &self,
335 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
336 unsafe {
337 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
338 self._svd2pac_as_ptr().add(0x33cusize),
339 )
340 }
341 }
342 #[inline(always)]
343 pub const fn ielsr16(
344 &self,
345 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
346 unsafe {
347 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
348 self._svd2pac_as_ptr().add(0x340usize),
349 )
350 }
351 }
352 #[inline(always)]
353 pub const fn ielsr17(
354 &self,
355 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
356 unsafe {
357 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
358 self._svd2pac_as_ptr().add(0x344usize),
359 )
360 }
361 }
362 #[inline(always)]
363 pub const fn ielsr18(
364 &self,
365 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
366 unsafe {
367 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
368 self._svd2pac_as_ptr().add(0x348usize),
369 )
370 }
371 }
372 #[inline(always)]
373 pub const fn ielsr19(
374 &self,
375 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
376 unsafe {
377 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
378 self._svd2pac_as_ptr().add(0x34cusize),
379 )
380 }
381 }
382 #[inline(always)]
383 pub const fn ielsr20(
384 &self,
385 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
386 unsafe {
387 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
388 self._svd2pac_as_ptr().add(0x350usize),
389 )
390 }
391 }
392 #[inline(always)]
393 pub const fn ielsr21(
394 &self,
395 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
396 unsafe {
397 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
398 self._svd2pac_as_ptr().add(0x354usize),
399 )
400 }
401 }
402 #[inline(always)]
403 pub const fn ielsr22(
404 &self,
405 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
406 unsafe {
407 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
408 self._svd2pac_as_ptr().add(0x358usize),
409 )
410 }
411 }
412 #[inline(always)]
413 pub const fn ielsr23(
414 &self,
415 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
416 unsafe {
417 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
418 self._svd2pac_as_ptr().add(0x35cusize),
419 )
420 }
421 }
422 #[inline(always)]
423 pub const fn ielsr24(
424 &self,
425 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
426 unsafe {
427 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
428 self._svd2pac_as_ptr().add(0x360usize),
429 )
430 }
431 }
432 #[inline(always)]
433 pub const fn ielsr25(
434 &self,
435 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
436 unsafe {
437 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
438 self._svd2pac_as_ptr().add(0x364usize),
439 )
440 }
441 }
442 #[inline(always)]
443 pub const fn ielsr26(
444 &self,
445 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
446 unsafe {
447 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
448 self._svd2pac_as_ptr().add(0x368usize),
449 )
450 }
451 }
452 #[inline(always)]
453 pub const fn ielsr27(
454 &self,
455 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
456 unsafe {
457 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
458 self._svd2pac_as_ptr().add(0x36cusize),
459 )
460 }
461 }
462 #[inline(always)]
463 pub const fn ielsr28(
464 &self,
465 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
466 unsafe {
467 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
468 self._svd2pac_as_ptr().add(0x370usize),
469 )
470 }
471 }
472 #[inline(always)]
473 pub const fn ielsr29(
474 &self,
475 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
476 unsafe {
477 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
478 self._svd2pac_as_ptr().add(0x374usize),
479 )
480 }
481 }
482 #[inline(always)]
483 pub const fn ielsr30(
484 &self,
485 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
486 unsafe {
487 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
488 self._svd2pac_as_ptr().add(0x378usize),
489 )
490 }
491 }
492 #[inline(always)]
493 pub const fn ielsr31(
494 &self,
495 ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
496 unsafe {
497 crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
498 self._svd2pac_as_ptr().add(0x37cusize),
499 )
500 }
501 }
502}
503#[doc(hidden)]
504#[derive(Copy, Clone, Eq, PartialEq)]
505pub struct Irqcr_SPEC;
506impl crate::sealed::RegSpec for Irqcr_SPEC {
507 type DataType = u8;
508}
509
510#[doc = "IRQ Control Register %s"]
511pub type Irqcr = crate::RegValueT<Irqcr_SPEC>;
512
513impl Irqcr {
514 #[doc = "IRQi Detection Sense Select"]
515 #[inline(always)]
516 pub fn irqmd(
517 self,
518 ) -> crate::common::RegisterField<
519 0,
520 0x3,
521 1,
522 0,
523 irqcr::Irqmd,
524 irqcr::Irqmd,
525 Irqcr_SPEC,
526 crate::common::RW,
527 > {
528 crate::common::RegisterField::<
529 0,
530 0x3,
531 1,
532 0,
533 irqcr::Irqmd,
534 irqcr::Irqmd,
535 Irqcr_SPEC,
536 crate::common::RW,
537 >::from_register(self, 0)
538 }
539
540 #[doc = "IRQi Digital Filter Sampling Clock Select"]
541 #[inline(always)]
542 pub fn fclksel(
543 self,
544 ) -> crate::common::RegisterField<
545 4,
546 0x3,
547 1,
548 0,
549 irqcr::Fclksel,
550 irqcr::Fclksel,
551 Irqcr_SPEC,
552 crate::common::RW,
553 > {
554 crate::common::RegisterField::<
555 4,
556 0x3,
557 1,
558 0,
559 irqcr::Fclksel,
560 irqcr::Fclksel,
561 Irqcr_SPEC,
562 crate::common::RW,
563 >::from_register(self, 0)
564 }
565
566 #[doc = "IRQi Digital Filter Enable"]
567 #[inline(always)]
568 pub fn flten(
569 self,
570 ) -> crate::common::RegisterField<
571 7,
572 0x1,
573 1,
574 0,
575 irqcr::Flten,
576 irqcr::Flten,
577 Irqcr_SPEC,
578 crate::common::RW,
579 > {
580 crate::common::RegisterField::<
581 7,
582 0x1,
583 1,
584 0,
585 irqcr::Flten,
586 irqcr::Flten,
587 Irqcr_SPEC,
588 crate::common::RW,
589 >::from_register(self, 0)
590 }
591}
592impl ::core::default::Default for Irqcr {
593 #[inline(always)]
594 fn default() -> Irqcr {
595 <crate::RegValueT<Irqcr_SPEC> as RegisterValue<_>>::new(0)
596 }
597}
598pub mod irqcr {
599
600 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
601 pub struct Irqmd_SPEC;
602 pub type Irqmd = crate::EnumBitfieldStruct<u8, Irqmd_SPEC>;
603 impl Irqmd {
604 #[doc = "Falling edge"]
605 pub const _00: Self = Self::new(0);
606
607 #[doc = "Rising edge"]
608 pub const _01: Self = Self::new(1);
609
610 #[doc = "Rising and falling edges"]
611 pub const _10: Self = Self::new(2);
612
613 #[doc = "Low level"]
614 pub const _11: Self = Self::new(3);
615 }
616 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
617 pub struct Fclksel_SPEC;
618 pub type Fclksel = crate::EnumBitfieldStruct<u8, Fclksel_SPEC>;
619 impl Fclksel {
620 #[doc = "PCLKB"]
621 pub const _00: Self = Self::new(0);
622
623 #[doc = "PCLKB/8"]
624 pub const _01: Self = Self::new(1);
625
626 #[doc = "PCLKB/32"]
627 pub const _10: Self = Self::new(2);
628
629 #[doc = "PCLKB/64"]
630 pub const _11: Self = Self::new(3);
631 }
632 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
633 pub struct Flten_SPEC;
634 pub type Flten = crate::EnumBitfieldStruct<u8, Flten_SPEC>;
635 impl Flten {
636 #[doc = "Digital filter is disabled"]
637 pub const _0: Self = Self::new(0);
638
639 #[doc = "Digital filter is enabled."]
640 pub const _1: Self = Self::new(1);
641 }
642}
643#[doc(hidden)]
644#[derive(Copy, Clone, Eq, PartialEq)]
645pub struct Nmicr_SPEC;
646impl crate::sealed::RegSpec for Nmicr_SPEC {
647 type DataType = u8;
648}
649
650#[doc = "NMI Pin Interrupt Control Register"]
651pub type Nmicr = crate::RegValueT<Nmicr_SPEC>;
652
653impl Nmicr {
654 #[doc = "NMI Detection Set"]
655 #[inline(always)]
656 pub fn nmimd(
657 self,
658 ) -> crate::common::RegisterField<
659 0,
660 0x1,
661 1,
662 0,
663 nmicr::Nmimd,
664 nmicr::Nmimd,
665 Nmicr_SPEC,
666 crate::common::RW,
667 > {
668 crate::common::RegisterField::<
669 0,
670 0x1,
671 1,
672 0,
673 nmicr::Nmimd,
674 nmicr::Nmimd,
675 Nmicr_SPEC,
676 crate::common::RW,
677 >::from_register(self, 0)
678 }
679
680 #[doc = "NMI Digital Filter Sampling Clock Select"]
681 #[inline(always)]
682 pub fn nfclksel(
683 self,
684 ) -> crate::common::RegisterField<
685 4,
686 0x3,
687 1,
688 0,
689 nmicr::Nfclksel,
690 nmicr::Nfclksel,
691 Nmicr_SPEC,
692 crate::common::RW,
693 > {
694 crate::common::RegisterField::<
695 4,
696 0x3,
697 1,
698 0,
699 nmicr::Nfclksel,
700 nmicr::Nfclksel,
701 Nmicr_SPEC,
702 crate::common::RW,
703 >::from_register(self, 0)
704 }
705
706 #[doc = "NMI Digital Filter Enable"]
707 #[inline(always)]
708 pub fn nflten(
709 self,
710 ) -> crate::common::RegisterField<
711 7,
712 0x1,
713 1,
714 0,
715 nmicr::Nflten,
716 nmicr::Nflten,
717 Nmicr_SPEC,
718 crate::common::RW,
719 > {
720 crate::common::RegisterField::<
721 7,
722 0x1,
723 1,
724 0,
725 nmicr::Nflten,
726 nmicr::Nflten,
727 Nmicr_SPEC,
728 crate::common::RW,
729 >::from_register(self, 0)
730 }
731}
732impl ::core::default::Default for Nmicr {
733 #[inline(always)]
734 fn default() -> Nmicr {
735 <crate::RegValueT<Nmicr_SPEC> as RegisterValue<_>>::new(0)
736 }
737}
738pub mod nmicr {
739
740 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
741 pub struct Nmimd_SPEC;
742 pub type Nmimd = crate::EnumBitfieldStruct<u8, Nmimd_SPEC>;
743 impl Nmimd {
744 #[doc = "Falling edge"]
745 pub const _0: Self = Self::new(0);
746
747 #[doc = "Rising edge"]
748 pub const _1: Self = Self::new(1);
749 }
750 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
751 pub struct Nfclksel_SPEC;
752 pub type Nfclksel = crate::EnumBitfieldStruct<u8, Nfclksel_SPEC>;
753 impl Nfclksel {
754 #[doc = "PCLKB"]
755 pub const _00: Self = Self::new(0);
756
757 #[doc = "PCLKB/8"]
758 pub const _01: Self = Self::new(1);
759
760 #[doc = "PCLKB/32"]
761 pub const _10: Self = Self::new(2);
762
763 #[doc = "PCLKB/64"]
764 pub const _11: Self = Self::new(3);
765 }
766 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
767 pub struct Nflten_SPEC;
768 pub type Nflten = crate::EnumBitfieldStruct<u8, Nflten_SPEC>;
769 impl Nflten {
770 #[doc = "Disabled."]
771 pub const _0: Self = Self::new(0);
772
773 #[doc = "Enabled."]
774 pub const _1: Self = Self::new(1);
775 }
776}
777#[doc(hidden)]
778#[derive(Copy, Clone, Eq, PartialEq)]
779pub struct Nmier_SPEC;
780impl crate::sealed::RegSpec for Nmier_SPEC {
781 type DataType = u16;
782}
783
784#[doc = "Non-Maskable Interrupt Enable Register"]
785pub type Nmier = crate::RegValueT<Nmier_SPEC>;
786
787impl Nmier {
788 #[doc = "IWDT Underflow/Refresh Error Interrupt Enable"]
789 #[inline(always)]
790 pub fn iwdten(
791 self,
792 ) -> crate::common::RegisterField<
793 0,
794 0x1,
795 1,
796 0,
797 nmier::Iwdten,
798 nmier::Iwdten,
799 Nmier_SPEC,
800 crate::common::RW,
801 > {
802 crate::common::RegisterField::<
803 0,
804 0x1,
805 1,
806 0,
807 nmier::Iwdten,
808 nmier::Iwdten,
809 Nmier_SPEC,
810 crate::common::RW,
811 >::from_register(self, 0)
812 }
813
814 #[doc = "WDT Underflow/Refresh Error Interrupt Enable"]
815 #[inline(always)]
816 pub fn wdten(
817 self,
818 ) -> crate::common::RegisterField<
819 1,
820 0x1,
821 1,
822 0,
823 nmier::Wdten,
824 nmier::Wdten,
825 Nmier_SPEC,
826 crate::common::RW,
827 > {
828 crate::common::RegisterField::<
829 1,
830 0x1,
831 1,
832 0,
833 nmier::Wdten,
834 nmier::Wdten,
835 Nmier_SPEC,
836 crate::common::RW,
837 >::from_register(self, 0)
838 }
839
840 #[doc = "Voltage monitor 1 Interrupt Enable"]
841 #[inline(always)]
842 pub fn lvd1en(
843 self,
844 ) -> crate::common::RegisterField<
845 2,
846 0x1,
847 1,
848 0,
849 nmier::Lvd1En,
850 nmier::Lvd1En,
851 Nmier_SPEC,
852 crate::common::RW,
853 > {
854 crate::common::RegisterField::<
855 2,
856 0x1,
857 1,
858 0,
859 nmier::Lvd1En,
860 nmier::Lvd1En,
861 Nmier_SPEC,
862 crate::common::RW,
863 >::from_register(self, 0)
864 }
865
866 #[doc = "Voltage monitor 2 Interrupt Enable"]
867 #[inline(always)]
868 pub fn lvd2en(
869 self,
870 ) -> crate::common::RegisterField<
871 3,
872 0x1,
873 1,
874 0,
875 nmier::Lvd2En,
876 nmier::Lvd2En,
877 Nmier_SPEC,
878 crate::common::RW,
879 > {
880 crate::common::RegisterField::<
881 3,
882 0x1,
883 1,
884 0,
885 nmier::Lvd2En,
886 nmier::Lvd2En,
887 Nmier_SPEC,
888 crate::common::RW,
889 >::from_register(self, 0)
890 }
891
892 #[doc = "Main Clock Oscillation Stop Detection Interrupt Enable"]
893 #[inline(always)]
894 pub fn osten(
895 self,
896 ) -> crate::common::RegisterField<
897 6,
898 0x1,
899 1,
900 0,
901 nmier::Osten,
902 nmier::Osten,
903 Nmier_SPEC,
904 crate::common::RW,
905 > {
906 crate::common::RegisterField::<
907 6,
908 0x1,
909 1,
910 0,
911 nmier::Osten,
912 nmier::Osten,
913 Nmier_SPEC,
914 crate::common::RW,
915 >::from_register(self, 0)
916 }
917
918 #[doc = "NMI Pin Interrupt Enable"]
919 #[inline(always)]
920 pub fn nmien(
921 self,
922 ) -> crate::common::RegisterField<
923 7,
924 0x1,
925 1,
926 0,
927 nmier::Nmien,
928 nmier::Nmien,
929 Nmier_SPEC,
930 crate::common::RW,
931 > {
932 crate::common::RegisterField::<
933 7,
934 0x1,
935 1,
936 0,
937 nmier::Nmien,
938 nmier::Nmien,
939 Nmier_SPEC,
940 crate::common::RW,
941 >::from_register(self, 0)
942 }
943
944 #[doc = "SRAM Parity Error Interrupt Enable"]
945 #[inline(always)]
946 pub fn rpeen(
947 self,
948 ) -> crate::common::RegisterField<
949 8,
950 0x1,
951 1,
952 0,
953 nmier::Rpeen,
954 nmier::Rpeen,
955 Nmier_SPEC,
956 crate::common::RW,
957 > {
958 crate::common::RegisterField::<
959 8,
960 0x1,
961 1,
962 0,
963 nmier::Rpeen,
964 nmier::Rpeen,
965 Nmier_SPEC,
966 crate::common::RW,
967 >::from_register(self, 0)
968 }
969
970 #[doc = "Bus Slave MPU Error Interrupt Enable"]
971 #[inline(always)]
972 pub fn bussen(
973 self,
974 ) -> crate::common::RegisterField<
975 10,
976 0x1,
977 1,
978 0,
979 nmier::Bussen,
980 nmier::Bussen,
981 Nmier_SPEC,
982 crate::common::RW,
983 > {
984 crate::common::RegisterField::<
985 10,
986 0x1,
987 1,
988 0,
989 nmier::Bussen,
990 nmier::Bussen,
991 Nmier_SPEC,
992 crate::common::RW,
993 >::from_register(self, 0)
994 }
995
996 #[doc = "Bus Master MPU Error Interrupt Enable"]
997 #[inline(always)]
998 pub fn busmen(
999 self,
1000 ) -> crate::common::RegisterField<
1001 11,
1002 0x1,
1003 1,
1004 0,
1005 nmier::Busmen,
1006 nmier::Busmen,
1007 Nmier_SPEC,
1008 crate::common::RW,
1009 > {
1010 crate::common::RegisterField::<
1011 11,
1012 0x1,
1013 1,
1014 0,
1015 nmier::Busmen,
1016 nmier::Busmen,
1017 Nmier_SPEC,
1018 crate::common::RW,
1019 >::from_register(self, 0)
1020 }
1021
1022 #[doc = "CPU Stack Pointer Monitor Interrupt Enable"]
1023 #[inline(always)]
1024 pub fn speen(
1025 self,
1026 ) -> crate::common::RegisterField<
1027 12,
1028 0x1,
1029 1,
1030 0,
1031 nmier::Speen,
1032 nmier::Speen,
1033 Nmier_SPEC,
1034 crate::common::RW,
1035 > {
1036 crate::common::RegisterField::<
1037 12,
1038 0x1,
1039 1,
1040 0,
1041 nmier::Speen,
1042 nmier::Speen,
1043 Nmier_SPEC,
1044 crate::common::RW,
1045 >::from_register(self, 0)
1046 }
1047}
1048impl ::core::default::Default for Nmier {
1049 #[inline(always)]
1050 fn default() -> Nmier {
1051 <crate::RegValueT<Nmier_SPEC> as RegisterValue<_>>::new(0)
1052 }
1053}
1054pub mod nmier {
1055
1056 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1057 pub struct Iwdten_SPEC;
1058 pub type Iwdten = crate::EnumBitfieldStruct<u8, Iwdten_SPEC>;
1059 impl Iwdten {
1060 #[doc = "Disabled"]
1061 pub const _0: Self = Self::new(0);
1062
1063 #[doc = "Enabled."]
1064 pub const _1: Self = Self::new(1);
1065 }
1066 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1067 pub struct Wdten_SPEC;
1068 pub type Wdten = crate::EnumBitfieldStruct<u8, Wdten_SPEC>;
1069 impl Wdten {
1070 #[doc = "Disabled"]
1071 pub const _0: Self = Self::new(0);
1072
1073 #[doc = "Enabled"]
1074 pub const _1: Self = Self::new(1);
1075 }
1076 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1077 pub struct Lvd1En_SPEC;
1078 pub type Lvd1En = crate::EnumBitfieldStruct<u8, Lvd1En_SPEC>;
1079 impl Lvd1En {
1080 #[doc = "Disabled"]
1081 pub const _0: Self = Self::new(0);
1082
1083 #[doc = "Enabled"]
1084 pub const _1: Self = Self::new(1);
1085 }
1086 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1087 pub struct Lvd2En_SPEC;
1088 pub type Lvd2En = crate::EnumBitfieldStruct<u8, Lvd2En_SPEC>;
1089 impl Lvd2En {
1090 #[doc = "Disabled"]
1091 pub const _0: Self = Self::new(0);
1092
1093 #[doc = "Enabled"]
1094 pub const _1: Self = Self::new(1);
1095 }
1096 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1097 pub struct Osten_SPEC;
1098 pub type Osten = crate::EnumBitfieldStruct<u8, Osten_SPEC>;
1099 impl Osten {
1100 #[doc = "Disabled"]
1101 pub const _0: Self = Self::new(0);
1102
1103 #[doc = "Enabled"]
1104 pub const _1: Self = Self::new(1);
1105 }
1106 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1107 pub struct Nmien_SPEC;
1108 pub type Nmien = crate::EnumBitfieldStruct<u8, Nmien_SPEC>;
1109 impl Nmien {
1110 #[doc = "Disabled"]
1111 pub const _0: Self = Self::new(0);
1112
1113 #[doc = "Enabled"]
1114 pub const _1: Self = Self::new(1);
1115 }
1116 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1117 pub struct Rpeen_SPEC;
1118 pub type Rpeen = crate::EnumBitfieldStruct<u8, Rpeen_SPEC>;
1119 impl Rpeen {
1120 #[doc = "Disabled"]
1121 pub const _0: Self = Self::new(0);
1122
1123 #[doc = "Enabled"]
1124 pub const _1: Self = Self::new(1);
1125 }
1126 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1127 pub struct Bussen_SPEC;
1128 pub type Bussen = crate::EnumBitfieldStruct<u8, Bussen_SPEC>;
1129 impl Bussen {
1130 #[doc = "Disabled"]
1131 pub const _0: Self = Self::new(0);
1132
1133 #[doc = "Enabled"]
1134 pub const _1: Self = Self::new(1);
1135 }
1136 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1137 pub struct Busmen_SPEC;
1138 pub type Busmen = crate::EnumBitfieldStruct<u8, Busmen_SPEC>;
1139 impl Busmen {
1140 #[doc = "Disabled"]
1141 pub const _0: Self = Self::new(0);
1142
1143 #[doc = "Enabled"]
1144 pub const _1: Self = Self::new(1);
1145 }
1146 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1147 pub struct Speen_SPEC;
1148 pub type Speen = crate::EnumBitfieldStruct<u8, Speen_SPEC>;
1149 impl Speen {
1150 #[doc = "Disabled"]
1151 pub const _0: Self = Self::new(0);
1152
1153 #[doc = "Enabled"]
1154 pub const _1: Self = Self::new(1);
1155 }
1156}
1157#[doc(hidden)]
1158#[derive(Copy, Clone, Eq, PartialEq)]
1159pub struct Nmiclr_SPEC;
1160impl crate::sealed::RegSpec for Nmiclr_SPEC {
1161 type DataType = u16;
1162}
1163
1164#[doc = "Non-Maskable Interrupt Status Clear Register"]
1165pub type Nmiclr = crate::RegValueT<Nmiclr_SPEC>;
1166
1167impl Nmiclr {
1168 #[doc = "IWDT Underflow/Refresh Error Interrupt Status Flag Clear"]
1169 #[inline(always)]
1170 pub fn iwdtclr(
1171 self,
1172 ) -> crate::common::RegisterField<
1173 0,
1174 0x1,
1175 1,
1176 0,
1177 nmiclr::Iwdtclr,
1178 nmiclr::Iwdtclr,
1179 Nmiclr_SPEC,
1180 crate::common::RW,
1181 > {
1182 crate::common::RegisterField::<
1183 0,
1184 0x1,
1185 1,
1186 0,
1187 nmiclr::Iwdtclr,
1188 nmiclr::Iwdtclr,
1189 Nmiclr_SPEC,
1190 crate::common::RW,
1191 >::from_register(self, 0)
1192 }
1193
1194 #[doc = "WDT Underflow/Refresh Error Interrupt Status Flag Clear"]
1195 #[inline(always)]
1196 pub fn wdtclr(
1197 self,
1198 ) -> crate::common::RegisterField<
1199 1,
1200 0x1,
1201 1,
1202 0,
1203 nmiclr::Wdtclr,
1204 nmiclr::Wdtclr,
1205 Nmiclr_SPEC,
1206 crate::common::RW,
1207 > {
1208 crate::common::RegisterField::<
1209 1,
1210 0x1,
1211 1,
1212 0,
1213 nmiclr::Wdtclr,
1214 nmiclr::Wdtclr,
1215 Nmiclr_SPEC,
1216 crate::common::RW,
1217 >::from_register(self, 0)
1218 }
1219
1220 #[doc = "Voltage Monitor 1 Interrupt Status Flag Clear"]
1221 #[inline(always)]
1222 pub fn lvd1clr(
1223 self,
1224 ) -> crate::common::RegisterField<
1225 2,
1226 0x1,
1227 1,
1228 0,
1229 nmiclr::Lvd1Clr,
1230 nmiclr::Lvd1Clr,
1231 Nmiclr_SPEC,
1232 crate::common::RW,
1233 > {
1234 crate::common::RegisterField::<
1235 2,
1236 0x1,
1237 1,
1238 0,
1239 nmiclr::Lvd1Clr,
1240 nmiclr::Lvd1Clr,
1241 Nmiclr_SPEC,
1242 crate::common::RW,
1243 >::from_register(self, 0)
1244 }
1245
1246 #[doc = "Voltage Monitor 2 Interrupt Status Flag Clear"]
1247 #[inline(always)]
1248 pub fn lvd2clr(
1249 self,
1250 ) -> crate::common::RegisterField<
1251 3,
1252 0x1,
1253 1,
1254 0,
1255 nmiclr::Lvd2Clr,
1256 nmiclr::Lvd2Clr,
1257 Nmiclr_SPEC,
1258 crate::common::RW,
1259 > {
1260 crate::common::RegisterField::<
1261 3,
1262 0x1,
1263 1,
1264 0,
1265 nmiclr::Lvd2Clr,
1266 nmiclr::Lvd2Clr,
1267 Nmiclr_SPEC,
1268 crate::common::RW,
1269 >::from_register(self, 0)
1270 }
1271
1272 #[doc = "Oscillation Stop Detection Interrupt Status Flag Clear"]
1273 #[inline(always)]
1274 pub fn ostclr(
1275 self,
1276 ) -> crate::common::RegisterField<
1277 6,
1278 0x1,
1279 1,
1280 0,
1281 nmiclr::Ostclr,
1282 nmiclr::Ostclr,
1283 Nmiclr_SPEC,
1284 crate::common::RW,
1285 > {
1286 crate::common::RegisterField::<
1287 6,
1288 0x1,
1289 1,
1290 0,
1291 nmiclr::Ostclr,
1292 nmiclr::Ostclr,
1293 Nmiclr_SPEC,
1294 crate::common::RW,
1295 >::from_register(self, 0)
1296 }
1297
1298 #[doc = "NMI Pin Interrupt Status Flag Clear"]
1299 #[inline(always)]
1300 pub fn nmiclr(
1301 self,
1302 ) -> crate::common::RegisterField<
1303 7,
1304 0x1,
1305 1,
1306 0,
1307 nmiclr::Nmiclr,
1308 nmiclr::Nmiclr,
1309 Nmiclr_SPEC,
1310 crate::common::RW,
1311 > {
1312 crate::common::RegisterField::<
1313 7,
1314 0x1,
1315 1,
1316 0,
1317 nmiclr::Nmiclr,
1318 nmiclr::Nmiclr,
1319 Nmiclr_SPEC,
1320 crate::common::RW,
1321 >::from_register(self, 0)
1322 }
1323
1324 #[doc = "SRAM Parity Error Interrupt Status Flag Clear"]
1325 #[inline(always)]
1326 pub fn rpeclr(
1327 self,
1328 ) -> crate::common::RegisterField<
1329 8,
1330 0x1,
1331 1,
1332 0,
1333 nmiclr::Rpeclr,
1334 nmiclr::Rpeclr,
1335 Nmiclr_SPEC,
1336 crate::common::RW,
1337 > {
1338 crate::common::RegisterField::<
1339 8,
1340 0x1,
1341 1,
1342 0,
1343 nmiclr::Rpeclr,
1344 nmiclr::Rpeclr,
1345 Nmiclr_SPEC,
1346 crate::common::RW,
1347 >::from_register(self, 0)
1348 }
1349
1350 #[doc = "Bus Slave MPU Error Interrupt Status Flag Clear"]
1351 #[inline(always)]
1352 pub fn bussclr(
1353 self,
1354 ) -> crate::common::RegisterField<
1355 10,
1356 0x1,
1357 1,
1358 0,
1359 nmiclr::Bussclr,
1360 nmiclr::Bussclr,
1361 Nmiclr_SPEC,
1362 crate::common::RW,
1363 > {
1364 crate::common::RegisterField::<
1365 10,
1366 0x1,
1367 1,
1368 0,
1369 nmiclr::Bussclr,
1370 nmiclr::Bussclr,
1371 Nmiclr_SPEC,
1372 crate::common::RW,
1373 >::from_register(self, 0)
1374 }
1375
1376 #[doc = "Bus Master MPU Error Interrupt Status Flag Clear"]
1377 #[inline(always)]
1378 pub fn busmclr(
1379 self,
1380 ) -> crate::common::RegisterField<
1381 11,
1382 0x1,
1383 1,
1384 0,
1385 nmiclr::Busmclr,
1386 nmiclr::Busmclr,
1387 Nmiclr_SPEC,
1388 crate::common::RW,
1389 > {
1390 crate::common::RegisterField::<
1391 11,
1392 0x1,
1393 1,
1394 0,
1395 nmiclr::Busmclr,
1396 nmiclr::Busmclr,
1397 Nmiclr_SPEC,
1398 crate::common::RW,
1399 >::from_register(self, 0)
1400 }
1401
1402 #[doc = "CPU Stack Pointer Monitor Interrupt Status Flag Clear"]
1403 #[inline(always)]
1404 pub fn speclr(
1405 self,
1406 ) -> crate::common::RegisterField<
1407 12,
1408 0x1,
1409 1,
1410 0,
1411 nmiclr::Speclr,
1412 nmiclr::Speclr,
1413 Nmiclr_SPEC,
1414 crate::common::RW,
1415 > {
1416 crate::common::RegisterField::<
1417 12,
1418 0x1,
1419 1,
1420 0,
1421 nmiclr::Speclr,
1422 nmiclr::Speclr,
1423 Nmiclr_SPEC,
1424 crate::common::RW,
1425 >::from_register(self, 0)
1426 }
1427}
1428impl ::core::default::Default for Nmiclr {
1429 #[inline(always)]
1430 fn default() -> Nmiclr {
1431 <crate::RegValueT<Nmiclr_SPEC> as RegisterValue<_>>::new(0)
1432 }
1433}
1434pub mod nmiclr {
1435
1436 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1437 pub struct Iwdtclr_SPEC;
1438 pub type Iwdtclr = crate::EnumBitfieldStruct<u8, Iwdtclr_SPEC>;
1439 impl Iwdtclr {
1440 #[doc = "No effect"]
1441 pub const _0: Self = Self::new(0);
1442
1443 #[doc = "Clear the NMISR.IWDTST flag"]
1444 pub const _1: Self = Self::new(1);
1445 }
1446 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1447 pub struct Wdtclr_SPEC;
1448 pub type Wdtclr = crate::EnumBitfieldStruct<u8, Wdtclr_SPEC>;
1449 impl Wdtclr {
1450 #[doc = "No effect"]
1451 pub const _0: Self = Self::new(0);
1452
1453 #[doc = "Clear the NMISR.WDTST flag"]
1454 pub const _1: Self = Self::new(1);
1455 }
1456 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1457 pub struct Lvd1Clr_SPEC;
1458 pub type Lvd1Clr = crate::EnumBitfieldStruct<u8, Lvd1Clr_SPEC>;
1459 impl Lvd1Clr {
1460 #[doc = "No effect"]
1461 pub const _0: Self = Self::new(0);
1462
1463 #[doc = "Clear the NMISR.LVD1ST flag"]
1464 pub const _1: Self = Self::new(1);
1465 }
1466 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1467 pub struct Lvd2Clr_SPEC;
1468 pub type Lvd2Clr = crate::EnumBitfieldStruct<u8, Lvd2Clr_SPEC>;
1469 impl Lvd2Clr {
1470 #[doc = "No effect"]
1471 pub const _0: Self = Self::new(0);
1472
1473 #[doc = "Clear the NMISR.LVD2ST flag."]
1474 pub const _1: Self = Self::new(1);
1475 }
1476 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1477 pub struct Ostclr_SPEC;
1478 pub type Ostclr = crate::EnumBitfieldStruct<u8, Ostclr_SPEC>;
1479 impl Ostclr {
1480 #[doc = "No effect"]
1481 pub const _0: Self = Self::new(0);
1482
1483 #[doc = "Clear the NMISR.OSTST flag"]
1484 pub const _1: Self = Self::new(1);
1485 }
1486 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1487 pub struct Nmiclr_SPEC;
1488 pub type Nmiclr = crate::EnumBitfieldStruct<u8, Nmiclr_SPEC>;
1489 impl Nmiclr {
1490 #[doc = "No effect"]
1491 pub const _0: Self = Self::new(0);
1492
1493 #[doc = "Clear the NMISR.NMIST flag"]
1494 pub const _1: Self = Self::new(1);
1495 }
1496 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1497 pub struct Rpeclr_SPEC;
1498 pub type Rpeclr = crate::EnumBitfieldStruct<u8, Rpeclr_SPEC>;
1499 impl Rpeclr {
1500 #[doc = "No effect"]
1501 pub const _0: Self = Self::new(0);
1502
1503 #[doc = "Clear the NMISR.RPEST flag"]
1504 pub const _1: Self = Self::new(1);
1505 }
1506 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1507 pub struct Bussclr_SPEC;
1508 pub type Bussclr = crate::EnumBitfieldStruct<u8, Bussclr_SPEC>;
1509 impl Bussclr {
1510 #[doc = "No effect"]
1511 pub const _0: Self = Self::new(0);
1512
1513 #[doc = "Clear the NMISR.BUSSST flag"]
1514 pub const _1: Self = Self::new(1);
1515 }
1516 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1517 pub struct Busmclr_SPEC;
1518 pub type Busmclr = crate::EnumBitfieldStruct<u8, Busmclr_SPEC>;
1519 impl Busmclr {
1520 #[doc = "No effect"]
1521 pub const _0: Self = Self::new(0);
1522
1523 #[doc = "Clear the NMISR.BUSMST flag"]
1524 pub const _1: Self = Self::new(1);
1525 }
1526 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1527 pub struct Speclr_SPEC;
1528 pub type Speclr = crate::EnumBitfieldStruct<u8, Speclr_SPEC>;
1529 impl Speclr {
1530 #[doc = "No effect"]
1531 pub const _0: Self = Self::new(0);
1532
1533 #[doc = "Clear the NMISR.SPEST flag"]
1534 pub const _1: Self = Self::new(1);
1535 }
1536}
1537#[doc(hidden)]
1538#[derive(Copy, Clone, Eq, PartialEq)]
1539pub struct Nmisr_SPEC;
1540impl crate::sealed::RegSpec for Nmisr_SPEC {
1541 type DataType = u16;
1542}
1543
1544#[doc = "Non-Maskable Interrupt Status Register"]
1545pub type Nmisr = crate::RegValueT<Nmisr_SPEC>;
1546
1547impl Nmisr {
1548 #[doc = "IWDT Underflow/Refresh Error Interrupt Status Flag"]
1549 #[inline(always)]
1550 pub fn iwdtst(
1551 self,
1552 ) -> crate::common::RegisterField<
1553 0,
1554 0x1,
1555 1,
1556 0,
1557 nmisr::Iwdtst,
1558 nmisr::Iwdtst,
1559 Nmisr_SPEC,
1560 crate::common::R,
1561 > {
1562 crate::common::RegisterField::<
1563 0,
1564 0x1,
1565 1,
1566 0,
1567 nmisr::Iwdtst,
1568 nmisr::Iwdtst,
1569 Nmisr_SPEC,
1570 crate::common::R,
1571 >::from_register(self, 0)
1572 }
1573
1574 #[doc = "WDT Underflow/Refresh Error Interrupt Status Flag"]
1575 #[inline(always)]
1576 pub fn wdtst(
1577 self,
1578 ) -> crate::common::RegisterField<
1579 1,
1580 0x1,
1581 1,
1582 0,
1583 nmisr::Wdtst,
1584 nmisr::Wdtst,
1585 Nmisr_SPEC,
1586 crate::common::R,
1587 > {
1588 crate::common::RegisterField::<
1589 1,
1590 0x1,
1591 1,
1592 0,
1593 nmisr::Wdtst,
1594 nmisr::Wdtst,
1595 Nmisr_SPEC,
1596 crate::common::R,
1597 >::from_register(self, 0)
1598 }
1599
1600 #[doc = "Voltage Monitor 1 Interrupt Status Flag"]
1601 #[inline(always)]
1602 pub fn lvd1st(
1603 self,
1604 ) -> crate::common::RegisterField<
1605 2,
1606 0x1,
1607 1,
1608 0,
1609 nmisr::Lvd1St,
1610 nmisr::Lvd1St,
1611 Nmisr_SPEC,
1612 crate::common::R,
1613 > {
1614 crate::common::RegisterField::<
1615 2,
1616 0x1,
1617 1,
1618 0,
1619 nmisr::Lvd1St,
1620 nmisr::Lvd1St,
1621 Nmisr_SPEC,
1622 crate::common::R,
1623 >::from_register(self, 0)
1624 }
1625
1626 #[doc = "Voltage Monitor 2 Interrupt Status Flag"]
1627 #[inline(always)]
1628 pub fn lvd2st(
1629 self,
1630 ) -> crate::common::RegisterField<
1631 3,
1632 0x1,
1633 1,
1634 0,
1635 nmisr::Lvd2St,
1636 nmisr::Lvd2St,
1637 Nmisr_SPEC,
1638 crate::common::R,
1639 > {
1640 crate::common::RegisterField::<
1641 3,
1642 0x1,
1643 1,
1644 0,
1645 nmisr::Lvd2St,
1646 nmisr::Lvd2St,
1647 Nmisr_SPEC,
1648 crate::common::R,
1649 >::from_register(self, 0)
1650 }
1651
1652 #[doc = "Main Clock Oscillation Stop Detection Interrupt Status Flag"]
1653 #[inline(always)]
1654 pub fn ostst(
1655 self,
1656 ) -> crate::common::RegisterField<
1657 6,
1658 0x1,
1659 1,
1660 0,
1661 nmisr::Ostst,
1662 nmisr::Ostst,
1663 Nmisr_SPEC,
1664 crate::common::R,
1665 > {
1666 crate::common::RegisterField::<
1667 6,
1668 0x1,
1669 1,
1670 0,
1671 nmisr::Ostst,
1672 nmisr::Ostst,
1673 Nmisr_SPEC,
1674 crate::common::R,
1675 >::from_register(self, 0)
1676 }
1677
1678 #[doc = "NMI Pin Interrupt Status Flag"]
1679 #[inline(always)]
1680 pub fn nmist(
1681 self,
1682 ) -> crate::common::RegisterField<
1683 7,
1684 0x1,
1685 1,
1686 0,
1687 nmisr::Nmist,
1688 nmisr::Nmist,
1689 Nmisr_SPEC,
1690 crate::common::R,
1691 > {
1692 crate::common::RegisterField::<
1693 7,
1694 0x1,
1695 1,
1696 0,
1697 nmisr::Nmist,
1698 nmisr::Nmist,
1699 Nmisr_SPEC,
1700 crate::common::R,
1701 >::from_register(self, 0)
1702 }
1703
1704 #[doc = "SRAM Parity Error Interrupt Status Flag"]
1705 #[inline(always)]
1706 pub fn rpest(
1707 self,
1708 ) -> crate::common::RegisterField<
1709 8,
1710 0x1,
1711 1,
1712 0,
1713 nmisr::Rpest,
1714 nmisr::Rpest,
1715 Nmisr_SPEC,
1716 crate::common::R,
1717 > {
1718 crate::common::RegisterField::<
1719 8,
1720 0x1,
1721 1,
1722 0,
1723 nmisr::Rpest,
1724 nmisr::Rpest,
1725 Nmisr_SPEC,
1726 crate::common::R,
1727 >::from_register(self, 0)
1728 }
1729
1730 #[doc = "Bus Slave MPU Error Interrupt Status Flag"]
1731 #[inline(always)]
1732 pub fn bussst(
1733 self,
1734 ) -> crate::common::RegisterField<
1735 10,
1736 0x1,
1737 1,
1738 0,
1739 nmisr::Bussst,
1740 nmisr::Bussst,
1741 Nmisr_SPEC,
1742 crate::common::R,
1743 > {
1744 crate::common::RegisterField::<
1745 10,
1746 0x1,
1747 1,
1748 0,
1749 nmisr::Bussst,
1750 nmisr::Bussst,
1751 Nmisr_SPEC,
1752 crate::common::R,
1753 >::from_register(self, 0)
1754 }
1755
1756 #[doc = "Bus Master MPU Error Interrupt Status Flag"]
1757 #[inline(always)]
1758 pub fn busmst(
1759 self,
1760 ) -> crate::common::RegisterField<
1761 11,
1762 0x1,
1763 1,
1764 0,
1765 nmisr::Busmst,
1766 nmisr::Busmst,
1767 Nmisr_SPEC,
1768 crate::common::R,
1769 > {
1770 crate::common::RegisterField::<
1771 11,
1772 0x1,
1773 1,
1774 0,
1775 nmisr::Busmst,
1776 nmisr::Busmst,
1777 Nmisr_SPEC,
1778 crate::common::R,
1779 >::from_register(self, 0)
1780 }
1781
1782 #[doc = "CPU Stack Pointer Monitor Interrupt Status Flag"]
1783 #[inline(always)]
1784 pub fn spest(
1785 self,
1786 ) -> crate::common::RegisterField<
1787 12,
1788 0x1,
1789 1,
1790 0,
1791 nmisr::Spest,
1792 nmisr::Spest,
1793 Nmisr_SPEC,
1794 crate::common::R,
1795 > {
1796 crate::common::RegisterField::<
1797 12,
1798 0x1,
1799 1,
1800 0,
1801 nmisr::Spest,
1802 nmisr::Spest,
1803 Nmisr_SPEC,
1804 crate::common::R,
1805 >::from_register(self, 0)
1806 }
1807}
1808impl ::core::default::Default for Nmisr {
1809 #[inline(always)]
1810 fn default() -> Nmisr {
1811 <crate::RegValueT<Nmisr_SPEC> as RegisterValue<_>>::new(0)
1812 }
1813}
1814pub mod nmisr {
1815
1816 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1817 pub struct Iwdtst_SPEC;
1818 pub type Iwdtst = crate::EnumBitfieldStruct<u8, Iwdtst_SPEC>;
1819 impl Iwdtst {
1820 #[doc = "Interrupt not requested"]
1821 pub const _0: Self = Self::new(0);
1822
1823 #[doc = "Interrupt requested"]
1824 pub const _1: Self = Self::new(1);
1825 }
1826 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1827 pub struct Wdtst_SPEC;
1828 pub type Wdtst = crate::EnumBitfieldStruct<u8, Wdtst_SPEC>;
1829 impl Wdtst {
1830 #[doc = "Interrupt not requested"]
1831 pub const _0: Self = Self::new(0);
1832
1833 #[doc = "Interrupt requested"]
1834 pub const _1: Self = Self::new(1);
1835 }
1836 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1837 pub struct Lvd1St_SPEC;
1838 pub type Lvd1St = crate::EnumBitfieldStruct<u8, Lvd1St_SPEC>;
1839 impl Lvd1St {
1840 #[doc = "Interrupt not requested"]
1841 pub const _0: Self = Self::new(0);
1842
1843 #[doc = "Interrupt requested"]
1844 pub const _1: Self = Self::new(1);
1845 }
1846 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1847 pub struct Lvd2St_SPEC;
1848 pub type Lvd2St = crate::EnumBitfieldStruct<u8, Lvd2St_SPEC>;
1849 impl Lvd2St {
1850 #[doc = "Interrupt not requested"]
1851 pub const _0: Self = Self::new(0);
1852
1853 #[doc = "Interrupt requested"]
1854 pub const _1: Self = Self::new(1);
1855 }
1856 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1857 pub struct Ostst_SPEC;
1858 pub type Ostst = crate::EnumBitfieldStruct<u8, Ostst_SPEC>;
1859 impl Ostst {
1860 #[doc = "Interrupt not requested for main clock oscillation stop"]
1861 pub const _0: Self = Self::new(0);
1862
1863 #[doc = "Interrupt requested for main clock oscillation stop"]
1864 pub const _1: Self = Self::new(1);
1865 }
1866 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1867 pub struct Nmist_SPEC;
1868 pub type Nmist = crate::EnumBitfieldStruct<u8, Nmist_SPEC>;
1869 impl Nmist {
1870 #[doc = "Interrupt not requested"]
1871 pub const _0: Self = Self::new(0);
1872
1873 #[doc = "Interrupt requested"]
1874 pub const _1: Self = Self::new(1);
1875 }
1876 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1877 pub struct Rpest_SPEC;
1878 pub type Rpest = crate::EnumBitfieldStruct<u8, Rpest_SPEC>;
1879 impl Rpest {
1880 #[doc = "Interrupt not requested"]
1881 pub const _0: Self = Self::new(0);
1882
1883 #[doc = "Interrupt requested"]
1884 pub const _1: Self = Self::new(1);
1885 }
1886 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1887 pub struct Bussst_SPEC;
1888 pub type Bussst = crate::EnumBitfieldStruct<u8, Bussst_SPEC>;
1889 impl Bussst {
1890 #[doc = "Interrupt not requested"]
1891 pub const _0: Self = Self::new(0);
1892
1893 #[doc = "Interrupt requested."]
1894 pub const _1: Self = Self::new(1);
1895 }
1896 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1897 pub struct Busmst_SPEC;
1898 pub type Busmst = crate::EnumBitfieldStruct<u8, Busmst_SPEC>;
1899 impl Busmst {
1900 #[doc = "Interrupt not requested"]
1901 pub const _0: Self = Self::new(0);
1902
1903 #[doc = "Interrupt requested"]
1904 pub const _1: Self = Self::new(1);
1905 }
1906 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1907 pub struct Spest_SPEC;
1908 pub type Spest = crate::EnumBitfieldStruct<u8, Spest_SPEC>;
1909 impl Spest {
1910 #[doc = "Interrupt not requested"]
1911 pub const _0: Self = Self::new(0);
1912
1913 #[doc = "Interrupt requested"]
1914 pub const _1: Self = Self::new(1);
1915 }
1916}
1917#[doc(hidden)]
1918#[derive(Copy, Clone, Eq, PartialEq)]
1919pub struct Wupen_SPEC;
1920impl crate::sealed::RegSpec for Wupen_SPEC {
1921 type DataType = u32;
1922}
1923
1924#[doc = "Wake Up Interrupt Enable Register"]
1925pub type Wupen = crate::RegValueT<Wupen_SPEC>;
1926
1927impl Wupen {
1928 #[doc = "IRQ Interrupt Software Standby/Snooze Mode Returns Enable"]
1929 #[inline(always)]
1930 pub fn irqwupen(
1931 self,
1932 ) -> crate::common::RegisterField<
1933 0,
1934 0xff,
1935 1,
1936 0,
1937 wupen::Irqwupen,
1938 wupen::Irqwupen,
1939 Wupen_SPEC,
1940 crate::common::RW,
1941 > {
1942 crate::common::RegisterField::<
1943 0,
1944 0xff,
1945 1,
1946 0,
1947 wupen::Irqwupen,
1948 wupen::Irqwupen,
1949 Wupen_SPEC,
1950 crate::common::RW,
1951 >::from_register(self, 0)
1952 }
1953
1954 #[doc = "IWDT Interrupt Software Standby/Snooze Mode Returns Enable"]
1955 #[inline(always)]
1956 pub fn iwdtwupen(
1957 self,
1958 ) -> crate::common::RegisterField<
1959 16,
1960 0x1,
1961 1,
1962 0,
1963 wupen::Iwdtwupen,
1964 wupen::Iwdtwupen,
1965 Wupen_SPEC,
1966 crate::common::RW,
1967 > {
1968 crate::common::RegisterField::<
1969 16,
1970 0x1,
1971 1,
1972 0,
1973 wupen::Iwdtwupen,
1974 wupen::Iwdtwupen,
1975 Wupen_SPEC,
1976 crate::common::RW,
1977 >::from_register(self, 0)
1978 }
1979
1980 #[doc = "Key Interrupt Software Standby/Snooze Mode Returns Enable"]
1981 #[inline(always)]
1982 pub fn keywupen(
1983 self,
1984 ) -> crate::common::RegisterField<
1985 17,
1986 0x1,
1987 1,
1988 0,
1989 wupen::Keywupen,
1990 wupen::Keywupen,
1991 Wupen_SPEC,
1992 crate::common::RW,
1993 > {
1994 crate::common::RegisterField::<
1995 17,
1996 0x1,
1997 1,
1998 0,
1999 wupen::Keywupen,
2000 wupen::Keywupen,
2001 Wupen_SPEC,
2002 crate::common::RW,
2003 >::from_register(self, 0)
2004 }
2005
2006 #[doc = "LVD1 Interrupt Software Standby/Snooze Mode Returns Enable"]
2007 #[inline(always)]
2008 pub fn lvd1wupen(
2009 self,
2010 ) -> crate::common::RegisterField<
2011 18,
2012 0x1,
2013 1,
2014 0,
2015 wupen::Lvd1Wupen,
2016 wupen::Lvd1Wupen,
2017 Wupen_SPEC,
2018 crate::common::RW,
2019 > {
2020 crate::common::RegisterField::<
2021 18,
2022 0x1,
2023 1,
2024 0,
2025 wupen::Lvd1Wupen,
2026 wupen::Lvd1Wupen,
2027 Wupen_SPEC,
2028 crate::common::RW,
2029 >::from_register(self, 0)
2030 }
2031
2032 #[doc = "LVD2 Interrupt Software Standby/Snooze Mode Returns Enable"]
2033 #[inline(always)]
2034 pub fn lvd2wupen(
2035 self,
2036 ) -> crate::common::RegisterField<
2037 19,
2038 0x1,
2039 1,
2040 0,
2041 wupen::Lvd2Wupen,
2042 wupen::Lvd2Wupen,
2043 Wupen_SPEC,
2044 crate::common::RW,
2045 > {
2046 crate::common::RegisterField::<
2047 19,
2048 0x1,
2049 1,
2050 0,
2051 wupen::Lvd2Wupen,
2052 wupen::Lvd2Wupen,
2053 Wupen_SPEC,
2054 crate::common::RW,
2055 >::from_register(self, 0)
2056 }
2057
2058 #[doc = "ACMPLP0 Interrupt Software Standby/Snooze Mode Returns Enable"]
2059 #[inline(always)]
2060 pub fn acmplp0wupen(
2061 self,
2062 ) -> crate::common::RegisterField<
2063 23,
2064 0x1,
2065 1,
2066 0,
2067 wupen::Acmplp0Wupen,
2068 wupen::Acmplp0Wupen,
2069 Wupen_SPEC,
2070 crate::common::RW,
2071 > {
2072 crate::common::RegisterField::<
2073 23,
2074 0x1,
2075 1,
2076 0,
2077 wupen::Acmplp0Wupen,
2078 wupen::Acmplp0Wupen,
2079 Wupen_SPEC,
2080 crate::common::RW,
2081 >::from_register(self, 0)
2082 }
2083
2084 #[doc = "RTC Alarm Interrupt Software Standby/Snooze Mode Returns Enable"]
2085 #[inline(always)]
2086 pub fn rtcalmwupen(
2087 self,
2088 ) -> crate::common::RegisterField<
2089 24,
2090 0x1,
2091 1,
2092 0,
2093 wupen::Rtcalmwupen,
2094 wupen::Rtcalmwupen,
2095 Wupen_SPEC,
2096 crate::common::RW,
2097 > {
2098 crate::common::RegisterField::<
2099 24,
2100 0x1,
2101 1,
2102 0,
2103 wupen::Rtcalmwupen,
2104 wupen::Rtcalmwupen,
2105 Wupen_SPEC,
2106 crate::common::RW,
2107 >::from_register(self, 0)
2108 }
2109
2110 #[doc = "RTC Period Interrupt Software Standby/Snooze Mode Returns Enable"]
2111 #[inline(always)]
2112 pub fn rtcprdwupen(
2113 self,
2114 ) -> crate::common::RegisterField<
2115 25,
2116 0x1,
2117 1,
2118 0,
2119 wupen::Rtcprdwupen,
2120 wupen::Rtcprdwupen,
2121 Wupen_SPEC,
2122 crate::common::RW,
2123 > {
2124 crate::common::RegisterField::<
2125 25,
2126 0x1,
2127 1,
2128 0,
2129 wupen::Rtcprdwupen,
2130 wupen::Rtcprdwupen,
2131 Wupen_SPEC,
2132 crate::common::RW,
2133 >::from_register(self, 0)
2134 }
2135
2136 #[doc = "AGT1 Underflow Interrupt Software Standby/Snooze Mode Returns Enable"]
2137 #[inline(always)]
2138 pub fn agt1udwupen(
2139 self,
2140 ) -> crate::common::RegisterField<
2141 28,
2142 0x1,
2143 1,
2144 0,
2145 wupen::Agt1Udwupen,
2146 wupen::Agt1Udwupen,
2147 Wupen_SPEC,
2148 crate::common::RW,
2149 > {
2150 crate::common::RegisterField::<
2151 28,
2152 0x1,
2153 1,
2154 0,
2155 wupen::Agt1Udwupen,
2156 wupen::Agt1Udwupen,
2157 Wupen_SPEC,
2158 crate::common::RW,
2159 >::from_register(self, 0)
2160 }
2161
2162 #[doc = "AGT1 Compare Match A Interrupt Software Standby/Snooze Mode Returns Enable"]
2163 #[inline(always)]
2164 pub fn agt1cawupen(
2165 self,
2166 ) -> crate::common::RegisterField<
2167 29,
2168 0x1,
2169 1,
2170 0,
2171 wupen::Agt1Cawupen,
2172 wupen::Agt1Cawupen,
2173 Wupen_SPEC,
2174 crate::common::RW,
2175 > {
2176 crate::common::RegisterField::<
2177 29,
2178 0x1,
2179 1,
2180 0,
2181 wupen::Agt1Cawupen,
2182 wupen::Agt1Cawupen,
2183 Wupen_SPEC,
2184 crate::common::RW,
2185 >::from_register(self, 0)
2186 }
2187
2188 #[doc = "AGT1 Compare Match B Interrupt Software Standby/Snooze Mode Returns Enable"]
2189 #[inline(always)]
2190 pub fn agt1cbwupen(
2191 self,
2192 ) -> crate::common::RegisterField<
2193 30,
2194 0x1,
2195 1,
2196 0,
2197 wupen::Agt1Cbwupen,
2198 wupen::Agt1Cbwupen,
2199 Wupen_SPEC,
2200 crate::common::RW,
2201 > {
2202 crate::common::RegisterField::<
2203 30,
2204 0x1,
2205 1,
2206 0,
2207 wupen::Agt1Cbwupen,
2208 wupen::Agt1Cbwupen,
2209 Wupen_SPEC,
2210 crate::common::RW,
2211 >::from_register(self, 0)
2212 }
2213
2214 #[doc = "IIC0 Address Match Interrupt Software Standby/Snooze Mode Returns Enable"]
2215 #[inline(always)]
2216 pub fn iic0wupen(
2217 self,
2218 ) -> crate::common::RegisterField<
2219 31,
2220 0x1,
2221 1,
2222 0,
2223 wupen::Iic0Wupen,
2224 wupen::Iic0Wupen,
2225 Wupen_SPEC,
2226 crate::common::RW,
2227 > {
2228 crate::common::RegisterField::<
2229 31,
2230 0x1,
2231 1,
2232 0,
2233 wupen::Iic0Wupen,
2234 wupen::Iic0Wupen,
2235 Wupen_SPEC,
2236 crate::common::RW,
2237 >::from_register(self, 0)
2238 }
2239}
2240impl ::core::default::Default for Wupen {
2241 #[inline(always)]
2242 fn default() -> Wupen {
2243 <crate::RegValueT<Wupen_SPEC> as RegisterValue<_>>::new(0)
2244 }
2245}
2246pub mod wupen {
2247
2248 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2249 pub struct Irqwupen_SPEC;
2250 pub type Irqwupen = crate::EnumBitfieldStruct<u8, Irqwupen_SPEC>;
2251 impl Irqwupen {
2252 #[doc = "Software Standby/Snooze Mode returns by IRQn interrupt disabled"]
2253 pub const _0: Self = Self::new(0);
2254
2255 #[doc = "Software Standby/Snooze Mode returns by IRQn interrupt enabled"]
2256 pub const _1: Self = Self::new(1);
2257 }
2258 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2259 pub struct Iwdtwupen_SPEC;
2260 pub type Iwdtwupen = crate::EnumBitfieldStruct<u8, Iwdtwupen_SPEC>;
2261 impl Iwdtwupen {
2262 #[doc = "Software Standby/Snooze Mode returns by IWDT interrupt disabled"]
2263 pub const _0: Self = Self::new(0);
2264
2265 #[doc = "Software Standby/Snooze Mode returns by IWDT interrupt enabled"]
2266 pub const _1: Self = Self::new(1);
2267 }
2268 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2269 pub struct Keywupen_SPEC;
2270 pub type Keywupen = crate::EnumBitfieldStruct<u8, Keywupen_SPEC>;
2271 impl Keywupen {
2272 #[doc = "Software Standby/Snooze Mode returns by KEY interrupt disabled"]
2273 pub const _0: Self = Self::new(0);
2274
2275 #[doc = "Software Standby/Snooze Mode returns by KEY interrupt enabled"]
2276 pub const _1: Self = Self::new(1);
2277 }
2278 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2279 pub struct Lvd1Wupen_SPEC;
2280 pub type Lvd1Wupen = crate::EnumBitfieldStruct<u8, Lvd1Wupen_SPEC>;
2281 impl Lvd1Wupen {
2282 #[doc = "Software Standby/Snooze Mode returns by LVD1 interrupt disabled"]
2283 pub const _0: Self = Self::new(0);
2284
2285 #[doc = "Software Standby/Snooze Mode returns by LVD1 interrupt enabled"]
2286 pub const _1: Self = Self::new(1);
2287 }
2288 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2289 pub struct Lvd2Wupen_SPEC;
2290 pub type Lvd2Wupen = crate::EnumBitfieldStruct<u8, Lvd2Wupen_SPEC>;
2291 impl Lvd2Wupen {
2292 #[doc = "Software Standby/Snooze Mode returns by LVD2 interrupt disabled"]
2293 pub const _0: Self = Self::new(0);
2294
2295 #[doc = "Software Standby/Snooze Mode returns by LVD2 interrupt enabled"]
2296 pub const _1: Self = Self::new(1);
2297 }
2298 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2299 pub struct Acmplp0Wupen_SPEC;
2300 pub type Acmplp0Wupen = crate::EnumBitfieldStruct<u8, Acmplp0Wupen_SPEC>;
2301 impl Acmplp0Wupen {
2302 #[doc = "Software Standby/Snooze Mode returns by ACMPLP0 interrupt disabled"]
2303 pub const _0: Self = Self::new(0);
2304
2305 #[doc = "Software Standby/Snooze Mode returns by ACMPLP0 interrupt enabled"]
2306 pub const _1: Self = Self::new(1);
2307 }
2308 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2309 pub struct Rtcalmwupen_SPEC;
2310 pub type Rtcalmwupen = crate::EnumBitfieldStruct<u8, Rtcalmwupen_SPEC>;
2311 impl Rtcalmwupen {
2312 #[doc = "Software Standby/Snooze Mode returns by RTC alarm interrupt disabled"]
2313 pub const _0: Self = Self::new(0);
2314
2315 #[doc = "Software Standby/Snooze Mode returns by RTC alarm interrupt enabled."]
2316 pub const _1: Self = Self::new(1);
2317 }
2318 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2319 pub struct Rtcprdwupen_SPEC;
2320 pub type Rtcprdwupen = crate::EnumBitfieldStruct<u8, Rtcprdwupen_SPEC>;
2321 impl Rtcprdwupen {
2322 #[doc = "Software Standby/Snooze Mode returns by RTC period interrupt disabled"]
2323 pub const _0: Self = Self::new(0);
2324
2325 #[doc = "Software Standby/Snooze Mode returns by RTC period interrupt enabled"]
2326 pub const _1: Self = Self::new(1);
2327 }
2328 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2329 pub struct Agt1Udwupen_SPEC;
2330 pub type Agt1Udwupen = crate::EnumBitfieldStruct<u8, Agt1Udwupen_SPEC>;
2331 impl Agt1Udwupen {
2332 #[doc = "Software Standby/Snooze Mode returns by AGT1 underflow interrupt disabled"]
2333 pub const _0: Self = Self::new(0);
2334
2335 #[doc = "Software Standby/Snooze Mode returns by AGT1 underflow"]
2336 pub const _1: Self = Self::new(1);
2337 }
2338 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2339 pub struct Agt1Cawupen_SPEC;
2340 pub type Agt1Cawupen = crate::EnumBitfieldStruct<u8, Agt1Cawupen_SPEC>;
2341 impl Agt1Cawupen {
2342 #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match A interrupt disabled."]
2343 pub const _0: Self = Self::new(0);
2344
2345 #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match A interrupt enabled."]
2346 pub const _1: Self = Self::new(1);
2347 }
2348 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2349 pub struct Agt1Cbwupen_SPEC;
2350 pub type Agt1Cbwupen = crate::EnumBitfieldStruct<u8, Agt1Cbwupen_SPEC>;
2351 impl Agt1Cbwupen {
2352 #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match B interrupt disabled."]
2353 pub const _0: Self = Self::new(0);
2354
2355 #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match B interrupt enabled."]
2356 pub const _1: Self = Self::new(1);
2357 }
2358 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2359 pub struct Iic0Wupen_SPEC;
2360 pub type Iic0Wupen = crate::EnumBitfieldStruct<u8, Iic0Wupen_SPEC>;
2361 impl Iic0Wupen {
2362 #[doc = "Software Standby/Snooze Mode returns by IIC0 address match interrupt disabled"]
2363 pub const _0: Self = Self::new(0);
2364
2365 #[doc = "Software Standby/Snooze Mode returns by IIC0 address match interrupt enabled"]
2366 pub const _1: Self = Self::new(1);
2367 }
2368}
2369#[doc(hidden)]
2370#[derive(Copy, Clone, Eq, PartialEq)]
2371pub struct Ielen_SPEC;
2372impl crate::sealed::RegSpec for Ielen_SPEC {
2373 type DataType = u8;
2374}
2375
2376#[doc = "ICU event Enable Register"]
2377pub type Ielen = crate::RegValueT<Ielen_SPEC>;
2378
2379impl Ielen {
2380 #[doc = "RTCALM and RTCPRD Interrupts Enable (when LPOPTEN bit = 1)"]
2381 #[inline(always)]
2382 pub fn rtcinten(
2383 self,
2384 ) -> crate::common::RegisterField<
2385 0,
2386 0x1,
2387 1,
2388 0,
2389 ielen::Rtcinten,
2390 ielen::Rtcinten,
2391 Ielen_SPEC,
2392 crate::common::RW,
2393 > {
2394 crate::common::RegisterField::<
2395 0,
2396 0x1,
2397 1,
2398 0,
2399 ielen::Rtcinten,
2400 ielen::Rtcinten,
2401 Ielen_SPEC,
2402 crate::common::RW,
2403 >::from_register(self, 0)
2404 }
2405
2406 #[doc = "Parts Asynchronous Interrupts Enable except RTC (when LPOPTEN bit = 1)"]
2407 #[inline(always)]
2408 pub fn ielen(
2409 self,
2410 ) -> crate::common::RegisterField<
2411 1,
2412 0x1,
2413 1,
2414 0,
2415 ielen::Ielen,
2416 ielen::Ielen,
2417 Ielen_SPEC,
2418 crate::common::RW,
2419 > {
2420 crate::common::RegisterField::<
2421 1,
2422 0x1,
2423 1,
2424 0,
2425 ielen::Ielen,
2426 ielen::Ielen,
2427 Ielen_SPEC,
2428 crate::common::RW,
2429 >::from_register(self, 0)
2430 }
2431}
2432impl ::core::default::Default for Ielen {
2433 #[inline(always)]
2434 fn default() -> Ielen {
2435 <crate::RegValueT<Ielen_SPEC> as RegisterValue<_>>::new(0)
2436 }
2437}
2438pub mod ielen {
2439
2440 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2441 pub struct Rtcinten_SPEC;
2442 pub type Rtcinten = crate::EnumBitfieldStruct<u8, Rtcinten_SPEC>;
2443 impl Rtcinten {
2444 #[doc = "Disabled"]
2445 pub const _0: Self = Self::new(0);
2446
2447 #[doc = "Enabled"]
2448 pub const _1: Self = Self::new(1);
2449 }
2450 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2451 pub struct Ielen_SPEC;
2452 pub type Ielen = crate::EnumBitfieldStruct<u8, Ielen_SPEC>;
2453 impl Ielen {
2454 #[doc = "Disabled"]
2455 pub const _0: Self = Self::new(0);
2456
2457 #[doc = "Enabled"]
2458 pub const _1: Self = Self::new(1);
2459 }
2460}
2461#[doc(hidden)]
2462#[derive(Copy, Clone, Eq, PartialEq)]
2463pub struct Selsr0_SPEC;
2464impl crate::sealed::RegSpec for Selsr0_SPEC {
2465 type DataType = u16;
2466}
2467
2468#[doc = "SYS Event Link Setting Register"]
2469pub type Selsr0 = crate::RegValueT<Selsr0_SPEC>;
2470
2471impl NoBitfieldReg<Selsr0_SPEC> for Selsr0 {}
2472impl ::core::default::Default for Selsr0 {
2473 #[inline(always)]
2474 fn default() -> Selsr0 {
2475 <crate::RegValueT<Selsr0_SPEC> as RegisterValue<_>>::new(0)
2476 }
2477}
2478
2479#[doc(hidden)]
2480#[derive(Copy, Clone, Eq, PartialEq)]
2481pub struct Ielsr_SPEC;
2482impl crate::sealed::RegSpec for Ielsr_SPEC {
2483 type DataType = u32;
2484}
2485
2486#[doc = "ICU Event Link Setting Register %s"]
2487pub type Ielsr = crate::RegValueT<Ielsr_SPEC>;
2488
2489impl NoBitfieldReg<Ielsr_SPEC> for Ielsr {}
2490impl ::core::default::Default for Ielsr {
2491 #[inline(always)]
2492 fn default() -> Ielsr {
2493 <crate::RegValueT<Ielsr_SPEC> as RegisterValue<_>>::new(0)
2494 }
2495}