ra2e1_pac/
flcn.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.51.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:01:43 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Flash I/O Registers"]
28unsafe impl ::core::marker::Send for super::Flcn {}
29unsafe impl ::core::marker::Sync for super::Flcn {}
30impl super::Flcn {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Data Flash Control Register"]
38    #[inline(always)]
39    pub const fn dflctl(
40        &self,
41    ) -> &'static crate::common::Reg<self::Dflctl_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Dflctl_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(144usize),
45            )
46        }
47    }
48
49    #[doc = "Flash P/E Mode Control Register"]
50    #[inline(always)]
51    pub const fn fpmcr(&self) -> &'static crate::common::Reg<self::Fpmcr_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Fpmcr_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(256usize),
55            )
56        }
57    }
58
59    #[doc = "Flash Area Select Register"]
60    #[inline(always)]
61    pub const fn fasr(&self) -> &'static crate::common::Reg<self::Fasr_SPEC, crate::common::RW> {
62        unsafe {
63            crate::common::Reg::<self::Fasr_SPEC, crate::common::RW>::from_ptr(
64                self._svd2pac_as_ptr().add(260usize),
65            )
66        }
67    }
68
69    #[doc = "Flash Processing Start Address Register L"]
70    #[inline(always)]
71    pub const fn fsarl(&self) -> &'static crate::common::Reg<self::Fsarl_SPEC, crate::common::RW> {
72        unsafe {
73            crate::common::Reg::<self::Fsarl_SPEC, crate::common::RW>::from_ptr(
74                self._svd2pac_as_ptr().add(264usize),
75            )
76        }
77    }
78
79    #[doc = "Flash Processing Start Address Register H"]
80    #[inline(always)]
81    pub const fn fsarh(&self) -> &'static crate::common::Reg<self::Fsarh_SPEC, crate::common::RW> {
82        unsafe {
83            crate::common::Reg::<self::Fsarh_SPEC, crate::common::RW>::from_ptr(
84                self._svd2pac_as_ptr().add(272usize),
85            )
86        }
87    }
88
89    #[doc = "Flash Control Register"]
90    #[inline(always)]
91    pub const fn fcr(&self) -> &'static crate::common::Reg<self::Fcr_SPEC, crate::common::RW> {
92        unsafe {
93            crate::common::Reg::<self::Fcr_SPEC, crate::common::RW>::from_ptr(
94                self._svd2pac_as_ptr().add(276usize),
95            )
96        }
97    }
98
99    #[doc = "Flash Processing End Address Register L"]
100    #[inline(always)]
101    pub const fn fearl(&self) -> &'static crate::common::Reg<self::Fearl_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Fearl_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(280usize),
105            )
106        }
107    }
108
109    #[doc = "Flash Processing End Address Register H"]
110    #[inline(always)]
111    pub const fn fearh(&self) -> &'static crate::common::Reg<self::Fearh_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Fearh_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(288usize),
115            )
116        }
117    }
118
119    #[doc = "Flash Reset Register"]
120    #[inline(always)]
121    pub const fn fresetr(
122        &self,
123    ) -> &'static crate::common::Reg<self::Fresetr_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Fresetr_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(292usize),
127            )
128        }
129    }
130
131    #[doc = "Flash Status Register 1"]
132    #[inline(always)]
133    pub const fn fstatr1(
134        &self,
135    ) -> &'static crate::common::Reg<self::Fstatr1_SPEC, crate::common::R> {
136        unsafe {
137            crate::common::Reg::<self::Fstatr1_SPEC, crate::common::R>::from_ptr(
138                self._svd2pac_as_ptr().add(300usize),
139            )
140        }
141    }
142
143    #[doc = "Flash Write Buffer Register L0"]
144    #[inline(always)]
145    pub const fn fwbl0(&self) -> &'static crate::common::Reg<self::Fwbl0_SPEC, crate::common::RW> {
146        unsafe {
147            crate::common::Reg::<self::Fwbl0_SPEC, crate::common::RW>::from_ptr(
148                self._svd2pac_as_ptr().add(304usize),
149            )
150        }
151    }
152
153    #[doc = "Flash Write Buffer Register H0"]
154    #[inline(always)]
155    pub const fn fwbh0(&self) -> &'static crate::common::Reg<self::Fwbh0_SPEC, crate::common::RW> {
156        unsafe {
157            crate::common::Reg::<self::Fwbh0_SPEC, crate::common::RW>::from_ptr(
158                self._svd2pac_as_ptr().add(312usize),
159            )
160        }
161    }
162
163    #[doc = "Protection Unlock Register"]
164    #[inline(always)]
165    pub const fn fpr(&self) -> &'static crate::common::Reg<self::Fpr_SPEC, crate::common::RW> {
166        unsafe {
167            crate::common::Reg::<self::Fpr_SPEC, crate::common::RW>::from_ptr(
168                self._svd2pac_as_ptr().add(384usize),
169            )
170        }
171    }
172
173    #[doc = "Protection Unlock Status Register"]
174    #[inline(always)]
175    pub const fn fpsr(&self) -> &'static crate::common::Reg<self::Fpsr_SPEC, crate::common::R> {
176        unsafe {
177            crate::common::Reg::<self::Fpsr_SPEC, crate::common::R>::from_ptr(
178                self._svd2pac_as_ptr().add(388usize),
179            )
180        }
181    }
182
183    #[doc = "Flash Read Buffer Register L0"]
184    #[inline(always)]
185    pub const fn frbl0(&self) -> &'static crate::common::Reg<self::Frbl0_SPEC, crate::common::R> {
186        unsafe {
187            crate::common::Reg::<self::Frbl0_SPEC, crate::common::R>::from_ptr(
188                self._svd2pac_as_ptr().add(392usize),
189            )
190        }
191    }
192
193    #[doc = "Flash Read Buffer Register H0"]
194    #[inline(always)]
195    pub const fn frbh0(&self) -> &'static crate::common::Reg<self::Frbh0_SPEC, crate::common::R> {
196        unsafe {
197            crate::common::Reg::<self::Frbh0_SPEC, crate::common::R>::from_ptr(
198                self._svd2pac_as_ptr().add(400usize),
199            )
200        }
201    }
202
203    #[doc = "Flash Start-Up Setting Monitor Register"]
204    #[inline(always)]
205    pub const fn fscmr(&self) -> &'static crate::common::Reg<self::Fscmr_SPEC, crate::common::R> {
206        unsafe {
207            crate::common::Reg::<self::Fscmr_SPEC, crate::common::R>::from_ptr(
208                self._svd2pac_as_ptr().add(448usize),
209            )
210        }
211    }
212
213    #[doc = "Flash Access Window Start Address Monitor Register"]
214    #[inline(always)]
215    pub const fn fawsmr(&self) -> &'static crate::common::Reg<self::Fawsmr_SPEC, crate::common::R> {
216        unsafe {
217            crate::common::Reg::<self::Fawsmr_SPEC, crate::common::R>::from_ptr(
218                self._svd2pac_as_ptr().add(456usize),
219            )
220        }
221    }
222
223    #[doc = "Flash Access Window End Address Monitor Register"]
224    #[inline(always)]
225    pub const fn fawemr(&self) -> &'static crate::common::Reg<self::Fawemr_SPEC, crate::common::R> {
226        unsafe {
227            crate::common::Reg::<self::Fawemr_SPEC, crate::common::R>::from_ptr(
228                self._svd2pac_as_ptr().add(464usize),
229            )
230        }
231    }
232
233    #[doc = "Flash Initial Setting Register"]
234    #[inline(always)]
235    pub const fn fisr(&self) -> &'static crate::common::Reg<self::Fisr_SPEC, crate::common::RW> {
236        unsafe {
237            crate::common::Reg::<self::Fisr_SPEC, crate::common::RW>::from_ptr(
238                self._svd2pac_as_ptr().add(472usize),
239            )
240        }
241    }
242
243    #[doc = "Flash Extra Area Control Register"]
244    #[inline(always)]
245    pub const fn fexcr(&self) -> &'static crate::common::Reg<self::Fexcr_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::Fexcr_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(476usize),
249            )
250        }
251    }
252
253    #[doc = "Flash Error Address Monitor Register L"]
254    #[inline(always)]
255    pub const fn feaml(&self) -> &'static crate::common::Reg<self::Feaml_SPEC, crate::common::RW> {
256        unsafe {
257            crate::common::Reg::<self::Feaml_SPEC, crate::common::RW>::from_ptr(
258                self._svd2pac_as_ptr().add(480usize),
259            )
260        }
261    }
262
263    #[doc = "Flash Error Address Monitor Register H"]
264    #[inline(always)]
265    pub const fn feamh(&self) -> &'static crate::common::Reg<self::Feamh_SPEC, crate::common::RW> {
266        unsafe {
267            crate::common::Reg::<self::Feamh_SPEC, crate::common::RW>::from_ptr(
268                self._svd2pac_as_ptr().add(488usize),
269            )
270        }
271    }
272
273    #[doc = "Flash Status Register 2"]
274    #[inline(always)]
275    pub const fn fstatr2(
276        &self,
277    ) -> &'static crate::common::Reg<self::Fstatr2_SPEC, crate::common::R> {
278        unsafe {
279            crate::common::Reg::<self::Fstatr2_SPEC, crate::common::R>::from_ptr(
280                self._svd2pac_as_ptr().add(496usize),
281            )
282        }
283    }
284
285    #[doc = "Temperature Sensor Calibration Data Register"]
286    #[inline(always)]
287    pub const fn tscdr(&self) -> &'static crate::common::Reg<self::Tscdr_SPEC, crate::common::R> {
288        unsafe {
289            crate::common::Reg::<self::Tscdr_SPEC, crate::common::R>::from_ptr(
290                self._svd2pac_as_ptr().add(552usize),
291            )
292        }
293    }
294
295    #[doc = "CTSU Trimming Register A"]
296    #[inline(always)]
297    pub const fn ctsutrima(
298        &self,
299    ) -> &'static crate::common::Reg<self::Ctsutrima_SPEC, crate::common::RW> {
300        unsafe {
301            crate::common::Reg::<self::Ctsutrima_SPEC, crate::common::RW>::from_ptr(
302                self._svd2pac_as_ptr().add(932usize),
303            )
304        }
305    }
306
307    #[doc = "CTSU Trimming Register B"]
308    #[inline(always)]
309    pub const fn ctsutrimb(
310        &self,
311    ) -> &'static crate::common::Reg<self::Ctsutrimb_SPEC, crate::common::RW> {
312        unsafe {
313            crate::common::Reg::<self::Ctsutrimb_SPEC, crate::common::RW>::from_ptr(
314                self._svd2pac_as_ptr().add(936usize),
315            )
316        }
317    }
318
319    #[doc = "Flash P/E Mode Entry Register"]
320    #[inline(always)]
321    pub const fn fentryr(
322        &self,
323    ) -> &'static crate::common::Reg<self::Fentryr_SPEC, crate::common::RW> {
324        unsafe {
325            crate::common::Reg::<self::Fentryr_SPEC, crate::common::RW>::from_ptr(
326                self._svd2pac_as_ptr().add(16304usize),
327            )
328        }
329    }
330
331    #[doc = "Memory Wait Cycle Control Register for Data Flash"]
332    #[inline(always)]
333    pub const fn fldwaitr(
334        &self,
335    ) -> &'static crate::common::Reg<self::Fldwaitr_SPEC, crate::common::RW> {
336        unsafe {
337            crate::common::Reg::<self::Fldwaitr_SPEC, crate::common::RW>::from_ptr(
338                self._svd2pac_as_ptr().add(16324usize),
339            )
340        }
341    }
342
343    #[doc = "Prefetch Buffer Enable Register"]
344    #[inline(always)]
345    pub const fn pfber(&self) -> &'static crate::common::Reg<self::Pfber_SPEC, crate::common::RW> {
346        unsafe {
347            crate::common::Reg::<self::Pfber_SPEC, crate::common::RW>::from_ptr(
348                self._svd2pac_as_ptr().add(16328usize),
349            )
350        }
351    }
352}
353#[doc(hidden)]
354#[derive(Copy, Clone, Eq, PartialEq)]
355pub struct Dflctl_SPEC;
356impl crate::sealed::RegSpec for Dflctl_SPEC {
357    type DataType = u8;
358}
359
360#[doc = "Data Flash Control Register"]
361pub type Dflctl = crate::RegValueT<Dflctl_SPEC>;
362
363impl Dflctl {
364    #[doc = "Data Flash Access Enable"]
365    #[inline(always)]
366    pub fn dflen(
367        self,
368    ) -> crate::common::RegisterField<
369        0,
370        0x1,
371        1,
372        0,
373        dflctl::Dflen,
374        dflctl::Dflen,
375        Dflctl_SPEC,
376        crate::common::RW,
377    > {
378        crate::common::RegisterField::<
379            0,
380            0x1,
381            1,
382            0,
383            dflctl::Dflen,
384            dflctl::Dflen,
385            Dflctl_SPEC,
386            crate::common::RW,
387        >::from_register(self, 0)
388    }
389}
390impl ::core::default::Default for Dflctl {
391    #[inline(always)]
392    fn default() -> Dflctl {
393        <crate::RegValueT<Dflctl_SPEC> as RegisterValue<_>>::new(0)
394    }
395}
396pub mod dflctl {
397
398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
399    pub struct Dflen_SPEC;
400    pub type Dflen = crate::EnumBitfieldStruct<u8, Dflen_SPEC>;
401    impl Dflen {
402        #[doc = "Access to the data flash is disabled"]
403        pub const _0: Self = Self::new(0);
404
405        #[doc = "Access to the data flash is enabled"]
406        pub const _1: Self = Self::new(1);
407    }
408}
409#[doc(hidden)]
410#[derive(Copy, Clone, Eq, PartialEq)]
411pub struct Fpmcr_SPEC;
412impl crate::sealed::RegSpec for Fpmcr_SPEC {
413    type DataType = u8;
414}
415
416#[doc = "Flash P/E Mode Control Register"]
417pub type Fpmcr = crate::RegValueT<Fpmcr_SPEC>;
418
419impl Fpmcr {
420    #[doc = "Flash Operating Mode Select 0"]
421    #[inline(always)]
422    pub fn fms0(
423        self,
424    ) -> crate::common::RegisterField<
425        1,
426        0x1,
427        1,
428        0,
429        fpmcr::Fms0,
430        fpmcr::Fms0,
431        Fpmcr_SPEC,
432        crate::common::RW,
433    > {
434        crate::common::RegisterField::<
435            1,
436            0x1,
437            1,
438            0,
439            fpmcr::Fms0,
440            fpmcr::Fms0,
441            Fpmcr_SPEC,
442            crate::common::RW,
443        >::from_register(self, 0)
444    }
445
446    #[doc = "Code Flash P/E Disable"]
447    #[inline(always)]
448    pub fn rpdis(
449        self,
450    ) -> crate::common::RegisterField<
451        3,
452        0x1,
453        1,
454        0,
455        fpmcr::Rpdis,
456        fpmcr::Rpdis,
457        Fpmcr_SPEC,
458        crate::common::RW,
459    > {
460        crate::common::RegisterField::<
461            3,
462            0x1,
463            1,
464            0,
465            fpmcr::Rpdis,
466            fpmcr::Rpdis,
467            Fpmcr_SPEC,
468            crate::common::RW,
469        >::from_register(self, 0)
470    }
471
472    #[doc = "Flash Operating Mode Select 1"]
473    #[inline(always)]
474    pub fn fms1(self) -> crate::common::RegisterFieldBool<4, 1, 0, Fpmcr_SPEC, crate::common::RW> {
475        crate::common::RegisterFieldBool::<4, 1, 0, Fpmcr_SPEC, crate::common::RW>::from_register(
476            self, 0,
477        )
478    }
479}
480impl ::core::default::Default for Fpmcr {
481    #[inline(always)]
482    fn default() -> Fpmcr {
483        <crate::RegValueT<Fpmcr_SPEC> as RegisterValue<_>>::new(8)
484    }
485}
486pub mod fpmcr {
487
488    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
489    pub struct Fms0_SPEC;
490    pub type Fms0 = crate::EnumBitfieldStruct<u8, Fms0_SPEC>;
491    impl Fms0 {
492        #[doc = "FMS1 = 0: Read mode FMS1 = 1: Data flash P/E mode."]
493        pub const _0: Self = Self::new(0);
494
495        #[doc = "FMS1 = 0: Code flash P/E mode FMS1 = 1: Setting prohibited."]
496        pub const _1: Self = Self::new(1);
497    }
498    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
499    pub struct Rpdis_SPEC;
500    pub type Rpdis = crate::EnumBitfieldStruct<u8, Rpdis_SPEC>;
501    impl Rpdis {
502        #[doc = "Programming of the code flash is enabled"]
503        pub const _0: Self = Self::new(0);
504
505        #[doc = "Programming of the code flash is disabled."]
506        pub const _1: Self = Self::new(1);
507    }
508}
509#[doc(hidden)]
510#[derive(Copy, Clone, Eq, PartialEq)]
511pub struct Fasr_SPEC;
512impl crate::sealed::RegSpec for Fasr_SPEC {
513    type DataType = u8;
514}
515
516#[doc = "Flash Area Select Register"]
517pub type Fasr = crate::RegValueT<Fasr_SPEC>;
518
519impl Fasr {
520    #[doc = "Extra Area Select"]
521    #[inline(always)]
522    pub fn exs(
523        self,
524    ) -> crate::common::RegisterField<
525        0,
526        0x1,
527        1,
528        0,
529        fasr::Exs,
530        fasr::Exs,
531        Fasr_SPEC,
532        crate::common::RW,
533    > {
534        crate::common::RegisterField::<
535            0,
536            0x1,
537            1,
538            0,
539            fasr::Exs,
540            fasr::Exs,
541            Fasr_SPEC,
542            crate::common::RW,
543        >::from_register(self, 0)
544    }
545}
546impl ::core::default::Default for Fasr {
547    #[inline(always)]
548    fn default() -> Fasr {
549        <crate::RegValueT<Fasr_SPEC> as RegisterValue<_>>::new(0)
550    }
551}
552pub mod fasr {
553
554    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
555    pub struct Exs_SPEC;
556    pub type Exs = crate::EnumBitfieldStruct<u8, Exs_SPEC>;
557    impl Exs {
558        #[doc = "User area or data area"]
559        pub const _0: Self = Self::new(0);
560
561        #[doc = "Extra area."]
562        pub const _1: Self = Self::new(1);
563    }
564}
565#[doc(hidden)]
566#[derive(Copy, Clone, Eq, PartialEq)]
567pub struct Fsarl_SPEC;
568impl crate::sealed::RegSpec for Fsarl_SPEC {
569    type DataType = u16;
570}
571
572#[doc = "Flash Processing Start Address Register L"]
573pub type Fsarl = crate::RegValueT<Fsarl_SPEC>;
574
575impl Fsarl {
576    #[doc = "Flash Processing Start Address L"]
577    #[inline(always)]
578    pub fn fsarl(
579        self,
580    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fsarl_SPEC, crate::common::RW>
581    {
582        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fsarl_SPEC,crate::common::RW>::from_register(self,0)
583    }
584}
585impl ::core::default::Default for Fsarl {
586    #[inline(always)]
587    fn default() -> Fsarl {
588        <crate::RegValueT<Fsarl_SPEC> as RegisterValue<_>>::new(0)
589    }
590}
591
592#[doc(hidden)]
593#[derive(Copy, Clone, Eq, PartialEq)]
594pub struct Fsarh_SPEC;
595impl crate::sealed::RegSpec for Fsarh_SPEC {
596    type DataType = u16;
597}
598
599#[doc = "Flash Processing Start Address Register H"]
600pub type Fsarh = crate::RegValueT<Fsarh_SPEC>;
601
602impl Fsarh {
603    #[doc = "Flash Processing Start Address H"]
604    #[inline(always)]
605    pub fn fsarh(
606        self,
607    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fsarh_SPEC, crate::common::RW>
608    {
609        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fsarh_SPEC,crate::common::RW>::from_register(self,0)
610    }
611}
612impl ::core::default::Default for Fsarh {
613    #[inline(always)]
614    fn default() -> Fsarh {
615        <crate::RegValueT<Fsarh_SPEC> as RegisterValue<_>>::new(0)
616    }
617}
618
619#[doc(hidden)]
620#[derive(Copy, Clone, Eq, PartialEq)]
621pub struct Fcr_SPEC;
622impl crate::sealed::RegSpec for Fcr_SPEC {
623    type DataType = u8;
624}
625
626#[doc = "Flash Control Register"]
627pub type Fcr = crate::RegValueT<Fcr_SPEC>;
628
629impl Fcr {
630    #[doc = "Software Command Setting"]
631    #[inline(always)]
632    pub fn cmd(
633        self,
634    ) -> crate::common::RegisterField<0, 0xf, 1, 0, fcr::Cmd, fcr::Cmd, Fcr_SPEC, crate::common::RW>
635    {
636        crate::common::RegisterField::<0,0xf,1,0,fcr::Cmd,fcr::Cmd,Fcr_SPEC,crate::common::RW>::from_register(self,0)
637    }
638
639    #[doc = "Data Read Completion"]
640    #[inline(always)]
641    pub fn drc(
642        self,
643    ) -> crate::common::RegisterField<4, 0x1, 1, 0, fcr::Drc, fcr::Drc, Fcr_SPEC, crate::common::RW>
644    {
645        crate::common::RegisterField::<4,0x1,1,0,fcr::Drc,fcr::Drc,Fcr_SPEC,crate::common::RW>::from_register(self,0)
646    }
647
648    #[doc = "Forced Processing Stop"]
649    #[inline(always)]
650    pub fn stop(self) -> crate::common::RegisterFieldBool<6, 1, 0, Fcr_SPEC, crate::common::RW> {
651        crate::common::RegisterFieldBool::<6, 1, 0, Fcr_SPEC, crate::common::RW>::from_register(
652            self, 0,
653        )
654    }
655
656    #[doc = "Processing Start"]
657    #[inline(always)]
658    pub fn opst(
659        self,
660    ) -> crate::common::RegisterField<7, 0x1, 1, 0, fcr::Opst, fcr::Opst, Fcr_SPEC, crate::common::RW>
661    {
662        crate::common::RegisterField::<
663            7,
664            0x1,
665            1,
666            0,
667            fcr::Opst,
668            fcr::Opst,
669            Fcr_SPEC,
670            crate::common::RW,
671        >::from_register(self, 0)
672    }
673}
674impl ::core::default::Default for Fcr {
675    #[inline(always)]
676    fn default() -> Fcr {
677        <crate::RegValueT<Fcr_SPEC> as RegisterValue<_>>::new(0)
678    }
679}
680pub mod fcr {
681
682    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
683    pub struct Cmd_SPEC;
684    pub type Cmd = crate::EnumBitfieldStruct<u8, Cmd_SPEC>;
685    impl Cmd {
686        #[doc = "Program"]
687        pub const _0_X_1: Self = Self::new(1);
688
689        #[doc = "Blank check (code flash)"]
690        pub const _0_X_3: Self = Self::new(3);
691
692        #[doc = "Block erase"]
693        pub const _0_X_4: Self = Self::new(4);
694
695        #[doc = "Consecutive read"]
696        pub const _0_X_5: Self = Self::new(5);
697
698        #[doc = "Chip erase"]
699        pub const _0_X_6: Self = Self::new(6);
700
701        #[doc = "Blank check (data flash)"]
702        pub const _0_X_B: Self = Self::new(11);
703    }
704    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
705    pub struct Drc_SPEC;
706    pub type Drc = crate::EnumBitfieldStruct<u8, Drc_SPEC>;
707    impl Drc {
708        #[doc = "Data is not read or next data is requested"]
709        pub const _0: Self = Self::new(0);
710
711        #[doc = "Data reading is complete."]
712        pub const _1: Self = Self::new(1);
713    }
714    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
715    pub struct Opst_SPEC;
716    pub type Opst = crate::EnumBitfieldStruct<u8, Opst_SPEC>;
717    impl Opst {
718        #[doc = "Processing stops"]
719        pub const _0: Self = Self::new(0);
720
721        #[doc = "Processing starts."]
722        pub const _1: Self = Self::new(1);
723    }
724}
725#[doc(hidden)]
726#[derive(Copy, Clone, Eq, PartialEq)]
727pub struct Fearl_SPEC;
728impl crate::sealed::RegSpec for Fearl_SPEC {
729    type DataType = u16;
730}
731
732#[doc = "Flash Processing End Address Register L"]
733pub type Fearl = crate::RegValueT<Fearl_SPEC>;
734
735impl Fearl {
736    #[doc = "Flash Processing End Address L"]
737    #[inline(always)]
738    pub fn fearl(
739        self,
740    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fearl_SPEC, crate::common::RW>
741    {
742        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fearl_SPEC,crate::common::RW>::from_register(self,0)
743    }
744}
745impl ::core::default::Default for Fearl {
746    #[inline(always)]
747    fn default() -> Fearl {
748        <crate::RegValueT<Fearl_SPEC> as RegisterValue<_>>::new(0)
749    }
750}
751
752#[doc(hidden)]
753#[derive(Copy, Clone, Eq, PartialEq)]
754pub struct Fearh_SPEC;
755impl crate::sealed::RegSpec for Fearh_SPEC {
756    type DataType = u16;
757}
758
759#[doc = "Flash Processing End Address Register H"]
760pub type Fearh = crate::RegValueT<Fearh_SPEC>;
761
762impl Fearh {
763    #[doc = "Flash Processing End Address H"]
764    #[inline(always)]
765    pub fn fearh(
766        self,
767    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fearh_SPEC, crate::common::RW>
768    {
769        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fearh_SPEC,crate::common::RW>::from_register(self,0)
770    }
771}
772impl ::core::default::Default for Fearh {
773    #[inline(always)]
774    fn default() -> Fearh {
775        <crate::RegValueT<Fearh_SPEC> as RegisterValue<_>>::new(0)
776    }
777}
778
779#[doc(hidden)]
780#[derive(Copy, Clone, Eq, PartialEq)]
781pub struct Fresetr_SPEC;
782impl crate::sealed::RegSpec for Fresetr_SPEC {
783    type DataType = u8;
784}
785
786#[doc = "Flash Reset Register"]
787pub type Fresetr = crate::RegValueT<Fresetr_SPEC>;
788
789impl Fresetr {
790    #[doc = "Software reset of the registers"]
791    #[inline(always)]
792    pub fn freset(
793        self,
794    ) -> crate::common::RegisterField<
795        0,
796        0x1,
797        1,
798        0,
799        fresetr::Freset,
800        fresetr::Freset,
801        Fresetr_SPEC,
802        crate::common::RW,
803    > {
804        crate::common::RegisterField::<
805            0,
806            0x1,
807            1,
808            0,
809            fresetr::Freset,
810            fresetr::Freset,
811            Fresetr_SPEC,
812            crate::common::RW,
813        >::from_register(self, 0)
814    }
815}
816impl ::core::default::Default for Fresetr {
817    #[inline(always)]
818    fn default() -> Fresetr {
819        <crate::RegValueT<Fresetr_SPEC> as RegisterValue<_>>::new(0)
820    }
821}
822pub mod fresetr {
823
824    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
825    pub struct Freset_SPEC;
826    pub type Freset = crate::EnumBitfieldStruct<u8, Freset_SPEC>;
827    impl Freset {
828        #[doc = "The registers related to the flash programming are not reset"]
829        pub const _0: Self = Self::new(0);
830
831        #[doc = "The registers related to the flash programming are reset."]
832        pub const _1: Self = Self::new(1);
833    }
834}
835#[doc(hidden)]
836#[derive(Copy, Clone, Eq, PartialEq)]
837pub struct Fstatr1_SPEC;
838impl crate::sealed::RegSpec for Fstatr1_SPEC {
839    type DataType = u8;
840}
841
842#[doc = "Flash Status Register 1"]
843pub type Fstatr1 = crate::RegValueT<Fstatr1_SPEC>;
844
845impl Fstatr1 {
846    #[doc = "Data Read Ready Flag"]
847    #[inline(always)]
848    pub fn drrdy(
849        self,
850    ) -> crate::common::RegisterField<
851        1,
852        0x1,
853        1,
854        0,
855        fstatr1::Drrdy,
856        fstatr1::Drrdy,
857        Fstatr1_SPEC,
858        crate::common::R,
859    > {
860        crate::common::RegisterField::<
861            1,
862            0x1,
863            1,
864            0,
865            fstatr1::Drrdy,
866            fstatr1::Drrdy,
867            Fstatr1_SPEC,
868            crate::common::R,
869        >::from_register(self, 0)
870    }
871
872    #[doc = "Flash Ready Flag"]
873    #[inline(always)]
874    pub fn frdy(
875        self,
876    ) -> crate::common::RegisterField<
877        6,
878        0x1,
879        1,
880        0,
881        fstatr1::Frdy,
882        fstatr1::Frdy,
883        Fstatr1_SPEC,
884        crate::common::R,
885    > {
886        crate::common::RegisterField::<
887            6,
888            0x1,
889            1,
890            0,
891            fstatr1::Frdy,
892            fstatr1::Frdy,
893            Fstatr1_SPEC,
894            crate::common::R,
895        >::from_register(self, 0)
896    }
897
898    #[doc = "Extra Area Ready Flag"]
899    #[inline(always)]
900    pub fn exrdy(
901        self,
902    ) -> crate::common::RegisterField<
903        7,
904        0x1,
905        1,
906        0,
907        fstatr1::Exrdy,
908        fstatr1::Exrdy,
909        Fstatr1_SPEC,
910        crate::common::R,
911    > {
912        crate::common::RegisterField::<
913            7,
914            0x1,
915            1,
916            0,
917            fstatr1::Exrdy,
918            fstatr1::Exrdy,
919            Fstatr1_SPEC,
920            crate::common::R,
921        >::from_register(self, 0)
922    }
923}
924impl ::core::default::Default for Fstatr1 {
925    #[inline(always)]
926    fn default() -> Fstatr1 {
927        <crate::RegValueT<Fstatr1_SPEC> as RegisterValue<_>>::new(4)
928    }
929}
930pub mod fstatr1 {
931
932    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
933    pub struct Drrdy_SPEC;
934    pub type Drrdy = crate::EnumBitfieldStruct<u8, Drrdy_SPEC>;
935    impl Drrdy {
936        #[doc = "The read processing of the consecutive read command at each address is not terminated."]
937        pub const _0: Self = Self::new(0);
938
939        #[doc = "The read processing of the consecutive read command at each address is terminated and read data is stored to the FRBH and FRBL registers."]
940        pub const _1: Self = Self::new(1);
941    }
942    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
943    pub struct Frdy_SPEC;
944    pub type Frdy = crate::EnumBitfieldStruct<u8, Frdy_SPEC>;
945    impl Frdy {
946        #[doc = "The software command of the FCR register is not terminated."]
947        pub const _0: Self = Self::new(0);
948
949        #[doc = "The software command of the FCR register is terminated."]
950        pub const _1: Self = Self::new(1);
951    }
952    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
953    pub struct Exrdy_SPEC;
954    pub type Exrdy = crate::EnumBitfieldStruct<u8, Exrdy_SPEC>;
955    impl Exrdy {
956        #[doc = "The software command of the FEXCR register is not terminated."]
957        pub const _0: Self = Self::new(0);
958
959        #[doc = "The software command of the FEXCR register is terminated."]
960        pub const _1: Self = Self::new(1);
961    }
962}
963#[doc(hidden)]
964#[derive(Copy, Clone, Eq, PartialEq)]
965pub struct Fwbl0_SPEC;
966impl crate::sealed::RegSpec for Fwbl0_SPEC {
967    type DataType = u16;
968}
969
970#[doc = "Flash Write Buffer Register L0"]
971pub type Fwbl0 = crate::RegValueT<Fwbl0_SPEC>;
972
973impl Fwbl0 {
974    #[doc = "Flash Write Buffer L0"]
975    #[inline(always)]
976    pub fn wdata(
977        self,
978    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fwbl0_SPEC, crate::common::RW>
979    {
980        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fwbl0_SPEC,crate::common::RW>::from_register(self,0)
981    }
982}
983impl ::core::default::Default for Fwbl0 {
984    #[inline(always)]
985    fn default() -> Fwbl0 {
986        <crate::RegValueT<Fwbl0_SPEC> as RegisterValue<_>>::new(0)
987    }
988}
989
990#[doc(hidden)]
991#[derive(Copy, Clone, Eq, PartialEq)]
992pub struct Fwbh0_SPEC;
993impl crate::sealed::RegSpec for Fwbh0_SPEC {
994    type DataType = u16;
995}
996
997#[doc = "Flash Write Buffer Register H0"]
998pub type Fwbh0 = crate::RegValueT<Fwbh0_SPEC>;
999
1000impl Fwbh0 {
1001    #[doc = "Flash Write Buffer H0"]
1002    #[inline(always)]
1003    pub fn wdata(
1004        self,
1005    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fwbh0_SPEC, crate::common::RW>
1006    {
1007        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fwbh0_SPEC,crate::common::RW>::from_register(self,0)
1008    }
1009}
1010impl ::core::default::Default for Fwbh0 {
1011    #[inline(always)]
1012    fn default() -> Fwbh0 {
1013        <crate::RegValueT<Fwbh0_SPEC> as RegisterValue<_>>::new(0)
1014    }
1015}
1016
1017#[doc(hidden)]
1018#[derive(Copy, Clone, Eq, PartialEq)]
1019pub struct Fpr_SPEC;
1020impl crate::sealed::RegSpec for Fpr_SPEC {
1021    type DataType = u8;
1022}
1023
1024#[doc = "Protection Unlock Register"]
1025pub type Fpr = crate::RegValueT<Fpr_SPEC>;
1026
1027impl Fpr {
1028    #[doc = "Protection Unlock"]
1029    #[inline(always)]
1030    pub fn fpr(
1031        self,
1032    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Fpr_SPEC, crate::common::RW> {
1033        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Fpr_SPEC,crate::common::RW>::from_register(self,0)
1034    }
1035}
1036impl ::core::default::Default for Fpr {
1037    #[inline(always)]
1038    fn default() -> Fpr {
1039        <crate::RegValueT<Fpr_SPEC> as RegisterValue<_>>::new(0)
1040    }
1041}
1042
1043#[doc(hidden)]
1044#[derive(Copy, Clone, Eq, PartialEq)]
1045pub struct Fpsr_SPEC;
1046impl crate::sealed::RegSpec for Fpsr_SPEC {
1047    type DataType = u8;
1048}
1049
1050#[doc = "Protection Unlock Status Register"]
1051pub type Fpsr = crate::RegValueT<Fpsr_SPEC>;
1052
1053impl Fpsr {
1054    #[doc = "Protect Error Flag"]
1055    #[inline(always)]
1056    pub fn perr(
1057        self,
1058    ) -> crate::common::RegisterField<
1059        0,
1060        0x1,
1061        1,
1062        0,
1063        fpsr::Perr,
1064        fpsr::Perr,
1065        Fpsr_SPEC,
1066        crate::common::R,
1067    > {
1068        crate::common::RegisterField::<
1069            0,
1070            0x1,
1071            1,
1072            0,
1073            fpsr::Perr,
1074            fpsr::Perr,
1075            Fpsr_SPEC,
1076            crate::common::R,
1077        >::from_register(self, 0)
1078    }
1079}
1080impl ::core::default::Default for Fpsr {
1081    #[inline(always)]
1082    fn default() -> Fpsr {
1083        <crate::RegValueT<Fpsr_SPEC> as RegisterValue<_>>::new(0)
1084    }
1085}
1086pub mod fpsr {
1087
1088    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1089    pub struct Perr_SPEC;
1090    pub type Perr = crate::EnumBitfieldStruct<u8, Perr_SPEC>;
1091    impl Perr {
1092        #[doc = "No error"]
1093        pub const _0: Self = Self::new(0);
1094
1095        #[doc = "An error occurs"]
1096        pub const _1: Self = Self::new(1);
1097    }
1098}
1099#[doc(hidden)]
1100#[derive(Copy, Clone, Eq, PartialEq)]
1101pub struct Frbl0_SPEC;
1102impl crate::sealed::RegSpec for Frbl0_SPEC {
1103    type DataType = u16;
1104}
1105
1106#[doc = "Flash Read Buffer Register L0"]
1107pub type Frbl0 = crate::RegValueT<Frbl0_SPEC>;
1108
1109impl Frbl0 {
1110    #[doc = "Flash Read Buffer L0"]
1111    #[inline(always)]
1112    pub fn rdata(
1113        self,
1114    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Frbl0_SPEC, crate::common::R> {
1115        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Frbl0_SPEC,crate::common::R>::from_register(self,0)
1116    }
1117}
1118impl ::core::default::Default for Frbl0 {
1119    #[inline(always)]
1120    fn default() -> Frbl0 {
1121        <crate::RegValueT<Frbl0_SPEC> as RegisterValue<_>>::new(0)
1122    }
1123}
1124
1125#[doc(hidden)]
1126#[derive(Copy, Clone, Eq, PartialEq)]
1127pub struct Frbh0_SPEC;
1128impl crate::sealed::RegSpec for Frbh0_SPEC {
1129    type DataType = u16;
1130}
1131
1132#[doc = "Flash Read Buffer Register H0"]
1133pub type Frbh0 = crate::RegValueT<Frbh0_SPEC>;
1134
1135impl Frbh0 {
1136    #[doc = "Flash Read Buffer H0"]
1137    #[inline(always)]
1138    pub fn rdata(
1139        self,
1140    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Frbh0_SPEC, crate::common::R> {
1141        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Frbh0_SPEC,crate::common::R>::from_register(self,0)
1142    }
1143}
1144impl ::core::default::Default for Frbh0 {
1145    #[inline(always)]
1146    fn default() -> Frbh0 {
1147        <crate::RegValueT<Frbh0_SPEC> as RegisterValue<_>>::new(0)
1148    }
1149}
1150
1151#[doc(hidden)]
1152#[derive(Copy, Clone, Eq, PartialEq)]
1153pub struct Fscmr_SPEC;
1154impl crate::sealed::RegSpec for Fscmr_SPEC {
1155    type DataType = u16;
1156}
1157
1158#[doc = "Flash Start-Up Setting Monitor Register"]
1159pub type Fscmr = crate::RegValueT<Fscmr_SPEC>;
1160
1161impl Fscmr {
1162    #[doc = "Startup Area Setting Monitor Flag"]
1163    #[inline(always)]
1164    pub fn sasmf(
1165        self,
1166    ) -> crate::common::RegisterField<
1167        8,
1168        0x1,
1169        1,
1170        0,
1171        fscmr::Sasmf,
1172        fscmr::Sasmf,
1173        Fscmr_SPEC,
1174        crate::common::R,
1175    > {
1176        crate::common::RegisterField::<
1177            8,
1178            0x1,
1179            1,
1180            0,
1181            fscmr::Sasmf,
1182            fscmr::Sasmf,
1183            Fscmr_SPEC,
1184            crate::common::R,
1185        >::from_register(self, 0)
1186    }
1187
1188    #[doc = "Access Window Protection Flag"]
1189    #[inline(always)]
1190    pub fn fspr(
1191        self,
1192    ) -> crate::common::RegisterField<
1193        14,
1194        0x1,
1195        1,
1196        0,
1197        fscmr::Fspr,
1198        fscmr::Fspr,
1199        Fscmr_SPEC,
1200        crate::common::R,
1201    > {
1202        crate::common::RegisterField::<
1203            14,
1204            0x1,
1205            1,
1206            0,
1207            fscmr::Fspr,
1208            fscmr::Fspr,
1209            Fscmr_SPEC,
1210            crate::common::R,
1211        >::from_register(self, 0)
1212    }
1213}
1214impl ::core::default::Default for Fscmr {
1215    #[inline(always)]
1216    fn default() -> Fscmr {
1217        <crate::RegValueT<Fscmr_SPEC> as RegisterValue<_>>::new(0)
1218    }
1219}
1220pub mod fscmr {
1221
1222    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1223    pub struct Sasmf_SPEC;
1224    pub type Sasmf = crate::EnumBitfieldStruct<u8, Sasmf_SPEC>;
1225    impl Sasmf {
1226        #[doc = "Setting to start up using the alternative area"]
1227        pub const _0: Self = Self::new(0);
1228
1229        #[doc = "Setting to start up using the default area"]
1230        pub const _1: Self = Self::new(1);
1231    }
1232    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1233    pub struct Fspr_SPEC;
1234    pub type Fspr = crate::EnumBitfieldStruct<u8, Fspr_SPEC>;
1235    impl Fspr {
1236        #[doc = "Access window setting disabled."]
1237        pub const _0: Self = Self::new(0);
1238
1239        #[doc = "Access window setting enabled."]
1240        pub const _1: Self = Self::new(1);
1241    }
1242}
1243#[doc(hidden)]
1244#[derive(Copy, Clone, Eq, PartialEq)]
1245pub struct Fawsmr_SPEC;
1246impl crate::sealed::RegSpec for Fawsmr_SPEC {
1247    type DataType = u16;
1248}
1249
1250#[doc = "Flash Access Window Start Address Monitor Register"]
1251pub type Fawsmr = crate::RegValueT<Fawsmr_SPEC>;
1252
1253impl Fawsmr {
1254    #[doc = "Access Window Start Address"]
1255    #[inline(always)]
1256    pub fn faws(
1257        self,
1258    ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fawsmr_SPEC, crate::common::R> {
1259        crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fawsmr_SPEC,crate::common::R>::from_register(self,0)
1260    }
1261
1262    #[doc = "Access Window Protection Flag"]
1263    #[inline(always)]
1264    pub fn fspr(self) -> crate::common::RegisterFieldBool<15, 1, 0, Fawsmr_SPEC, crate::common::R> {
1265        crate::common::RegisterFieldBool::<15, 1, 0, Fawsmr_SPEC, crate::common::R>::from_register(
1266            self, 0,
1267        )
1268    }
1269}
1270impl ::core::default::Default for Fawsmr {
1271    #[inline(always)]
1272    fn default() -> Fawsmr {
1273        <crate::RegValueT<Fawsmr_SPEC> as RegisterValue<_>>::new(0)
1274    }
1275}
1276
1277#[doc(hidden)]
1278#[derive(Copy, Clone, Eq, PartialEq)]
1279pub struct Fawemr_SPEC;
1280impl crate::sealed::RegSpec for Fawemr_SPEC {
1281    type DataType = u16;
1282}
1283
1284#[doc = "Flash Access Window End Address Monitor Register"]
1285pub type Fawemr = crate::RegValueT<Fawemr_SPEC>;
1286
1287impl Fawemr {
1288    #[doc = "Access Window End Address"]
1289    #[inline(always)]
1290    pub fn fawe(
1291        self,
1292    ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fawemr_SPEC, crate::common::R> {
1293        crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fawemr_SPEC,crate::common::R>::from_register(self,0)
1294    }
1295
1296    #[doc = "Startup Area Setting Monitor Flag"]
1297    #[inline(always)]
1298    pub fn sasmf(
1299        self,
1300    ) -> crate::common::RegisterFieldBool<15, 1, 0, Fawemr_SPEC, crate::common::R> {
1301        crate::common::RegisterFieldBool::<15, 1, 0, Fawemr_SPEC, crate::common::R>::from_register(
1302            self, 0,
1303        )
1304    }
1305}
1306impl ::core::default::Default for Fawemr {
1307    #[inline(always)]
1308    fn default() -> Fawemr {
1309        <crate::RegValueT<Fawemr_SPEC> as RegisterValue<_>>::new(0)
1310    }
1311}
1312
1313#[doc(hidden)]
1314#[derive(Copy, Clone, Eq, PartialEq)]
1315pub struct Fisr_SPEC;
1316impl crate::sealed::RegSpec for Fisr_SPEC {
1317    type DataType = u8;
1318}
1319
1320#[doc = "Flash Initial Setting Register"]
1321pub type Fisr = crate::RegValueT<Fisr_SPEC>;
1322
1323impl Fisr {
1324    #[doc = "Flash-IF Clock Notification"]
1325    #[inline(always)]
1326    pub fn pcka(
1327        self,
1328    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Fisr_SPEC, crate::common::RW> {
1329        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Fisr_SPEC,crate::common::RW>::from_register(self,0)
1330    }
1331
1332    #[doc = "Startup Area Select"]
1333    #[inline(always)]
1334    pub fn sas(
1335        self,
1336    ) -> crate::common::RegisterField<
1337        6,
1338        0x3,
1339        1,
1340        0,
1341        fisr::Sas,
1342        fisr::Sas,
1343        Fisr_SPEC,
1344        crate::common::RW,
1345    > {
1346        crate::common::RegisterField::<
1347            6,
1348            0x3,
1349            1,
1350            0,
1351            fisr::Sas,
1352            fisr::Sas,
1353            Fisr_SPEC,
1354            crate::common::RW,
1355        >::from_register(self, 0)
1356    }
1357}
1358impl ::core::default::Default for Fisr {
1359    #[inline(always)]
1360    fn default() -> Fisr {
1361        <crate::RegValueT<Fisr_SPEC> as RegisterValue<_>>::new(0)
1362    }
1363}
1364pub mod fisr {
1365
1366    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1367    pub struct Sas_SPEC;
1368    pub type Sas = crate::EnumBitfieldStruct<u8, Sas_SPEC>;
1369    impl Sas {
1370        #[doc = "The startup area is switched to the default area temporarily"]
1371        pub const _10: Self = Self::new(2);
1372
1373        #[doc = "The startup area is switched to the alternate area temporarily."]
1374        pub const _11: Self = Self::new(3);
1375    }
1376}
1377#[doc(hidden)]
1378#[derive(Copy, Clone, Eq, PartialEq)]
1379pub struct Fexcr_SPEC;
1380impl crate::sealed::RegSpec for Fexcr_SPEC {
1381    type DataType = u8;
1382}
1383
1384#[doc = "Flash Extra Area Control Register"]
1385pub type Fexcr = crate::RegValueT<Fexcr_SPEC>;
1386
1387impl Fexcr {
1388    #[doc = "Software Command Setting"]
1389    #[inline(always)]
1390    pub fn cmd(
1391        self,
1392    ) -> crate::common::RegisterField<
1393        0,
1394        0x7,
1395        1,
1396        0,
1397        fexcr::Cmd,
1398        fexcr::Cmd,
1399        Fexcr_SPEC,
1400        crate::common::RW,
1401    > {
1402        crate::common::RegisterField::<
1403            0,
1404            0x7,
1405            1,
1406            0,
1407            fexcr::Cmd,
1408            fexcr::Cmd,
1409            Fexcr_SPEC,
1410            crate::common::RW,
1411        >::from_register(self, 0)
1412    }
1413
1414    #[doc = "Processing Start"]
1415    #[inline(always)]
1416    pub fn opst(
1417        self,
1418    ) -> crate::common::RegisterField<
1419        7,
1420        0x1,
1421        1,
1422        0,
1423        fexcr::Opst,
1424        fexcr::Opst,
1425        Fexcr_SPEC,
1426        crate::common::RW,
1427    > {
1428        crate::common::RegisterField::<
1429            7,
1430            0x1,
1431            1,
1432            0,
1433            fexcr::Opst,
1434            fexcr::Opst,
1435            Fexcr_SPEC,
1436            crate::common::RW,
1437        >::from_register(self, 0)
1438    }
1439}
1440impl ::core::default::Default for Fexcr {
1441    #[inline(always)]
1442    fn default() -> Fexcr {
1443        <crate::RegValueT<Fexcr_SPEC> as RegisterValue<_>>::new(0)
1444    }
1445}
1446pub mod fexcr {
1447
1448    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1449    pub struct Cmd_SPEC;
1450    pub type Cmd = crate::EnumBitfieldStruct<u8, Cmd_SPEC>;
1451    impl Cmd {
1452        #[doc = "Access window information program Startup area selection and security setting"]
1453        pub const _010: Self = Self::new(2);
1454
1455        #[doc = "OCDID1 program"]
1456        pub const _011: Self = Self::new(3);
1457
1458        #[doc = "OCDID2 program"]
1459        pub const _100: Self = Self::new(4);
1460
1461        #[doc = "OCDID3 program"]
1462        pub const _101: Self = Self::new(5);
1463
1464        #[doc = "OCDID4 program"]
1465        pub const _110: Self = Self::new(6);
1466    }
1467    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1468    pub struct Opst_SPEC;
1469    pub type Opst = crate::EnumBitfieldStruct<u8, Opst_SPEC>;
1470    impl Opst {
1471        #[doc = "Processing stops"]
1472        pub const _0: Self = Self::new(0);
1473
1474        #[doc = "Processing starts."]
1475        pub const _1: Self = Self::new(1);
1476    }
1477}
1478#[doc(hidden)]
1479#[derive(Copy, Clone, Eq, PartialEq)]
1480pub struct Feaml_SPEC;
1481impl crate::sealed::RegSpec for Feaml_SPEC {
1482    type DataType = u16;
1483}
1484
1485#[doc = "Flash Error Address Monitor Register L"]
1486pub type Feaml = crate::RegValueT<Feaml_SPEC>;
1487
1488impl Feaml {
1489    #[doc = "Flash Error Address Monitor Register L"]
1490    #[inline(always)]
1491    pub fn feaml(
1492        self,
1493    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Feaml_SPEC, crate::common::RW>
1494    {
1495        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Feaml_SPEC,crate::common::RW>::from_register(self,0)
1496    }
1497}
1498impl ::core::default::Default for Feaml {
1499    #[inline(always)]
1500    fn default() -> Feaml {
1501        <crate::RegValueT<Feaml_SPEC> as RegisterValue<_>>::new(0)
1502    }
1503}
1504
1505#[doc(hidden)]
1506#[derive(Copy, Clone, Eq, PartialEq)]
1507pub struct Feamh_SPEC;
1508impl crate::sealed::RegSpec for Feamh_SPEC {
1509    type DataType = u16;
1510}
1511
1512#[doc = "Flash Error Address Monitor Register H"]
1513pub type Feamh = crate::RegValueT<Feamh_SPEC>;
1514
1515impl Feamh {
1516    #[doc = "Flash Error Address Monitor Register H"]
1517    #[inline(always)]
1518    pub fn feamh(
1519        self,
1520    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Feamh_SPEC, crate::common::RW>
1521    {
1522        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Feamh_SPEC,crate::common::RW>::from_register(self,0)
1523    }
1524}
1525impl ::core::default::Default for Feamh {
1526    #[inline(always)]
1527    fn default() -> Feamh {
1528        <crate::RegValueT<Feamh_SPEC> as RegisterValue<_>>::new(0)
1529    }
1530}
1531
1532#[doc(hidden)]
1533#[derive(Copy, Clone, Eq, PartialEq)]
1534pub struct Fstatr2_SPEC;
1535impl crate::sealed::RegSpec for Fstatr2_SPEC {
1536    type DataType = u16;
1537}
1538
1539#[doc = "Flash Status Register 2"]
1540pub type Fstatr2 = crate::RegValueT<Fstatr2_SPEC>;
1541
1542impl Fstatr2 {
1543    #[doc = "Erase Error Flag"]
1544    #[inline(always)]
1545    pub fn ererr(
1546        self,
1547    ) -> crate::common::RegisterField<
1548        0,
1549        0x1,
1550        1,
1551        0,
1552        fstatr2::Ererr,
1553        fstatr2::Ererr,
1554        Fstatr2_SPEC,
1555        crate::common::R,
1556    > {
1557        crate::common::RegisterField::<
1558            0,
1559            0x1,
1560            1,
1561            0,
1562            fstatr2::Ererr,
1563            fstatr2::Ererr,
1564            Fstatr2_SPEC,
1565            crate::common::R,
1566        >::from_register(self, 0)
1567    }
1568
1569    #[doc = "Program Error Flag"]
1570    #[inline(always)]
1571    pub fn prgerr(
1572        self,
1573    ) -> crate::common::RegisterField<
1574        1,
1575        0x1,
1576        1,
1577        0,
1578        fstatr2::Prgerr,
1579        fstatr2::Prgerr,
1580        Fstatr2_SPEC,
1581        crate::common::R,
1582    > {
1583        crate::common::RegisterField::<
1584            1,
1585            0x1,
1586            1,
1587            0,
1588            fstatr2::Prgerr,
1589            fstatr2::Prgerr,
1590            Fstatr2_SPEC,
1591            crate::common::R,
1592        >::from_register(self, 0)
1593    }
1594
1595    #[doc = "Program Error Flag 01"]
1596    #[inline(always)]
1597    pub fn prgerr01(
1598        self,
1599    ) -> crate::common::RegisterField<
1600        2,
1601        0x1,
1602        1,
1603        0,
1604        fstatr2::Prgerr01,
1605        fstatr2::Prgerr01,
1606        Fstatr2_SPEC,
1607        crate::common::R,
1608    > {
1609        crate::common::RegisterField::<
1610            2,
1611            0x1,
1612            1,
1613            0,
1614            fstatr2::Prgerr01,
1615            fstatr2::Prgerr01,
1616            Fstatr2_SPEC,
1617            crate::common::R,
1618        >::from_register(self, 0)
1619    }
1620
1621    #[doc = "Blank Check Error Flag"]
1622    #[inline(always)]
1623    pub fn bcerr(
1624        self,
1625    ) -> crate::common::RegisterField<
1626        3,
1627        0x1,
1628        1,
1629        0,
1630        fstatr2::Bcerr,
1631        fstatr2::Bcerr,
1632        Fstatr2_SPEC,
1633        crate::common::R,
1634    > {
1635        crate::common::RegisterField::<
1636            3,
1637            0x1,
1638            1,
1639            0,
1640            fstatr2::Bcerr,
1641            fstatr2::Bcerr,
1642            Fstatr2_SPEC,
1643            crate::common::R,
1644        >::from_register(self, 0)
1645    }
1646
1647    #[doc = "Illegal Command Error Flag"]
1648    #[inline(always)]
1649    pub fn ilglerr(
1650        self,
1651    ) -> crate::common::RegisterField<
1652        4,
1653        0x1,
1654        1,
1655        0,
1656        fstatr2::Ilglerr,
1657        fstatr2::Ilglerr,
1658        Fstatr2_SPEC,
1659        crate::common::R,
1660    > {
1661        crate::common::RegisterField::<
1662            4,
1663            0x1,
1664            1,
1665            0,
1666            fstatr2::Ilglerr,
1667            fstatr2::Ilglerr,
1668            Fstatr2_SPEC,
1669            crate::common::R,
1670        >::from_register(self, 0)
1671    }
1672
1673    #[doc = "Extra Area Illegal Command Error Flag"]
1674    #[inline(always)]
1675    pub fn eilglerr(
1676        self,
1677    ) -> crate::common::RegisterField<
1678        5,
1679        0x1,
1680        1,
1681        0,
1682        fstatr2::Eilglerr,
1683        fstatr2::Eilglerr,
1684        Fstatr2_SPEC,
1685        crate::common::R,
1686    > {
1687        crate::common::RegisterField::<
1688            5,
1689            0x1,
1690            1,
1691            0,
1692            fstatr2::Eilglerr,
1693            fstatr2::Eilglerr,
1694            Fstatr2_SPEC,
1695            crate::common::R,
1696        >::from_register(self, 0)
1697    }
1698}
1699impl ::core::default::Default for Fstatr2 {
1700    #[inline(always)]
1701    fn default() -> Fstatr2 {
1702        <crate::RegValueT<Fstatr2_SPEC> as RegisterValue<_>>::new(0)
1703    }
1704}
1705pub mod fstatr2 {
1706
1707    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1708    pub struct Ererr_SPEC;
1709    pub type Ererr = crate::EnumBitfieldStruct<u8, Ererr_SPEC>;
1710    impl Ererr {
1711        #[doc = "Erasure terminates normally"]
1712        pub const _0: Self = Self::new(0);
1713
1714        #[doc = "An error occurs during erasure"]
1715        pub const _1: Self = Self::new(1);
1716    }
1717    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1718    pub struct Prgerr_SPEC;
1719    pub type Prgerr = crate::EnumBitfieldStruct<u8, Prgerr_SPEC>;
1720    impl Prgerr {
1721        #[doc = "Programming terminates normally"]
1722        pub const _0: Self = Self::new(0);
1723
1724        #[doc = "An error occurs during programming."]
1725        pub const _1: Self = Self::new(1);
1726    }
1727    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1728    pub struct Prgerr01_SPEC;
1729    pub type Prgerr01 = crate::EnumBitfieldStruct<u8, Prgerr01_SPEC>;
1730    impl Prgerr01 {
1731        #[doc = "Programming by the FEXCR register terminates normally"]
1732        pub const _0: Self = Self::new(0);
1733
1734        #[doc = "An error occurs during programming."]
1735        pub const _1: Self = Self::new(1);
1736    }
1737    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1738    pub struct Bcerr_SPEC;
1739    pub type Bcerr = crate::EnumBitfieldStruct<u8, Bcerr_SPEC>;
1740    impl Bcerr {
1741        #[doc = "Blank checking terminates normally"]
1742        pub const _0: Self = Self::new(0);
1743
1744        #[doc = "An error occurs during blank checking."]
1745        pub const _1: Self = Self::new(1);
1746    }
1747    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1748    pub struct Ilglerr_SPEC;
1749    pub type Ilglerr = crate::EnumBitfieldStruct<u8, Ilglerr_SPEC>;
1750    impl Ilglerr {
1751        #[doc = "No illegal software command or illegal access is detected"]
1752        pub const _0: Self = Self::new(0);
1753
1754        #[doc = "An illegal command or illegal access is detected."]
1755        pub const _1: Self = Self::new(1);
1756    }
1757    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1758    pub struct Eilglerr_SPEC;
1759    pub type Eilglerr = crate::EnumBitfieldStruct<u8, Eilglerr_SPEC>;
1760    impl Eilglerr {
1761        #[doc = "No illegal command or illegal access to the extra area is detected"]
1762        pub const _0: Self = Self::new(0);
1763
1764        #[doc = "An illegal command or illegal access to the extra area is detected."]
1765        pub const _1: Self = Self::new(1);
1766    }
1767}
1768#[doc(hidden)]
1769#[derive(Copy, Clone, Eq, PartialEq)]
1770pub struct Tscdr_SPEC;
1771impl crate::sealed::RegSpec for Tscdr_SPEC {
1772    type DataType = u16;
1773}
1774
1775#[doc = "Temperature Sensor Calibration Data Register"]
1776pub type Tscdr = crate::RegValueT<Tscdr_SPEC>;
1777
1778impl Tscdr {
1779    #[doc = "Temperature Sensor Calibration Data"]
1780    #[inline(always)]
1781    pub fn tscdr(
1782        self,
1783    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Tscdr_SPEC, crate::common::R> {
1784        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Tscdr_SPEC,crate::common::R>::from_register(self,0)
1785    }
1786}
1787impl ::core::default::Default for Tscdr {
1788    #[inline(always)]
1789    fn default() -> Tscdr {
1790        <crate::RegValueT<Tscdr_SPEC> as RegisterValue<_>>::new(0)
1791    }
1792}
1793
1794#[doc(hidden)]
1795#[derive(Copy, Clone, Eq, PartialEq)]
1796pub struct Ctsutrima_SPEC;
1797impl crate::sealed::RegSpec for Ctsutrima_SPEC {
1798    type DataType = u32;
1799}
1800
1801#[doc = "CTSU Trimming Register A"]
1802pub type Ctsutrima = crate::RegValueT<Ctsutrima_SPEC>;
1803
1804impl Ctsutrima {
1805    #[doc = "CTSU Reference Resistance Adjustment"]
1806    #[inline(always)]
1807    pub fn rtrim(
1808        self,
1809    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsutrima_SPEC, crate::common::RW>
1810    {
1811        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsutrima_SPEC,crate::common::RW>::from_register(self,0)
1812    }
1813
1814    #[doc = "Linearity Adjustment of Offset Current"]
1815    #[inline(always)]
1816    pub fn dactrim(
1817        self,
1818    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ctsutrima_SPEC, crate::common::RW>
1819    {
1820        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ctsutrima_SPEC,crate::common::RW>::from_register(self,0)
1821    }
1822
1823    #[doc = "CTSU SUCLK Frequency Adjustment"]
1824    #[inline(always)]
1825    pub fn suadjd(
1826        self,
1827    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ctsutrima_SPEC, crate::common::RW>
1828    {
1829        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ctsutrima_SPEC,crate::common::RW>::from_register(self,0)
1830    }
1831
1832    #[doc = "Coefficient of variation for the reference load resistance"]
1833    #[inline(always)]
1834    pub fn suadjtrim(
1835        self,
1836    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ctsutrima_SPEC, crate::common::RW>
1837    {
1838        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ctsutrima_SPEC,crate::common::RW>::from_register(self,0)
1839    }
1840}
1841impl ::core::default::Default for Ctsutrima {
1842    #[inline(always)]
1843    fn default() -> Ctsutrima {
1844        <crate::RegValueT<Ctsutrima_SPEC> as RegisterValue<_>>::new(0)
1845    }
1846}
1847
1848#[doc(hidden)]
1849#[derive(Copy, Clone, Eq, PartialEq)]
1850pub struct Ctsutrimb_SPEC;
1851impl crate::sealed::RegSpec for Ctsutrimb_SPEC {
1852    type DataType = u32;
1853}
1854
1855#[doc = "CTSU Trimming Register B"]
1856pub type Ctsutrimb = crate::RegValueT<Ctsutrimb_SPEC>;
1857
1858impl Ctsutrimb {
1859    #[doc = "The coefficient of variation for the 7.5 kΩ reference load resistance is stored."]
1860    #[inline(always)]
1861    pub fn tresult0(
1862        self,
1863    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsutrimb_SPEC, crate::common::RW>
1864    {
1865        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsutrimb_SPEC,crate::common::RW>::from_register(self,0)
1866    }
1867
1868    #[doc = "The coefficient of variation for the 15 kΩ reference load resistance is stored."]
1869    #[inline(always)]
1870    pub fn tresult1(
1871        self,
1872    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ctsutrimb_SPEC, crate::common::RW>
1873    {
1874        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ctsutrimb_SPEC,crate::common::RW>::from_register(self,0)
1875    }
1876
1877    #[doc = "The coefficient of variation for the 30 kΩ reference load resistance is stored."]
1878    #[inline(always)]
1879    pub fn tresult2(
1880        self,
1881    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ctsutrimb_SPEC, crate::common::RW>
1882    {
1883        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ctsutrimb_SPEC,crate::common::RW>::from_register(self,0)
1884    }
1885
1886    #[doc = "The coefficient of variation for the 60 kΩ reference load resistance is stored."]
1887    #[inline(always)]
1888    pub fn tresult3(
1889        self,
1890    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ctsutrimb_SPEC, crate::common::RW>
1891    {
1892        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ctsutrimb_SPEC,crate::common::RW>::from_register(self,0)
1893    }
1894}
1895impl ::core::default::Default for Ctsutrimb {
1896    #[inline(always)]
1897    fn default() -> Ctsutrimb {
1898        <crate::RegValueT<Ctsutrimb_SPEC> as RegisterValue<_>>::new(0)
1899    }
1900}
1901
1902#[doc(hidden)]
1903#[derive(Copy, Clone, Eq, PartialEq)]
1904pub struct Fentryr_SPEC;
1905impl crate::sealed::RegSpec for Fentryr_SPEC {
1906    type DataType = u16;
1907}
1908
1909#[doc = "Flash P/E Mode Entry Register"]
1910pub type Fentryr = crate::RegValueT<Fentryr_SPEC>;
1911
1912impl Fentryr {
1913    #[doc = "Code Flash P/E Mode Entry 0"]
1914    #[inline(always)]
1915    pub fn fentry0(
1916        self,
1917    ) -> crate::common::RegisterField<
1918        0,
1919        0x1,
1920        1,
1921        0,
1922        fentryr::Fentry0,
1923        fentryr::Fentry0,
1924        Fentryr_SPEC,
1925        crate::common::RW,
1926    > {
1927        crate::common::RegisterField::<
1928            0,
1929            0x1,
1930            1,
1931            0,
1932            fentryr::Fentry0,
1933            fentryr::Fentry0,
1934            Fentryr_SPEC,
1935            crate::common::RW,
1936        >::from_register(self, 0)
1937    }
1938
1939    #[doc = "Data Flash P/E Mode Entry"]
1940    #[inline(always)]
1941    pub fn fentryd(
1942        self,
1943    ) -> crate::common::RegisterField<
1944        7,
1945        0x1,
1946        1,
1947        0,
1948        fentryr::Fentryd,
1949        fentryr::Fentryd,
1950        Fentryr_SPEC,
1951        crate::common::RW,
1952    > {
1953        crate::common::RegisterField::<
1954            7,
1955            0x1,
1956            1,
1957            0,
1958            fentryr::Fentryd,
1959            fentryr::Fentryd,
1960            Fentryr_SPEC,
1961            crate::common::RW,
1962        >::from_register(self, 0)
1963    }
1964
1965    #[doc = "Key Code"]
1966    #[inline(always)]
1967    pub fn fekey(
1968        self,
1969    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fentryr_SPEC, crate::common::W> {
1970        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fentryr_SPEC,crate::common::W>::from_register(self,0)
1971    }
1972}
1973impl ::core::default::Default for Fentryr {
1974    #[inline(always)]
1975    fn default() -> Fentryr {
1976        <crate::RegValueT<Fentryr_SPEC> as RegisterValue<_>>::new(0)
1977    }
1978}
1979pub mod fentryr {
1980
1981    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1982    pub struct Fentry0_SPEC;
1983    pub type Fentry0 = crate::EnumBitfieldStruct<u8, Fentry0_SPEC>;
1984    impl Fentry0 {
1985        #[doc = "The code flash is the read mode"]
1986        pub const _0: Self = Self::new(0);
1987
1988        #[doc = "The code flash is the P/E mode."]
1989        pub const _1: Self = Self::new(1);
1990    }
1991    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1992    pub struct Fentryd_SPEC;
1993    pub type Fentryd = crate::EnumBitfieldStruct<u8, Fentryd_SPEC>;
1994    impl Fentryd {
1995        #[doc = "The data flash is the read mode"]
1996        pub const _0: Self = Self::new(0);
1997
1998        #[doc = "The data flash is the P/E mode."]
1999        pub const _1: Self = Self::new(1);
2000    }
2001}
2002#[doc(hidden)]
2003#[derive(Copy, Clone, Eq, PartialEq)]
2004pub struct Fldwaitr_SPEC;
2005impl crate::sealed::RegSpec for Fldwaitr_SPEC {
2006    type DataType = u8;
2007}
2008
2009#[doc = "Memory Wait Cycle Control Register for Data Flash"]
2010pub type Fldwaitr = crate::RegValueT<Fldwaitr_SPEC>;
2011
2012impl Fldwaitr {
2013    #[doc = "Memory Wait Cycle Select for Data Flash"]
2014    #[inline(always)]
2015    pub fn fldwait1(
2016        self,
2017    ) -> crate::common::RegisterField<
2018        0,
2019        0x1,
2020        1,
2021        0,
2022        fldwaitr::Fldwait1,
2023        fldwaitr::Fldwait1,
2024        Fldwaitr_SPEC,
2025        crate::common::RW,
2026    > {
2027        crate::common::RegisterField::<
2028            0,
2029            0x1,
2030            1,
2031            0,
2032            fldwaitr::Fldwait1,
2033            fldwaitr::Fldwait1,
2034            Fldwaitr_SPEC,
2035            crate::common::RW,
2036        >::from_register(self, 0)
2037    }
2038}
2039impl ::core::default::Default for Fldwaitr {
2040    #[inline(always)]
2041    fn default() -> Fldwaitr {
2042        <crate::RegValueT<Fldwaitr_SPEC> as RegisterValue<_>>::new(0)
2043    }
2044}
2045pub mod fldwaitr {
2046
2047    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2048    pub struct Fldwait1_SPEC;
2049    pub type Fldwait1 = crate::EnumBitfieldStruct<u8, Fldwait1_SPEC>;
2050    impl Fldwait1 {
2051        #[doc = "1 wait access (Default)"]
2052        pub const _0: Self = Self::new(0);
2053
2054        #[doc = "2 wait access"]
2055        pub const _1: Self = Self::new(1);
2056    }
2057}
2058#[doc(hidden)]
2059#[derive(Copy, Clone, Eq, PartialEq)]
2060pub struct Pfber_SPEC;
2061impl crate::sealed::RegSpec for Pfber_SPEC {
2062    type DataType = u8;
2063}
2064
2065#[doc = "Prefetch Buffer Enable Register"]
2066pub type Pfber = crate::RegValueT<Pfber_SPEC>;
2067
2068impl Pfber {
2069    #[doc = "Prefetch Buffer Enable bit"]
2070    #[inline(always)]
2071    pub fn pfbe(
2072        self,
2073    ) -> crate::common::RegisterField<
2074        0,
2075        0x1,
2076        1,
2077        0,
2078        pfber::Pfbe,
2079        pfber::Pfbe,
2080        Pfber_SPEC,
2081        crate::common::RW,
2082    > {
2083        crate::common::RegisterField::<
2084            0,
2085            0x1,
2086            1,
2087            0,
2088            pfber::Pfbe,
2089            pfber::Pfbe,
2090            Pfber_SPEC,
2091            crate::common::RW,
2092        >::from_register(self, 0)
2093    }
2094}
2095impl ::core::default::Default for Pfber {
2096    #[inline(always)]
2097    fn default() -> Pfber {
2098        <crate::RegValueT<Pfber_SPEC> as RegisterValue<_>>::new(0)
2099    }
2100}
2101pub mod pfber {
2102
2103    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2104    pub struct Pfbe_SPEC;
2105    pub type Pfbe = crate::EnumBitfieldStruct<u8, Pfbe_SPEC>;
2106    impl Pfbe {
2107        #[doc = "Prefetch buffer is disabled"]
2108        pub const _0: Self = Self::new(0);
2109
2110        #[doc = "Prefetch buffer is enabled"]
2111        pub const _1: Self = Self::new(1);
2112    }
2113}
ra2e1_pac/flcn.rs

ra2e1_pac/
flcn.rs
