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ra2e1_pac/
ctsu.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.51.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:01:43 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Capacitive Touch Sensing Unit"]
28unsafe impl ::core::marker::Send for super::Ctsu {}
29unsafe impl ::core::marker::Sync for super::Ctsu {}
30impl super::Ctsu {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "CTSU Control Register A"]
38    #[inline(always)]
39    pub const fn ctsucra(
40        &self,
41    ) -> &'static crate::common::Reg<self::Ctsucra_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Ctsucra_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "CTSU Control Register A"]
50    #[inline(always)]
51    pub const fn ctsucral(
52        &self,
53    ) -> &'static crate::common::Reg<self::Ctsucral_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Ctsucral_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(0usize),
57            )
58        }
59    }
60
61    #[doc = "CTSU Control Register A"]
62    #[inline(always)]
63    pub const fn ctsucr0(
64        &self,
65    ) -> &'static crate::common::Reg<self::Ctsucr0_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Ctsucr0_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(0usize),
69            )
70        }
71    }
72
73    #[doc = "CTSU Control Register A"]
74    #[inline(always)]
75    pub const fn ctsucr1(
76        &self,
77    ) -> &'static crate::common::Reg<self::Ctsucr1_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Ctsucr1_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(1usize),
81            )
82        }
83    }
84
85    #[doc = "CTSU Control Register A"]
86    #[inline(always)]
87    pub const fn ctsucrah(
88        &self,
89    ) -> &'static crate::common::Reg<self::Ctsucrah_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Ctsucrah_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(2usize),
93            )
94        }
95    }
96
97    #[doc = "CTSU Control Register A"]
98    #[inline(always)]
99    pub const fn ctsucr2(
100        &self,
101    ) -> &'static crate::common::Reg<self::Ctsucr2_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Ctsucr2_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(2usize),
105            )
106        }
107    }
108
109    #[doc = "CTSU Control Register A"]
110    #[inline(always)]
111    pub const fn ctsucr3(
112        &self,
113    ) -> &'static crate::common::Reg<self::Ctsucr3_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::Ctsucr3_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(3usize),
117            )
118        }
119    }
120
121    #[doc = "CTSU Control Register B"]
122    #[inline(always)]
123    pub const fn ctsucrb(
124        &self,
125    ) -> &'static crate::common::Reg<self::Ctsucrb_SPEC, crate::common::RW> {
126        unsafe {
127            crate::common::Reg::<self::Ctsucrb_SPEC, crate::common::RW>::from_ptr(
128                self._svd2pac_as_ptr().add(4usize),
129            )
130        }
131    }
132
133    #[doc = "CTSU Control Register B"]
134    #[inline(always)]
135    pub const fn ctsucrbl(
136        &self,
137    ) -> &'static crate::common::Reg<self::Ctsucrbl_SPEC, crate::common::RW> {
138        unsafe {
139            crate::common::Reg::<self::Ctsucrbl_SPEC, crate::common::RW>::from_ptr(
140                self._svd2pac_as_ptr().add(4usize),
141            )
142        }
143    }
144
145    #[doc = "CTSU Control Register B"]
146    #[inline(always)]
147    pub const fn ctsusdprs(
148        &self,
149    ) -> &'static crate::common::Reg<self::Ctsusdprs_SPEC, crate::common::RW> {
150        unsafe {
151            crate::common::Reg::<self::Ctsusdprs_SPEC, crate::common::RW>::from_ptr(
152                self._svd2pac_as_ptr().add(4usize),
153            )
154        }
155    }
156
157    #[doc = "CTSU Control Register B"]
158    #[inline(always)]
159    pub const fn ctsusst(
160        &self,
161    ) -> &'static crate::common::Reg<self::Ctsusst_SPEC, crate::common::RW> {
162        unsafe {
163            crate::common::Reg::<self::Ctsusst_SPEC, crate::common::RW>::from_ptr(
164                self._svd2pac_as_ptr().add(5usize),
165            )
166        }
167    }
168
169    #[doc = "CTSU Control Register B"]
170    #[inline(always)]
171    pub const fn ctsucrbh(
172        &self,
173    ) -> &'static crate::common::Reg<self::Ctsucrbh_SPEC, crate::common::RW> {
174        unsafe {
175            crate::common::Reg::<self::Ctsucrbh_SPEC, crate::common::RW>::from_ptr(
176                self._svd2pac_as_ptr().add(6usize),
177            )
178        }
179    }
180
181    #[doc = "CTSU Control Register B"]
182    #[inline(always)]
183    pub const fn ctsudclkc(
184        &self,
185    ) -> &'static crate::common::Reg<self::Ctsudclkc_SPEC, crate::common::RW> {
186        unsafe {
187            crate::common::Reg::<self::Ctsudclkc_SPEC, crate::common::RW>::from_ptr(
188                self._svd2pac_as_ptr().add(7usize),
189            )
190        }
191    }
192
193    #[doc = "CTSU Measurement Channel Register"]
194    #[inline(always)]
195    pub const fn ctsumch(
196        &self,
197    ) -> &'static crate::common::Reg<self::Ctsumch_SPEC, crate::common::RW> {
198        unsafe {
199            crate::common::Reg::<self::Ctsumch_SPEC, crate::common::RW>::from_ptr(
200                self._svd2pac_as_ptr().add(8usize),
201            )
202        }
203    }
204
205    #[doc = "CTSU Measurement Channel Register"]
206    #[inline(always)]
207    pub const fn ctsumchl(
208        &self,
209    ) -> &'static crate::common::Reg<self::Ctsumchl_SPEC, crate::common::RW> {
210        unsafe {
211            crate::common::Reg::<self::Ctsumchl_SPEC, crate::common::RW>::from_ptr(
212                self._svd2pac_as_ptr().add(8usize),
213            )
214        }
215    }
216
217    #[doc = "CTSU Measurement Channel Register"]
218    #[inline(always)]
219    pub const fn ctsumch0(
220        &self,
221    ) -> &'static crate::common::Reg<self::Ctsumch0_SPEC, crate::common::RW> {
222        unsafe {
223            crate::common::Reg::<self::Ctsumch0_SPEC, crate::common::RW>::from_ptr(
224                self._svd2pac_as_ptr().add(8usize),
225            )
226        }
227    }
228
229    #[doc = "CTSU Measurement Channel Register"]
230    #[inline(always)]
231    pub const fn ctsumch1(
232        &self,
233    ) -> &'static crate::common::Reg<self::Ctsumch1_SPEC, crate::common::RW> {
234        unsafe {
235            crate::common::Reg::<self::Ctsumch1_SPEC, crate::common::RW>::from_ptr(
236                self._svd2pac_as_ptr().add(9usize),
237            )
238        }
239    }
240
241    #[doc = "CTSU Measurement Channel Register"]
242    #[inline(always)]
243    pub const fn ctsumchh(
244        &self,
245    ) -> &'static crate::common::Reg<self::Ctsumchh_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::Ctsumchh_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(10usize),
249            )
250        }
251    }
252
253    #[doc = "CTSU Measurement Channel Register"]
254    #[inline(always)]
255    pub const fn ctsumfaf(
256        &self,
257    ) -> &'static crate::common::Reg<self::Ctsumfaf_SPEC, crate::common::RW> {
258        unsafe {
259            crate::common::Reg::<self::Ctsumfaf_SPEC, crate::common::RW>::from_ptr(
260                self._svd2pac_as_ptr().add(10usize),
261            )
262        }
263    }
264
265    #[doc = "CTSU Channel Enable Control Register A"]
266    #[inline(always)]
267    pub const fn ctsuchaca(
268        &self,
269    ) -> &'static crate::common::Reg<self::Ctsuchaca_SPEC, crate::common::RW> {
270        unsafe {
271            crate::common::Reg::<self::Ctsuchaca_SPEC, crate::common::RW>::from_ptr(
272                self._svd2pac_as_ptr().add(12usize),
273            )
274        }
275    }
276
277    #[doc = "CTSU Channel Enable Control Register A"]
278    #[inline(always)]
279    pub const fn ctsuchacal(
280        &self,
281    ) -> &'static crate::common::Reg<self::Ctsuchacal_SPEC, crate::common::RW> {
282        unsafe {
283            crate::common::Reg::<self::Ctsuchacal_SPEC, crate::common::RW>::from_ptr(
284                self._svd2pac_as_ptr().add(12usize),
285            )
286        }
287    }
288
289    #[doc = "CTSU Channel Enable Control Register A"]
290    #[inline(always)]
291    pub const fn ctsuchac0(
292        &self,
293    ) -> &'static crate::common::Reg<self::Ctsuchac0_SPEC, crate::common::RW> {
294        unsafe {
295            crate::common::Reg::<self::Ctsuchac0_SPEC, crate::common::RW>::from_ptr(
296                self._svd2pac_as_ptr().add(12usize),
297            )
298        }
299    }
300
301    #[doc = "CTSU Channel Enable Control Register A"]
302    #[inline(always)]
303    pub const fn ctsuchac1(
304        &self,
305    ) -> &'static crate::common::Reg<self::Ctsuchac1_SPEC, crate::common::RW> {
306        unsafe {
307            crate::common::Reg::<self::Ctsuchac1_SPEC, crate::common::RW>::from_ptr(
308                self._svd2pac_as_ptr().add(13usize),
309            )
310        }
311    }
312
313    #[doc = "CTSU Channel Enable Control Register A"]
314    #[inline(always)]
315    pub const fn ctsuchacah(
316        &self,
317    ) -> &'static crate::common::Reg<self::Ctsuchacah_SPEC, crate::common::RW> {
318        unsafe {
319            crate::common::Reg::<self::Ctsuchacah_SPEC, crate::common::RW>::from_ptr(
320                self._svd2pac_as_ptr().add(14usize),
321            )
322        }
323    }
324
325    #[doc = "CTSU Channel Enable Control Register A"]
326    #[inline(always)]
327    pub const fn ctsuchac2(
328        &self,
329    ) -> &'static crate::common::Reg<self::Ctsuchac2_SPEC, crate::common::RW> {
330        unsafe {
331            crate::common::Reg::<self::Ctsuchac2_SPEC, crate::common::RW>::from_ptr(
332                self._svd2pac_as_ptr().add(14usize),
333            )
334        }
335    }
336
337    #[doc = "CTSU Channel Enable Control Register A"]
338    #[inline(always)]
339    pub const fn ctsuchac3(
340        &self,
341    ) -> &'static crate::common::Reg<self::Ctsuchac3_SPEC, crate::common::RW> {
342        unsafe {
343            crate::common::Reg::<self::Ctsuchac3_SPEC, crate::common::RW>::from_ptr(
344                self._svd2pac_as_ptr().add(15usize),
345            )
346        }
347    }
348
349    #[doc = "CTSU Channel Enable Control Register B"]
350    #[inline(always)]
351    pub const fn ctsuchacb(
352        &self,
353    ) -> &'static crate::common::Reg<self::Ctsuchacb_SPEC, crate::common::RW> {
354        unsafe {
355            crate::common::Reg::<self::Ctsuchacb_SPEC, crate::common::RW>::from_ptr(
356                self._svd2pac_as_ptr().add(16usize),
357            )
358        }
359    }
360
361    #[doc = "CTSU Channel Enable Control Register B"]
362    #[inline(always)]
363    pub const fn ctsuchacbl(
364        &self,
365    ) -> &'static crate::common::Reg<self::Ctsuchacbl_SPEC, crate::common::RW> {
366        unsafe {
367            crate::common::Reg::<self::Ctsuchacbl_SPEC, crate::common::RW>::from_ptr(
368                self._svd2pac_as_ptr().add(16usize),
369            )
370        }
371    }
372
373    #[doc = "CTSU Channel Enable Control Register B"]
374    #[inline(always)]
375    pub const fn ctsuchac4(
376        &self,
377    ) -> &'static crate::common::Reg<self::Ctsuchac4_SPEC, crate::common::RW> {
378        unsafe {
379            crate::common::Reg::<self::Ctsuchac4_SPEC, crate::common::RW>::from_ptr(
380                self._svd2pac_as_ptr().add(16usize),
381            )
382        }
383    }
384
385    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
386    #[inline(always)]
387    pub const fn ctsuchtrca(
388        &self,
389    ) -> &'static crate::common::Reg<self::Ctsuchtrca_SPEC, crate::common::RW> {
390        unsafe {
391            crate::common::Reg::<self::Ctsuchtrca_SPEC, crate::common::RW>::from_ptr(
392                self._svd2pac_as_ptr().add(20usize),
393            )
394        }
395    }
396
397    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
398    #[inline(always)]
399    pub const fn ctsuchtrcal(
400        &self,
401    ) -> &'static crate::common::Reg<self::Ctsuchtrcal_SPEC, crate::common::RW> {
402        unsafe {
403            crate::common::Reg::<self::Ctsuchtrcal_SPEC, crate::common::RW>::from_ptr(
404                self._svd2pac_as_ptr().add(20usize),
405            )
406        }
407    }
408
409    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
410    #[inline(always)]
411    pub const fn ctsuchtrc0(
412        &self,
413    ) -> &'static crate::common::Reg<self::Ctsuchtrc0_SPEC, crate::common::RW> {
414        unsafe {
415            crate::common::Reg::<self::Ctsuchtrc0_SPEC, crate::common::RW>::from_ptr(
416                self._svd2pac_as_ptr().add(20usize),
417            )
418        }
419    }
420
421    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
422    #[inline(always)]
423    pub const fn ctsuchtrc1(
424        &self,
425    ) -> &'static crate::common::Reg<self::Ctsuchtrc1_SPEC, crate::common::RW> {
426        unsafe {
427            crate::common::Reg::<self::Ctsuchtrc1_SPEC, crate::common::RW>::from_ptr(
428                self._svd2pac_as_ptr().add(21usize),
429            )
430        }
431    }
432
433    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
434    #[inline(always)]
435    pub const fn ctsuchtrcah(
436        &self,
437    ) -> &'static crate::common::Reg<self::Ctsuchtrcah_SPEC, crate::common::RW> {
438        unsafe {
439            crate::common::Reg::<self::Ctsuchtrcah_SPEC, crate::common::RW>::from_ptr(
440                self._svd2pac_as_ptr().add(22usize),
441            )
442        }
443    }
444
445    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
446    #[inline(always)]
447    pub const fn ctsuchtrc2(
448        &self,
449    ) -> &'static crate::common::Reg<self::Ctsuchtrc2_SPEC, crate::common::RW> {
450        unsafe {
451            crate::common::Reg::<self::Ctsuchtrc2_SPEC, crate::common::RW>::from_ptr(
452                self._svd2pac_as_ptr().add(22usize),
453            )
454        }
455    }
456
457    #[doc = "CTSU Channel Transmit/Receive Control Register A"]
458    #[inline(always)]
459    pub const fn ctsuchtrc3(
460        &self,
461    ) -> &'static crate::common::Reg<self::Ctsuchtrc3_SPEC, crate::common::RW> {
462        unsafe {
463            crate::common::Reg::<self::Ctsuchtrc3_SPEC, crate::common::RW>::from_ptr(
464                self._svd2pac_as_ptr().add(23usize),
465            )
466        }
467    }
468
469    #[doc = "CTSU Channel Transmit/Receive Control Register B"]
470    #[inline(always)]
471    pub const fn ctsuchtrcb(
472        &self,
473    ) -> &'static crate::common::Reg<self::Ctsuchtrcb_SPEC, crate::common::RW> {
474        unsafe {
475            crate::common::Reg::<self::Ctsuchtrcb_SPEC, crate::common::RW>::from_ptr(
476                self._svd2pac_as_ptr().add(24usize),
477            )
478        }
479    }
480
481    #[doc = "CTSU Channel Transmit/Receive Control Register B"]
482    #[inline(always)]
483    pub const fn ctsuchtrcbl(
484        &self,
485    ) -> &'static crate::common::Reg<self::Ctsuchtrcbl_SPEC, crate::common::RW> {
486        unsafe {
487            crate::common::Reg::<self::Ctsuchtrcbl_SPEC, crate::common::RW>::from_ptr(
488                self._svd2pac_as_ptr().add(24usize),
489            )
490        }
491    }
492
493    #[doc = "CTSU Channel Transmit/Receive Control Register B"]
494    #[inline(always)]
495    pub const fn ctsuchtrc4(
496        &self,
497    ) -> &'static crate::common::Reg<self::Ctsuchtrc4_SPEC, crate::common::RW> {
498        unsafe {
499            crate::common::Reg::<self::Ctsuchtrc4_SPEC, crate::common::RW>::from_ptr(
500                self._svd2pac_as_ptr().add(24usize),
501            )
502        }
503    }
504
505    #[doc = "CTSU Status Register"]
506    #[inline(always)]
507    pub const fn ctsusr(
508        &self,
509    ) -> &'static crate::common::Reg<self::Ctsusr_SPEC, crate::common::RW> {
510        unsafe {
511            crate::common::Reg::<self::Ctsusr_SPEC, crate::common::RW>::from_ptr(
512                self._svd2pac_as_ptr().add(28usize),
513            )
514        }
515    }
516
517    #[doc = "CTSU Status Register"]
518    #[inline(always)]
519    pub const fn ctsusrl(
520        &self,
521    ) -> &'static crate::common::Reg<self::Ctsusrl_SPEC, crate::common::RW> {
522        unsafe {
523            crate::common::Reg::<self::Ctsusrl_SPEC, crate::common::RW>::from_ptr(
524                self._svd2pac_as_ptr().add(28usize),
525            )
526        }
527    }
528
529    #[doc = "CTSU Status Register"]
530    #[inline(always)]
531    pub const fn ctsusr0(
532        &self,
533    ) -> &'static crate::common::Reg<self::Ctsusr0_SPEC, crate::common::RW> {
534        unsafe {
535            crate::common::Reg::<self::Ctsusr0_SPEC, crate::common::RW>::from_ptr(
536                self._svd2pac_as_ptr().add(28usize),
537            )
538        }
539    }
540
541    #[doc = "CTSU Status Register"]
542    #[inline(always)]
543    pub const fn ctsust(
544        &self,
545    ) -> &'static crate::common::Reg<self::Ctsust_SPEC, crate::common::RW> {
546        unsafe {
547            crate::common::Reg::<self::Ctsust_SPEC, crate::common::RW>::from_ptr(
548                self._svd2pac_as_ptr().add(29usize),
549            )
550        }
551    }
552
553    #[doc = "CTSU Status Register"]
554    #[inline(always)]
555    pub const fn ctsusrh(
556        &self,
557    ) -> &'static crate::common::Reg<self::Ctsusrh_SPEC, crate::common::RW> {
558        unsafe {
559            crate::common::Reg::<self::Ctsusrh_SPEC, crate::common::RW>::from_ptr(
560                self._svd2pac_as_ptr().add(30usize),
561            )
562        }
563    }
564
565    #[doc = "CTSU Status Register"]
566    #[inline(always)]
567    pub const fn ctsusr2(
568        &self,
569    ) -> &'static crate::common::Reg<self::Ctsusr2_SPEC, crate::common::RW> {
570        unsafe {
571            crate::common::Reg::<self::Ctsusr2_SPEC, crate::common::RW>::from_ptr(
572                self._svd2pac_as_ptr().add(30usize),
573            )
574        }
575    }
576
577    #[doc = "CTSU Sensor Offset Register"]
578    #[inline(always)]
579    pub const fn ctsuso(
580        &self,
581    ) -> &'static crate::common::Reg<self::Ctsuso_SPEC, crate::common::RW> {
582        unsafe {
583            crate::common::Reg::<self::Ctsuso_SPEC, crate::common::RW>::from_ptr(
584                self._svd2pac_as_ptr().add(32usize),
585            )
586        }
587    }
588
589    #[doc = "CTSU Sensor Offset Register"]
590    #[inline(always)]
591    pub const fn ctsuso0(
592        &self,
593    ) -> &'static crate::common::Reg<self::Ctsuso0_SPEC, crate::common::RW> {
594        unsafe {
595            crate::common::Reg::<self::Ctsuso0_SPEC, crate::common::RW>::from_ptr(
596                self._svd2pac_as_ptr().add(32usize),
597            )
598        }
599    }
600
601    #[doc = "CTSU Sensor Offset Register"]
602    #[inline(always)]
603    pub const fn ctsuso1(
604        &self,
605    ) -> &'static crate::common::Reg<self::Ctsuso1_SPEC, crate::common::RW> {
606        unsafe {
607            crate::common::Reg::<self::Ctsuso1_SPEC, crate::common::RW>::from_ptr(
608                self._svd2pac_as_ptr().add(34usize),
609            )
610        }
611    }
612
613    #[doc = "CTSU Sensor Counter Register"]
614    #[inline(always)]
615    pub const fn ctsuscnt(
616        &self,
617    ) -> &'static crate::common::Reg<self::Ctsuscnt_SPEC, crate::common::R> {
618        unsafe {
619            crate::common::Reg::<self::Ctsuscnt_SPEC, crate::common::R>::from_ptr(
620                self._svd2pac_as_ptr().add(36usize),
621            )
622        }
623    }
624
625    #[doc = "CTSU Sensor Counter Register"]
626    #[inline(always)]
627    pub const fn ctsusc(&self) -> &'static crate::common::Reg<self::Ctsusc_SPEC, crate::common::R> {
628        unsafe {
629            crate::common::Reg::<self::Ctsusc_SPEC, crate::common::R>::from_ptr(
630                self._svd2pac_as_ptr().add(36usize),
631            )
632        }
633    }
634
635    #[doc = "CTSU Calibration Register"]
636    #[inline(always)]
637    pub const fn ctsucalib(
638        &self,
639    ) -> &'static crate::common::Reg<self::Ctsucalib_SPEC, crate::common::RW> {
640        unsafe {
641            crate::common::Reg::<self::Ctsucalib_SPEC, crate::common::RW>::from_ptr(
642                self._svd2pac_as_ptr().add(40usize),
643            )
644        }
645    }
646
647    #[doc = "CTSU Calibration Register"]
648    #[inline(always)]
649    pub const fn ctsudbgr0(
650        &self,
651    ) -> &'static crate::common::Reg<self::Ctsudbgr0_SPEC, crate::common::RW> {
652        unsafe {
653            crate::common::Reg::<self::Ctsudbgr0_SPEC, crate::common::RW>::from_ptr(
654                self._svd2pac_as_ptr().add(40usize),
655            )
656        }
657    }
658
659    #[doc = "CTSU Calibration Register"]
660    #[inline(always)]
661    pub const fn ctsudbgr1(
662        &self,
663    ) -> &'static crate::common::Reg<self::Ctsudbgr1_SPEC, crate::common::RW> {
664        unsafe {
665            crate::common::Reg::<self::Ctsudbgr1_SPEC, crate::common::RW>::from_ptr(
666                self._svd2pac_as_ptr().add(42usize),
667            )
668        }
669    }
670
671    #[doc = "CTSU Sensor Unit Clock Control Register A"]
672    #[inline(always)]
673    pub const fn ctsusuclka(
674        &self,
675    ) -> &'static crate::common::Reg<self::Ctsusuclka_SPEC, crate::common::RW> {
676        unsafe {
677            crate::common::Reg::<self::Ctsusuclka_SPEC, crate::common::RW>::from_ptr(
678                self._svd2pac_as_ptr().add(44usize),
679            )
680        }
681    }
682
683    #[doc = "CTSU Sensor Unit Clock Control Register A"]
684    #[inline(always)]
685    pub const fn ctsusuclk0(
686        &self,
687    ) -> &'static crate::common::Reg<self::Ctsusuclk0_SPEC, crate::common::RW> {
688        unsafe {
689            crate::common::Reg::<self::Ctsusuclk0_SPEC, crate::common::RW>::from_ptr(
690                self._svd2pac_as_ptr().add(44usize),
691            )
692        }
693    }
694
695    #[doc = "CTSU Sensor Unit Clock Control Register A"]
696    #[inline(always)]
697    pub const fn ctsusuclk1(
698        &self,
699    ) -> &'static crate::common::Reg<self::Ctsusuclk1_SPEC, crate::common::RW> {
700        unsafe {
701            crate::common::Reg::<self::Ctsusuclk1_SPEC, crate::common::RW>::from_ptr(
702                self._svd2pac_as_ptr().add(46usize),
703            )
704        }
705    }
706
707    #[doc = "CTSU Sensor Unit Clock Control Register B"]
708    #[inline(always)]
709    pub const fn ctsusuclkb(
710        &self,
711    ) -> &'static crate::common::Reg<self::Ctsusuclkb_SPEC, crate::common::RW> {
712        unsafe {
713            crate::common::Reg::<self::Ctsusuclkb_SPEC, crate::common::RW>::from_ptr(
714                self._svd2pac_as_ptr().add(48usize),
715            )
716        }
717    }
718
719    #[doc = "CTSU Sensor Unit Clock Control Register B"]
720    #[inline(always)]
721    pub const fn ctsusuclk2(
722        &self,
723    ) -> &'static crate::common::Reg<self::Ctsusuclk2_SPEC, crate::common::RW> {
724        unsafe {
725            crate::common::Reg::<self::Ctsusuclk2_SPEC, crate::common::RW>::from_ptr(
726                self._svd2pac_as_ptr().add(48usize),
727            )
728        }
729    }
730
731    #[doc = "CTSU Sensor Unit Clock Control Register B"]
732    #[inline(always)]
733    pub const fn ctsusuclk3(
734        &self,
735    ) -> &'static crate::common::Reg<self::Ctsusuclk3_SPEC, crate::common::RW> {
736        unsafe {
737            crate::common::Reg::<self::Ctsusuclk3_SPEC, crate::common::RW>::from_ptr(
738                self._svd2pac_as_ptr().add(50usize),
739            )
740        }
741    }
742
743    #[doc = "CTSU CFC Counter Register"]
744    #[inline(always)]
745    pub const fn ctsucfccnt(
746        &self,
747    ) -> &'static crate::common::Reg<self::Ctsucfccnt_SPEC, crate::common::R> {
748        unsafe {
749            crate::common::Reg::<self::Ctsucfccnt_SPEC, crate::common::R>::from_ptr(
750                self._svd2pac_as_ptr().add(52usize),
751            )
752        }
753    }
754
755    #[doc = "CTSU CFC Counter Register"]
756    #[inline(always)]
757    pub const fn ctsucfccntl(
758        &self,
759    ) -> &'static crate::common::Reg<self::Ctsucfccntl_SPEC, crate::common::R> {
760        unsafe {
761            crate::common::Reg::<self::Ctsucfccntl_SPEC, crate::common::R>::from_ptr(
762                self._svd2pac_as_ptr().add(52usize),
763            )
764        }
765    }
766}
767#[doc(hidden)]
768#[derive(Copy, Clone, Eq, PartialEq)]
769pub struct Ctsucra_SPEC;
770impl crate::sealed::RegSpec for Ctsucra_SPEC {
771    type DataType = u32;
772}
773
774#[doc = "CTSU Control Register A"]
775pub type Ctsucra = crate::RegValueT<Ctsucra_SPEC>;
776
777impl Ctsucra {
778    #[doc = "CTSU Measurement Operation Start"]
779    #[inline(always)]
780    pub fn strt(
781        self,
782    ) -> crate::common::RegisterField<
783        0,
784        0x1,
785        1,
786        0,
787        ctsucra::Strt,
788        ctsucra::Strt,
789        Ctsucra_SPEC,
790        crate::common::RW,
791    > {
792        crate::common::RegisterField::<
793            0,
794            0x1,
795            1,
796            0,
797            ctsucra::Strt,
798            ctsucra::Strt,
799            Ctsucra_SPEC,
800            crate::common::RW,
801        >::from_register(self, 0)
802    }
803
804    #[doc = "CTSU Measurement Operation Start Trigger Select"]
805    #[inline(always)]
806    pub fn cap(
807        self,
808    ) -> crate::common::RegisterField<
809        1,
810        0x1,
811        1,
812        0,
813        ctsucra::Cap,
814        ctsucra::Cap,
815        Ctsucra_SPEC,
816        crate::common::RW,
817    > {
818        crate::common::RegisterField::<
819            1,
820            0x1,
821            1,
822            0,
823            ctsucra::Cap,
824            ctsucra::Cap,
825            Ctsucra_SPEC,
826            crate::common::RW,
827        >::from_register(self, 0)
828    }
829
830    #[doc = "CTSU Wait State Power-Saving Enable"]
831    #[inline(always)]
832    pub fn snz(
833        self,
834    ) -> crate::common::RegisterField<
835        2,
836        0x1,
837        1,
838        0,
839        ctsucra::Snz,
840        ctsucra::Snz,
841        Ctsucra_SPEC,
842        crate::common::RW,
843    > {
844        crate::common::RegisterField::<
845            2,
846            0x1,
847            1,
848            0,
849            ctsucra::Snz,
850            ctsucra::Snz,
851            Ctsucra_SPEC,
852            crate::common::RW,
853        >::from_register(self, 0)
854    }
855
856    #[doc = "CTSU CFC Power On Control"]
857    #[inline(always)]
858    pub fn cfcon(
859        self,
860    ) -> crate::common::RegisterField<
861        3,
862        0x1,
863        1,
864        0,
865        ctsucra::Cfcon,
866        ctsucra::Cfcon,
867        Ctsucra_SPEC,
868        crate::common::RW,
869    > {
870        crate::common::RegisterField::<
871            3,
872            0x1,
873            1,
874            0,
875            ctsucra::Cfcon,
876            ctsucra::Cfcon,
877            Ctsucra_SPEC,
878            crate::common::RW,
879        >::from_register(self, 0)
880    }
881
882    #[doc = "CTSU Control Block Initialization"]
883    #[inline(always)]
884    pub fn init(self) -> crate::common::RegisterFieldBool<4, 1, 0, Ctsucra_SPEC, crate::common::W> {
885        crate::common::RegisterFieldBool::<4, 1, 0, Ctsucra_SPEC, crate::common::W>::from_register(
886            self, 0,
887        )
888    }
889
890    #[doc = "CTSU Boost Circuit Control"]
891    #[inline(always)]
892    pub fn pumpon(
893        self,
894    ) -> crate::common::RegisterField<
895        5,
896        0x1,
897        1,
898        0,
899        ctsucra::Pumpon,
900        ctsucra::Pumpon,
901        Ctsucra_SPEC,
902        crate::common::RW,
903    > {
904        crate::common::RegisterField::<
905            5,
906            0x1,
907            1,
908            0,
909            ctsucra::Pumpon,
910            ctsucra::Pumpon,
911            Ctsucra_SPEC,
912            crate::common::RW,
913        >::from_register(self, 0)
914    }
915
916    #[doc = "CTSU Transmission Power Supply Selection"]
917    #[inline(always)]
918    pub fn txvsel(
919        self,
920    ) -> crate::common::RegisterField<
921        6,
922        0x3,
923        1,
924        0,
925        ctsucra::Txvsel,
926        ctsucra::Txvsel,
927        Ctsucra_SPEC,
928        crate::common::RW,
929    > {
930        crate::common::RegisterField::<
931            6,
932            0x3,
933            1,
934            0,
935            ctsucra::Txvsel,
936            ctsucra::Txvsel,
937            Ctsucra_SPEC,
938            crate::common::RW,
939        >::from_register(self, 0)
940    }
941
942    #[doc = "CTSU Power On Control"]
943    #[inline(always)]
944    pub fn pon(
945        self,
946    ) -> crate::common::RegisterField<
947        8,
948        0x1,
949        1,
950        0,
951        ctsucra::Pon,
952        ctsucra::Pon,
953        Ctsucra_SPEC,
954        crate::common::RW,
955    > {
956        crate::common::RegisterField::<
957            8,
958            0x1,
959            1,
960            0,
961            ctsucra::Pon,
962            ctsucra::Pon,
963            Ctsucra_SPEC,
964            crate::common::RW,
965        >::from_register(self, 0)
966    }
967
968    #[doc = "TSCAP Pin Enable"]
969    #[inline(always)]
970    pub fn csw(
971        self,
972    ) -> crate::common::RegisterField<
973        9,
974        0x1,
975        1,
976        0,
977        ctsucra::Csw,
978        ctsucra::Csw,
979        Ctsucra_SPEC,
980        crate::common::RW,
981    > {
982        crate::common::RegisterField::<
983            9,
984            0x1,
985            1,
986            0,
987            ctsucra::Csw,
988            ctsucra::Csw,
989            Ctsucra_SPEC,
990            crate::common::RW,
991        >::from_register(self, 0)
992    }
993
994    #[doc = "CTSU Power Supply Operating Mode Setting"]
995    #[inline(always)]
996    pub fn atune0(
997        self,
998    ) -> crate::common::RegisterField<
999        10,
1000        0x1,
1001        1,
1002        0,
1003        ctsucra::Atune0,
1004        ctsucra::Atune0,
1005        Ctsucra_SPEC,
1006        crate::common::RW,
1007    > {
1008        crate::common::RegisterField::<
1009            10,
1010            0x1,
1011            1,
1012            0,
1013            ctsucra::Atune0,
1014            ctsucra::Atune0,
1015            Ctsucra_SPEC,
1016            crate::common::RW,
1017        >::from_register(self, 0)
1018    }
1019
1020    #[doc = "CTSU Current Range Adjustment"]
1021    #[inline(always)]
1022    pub fn atune1(
1023        self,
1024    ) -> crate::common::RegisterField<
1025        11,
1026        0x1,
1027        1,
1028        0,
1029        ctsucra::Atune1,
1030        ctsucra::Atune1,
1031        Ctsucra_SPEC,
1032        crate::common::RW,
1033    > {
1034        crate::common::RegisterField::<
1035            11,
1036            0x1,
1037            1,
1038            0,
1039            ctsucra::Atune1,
1040            ctsucra::Atune1,
1041            Ctsucra_SPEC,
1042            crate::common::RW,
1043        >::from_register(self, 0)
1044    }
1045
1046    #[doc = "CTSU Operating Clock Select"]
1047    #[inline(always)]
1048    pub fn clk(
1049        self,
1050    ) -> crate::common::RegisterField<
1051        12,
1052        0x3,
1053        1,
1054        0,
1055        ctsucra::Clk,
1056        ctsucra::Clk,
1057        Ctsucra_SPEC,
1058        crate::common::RW,
1059    > {
1060        crate::common::RegisterField::<
1061            12,
1062            0x3,
1063            1,
1064            0,
1065            ctsucra::Clk,
1066            ctsucra::Clk,
1067            Ctsucra_SPEC,
1068            crate::common::RW,
1069        >::from_register(self, 0)
1070    }
1071
1072    #[doc = "CTSU Measurement Mode Select 0"]
1073    #[inline(always)]
1074    pub fn md0(
1075        self,
1076    ) -> crate::common::RegisterField<
1077        14,
1078        0x1,
1079        1,
1080        0,
1081        ctsucra::Md0,
1082        ctsucra::Md0,
1083        Ctsucra_SPEC,
1084        crate::common::RW,
1085    > {
1086        crate::common::RegisterField::<
1087            14,
1088            0x1,
1089            1,
1090            0,
1091            ctsucra::Md0,
1092            ctsucra::Md0,
1093            Ctsucra_SPEC,
1094            crate::common::RW,
1095        >::from_register(self, 0)
1096    }
1097
1098    #[doc = "CTSU Measurement Mode Select 1"]
1099    #[inline(always)]
1100    pub fn md1(
1101        self,
1102    ) -> crate::common::RegisterField<
1103        15,
1104        0x1,
1105        1,
1106        0,
1107        ctsucra::Md1,
1108        ctsucra::Md1,
1109        Ctsucra_SPEC,
1110        crate::common::RW,
1111    > {
1112        crate::common::RegisterField::<
1113            15,
1114            0x1,
1115            1,
1116            0,
1117            ctsucra::Md1,
1118            ctsucra::Md1,
1119            Ctsucra_SPEC,
1120            crate::common::RW,
1121        >::from_register(self, 0)
1122    }
1123
1124    #[doc = "CTSU Measurement Mode Select 2"]
1125    #[inline(always)]
1126    pub fn md2(
1127        self,
1128    ) -> crate::common::RegisterField<
1129        16,
1130        0x1,
1131        1,
1132        0,
1133        ctsucra::Md2,
1134        ctsucra::Md2,
1135        Ctsucra_SPEC,
1136        crate::common::RW,
1137    > {
1138        crate::common::RegisterField::<
1139            16,
1140            0x1,
1141            1,
1142            0,
1143            ctsucra::Md2,
1144            ctsucra::Md2,
1145            Ctsucra_SPEC,
1146            crate::common::RW,
1147        >::from_register(self, 0)
1148    }
1149
1150    #[doc = "CTSU Current Range Adjustment"]
1151    #[inline(always)]
1152    pub fn atune2(
1153        self,
1154    ) -> crate::common::RegisterField<
1155        17,
1156        0x1,
1157        1,
1158        0,
1159        ctsucra::Atune2,
1160        ctsucra::Atune2,
1161        Ctsucra_SPEC,
1162        crate::common::RW,
1163    > {
1164        crate::common::RegisterField::<
1165            17,
1166            0x1,
1167            1,
1168            0,
1169            ctsucra::Atune2,
1170            ctsucra::Atune2,
1171            Ctsucra_SPEC,
1172            crate::common::RW,
1173        >::from_register(self, 0)
1174    }
1175
1176    #[doc = "CTSU Load Control During Measurement"]
1177    #[inline(always)]
1178    pub fn load(
1179        self,
1180    ) -> crate::common::RegisterField<
1181        18,
1182        0x3,
1183        1,
1184        0,
1185        ctsucra::Load,
1186        ctsucra::Load,
1187        Ctsucra_SPEC,
1188        crate::common::RW,
1189    > {
1190        crate::common::RegisterField::<
1191            18,
1192            0x3,
1193            1,
1194            0,
1195            ctsucra::Load,
1196            ctsucra::Load,
1197            Ctsucra_SPEC,
1198            crate::common::RW,
1199        >::from_register(self, 0)
1200    }
1201
1202    #[doc = "CTSU Non-Measured Channel Output Select"]
1203    #[inline(always)]
1204    pub fn posel(
1205        self,
1206    ) -> crate::common::RegisterField<
1207        20,
1208        0x3,
1209        1,
1210        0,
1211        ctsucra::Posel,
1212        ctsucra::Posel,
1213        Ctsucra_SPEC,
1214        crate::common::RW,
1215    > {
1216        crate::common::RegisterField::<
1217            20,
1218            0x3,
1219            1,
1220            0,
1221            ctsucra::Posel,
1222            ctsucra::Posel,
1223            Ctsucra_SPEC,
1224            crate::common::RW,
1225        >::from_register(self, 0)
1226    }
1227
1228    #[doc = "CTSU Sensor Drive Pulse Select"]
1229    #[inline(always)]
1230    pub fn sdpsel(
1231        self,
1232    ) -> crate::common::RegisterField<
1233        22,
1234        0x1,
1235        1,
1236        0,
1237        ctsucra::Sdpsel,
1238        ctsucra::Sdpsel,
1239        Ctsucra_SPEC,
1240        crate::common::RW,
1241    > {
1242        crate::common::RegisterField::<
1243            22,
1244            0x1,
1245            1,
1246            0,
1247            ctsucra::Sdpsel,
1248            ctsucra::Sdpsel,
1249            Ctsucra_SPEC,
1250            crate::common::RW,
1251        >::from_register(self, 0)
1252    }
1253
1254    #[doc = "CTSU Boost Circuit Clock Select"]
1255    #[inline(always)]
1256    pub fn pcsel(
1257        self,
1258    ) -> crate::common::RegisterField<
1259        23,
1260        0x1,
1261        1,
1262        0,
1263        ctsucra::Pcsel,
1264        ctsucra::Pcsel,
1265        Ctsucra_SPEC,
1266        crate::common::RW,
1267    > {
1268        crate::common::RegisterField::<
1269            23,
1270            0x1,
1271            1,
1272            0,
1273            ctsucra::Pcsel,
1274            ctsucra::Pcsel,
1275            Ctsucra_SPEC,
1276            crate::common::RW,
1277        >::from_register(self, 0)
1278    }
1279
1280    #[doc = "CTSU STCLK Select"]
1281    #[inline(always)]
1282    pub fn stclk(
1283        self,
1284    ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Ctsucra_SPEC, crate::common::RW> {
1285        crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Ctsucra_SPEC,crate::common::RW>::from_register(self,0)
1286    }
1287
1288    #[doc = "CTSU Current Measurement Mode Select"]
1289    #[inline(always)]
1290    pub fn dcmode(
1291        self,
1292    ) -> crate::common::RegisterField<
1293        30,
1294        0x1,
1295        1,
1296        0,
1297        ctsucra::Dcmode,
1298        ctsucra::Dcmode,
1299        Ctsucra_SPEC,
1300        crate::common::RW,
1301    > {
1302        crate::common::RegisterField::<
1303            30,
1304            0x1,
1305            1,
1306            0,
1307            ctsucra::Dcmode,
1308            ctsucra::Dcmode,
1309            Ctsucra_SPEC,
1310            crate::common::RW,
1311        >::from_register(self, 0)
1312    }
1313
1314    #[doc = "CTSU Current Measurement Feedback Select"]
1315    #[inline(always)]
1316    pub fn dcback(
1317        self,
1318    ) -> crate::common::RegisterField<
1319        31,
1320        0x1,
1321        1,
1322        0,
1323        ctsucra::Dcback,
1324        ctsucra::Dcback,
1325        Ctsucra_SPEC,
1326        crate::common::RW,
1327    > {
1328        crate::common::RegisterField::<
1329            31,
1330            0x1,
1331            1,
1332            0,
1333            ctsucra::Dcback,
1334            ctsucra::Dcback,
1335            Ctsucra_SPEC,
1336            crate::common::RW,
1337        >::from_register(self, 0)
1338    }
1339}
1340impl ::core::default::Default for Ctsucra {
1341    #[inline(always)]
1342    fn default() -> Ctsucra {
1343        <crate::RegValueT<Ctsucra_SPEC> as RegisterValue<_>>::new(0)
1344    }
1345}
1346pub mod ctsucra {
1347
1348    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1349    pub struct Strt_SPEC;
1350    pub type Strt = crate::EnumBitfieldStruct<u8, Strt_SPEC>;
1351    impl Strt {
1352        #[doc = "Stop measurement operation"]
1353        pub const _0: Self = Self::new(0);
1354
1355        #[doc = "Start measurement operation"]
1356        pub const _1: Self = Self::new(1);
1357    }
1358    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1359    pub struct Cap_SPEC;
1360    pub type Cap = crate::EnumBitfieldStruct<u8, Cap_SPEC>;
1361    impl Cap {
1362        #[doc = "Software trigger"]
1363        pub const _0: Self = Self::new(0);
1364
1365        #[doc = "External trigger"]
1366        pub const _1: Self = Self::new(1);
1367    }
1368    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1369    pub struct Snz_SPEC;
1370    pub type Snz = crate::EnumBitfieldStruct<u8, Snz_SPEC>;
1371    impl Snz {
1372        #[doc = "Disable power-saving function during wait state"]
1373        pub const _0: Self = Self::new(0);
1374
1375        #[doc = "Enable power-saving function during wait state"]
1376        pub const _1: Self = Self::new(1);
1377    }
1378    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1379    pub struct Cfcon_SPEC;
1380    pub type Cfcon = crate::EnumBitfieldStruct<u8, Cfcon_SPEC>;
1381    impl Cfcon {
1382        #[doc = "CFC power off"]
1383        pub const _0: Self = Self::new(0);
1384
1385        #[doc = "CFC power on"]
1386        pub const _1: Self = Self::new(1);
1387    }
1388    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1389    pub struct Pumpon_SPEC;
1390    pub type Pumpon = crate::EnumBitfieldStruct<u8, Pumpon_SPEC>;
1391    impl Pumpon {
1392        #[doc = "Boost circuit off"]
1393        pub const _0: Self = Self::new(0);
1394
1395        #[doc = "Boost circuit on"]
1396        pub const _1: Self = Self::new(1);
1397    }
1398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1399    pub struct Txvsel_SPEC;
1400    pub type Txvsel = crate::EnumBitfieldStruct<u8, Txvsel_SPEC>;
1401    impl Txvsel {
1402        #[doc = "Selecting VCC as the power supply for the transmit pins of mutual capacitance method."]
1403        pub const _00: Self = Self::new(0);
1404
1405        #[doc = "Selecting VCC as the power supply for the transmit pins of the mutual capacitance method. In addition, noise is reduced during GPIO operation. (Recommended)"]
1406        pub const _01: Self = Self::new(1);
1407
1408        #[doc = "Select VCC as the power source for the transmitter pins used as the active shield."]
1409        pub const _10: Self = Self::new(2);
1410
1411        #[doc = "Setting prohibited"]
1412        pub const _11: Self = Self::new(3);
1413    }
1414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1415    pub struct Pon_SPEC;
1416    pub type Pon = crate::EnumBitfieldStruct<u8, Pon_SPEC>;
1417    impl Pon {
1418        #[doc = "Power off the CTSU"]
1419        pub const _0: Self = Self::new(0);
1420
1421        #[doc = "Power on the CTSU"]
1422        pub const _1: Self = Self::new(1);
1423    }
1424    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1425    pub struct Csw_SPEC;
1426    pub type Csw = crate::EnumBitfieldStruct<u8, Csw_SPEC>;
1427    impl Csw {
1428        #[doc = "Disable"]
1429        pub const _0: Self = Self::new(0);
1430
1431        #[doc = "Enable"]
1432        pub const _1: Self = Self::new(1);
1433    }
1434    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1435    pub struct Atune0_SPEC;
1436    pub type Atune0 = crate::EnumBitfieldStruct<u8, Atune0_SPEC>;
1437    impl Atune0 {
1438        #[doc = "VCC ≥ 2.4 V: Normal voltage operating mode VCC < 2.4 V: Setting prohibited"]
1439        pub const _0: Self = Self::new(0);
1440
1441        #[doc = "Low-voltage operating mode"]
1442        pub const _1: Self = Self::new(1);
1443    }
1444    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1445    pub struct Atune1_SPEC;
1446    pub type Atune1 = crate::EnumBitfieldStruct<u8, Atune1_SPEC>;
1447    impl Atune1 {
1448        #[doc = "80 µA when ATUNE2 = 0 20 µA when ATUNE2 = 1"]
1449        pub const _0: Self = Self::new(0);
1450
1451        #[doc = "40 µA when ATUNE2 = 0 160 µA when ATUNE2 = 1"]
1452        pub const _1: Self = Self::new(1);
1453    }
1454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1455    pub struct Clk_SPEC;
1456    pub type Clk = crate::EnumBitfieldStruct<u8, Clk_SPEC>;
1457    impl Clk {
1458        #[doc = "PCLKB"]
1459        pub const _00: Self = Self::new(0);
1460
1461        #[doc = "PCLKB/2 (PCLKB divided by 2)"]
1462        pub const _01: Self = Self::new(1);
1463
1464        #[doc = "PCLKB/4 (PCLKB divided by 4)"]
1465        pub const _10: Self = Self::new(2);
1466
1467        #[doc = "PCLKB/8 (PCLKB divided by 8)"]
1468        pub const _11: Self = Self::new(3);
1469    }
1470    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1471    pub struct Md0_SPEC;
1472    pub type Md0 = crate::EnumBitfieldStruct<u8, Md0_SPEC>;
1473    impl Md0 {
1474        #[doc = "Single scan mode"]
1475        pub const _0: Self = Self::new(0);
1476
1477        #[doc = "Multi-scan mode"]
1478        pub const _1: Self = Self::new(1);
1479    }
1480    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1481    pub struct Md1_SPEC;
1482    pub type Md1 = crate::EnumBitfieldStruct<u8, Md1_SPEC>;
1483    impl Md1 {
1484        #[doc = "One-time measurement (self-capacitance method)"]
1485        pub const _0: Self = Self::new(0);
1486
1487        #[doc = "Two times measurement (mutual capacitance method)"]
1488        pub const _1: Self = Self::new(1);
1489    }
1490    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1491    pub struct Md2_SPEC;
1492    pub type Md2 = crate::EnumBitfieldStruct<u8, Md2_SPEC>;
1493    impl Md2 {
1494        #[doc = "Measure the switched capacitor current and the DC current"]
1495        pub const _0: Self = Self::new(0);
1496
1497        #[doc = "Measure the charge transfer by CFC circuit (parallel measurement)"]
1498        pub const _1: Self = Self::new(1);
1499    }
1500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1501    pub struct Atune2_SPEC;
1502    pub type Atune2 = crate::EnumBitfieldStruct<u8, Atune2_SPEC>;
1503    impl Atune2 {
1504        #[doc = "80 µA when ATUNE1 = 0 40 µA when ATUNE1 = 1"]
1505        pub const _0: Self = Self::new(0);
1506
1507        #[doc = "20 µA when ATUNE1 = 0 160 µA when ATUNE1 = 1"]
1508        pub const _1: Self = Self::new(1);
1509    }
1510    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1511    pub struct Load_SPEC;
1512    pub type Load = crate::EnumBitfieldStruct<u8, Load_SPEC>;
1513    impl Load {
1514        #[doc = "2.5 µA constant current load"]
1515        pub const _00: Self = Self::new(0);
1516
1517        #[doc = "No load"]
1518        pub const _01: Self = Self::new(1);
1519
1520        #[doc = "20 µA constant current load and overcurrent detector disabled"]
1521        pub const _10: Self = Self::new(2);
1522
1523        #[doc = "Resistance load for calibration. To set LOAD\\[1:0\\] bits to resistance load for calibration, set these bits to 10b before they are set to 11b."]
1524        pub const _11: Self = Self::new(3);
1525    }
1526    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1527    pub struct Posel_SPEC;
1528    pub type Posel = crate::EnumBitfieldStruct<u8, Posel_SPEC>;
1529    impl Posel {
1530        #[doc = "Output low"]
1531        pub const _00: Self = Self::new(0);
1532
1533        #[doc = "Hi-Z"]
1534        pub const _01: Self = Self::new(1);
1535
1536        #[doc = "Setting prohibited"]
1537        pub const _10: Self = Self::new(2);
1538
1539        #[doc = "Output a pulse in phase with the transmit channel"]
1540        pub const _11: Self = Self::new(3);
1541    }
1542    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1543    pub struct Sdpsel_SPEC;
1544    pub type Sdpsel = crate::EnumBitfieldStruct<u8, Sdpsel_SPEC>;
1545    impl Sdpsel {
1546        #[doc = "Random pulse"]
1547        pub const _0: Self = Self::new(0);
1548
1549        #[doc = "Normal pulse using the sensor unit clock"]
1550        pub const _1: Self = Self::new(1);
1551    }
1552    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1553    pub struct Pcsel_SPEC;
1554    pub type Pcsel = crate::EnumBitfieldStruct<u8, Pcsel_SPEC>;
1555    impl Pcsel {
1556        #[doc = "Sensor drive pulse divided by 2"]
1557        pub const _0: Self = Self::new(0);
1558
1559        #[doc = "STCLK"]
1560        pub const _1: Self = Self::new(1);
1561    }
1562    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1563    pub struct Dcmode_SPEC;
1564    pub type Dcmode = crate::EnumBitfieldStruct<u8, Dcmode_SPEC>;
1565    impl Dcmode {
1566        #[doc = "Electrostatic capacitance measurement mode"]
1567        pub const _0: Self = Self::new(0);
1568
1569        #[doc = "Current measurement mode"]
1570        pub const _1: Self = Self::new(1);
1571    }
1572    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1573    pub struct Dcback_SPEC;
1574    pub type Dcback = crate::EnumBitfieldStruct<u8, Dcback_SPEC>;
1575    impl Dcback {
1576        #[doc = "TSCAP pin is selected"]
1577        pub const _0: Self = Self::new(0);
1578
1579        #[doc = "Measurement pin is selected. It is recommended in the current measurement mode."]
1580        pub const _1: Self = Self::new(1);
1581    }
1582}
1583#[doc(hidden)]
1584#[derive(Copy, Clone, Eq, PartialEq)]
1585pub struct Ctsucral_SPEC;
1586impl crate::sealed::RegSpec for Ctsucral_SPEC {
1587    type DataType = u16;
1588}
1589
1590#[doc = "CTSU Control Register A"]
1591pub type Ctsucral = crate::RegValueT<Ctsucral_SPEC>;
1592
1593impl NoBitfieldReg<Ctsucral_SPEC> for Ctsucral {}
1594impl ::core::default::Default for Ctsucral {
1595    #[inline(always)]
1596    fn default() -> Ctsucral {
1597        <crate::RegValueT<Ctsucral_SPEC> as RegisterValue<_>>::new(0)
1598    }
1599}
1600
1601#[doc(hidden)]
1602#[derive(Copy, Clone, Eq, PartialEq)]
1603pub struct Ctsucr0_SPEC;
1604impl crate::sealed::RegSpec for Ctsucr0_SPEC {
1605    type DataType = u8;
1606}
1607
1608#[doc = "CTSU Control Register A"]
1609pub type Ctsucr0 = crate::RegValueT<Ctsucr0_SPEC>;
1610
1611impl NoBitfieldReg<Ctsucr0_SPEC> for Ctsucr0 {}
1612impl ::core::default::Default for Ctsucr0 {
1613    #[inline(always)]
1614    fn default() -> Ctsucr0 {
1615        <crate::RegValueT<Ctsucr0_SPEC> as RegisterValue<_>>::new(0)
1616    }
1617}
1618
1619#[doc(hidden)]
1620#[derive(Copy, Clone, Eq, PartialEq)]
1621pub struct Ctsucr1_SPEC;
1622impl crate::sealed::RegSpec for Ctsucr1_SPEC {
1623    type DataType = u8;
1624}
1625
1626#[doc = "CTSU Control Register A"]
1627pub type Ctsucr1 = crate::RegValueT<Ctsucr1_SPEC>;
1628
1629impl NoBitfieldReg<Ctsucr1_SPEC> for Ctsucr1 {}
1630impl ::core::default::Default for Ctsucr1 {
1631    #[inline(always)]
1632    fn default() -> Ctsucr1 {
1633        <crate::RegValueT<Ctsucr1_SPEC> as RegisterValue<_>>::new(0)
1634    }
1635}
1636
1637#[doc(hidden)]
1638#[derive(Copy, Clone, Eq, PartialEq)]
1639pub struct Ctsucrah_SPEC;
1640impl crate::sealed::RegSpec for Ctsucrah_SPEC {
1641    type DataType = u16;
1642}
1643
1644#[doc = "CTSU Control Register A"]
1645pub type Ctsucrah = crate::RegValueT<Ctsucrah_SPEC>;
1646
1647impl NoBitfieldReg<Ctsucrah_SPEC> for Ctsucrah {}
1648impl ::core::default::Default for Ctsucrah {
1649    #[inline(always)]
1650    fn default() -> Ctsucrah {
1651        <crate::RegValueT<Ctsucrah_SPEC> as RegisterValue<_>>::new(0)
1652    }
1653}
1654
1655#[doc(hidden)]
1656#[derive(Copy, Clone, Eq, PartialEq)]
1657pub struct Ctsucr2_SPEC;
1658impl crate::sealed::RegSpec for Ctsucr2_SPEC {
1659    type DataType = u8;
1660}
1661
1662#[doc = "CTSU Control Register A"]
1663pub type Ctsucr2 = crate::RegValueT<Ctsucr2_SPEC>;
1664
1665impl NoBitfieldReg<Ctsucr2_SPEC> for Ctsucr2 {}
1666impl ::core::default::Default for Ctsucr2 {
1667    #[inline(always)]
1668    fn default() -> Ctsucr2 {
1669        <crate::RegValueT<Ctsucr2_SPEC> as RegisterValue<_>>::new(0)
1670    }
1671}
1672
1673#[doc(hidden)]
1674#[derive(Copy, Clone, Eq, PartialEq)]
1675pub struct Ctsucr3_SPEC;
1676impl crate::sealed::RegSpec for Ctsucr3_SPEC {
1677    type DataType = u8;
1678}
1679
1680#[doc = "CTSU Control Register A"]
1681pub type Ctsucr3 = crate::RegValueT<Ctsucr3_SPEC>;
1682
1683impl NoBitfieldReg<Ctsucr3_SPEC> for Ctsucr3 {}
1684impl ::core::default::Default for Ctsucr3 {
1685    #[inline(always)]
1686    fn default() -> Ctsucr3 {
1687        <crate::RegValueT<Ctsucr3_SPEC> as RegisterValue<_>>::new(0)
1688    }
1689}
1690
1691#[doc(hidden)]
1692#[derive(Copy, Clone, Eq, PartialEq)]
1693pub struct Ctsucrb_SPEC;
1694impl crate::sealed::RegSpec for Ctsucrb_SPEC {
1695    type DataType = u32;
1696}
1697
1698#[doc = "CTSU Control Register B"]
1699pub type Ctsucrb = crate::RegValueT<Ctsucrb_SPEC>;
1700
1701impl Ctsucrb {
1702    #[doc = "Frequency of Drive Pulse Phase Control"]
1703    #[inline(always)]
1704    pub fn prratio(
1705        self,
1706    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Ctsucrb_SPEC, crate::common::RW> {
1707        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Ctsucrb_SPEC,crate::common::RW>::from_register(self,0)
1708    }
1709
1710    #[doc = "Phase Control Period"]
1711    #[inline(always)]
1712    pub fn prmode(
1713        self,
1714    ) -> crate::common::RegisterField<
1715        4,
1716        0x3,
1717        1,
1718        0,
1719        ctsucrb::Prmode,
1720        ctsucrb::Prmode,
1721        Ctsucrb_SPEC,
1722        crate::common::RW,
1723    > {
1724        crate::common::RegisterField::<
1725            4,
1726            0x3,
1727            1,
1728            0,
1729            ctsucrb::Prmode,
1730            ctsucrb::Prmode,
1731            Ctsucrb_SPEC,
1732            crate::common::RW,
1733        >::from_register(self, 0)
1734    }
1735
1736    #[doc = "High-Pass Noise Reduction Function Disable"]
1737    #[inline(always)]
1738    pub fn soff(
1739        self,
1740    ) -> crate::common::RegisterField<
1741        6,
1742        0x1,
1743        1,
1744        0,
1745        ctsucrb::Soff,
1746        ctsucrb::Soff,
1747        Ctsucrb_SPEC,
1748        crate::common::RW,
1749    > {
1750        crate::common::RegisterField::<
1751            6,
1752            0x1,
1753            1,
1754            0,
1755            ctsucrb::Soff,
1756            ctsucrb::Soff,
1757            Ctsucrb_SPEC,
1758            crate::common::RW,
1759        >::from_register(self, 0)
1760    }
1761
1762    #[doc = "Drive Pulse Phase Control"]
1763    #[inline(always)]
1764    pub fn proff(
1765        self,
1766    ) -> crate::common::RegisterField<
1767        7,
1768        0x1,
1769        1,
1770        0,
1771        ctsucrb::Proff,
1772        ctsucrb::Proff,
1773        Ctsucrb_SPEC,
1774        crate::common::RW,
1775    > {
1776        crate::common::RegisterField::<
1777            7,
1778            0x1,
1779            1,
1780            0,
1781            ctsucrb::Proff,
1782            ctsucrb::Proff,
1783            Ctsucrb_SPEC,
1784            crate::common::RW,
1785        >::from_register(self, 0)
1786    }
1787
1788    #[doc = "Wait Time Sensor Stabilization"]
1789    #[inline(always)]
1790    pub fn sst(
1791        self,
1792    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ctsucrb_SPEC, crate::common::RW> {
1793        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ctsucrb_SPEC,crate::common::RW>::from_register(self,0)
1794    }
1795
1796    #[doc = "Spread Spectrum Modulation Frequency"]
1797    #[inline(always)]
1798    pub fn ssmod(
1799        self,
1800    ) -> crate::common::RegisterField<
1801        24,
1802        0x7,
1803        1,
1804        0,
1805        ctsucrb::Ssmod,
1806        ctsucrb::Ssmod,
1807        Ctsucrb_SPEC,
1808        crate::common::RW,
1809    > {
1810        crate::common::RegisterField::<
1811            24,
1812            0x7,
1813            1,
1814            0,
1815            ctsucrb::Ssmod,
1816            ctsucrb::Ssmod,
1817            Ctsucrb_SPEC,
1818            crate::common::RW,
1819        >::from_register(self, 0)
1820    }
1821
1822    #[doc = "Adjusting the SUCLK frequency"]
1823    #[inline(always)]
1824    pub fn sscnt(
1825        self,
1826    ) -> crate::common::RegisterField<
1827        28,
1828        0x3,
1829        1,
1830        0,
1831        ctsucrb::Sscnt,
1832        ctsucrb::Sscnt,
1833        Ctsucrb_SPEC,
1834        crate::common::RW,
1835    > {
1836        crate::common::RegisterField::<
1837            28,
1838            0x3,
1839            1,
1840            0,
1841            ctsucrb::Sscnt,
1842            ctsucrb::Sscnt,
1843            Ctsucrb_SPEC,
1844            crate::common::RW,
1845        >::from_register(self, 0)
1846    }
1847}
1848impl ::core::default::Default for Ctsucrb {
1849    #[inline(always)]
1850    fn default() -> Ctsucrb {
1851        <crate::RegValueT<Ctsucrb_SPEC> as RegisterValue<_>>::new(0)
1852    }
1853}
1854pub mod ctsucrb {
1855
1856    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1857    pub struct Prmode_SPEC;
1858    pub type Prmode = crate::EnumBitfieldStruct<u8, Prmode_SPEC>;
1859    impl Prmode {
1860        #[doc = "510 pulses (512 pulses when PROFF = 1)"]
1861        pub const _00: Self = Self::new(0);
1862
1863        #[doc = "126 pulses (128 pulses when PROFF = 1)"]
1864        pub const _01: Self = Self::new(1);
1865
1866        #[doc = "62 pulses (64 pulses when PROFF = 1)"]
1867        pub const _10: Self = Self::new(2);
1868
1869        #[doc = "Setting prohibited"]
1870        pub const _11: Self = Self::new(3);
1871    }
1872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1873    pub struct Soff_SPEC;
1874    pub type Soff = crate::EnumBitfieldStruct<u8, Soff_SPEC>;
1875    impl Soff {
1876        #[doc = "Turn the spread spectrum on"]
1877        pub const _0: Self = Self::new(0);
1878
1879        #[doc = "Turn the spread spectrum off"]
1880        pub const _1: Self = Self::new(1);
1881    }
1882    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1883    pub struct Proff_SPEC;
1884    pub type Proff = crate::EnumBitfieldStruct<u8, Proff_SPEC>;
1885    impl Proff {
1886        #[doc = "The drive pulse phase is controlled by random numbers."]
1887        pub const _0: Self = Self::new(0);
1888
1889        #[doc = "The drive pulse phase is not controlled by random numbers."]
1890        pub const _1: Self = Self::new(1);
1891    }
1892    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1893    pub struct Ssmod_SPEC;
1894    pub type Ssmod = crate::EnumBitfieldStruct<u8, Ssmod_SPEC>;
1895    impl Ssmod {
1896        #[doc = "125 kHz (recommended)"]
1897        pub const _000: Self = Self::new(0);
1898
1899        #[doc = "83.3 kHz"]
1900        pub const _001: Self = Self::new(1);
1901
1902        #[doc = "62.5 kHz"]
1903        pub const _010: Self = Self::new(2);
1904
1905        #[doc = "31.3 kHz"]
1906        pub const _011: Self = Self::new(3);
1907    }
1908    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1909    pub struct Sscnt_SPEC;
1910    pub type Sscnt = crate::EnumBitfieldStruct<u8, Sscnt_SPEC>;
1911    impl Sscnt {
1912        #[doc = "CTSUTRIMA.SUADJD + 0x00 (SDPSEL = 0) CTSUSUCLKx.SUADJDn + 0x00 (SDPSEL = 1)"]
1913        pub const _00: Self = Self::new(0);
1914
1915        #[doc = "CTSUTRIMA.SUADJD + 0x10 (SDPSEL = 0) CTSUSUCLKx.SUADJDn + 0x20 (SDPSEL = 1)"]
1916        pub const _01: Self = Self::new(1);
1917
1918        #[doc = "CTSUTRIMA.SUADJD + 0x20 (SDPSEL = 0) CTSUSUCLKx.SUADJDn + 0x40 (SDPSEL = 1)"]
1919        pub const _10: Self = Self::new(2);
1920
1921        #[doc = "CTSUTRIMA.SUADJD + 0x30 (SDPSEL = 0) CTSUSUCLKx.SUADJDn + 0x40 (SDPSEL = 1)"]
1922        pub const _11: Self = Self::new(3);
1923    }
1924}
1925#[doc(hidden)]
1926#[derive(Copy, Clone, Eq, PartialEq)]
1927pub struct Ctsucrbl_SPEC;
1928impl crate::sealed::RegSpec for Ctsucrbl_SPEC {
1929    type DataType = u16;
1930}
1931
1932#[doc = "CTSU Control Register B"]
1933pub type Ctsucrbl = crate::RegValueT<Ctsucrbl_SPEC>;
1934
1935impl NoBitfieldReg<Ctsucrbl_SPEC> for Ctsucrbl {}
1936impl ::core::default::Default for Ctsucrbl {
1937    #[inline(always)]
1938    fn default() -> Ctsucrbl {
1939        <crate::RegValueT<Ctsucrbl_SPEC> as RegisterValue<_>>::new(0)
1940    }
1941}
1942
1943#[doc(hidden)]
1944#[derive(Copy, Clone, Eq, PartialEq)]
1945pub struct Ctsusdprs_SPEC;
1946impl crate::sealed::RegSpec for Ctsusdprs_SPEC {
1947    type DataType = u8;
1948}
1949
1950#[doc = "CTSU Control Register B"]
1951pub type Ctsusdprs = crate::RegValueT<Ctsusdprs_SPEC>;
1952
1953impl NoBitfieldReg<Ctsusdprs_SPEC> for Ctsusdprs {}
1954impl ::core::default::Default for Ctsusdprs {
1955    #[inline(always)]
1956    fn default() -> Ctsusdprs {
1957        <crate::RegValueT<Ctsusdprs_SPEC> as RegisterValue<_>>::new(0)
1958    }
1959}
1960
1961#[doc(hidden)]
1962#[derive(Copy, Clone, Eq, PartialEq)]
1963pub struct Ctsusst_SPEC;
1964impl crate::sealed::RegSpec for Ctsusst_SPEC {
1965    type DataType = u8;
1966}
1967
1968#[doc = "CTSU Control Register B"]
1969pub type Ctsusst = crate::RegValueT<Ctsusst_SPEC>;
1970
1971impl NoBitfieldReg<Ctsusst_SPEC> for Ctsusst {}
1972impl ::core::default::Default for Ctsusst {
1973    #[inline(always)]
1974    fn default() -> Ctsusst {
1975        <crate::RegValueT<Ctsusst_SPEC> as RegisterValue<_>>::new(0)
1976    }
1977}
1978
1979#[doc(hidden)]
1980#[derive(Copy, Clone, Eq, PartialEq)]
1981pub struct Ctsucrbh_SPEC;
1982impl crate::sealed::RegSpec for Ctsucrbh_SPEC {
1983    type DataType = u16;
1984}
1985
1986#[doc = "CTSU Control Register B"]
1987pub type Ctsucrbh = crate::RegValueT<Ctsucrbh_SPEC>;
1988
1989impl NoBitfieldReg<Ctsucrbh_SPEC> for Ctsucrbh {}
1990impl ::core::default::Default for Ctsucrbh {
1991    #[inline(always)]
1992    fn default() -> Ctsucrbh {
1993        <crate::RegValueT<Ctsucrbh_SPEC> as RegisterValue<_>>::new(0)
1994    }
1995}
1996
1997#[doc(hidden)]
1998#[derive(Copy, Clone, Eq, PartialEq)]
1999pub struct Ctsudclkc_SPEC;
2000impl crate::sealed::RegSpec for Ctsudclkc_SPEC {
2001    type DataType = u8;
2002}
2003
2004#[doc = "CTSU Control Register B"]
2005pub type Ctsudclkc = crate::RegValueT<Ctsudclkc_SPEC>;
2006
2007impl NoBitfieldReg<Ctsudclkc_SPEC> for Ctsudclkc {}
2008impl ::core::default::Default for Ctsudclkc {
2009    #[inline(always)]
2010    fn default() -> Ctsudclkc {
2011        <crate::RegValueT<Ctsudclkc_SPEC> as RegisterValue<_>>::new(0)
2012    }
2013}
2014
2015#[doc(hidden)]
2016#[derive(Copy, Clone, Eq, PartialEq)]
2017pub struct Ctsumch_SPEC;
2018impl crate::sealed::RegSpec for Ctsumch_SPEC {
2019    type DataType = u32;
2020}
2021
2022#[doc = "CTSU Measurement Channel Register"]
2023pub type Ctsumch = crate::RegValueT<Ctsumch_SPEC>;
2024
2025impl Ctsumch {
2026    #[doc = "CTSU Measurement Channel 0"]
2027    #[inline(always)]
2028    pub fn mch0(
2029        self,
2030    ) -> crate::common::RegisterField<
2031        0,
2032        0x3f,
2033        1,
2034        0,
2035        ctsumch::Mch0,
2036        ctsumch::Mch0,
2037        Ctsumch_SPEC,
2038        crate::common::RW,
2039    > {
2040        crate::common::RegisterField::<
2041            0,
2042            0x3f,
2043            1,
2044            0,
2045            ctsumch::Mch0,
2046            ctsumch::Mch0,
2047            Ctsumch_SPEC,
2048            crate::common::RW,
2049        >::from_register(self, 0)
2050    }
2051
2052    #[doc = "CTSU Measurement Channel 1"]
2053    #[inline(always)]
2054    pub fn mch1(
2055        self,
2056    ) -> crate::common::RegisterField<
2057        8,
2058        0x3f,
2059        1,
2060        0,
2061        ctsumch::Mch1,
2062        ctsumch::Mch1,
2063        Ctsumch_SPEC,
2064        crate::common::RW,
2065    > {
2066        crate::common::RegisterField::<
2067            8,
2068            0x3f,
2069            1,
2070            0,
2071            ctsumch::Mch1,
2072            ctsumch::Mch1,
2073            Ctsumch_SPEC,
2074            crate::common::RW,
2075        >::from_register(self, 0)
2076    }
2077
2078    #[doc = "Multiple Clocks Control"]
2079    #[inline(always)]
2080    pub fn mca0(
2081        self,
2082    ) -> crate::common::RegisterField<
2083        16,
2084        0x1,
2085        1,
2086        0,
2087        ctsumch::Mca0,
2088        ctsumch::Mca0,
2089        Ctsumch_SPEC,
2090        crate::common::RW,
2091    > {
2092        crate::common::RegisterField::<
2093            16,
2094            0x1,
2095            1,
2096            0,
2097            ctsumch::Mca0,
2098            ctsumch::Mca0,
2099            Ctsumch_SPEC,
2100            crate::common::RW,
2101        >::from_register(self, 0)
2102    }
2103
2104    #[doc = "Multiple Clocks Control"]
2105    #[inline(always)]
2106    pub fn mca1(
2107        self,
2108    ) -> crate::common::RegisterField<
2109        17,
2110        0x1,
2111        1,
2112        0,
2113        ctsumch::Mca1,
2114        ctsumch::Mca1,
2115        Ctsumch_SPEC,
2116        crate::common::RW,
2117    > {
2118        crate::common::RegisterField::<
2119            17,
2120            0x1,
2121            1,
2122            0,
2123            ctsumch::Mca1,
2124            ctsumch::Mca1,
2125            Ctsumch_SPEC,
2126            crate::common::RW,
2127        >::from_register(self, 0)
2128    }
2129
2130    #[doc = "Multiple Clocks Control"]
2131    #[inline(always)]
2132    pub fn mca2(
2133        self,
2134    ) -> crate::common::RegisterField<
2135        18,
2136        0x1,
2137        1,
2138        0,
2139        ctsumch::Mca2,
2140        ctsumch::Mca2,
2141        Ctsumch_SPEC,
2142        crate::common::RW,
2143    > {
2144        crate::common::RegisterField::<
2145            18,
2146            0x1,
2147            1,
2148            0,
2149            ctsumch::Mca2,
2150            ctsumch::Mca2,
2151            Ctsumch_SPEC,
2152            crate::common::RW,
2153        >::from_register(self, 0)
2154    }
2155
2156    #[doc = "Multiple Clocks Control"]
2157    #[inline(always)]
2158    pub fn mca3(
2159        self,
2160    ) -> crate::common::RegisterField<
2161        19,
2162        0x1,
2163        1,
2164        0,
2165        ctsumch::Mca3,
2166        ctsumch::Mca3,
2167        Ctsumch_SPEC,
2168        crate::common::RW,
2169    > {
2170        crate::common::RegisterField::<
2171            19,
2172            0x1,
2173            1,
2174            0,
2175            ctsumch::Mca3,
2176            ctsumch::Mca3,
2177            Ctsumch_SPEC,
2178            crate::common::RW,
2179        >::from_register(self, 0)
2180    }
2181}
2182impl ::core::default::Default for Ctsumch {
2183    #[inline(always)]
2184    fn default() -> Ctsumch {
2185        <crate::RegValueT<Ctsumch_SPEC> as RegisterValue<_>>::new(16191)
2186    }
2187}
2188pub mod ctsumch {
2189
2190    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2191    pub struct Mch0_SPEC;
2192    pub type Mch0 = crate::EnumBitfieldStruct<u8, Mch0_SPEC>;
2193    impl Mch0 {
2194        #[doc = "TS00"]
2195        pub const _0_X_00: Self = Self::new(0);
2196
2197        #[doc = "TS02"]
2198        pub const _0_X_02: Self = Self::new(2);
2199
2200        #[doc = "TS04"]
2201        pub const _0_X_04: Self = Self::new(4);
2202
2203        #[doc = "TS05"]
2204        pub const _0_X_05: Self = Self::new(5);
2205
2206        #[doc = "TS06"]
2207        pub const _0_X_06: Self = Self::new(6);
2208
2209        #[doc = "TS07"]
2210        pub const _0_X_07: Self = Self::new(7);
2211
2212        #[doc = "TS08"]
2213        pub const _0_X_08: Self = Self::new(8);
2214
2215        #[doc = "TS09"]
2216        pub const _0_X_09: Self = Self::new(9);
2217
2218        #[doc = "TS10"]
2219        pub const _0_X_0_A: Self = Self::new(10);
2220
2221        #[doc = "TS11"]
2222        pub const _0_X_0_B: Self = Self::new(11);
2223
2224        #[doc = "TS12"]
2225        pub const _0_X_0_C: Self = Self::new(12);
2226
2227        #[doc = "TS13"]
2228        pub const _0_X_0_D: Self = Self::new(13);
2229
2230        #[doc = "TS14"]
2231        pub const _0_X_0_E: Self = Self::new(14);
2232
2233        #[doc = "TS15"]
2234        pub const _0_X_0_F: Self = Self::new(15);
2235
2236        #[doc = "TS16"]
2237        pub const _0_X_10: Self = Self::new(16);
2238
2239        #[doc = "TS17"]
2240        pub const _0_X_11: Self = Self::new(17);
2241
2242        #[doc = "TS18"]
2243        pub const _0_X_12: Self = Self::new(18);
2244
2245        #[doc = "TS21"]
2246        pub const _0_X_15: Self = Self::new(21);
2247
2248        #[doc = "TS22"]
2249        pub const _0_X_16: Self = Self::new(22);
2250
2251        #[doc = "TS23"]
2252        pub const _0_X_17: Self = Self::new(23);
2253
2254        #[doc = "TS24"]
2255        pub const _0_X_18: Self = Self::new(24);
2256
2257        #[doc = "TS25"]
2258        pub const _0_X_19: Self = Self::new(25);
2259
2260        #[doc = "TS26"]
2261        pub const _0_X_1_A: Self = Self::new(26);
2262
2263        #[doc = "TS27"]
2264        pub const _0_X_1_B: Self = Self::new(27);
2265
2266        #[doc = "TS28"]
2267        pub const _0_X_1_C: Self = Self::new(28);
2268
2269        #[doc = "TS30"]
2270        pub const _0_X_1_E: Self = Self::new(30);
2271
2272        #[doc = "TS31"]
2273        pub const _0_X_1_F: Self = Self::new(31);
2274
2275        #[doc = "TS32"]
2276        pub const _0_X_20: Self = Self::new(32);
2277
2278        #[doc = "TS33"]
2279        pub const _0_X_21: Self = Self::new(33);
2280
2281        #[doc = "TS34"]
2282        pub const _0_X_22: Self = Self::new(34);
2283
2284        #[doc = "Measurement is being stopped."]
2285        pub const _0_X_3_F: Self = Self::new(63);
2286    }
2287    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2288    pub struct Mch1_SPEC;
2289    pub type Mch1 = crate::EnumBitfieldStruct<u8, Mch1_SPEC>;
2290    impl Mch1 {
2291        #[doc = "TS00"]
2292        pub const _0_X_00: Self = Self::new(0);
2293
2294        #[doc = "TS02"]
2295        pub const _0_X_02: Self = Self::new(2);
2296
2297        #[doc = "TS04"]
2298        pub const _0_X_04: Self = Self::new(4);
2299
2300        #[doc = "TS05"]
2301        pub const _0_X_05: Self = Self::new(5);
2302
2303        #[doc = "TS06"]
2304        pub const _0_X_06: Self = Self::new(6);
2305
2306        #[doc = "TS07"]
2307        pub const _0_X_07: Self = Self::new(7);
2308
2309        #[doc = "TS08"]
2310        pub const _0_X_08: Self = Self::new(8);
2311
2312        #[doc = "TS09"]
2313        pub const _0_X_09: Self = Self::new(9);
2314
2315        #[doc = "TS10"]
2316        pub const _0_X_0_A: Self = Self::new(10);
2317
2318        #[doc = "TS11"]
2319        pub const _0_X_0_B: Self = Self::new(11);
2320
2321        #[doc = "TS12"]
2322        pub const _0_X_0_C: Self = Self::new(12);
2323
2324        #[doc = "TS13"]
2325        pub const _0_X_0_D: Self = Self::new(13);
2326
2327        #[doc = "TS14"]
2328        pub const _0_X_0_E: Self = Self::new(14);
2329
2330        #[doc = "TS15"]
2331        pub const _0_X_0_F: Self = Self::new(15);
2332
2333        #[doc = "TS16"]
2334        pub const _0_X_10: Self = Self::new(16);
2335
2336        #[doc = "TS17"]
2337        pub const _0_X_11: Self = Self::new(17);
2338
2339        #[doc = "TS18"]
2340        pub const _0_X_12: Self = Self::new(18);
2341
2342        #[doc = "TS21"]
2343        pub const _0_X_15: Self = Self::new(21);
2344
2345        #[doc = "TS22"]
2346        pub const _0_X_16: Self = Self::new(22);
2347
2348        #[doc = "TS23"]
2349        pub const _0_X_17: Self = Self::new(23);
2350
2351        #[doc = "TS24"]
2352        pub const _0_X_18: Self = Self::new(24);
2353
2354        #[doc = "TS25"]
2355        pub const _0_X_19: Self = Self::new(25);
2356
2357        #[doc = "TS26"]
2358        pub const _0_X_1_A: Self = Self::new(26);
2359
2360        #[doc = "TS27"]
2361        pub const _0_X_1_B: Self = Self::new(27);
2362
2363        #[doc = "TS28"]
2364        pub const _0_X_1_C: Self = Self::new(28);
2365
2366        #[doc = "TS30"]
2367        pub const _0_X_1_E: Self = Self::new(30);
2368
2369        #[doc = "TS31"]
2370        pub const _0_X_1_F: Self = Self::new(31);
2371
2372        #[doc = "TS32"]
2373        pub const _0_X_20: Self = Self::new(32);
2374
2375        #[doc = "TS33"]
2376        pub const _0_X_21: Self = Self::new(33);
2377
2378        #[doc = "TS34"]
2379        pub const _0_X_22: Self = Self::new(34);
2380
2381        #[doc = "Measurement is being stopped."]
2382        pub const _0_X_3_F: Self = Self::new(63);
2383    }
2384    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2385    pub struct Mca0_SPEC;
2386    pub type Mca0 = crate::EnumBitfieldStruct<u8, Mca0_SPEC>;
2387    impl Mca0 {
2388        #[doc = "Disable"]
2389        pub const _0: Self = Self::new(0);
2390
2391        #[doc = "Enable"]
2392        pub const _1: Self = Self::new(1);
2393    }
2394    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2395    pub struct Mca1_SPEC;
2396    pub type Mca1 = crate::EnumBitfieldStruct<u8, Mca1_SPEC>;
2397    impl Mca1 {
2398        #[doc = "Disable"]
2399        pub const _0: Self = Self::new(0);
2400
2401        #[doc = "Enable"]
2402        pub const _1: Self = Self::new(1);
2403    }
2404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2405    pub struct Mca2_SPEC;
2406    pub type Mca2 = crate::EnumBitfieldStruct<u8, Mca2_SPEC>;
2407    impl Mca2 {
2408        #[doc = "Disable"]
2409        pub const _0: Self = Self::new(0);
2410
2411        #[doc = "Enable"]
2412        pub const _1: Self = Self::new(1);
2413    }
2414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2415    pub struct Mca3_SPEC;
2416    pub type Mca3 = crate::EnumBitfieldStruct<u8, Mca3_SPEC>;
2417    impl Mca3 {
2418        #[doc = "Disable"]
2419        pub const _0: Self = Self::new(0);
2420
2421        #[doc = "Enable"]
2422        pub const _1: Self = Self::new(1);
2423    }
2424}
2425#[doc(hidden)]
2426#[derive(Copy, Clone, Eq, PartialEq)]
2427pub struct Ctsumchl_SPEC;
2428impl crate::sealed::RegSpec for Ctsumchl_SPEC {
2429    type DataType = u16;
2430}
2431
2432#[doc = "CTSU Measurement Channel Register"]
2433pub type Ctsumchl = crate::RegValueT<Ctsumchl_SPEC>;
2434
2435impl NoBitfieldReg<Ctsumchl_SPEC> for Ctsumchl {}
2436impl ::core::default::Default for Ctsumchl {
2437    #[inline(always)]
2438    fn default() -> Ctsumchl {
2439        <crate::RegValueT<Ctsumchl_SPEC> as RegisterValue<_>>::new(0)
2440    }
2441}
2442
2443#[doc(hidden)]
2444#[derive(Copy, Clone, Eq, PartialEq)]
2445pub struct Ctsumch0_SPEC;
2446impl crate::sealed::RegSpec for Ctsumch0_SPEC {
2447    type DataType = u8;
2448}
2449
2450#[doc = "CTSU Measurement Channel Register"]
2451pub type Ctsumch0 = crate::RegValueT<Ctsumch0_SPEC>;
2452
2453impl NoBitfieldReg<Ctsumch0_SPEC> for Ctsumch0 {}
2454impl ::core::default::Default for Ctsumch0 {
2455    #[inline(always)]
2456    fn default() -> Ctsumch0 {
2457        <crate::RegValueT<Ctsumch0_SPEC> as RegisterValue<_>>::new(0)
2458    }
2459}
2460
2461#[doc(hidden)]
2462#[derive(Copy, Clone, Eq, PartialEq)]
2463pub struct Ctsumch1_SPEC;
2464impl crate::sealed::RegSpec for Ctsumch1_SPEC {
2465    type DataType = u8;
2466}
2467
2468#[doc = "CTSU Measurement Channel Register"]
2469pub type Ctsumch1 = crate::RegValueT<Ctsumch1_SPEC>;
2470
2471impl NoBitfieldReg<Ctsumch1_SPEC> for Ctsumch1 {}
2472impl ::core::default::Default for Ctsumch1 {
2473    #[inline(always)]
2474    fn default() -> Ctsumch1 {
2475        <crate::RegValueT<Ctsumch1_SPEC> as RegisterValue<_>>::new(0)
2476    }
2477}
2478
2479#[doc(hidden)]
2480#[derive(Copy, Clone, Eq, PartialEq)]
2481pub struct Ctsumchh_SPEC;
2482impl crate::sealed::RegSpec for Ctsumchh_SPEC {
2483    type DataType = u16;
2484}
2485
2486#[doc = "CTSU Measurement Channel Register"]
2487pub type Ctsumchh = crate::RegValueT<Ctsumchh_SPEC>;
2488
2489impl NoBitfieldReg<Ctsumchh_SPEC> for Ctsumchh {}
2490impl ::core::default::Default for Ctsumchh {
2491    #[inline(always)]
2492    fn default() -> Ctsumchh {
2493        <crate::RegValueT<Ctsumchh_SPEC> as RegisterValue<_>>::new(16191)
2494    }
2495}
2496
2497#[doc(hidden)]
2498#[derive(Copy, Clone, Eq, PartialEq)]
2499pub struct Ctsumfaf_SPEC;
2500impl crate::sealed::RegSpec for Ctsumfaf_SPEC {
2501    type DataType = u8;
2502}
2503
2504#[doc = "CTSU Measurement Channel Register"]
2505pub type Ctsumfaf = crate::RegValueT<Ctsumfaf_SPEC>;
2506
2507impl NoBitfieldReg<Ctsumfaf_SPEC> for Ctsumfaf {}
2508impl ::core::default::Default for Ctsumfaf {
2509    #[inline(always)]
2510    fn default() -> Ctsumfaf {
2511        <crate::RegValueT<Ctsumfaf_SPEC> as RegisterValue<_>>::new(63)
2512    }
2513}
2514
2515#[doc(hidden)]
2516#[derive(Copy, Clone, Eq, PartialEq)]
2517pub struct Ctsuchaca_SPEC;
2518impl crate::sealed::RegSpec for Ctsuchaca_SPEC {
2519    type DataType = u32;
2520}
2521
2522#[doc = "CTSU Channel Enable Control Register A"]
2523pub type Ctsuchaca = crate::RegValueT<Ctsuchaca_SPEC>;
2524
2525impl Ctsuchaca {
2526    #[doc = "CTSU Channel Enable Control A"]
2527    #[inline(always)]
2528    pub fn chac00(
2529        self,
2530    ) -> crate::common::RegisterField<
2531        0,
2532        0x1,
2533        1,
2534        0,
2535        ctsuchaca::Chac00,
2536        ctsuchaca::Chac00,
2537        Ctsuchaca_SPEC,
2538        crate::common::RW,
2539    > {
2540        crate::common::RegisterField::<
2541            0,
2542            0x1,
2543            1,
2544            0,
2545            ctsuchaca::Chac00,
2546            ctsuchaca::Chac00,
2547            Ctsuchaca_SPEC,
2548            crate::common::RW,
2549        >::from_register(self, 0)
2550    }
2551
2552    #[doc = "CTSU Channel Enable Control A"]
2553    #[inline(always)]
2554    pub fn chac02(
2555        self,
2556    ) -> crate::common::RegisterField<
2557        2,
2558        0x1,
2559        1,
2560        0,
2561        ctsuchaca::Chac02,
2562        ctsuchaca::Chac02,
2563        Ctsuchaca_SPEC,
2564        crate::common::RW,
2565    > {
2566        crate::common::RegisterField::<
2567            2,
2568            0x1,
2569            1,
2570            0,
2571            ctsuchaca::Chac02,
2572            ctsuchaca::Chac02,
2573            Ctsuchaca_SPEC,
2574            crate::common::RW,
2575        >::from_register(self, 0)
2576    }
2577
2578    #[doc = "CTSU Channel Enable Control A"]
2579    #[inline(always)]
2580    pub fn chac04(
2581        self,
2582    ) -> crate::common::RegisterField<
2583        4,
2584        0x1,
2585        1,
2586        0,
2587        ctsuchaca::Chac04,
2588        ctsuchaca::Chac04,
2589        Ctsuchaca_SPEC,
2590        crate::common::RW,
2591    > {
2592        crate::common::RegisterField::<
2593            4,
2594            0x1,
2595            1,
2596            0,
2597            ctsuchaca::Chac04,
2598            ctsuchaca::Chac04,
2599            Ctsuchaca_SPEC,
2600            crate::common::RW,
2601        >::from_register(self, 0)
2602    }
2603
2604    #[doc = "CTSU Channel Enable Control A"]
2605    #[inline(always)]
2606    pub fn chac05(
2607        self,
2608    ) -> crate::common::RegisterField<
2609        5,
2610        0x1,
2611        1,
2612        0,
2613        ctsuchaca::Chac05,
2614        ctsuchaca::Chac05,
2615        Ctsuchaca_SPEC,
2616        crate::common::RW,
2617    > {
2618        crate::common::RegisterField::<
2619            5,
2620            0x1,
2621            1,
2622            0,
2623            ctsuchaca::Chac05,
2624            ctsuchaca::Chac05,
2625            Ctsuchaca_SPEC,
2626            crate::common::RW,
2627        >::from_register(self, 0)
2628    }
2629
2630    #[doc = "CTSU Channel Enable Control A"]
2631    #[inline(always)]
2632    pub fn chac06(
2633        self,
2634    ) -> crate::common::RegisterField<
2635        6,
2636        0x1,
2637        1,
2638        0,
2639        ctsuchaca::Chac06,
2640        ctsuchaca::Chac06,
2641        Ctsuchaca_SPEC,
2642        crate::common::RW,
2643    > {
2644        crate::common::RegisterField::<
2645            6,
2646            0x1,
2647            1,
2648            0,
2649            ctsuchaca::Chac06,
2650            ctsuchaca::Chac06,
2651            Ctsuchaca_SPEC,
2652            crate::common::RW,
2653        >::from_register(self, 0)
2654    }
2655
2656    #[doc = "CTSU Channel Enable Control A"]
2657    #[inline(always)]
2658    pub fn chac07(
2659        self,
2660    ) -> crate::common::RegisterField<
2661        7,
2662        0x1,
2663        1,
2664        0,
2665        ctsuchaca::Chac07,
2666        ctsuchaca::Chac07,
2667        Ctsuchaca_SPEC,
2668        crate::common::RW,
2669    > {
2670        crate::common::RegisterField::<
2671            7,
2672            0x1,
2673            1,
2674            0,
2675            ctsuchaca::Chac07,
2676            ctsuchaca::Chac07,
2677            Ctsuchaca_SPEC,
2678            crate::common::RW,
2679        >::from_register(self, 0)
2680    }
2681
2682    #[doc = "CTSU Channel Enable Control A"]
2683    #[inline(always)]
2684    pub fn chac08(
2685        self,
2686    ) -> crate::common::RegisterField<
2687        8,
2688        0x1,
2689        1,
2690        0,
2691        ctsuchaca::Chac08,
2692        ctsuchaca::Chac08,
2693        Ctsuchaca_SPEC,
2694        crate::common::RW,
2695    > {
2696        crate::common::RegisterField::<
2697            8,
2698            0x1,
2699            1,
2700            0,
2701            ctsuchaca::Chac08,
2702            ctsuchaca::Chac08,
2703            Ctsuchaca_SPEC,
2704            crate::common::RW,
2705        >::from_register(self, 0)
2706    }
2707
2708    #[doc = "CTSU Channel Enable Control A"]
2709    #[inline(always)]
2710    pub fn chac09(
2711        self,
2712    ) -> crate::common::RegisterField<
2713        9,
2714        0x1,
2715        1,
2716        0,
2717        ctsuchaca::Chac09,
2718        ctsuchaca::Chac09,
2719        Ctsuchaca_SPEC,
2720        crate::common::RW,
2721    > {
2722        crate::common::RegisterField::<
2723            9,
2724            0x1,
2725            1,
2726            0,
2727            ctsuchaca::Chac09,
2728            ctsuchaca::Chac09,
2729            Ctsuchaca_SPEC,
2730            crate::common::RW,
2731        >::from_register(self, 0)
2732    }
2733
2734    #[doc = "CTSU Channel Enable Control A"]
2735    #[inline(always)]
2736    pub fn chac10(
2737        self,
2738    ) -> crate::common::RegisterField<
2739        10,
2740        0x1,
2741        1,
2742        0,
2743        ctsuchaca::Chac10,
2744        ctsuchaca::Chac10,
2745        Ctsuchaca_SPEC,
2746        crate::common::RW,
2747    > {
2748        crate::common::RegisterField::<
2749            10,
2750            0x1,
2751            1,
2752            0,
2753            ctsuchaca::Chac10,
2754            ctsuchaca::Chac10,
2755            Ctsuchaca_SPEC,
2756            crate::common::RW,
2757        >::from_register(self, 0)
2758    }
2759
2760    #[doc = "CTSU Channel Enable Control A"]
2761    #[inline(always)]
2762    pub fn chac11(
2763        self,
2764    ) -> crate::common::RegisterField<
2765        11,
2766        0x1,
2767        1,
2768        0,
2769        ctsuchaca::Chac11,
2770        ctsuchaca::Chac11,
2771        Ctsuchaca_SPEC,
2772        crate::common::RW,
2773    > {
2774        crate::common::RegisterField::<
2775            11,
2776            0x1,
2777            1,
2778            0,
2779            ctsuchaca::Chac11,
2780            ctsuchaca::Chac11,
2781            Ctsuchaca_SPEC,
2782            crate::common::RW,
2783        >::from_register(self, 0)
2784    }
2785
2786    #[doc = "CTSU Channel Enable Control A"]
2787    #[inline(always)]
2788    pub fn chac12(
2789        self,
2790    ) -> crate::common::RegisterField<
2791        12,
2792        0x1,
2793        1,
2794        0,
2795        ctsuchaca::Chac12,
2796        ctsuchaca::Chac12,
2797        Ctsuchaca_SPEC,
2798        crate::common::RW,
2799    > {
2800        crate::common::RegisterField::<
2801            12,
2802            0x1,
2803            1,
2804            0,
2805            ctsuchaca::Chac12,
2806            ctsuchaca::Chac12,
2807            Ctsuchaca_SPEC,
2808            crate::common::RW,
2809        >::from_register(self, 0)
2810    }
2811
2812    #[doc = "CTSU Channel Enable Control A"]
2813    #[inline(always)]
2814    pub fn chac13(
2815        self,
2816    ) -> crate::common::RegisterField<
2817        13,
2818        0x1,
2819        1,
2820        0,
2821        ctsuchaca::Chac13,
2822        ctsuchaca::Chac13,
2823        Ctsuchaca_SPEC,
2824        crate::common::RW,
2825    > {
2826        crate::common::RegisterField::<
2827            13,
2828            0x1,
2829            1,
2830            0,
2831            ctsuchaca::Chac13,
2832            ctsuchaca::Chac13,
2833            Ctsuchaca_SPEC,
2834            crate::common::RW,
2835        >::from_register(self, 0)
2836    }
2837
2838    #[doc = "CTSU Channel Enable Control A"]
2839    #[inline(always)]
2840    pub fn chac14(
2841        self,
2842    ) -> crate::common::RegisterField<
2843        14,
2844        0x1,
2845        1,
2846        0,
2847        ctsuchaca::Chac14,
2848        ctsuchaca::Chac14,
2849        Ctsuchaca_SPEC,
2850        crate::common::RW,
2851    > {
2852        crate::common::RegisterField::<
2853            14,
2854            0x1,
2855            1,
2856            0,
2857            ctsuchaca::Chac14,
2858            ctsuchaca::Chac14,
2859            Ctsuchaca_SPEC,
2860            crate::common::RW,
2861        >::from_register(self, 0)
2862    }
2863
2864    #[doc = "CTSU Channel Enable Control A"]
2865    #[inline(always)]
2866    pub fn chac15(
2867        self,
2868    ) -> crate::common::RegisterField<
2869        15,
2870        0x1,
2871        1,
2872        0,
2873        ctsuchaca::Chac15,
2874        ctsuchaca::Chac15,
2875        Ctsuchaca_SPEC,
2876        crate::common::RW,
2877    > {
2878        crate::common::RegisterField::<
2879            15,
2880            0x1,
2881            1,
2882            0,
2883            ctsuchaca::Chac15,
2884            ctsuchaca::Chac15,
2885            Ctsuchaca_SPEC,
2886            crate::common::RW,
2887        >::from_register(self, 0)
2888    }
2889
2890    #[doc = "CTSU Channel Enable Control A"]
2891    #[inline(always)]
2892    pub fn chac16(
2893        self,
2894    ) -> crate::common::RegisterField<
2895        16,
2896        0x1,
2897        1,
2898        0,
2899        ctsuchaca::Chac16,
2900        ctsuchaca::Chac16,
2901        Ctsuchaca_SPEC,
2902        crate::common::RW,
2903    > {
2904        crate::common::RegisterField::<
2905            16,
2906            0x1,
2907            1,
2908            0,
2909            ctsuchaca::Chac16,
2910            ctsuchaca::Chac16,
2911            Ctsuchaca_SPEC,
2912            crate::common::RW,
2913        >::from_register(self, 0)
2914    }
2915
2916    #[doc = "CTSU Channel Enable Control A"]
2917    #[inline(always)]
2918    pub fn chac17(
2919        self,
2920    ) -> crate::common::RegisterField<
2921        17,
2922        0x1,
2923        1,
2924        0,
2925        ctsuchaca::Chac17,
2926        ctsuchaca::Chac17,
2927        Ctsuchaca_SPEC,
2928        crate::common::RW,
2929    > {
2930        crate::common::RegisterField::<
2931            17,
2932            0x1,
2933            1,
2934            0,
2935            ctsuchaca::Chac17,
2936            ctsuchaca::Chac17,
2937            Ctsuchaca_SPEC,
2938            crate::common::RW,
2939        >::from_register(self, 0)
2940    }
2941
2942    #[doc = "CTSU Channel Enable Control A"]
2943    #[inline(always)]
2944    pub fn chac18(
2945        self,
2946    ) -> crate::common::RegisterField<
2947        18,
2948        0x1,
2949        1,
2950        0,
2951        ctsuchaca::Chac18,
2952        ctsuchaca::Chac18,
2953        Ctsuchaca_SPEC,
2954        crate::common::RW,
2955    > {
2956        crate::common::RegisterField::<
2957            18,
2958            0x1,
2959            1,
2960            0,
2961            ctsuchaca::Chac18,
2962            ctsuchaca::Chac18,
2963            Ctsuchaca_SPEC,
2964            crate::common::RW,
2965        >::from_register(self, 0)
2966    }
2967
2968    #[doc = "CTSU Channel Enable Control A"]
2969    #[inline(always)]
2970    pub fn chac21(
2971        self,
2972    ) -> crate::common::RegisterField<
2973        21,
2974        0x1,
2975        1,
2976        0,
2977        ctsuchaca::Chac21,
2978        ctsuchaca::Chac21,
2979        Ctsuchaca_SPEC,
2980        crate::common::RW,
2981    > {
2982        crate::common::RegisterField::<
2983            21,
2984            0x1,
2985            1,
2986            0,
2987            ctsuchaca::Chac21,
2988            ctsuchaca::Chac21,
2989            Ctsuchaca_SPEC,
2990            crate::common::RW,
2991        >::from_register(self, 0)
2992    }
2993
2994    #[doc = "CTSU Channel Enable Control A"]
2995    #[inline(always)]
2996    pub fn chac22(
2997        self,
2998    ) -> crate::common::RegisterField<
2999        22,
3000        0x1,
3001        1,
3002        0,
3003        ctsuchaca::Chac22,
3004        ctsuchaca::Chac22,
3005        Ctsuchaca_SPEC,
3006        crate::common::RW,
3007    > {
3008        crate::common::RegisterField::<
3009            22,
3010            0x1,
3011            1,
3012            0,
3013            ctsuchaca::Chac22,
3014            ctsuchaca::Chac22,
3015            Ctsuchaca_SPEC,
3016            crate::common::RW,
3017        >::from_register(self, 0)
3018    }
3019
3020    #[doc = "CTSU Channel Enable Control A"]
3021    #[inline(always)]
3022    pub fn chac23(
3023        self,
3024    ) -> crate::common::RegisterField<
3025        23,
3026        0x1,
3027        1,
3028        0,
3029        ctsuchaca::Chac23,
3030        ctsuchaca::Chac23,
3031        Ctsuchaca_SPEC,
3032        crate::common::RW,
3033    > {
3034        crate::common::RegisterField::<
3035            23,
3036            0x1,
3037            1,
3038            0,
3039            ctsuchaca::Chac23,
3040            ctsuchaca::Chac23,
3041            Ctsuchaca_SPEC,
3042            crate::common::RW,
3043        >::from_register(self, 0)
3044    }
3045
3046    #[doc = "CTSU Channel Enable Control A"]
3047    #[inline(always)]
3048    pub fn chac24(
3049        self,
3050    ) -> crate::common::RegisterField<
3051        24,
3052        0x1,
3053        1,
3054        0,
3055        ctsuchaca::Chac24,
3056        ctsuchaca::Chac24,
3057        Ctsuchaca_SPEC,
3058        crate::common::RW,
3059    > {
3060        crate::common::RegisterField::<
3061            24,
3062            0x1,
3063            1,
3064            0,
3065            ctsuchaca::Chac24,
3066            ctsuchaca::Chac24,
3067            Ctsuchaca_SPEC,
3068            crate::common::RW,
3069        >::from_register(self, 0)
3070    }
3071
3072    #[doc = "CTSU Channel Enable Control A"]
3073    #[inline(always)]
3074    pub fn chac25(
3075        self,
3076    ) -> crate::common::RegisterField<
3077        25,
3078        0x1,
3079        1,
3080        0,
3081        ctsuchaca::Chac25,
3082        ctsuchaca::Chac25,
3083        Ctsuchaca_SPEC,
3084        crate::common::RW,
3085    > {
3086        crate::common::RegisterField::<
3087            25,
3088            0x1,
3089            1,
3090            0,
3091            ctsuchaca::Chac25,
3092            ctsuchaca::Chac25,
3093            Ctsuchaca_SPEC,
3094            crate::common::RW,
3095        >::from_register(self, 0)
3096    }
3097
3098    #[doc = "CTSU Channel Enable Control A"]
3099    #[inline(always)]
3100    pub fn chac26(
3101        self,
3102    ) -> crate::common::RegisterField<
3103        26,
3104        0x1,
3105        1,
3106        0,
3107        ctsuchaca::Chac26,
3108        ctsuchaca::Chac26,
3109        Ctsuchaca_SPEC,
3110        crate::common::RW,
3111    > {
3112        crate::common::RegisterField::<
3113            26,
3114            0x1,
3115            1,
3116            0,
3117            ctsuchaca::Chac26,
3118            ctsuchaca::Chac26,
3119            Ctsuchaca_SPEC,
3120            crate::common::RW,
3121        >::from_register(self, 0)
3122    }
3123
3124    #[doc = "CTSU Channel Enable Control A"]
3125    #[inline(always)]
3126    pub fn chac27(
3127        self,
3128    ) -> crate::common::RegisterField<
3129        27,
3130        0x1,
3131        1,
3132        0,
3133        ctsuchaca::Chac27,
3134        ctsuchaca::Chac27,
3135        Ctsuchaca_SPEC,
3136        crate::common::RW,
3137    > {
3138        crate::common::RegisterField::<
3139            27,
3140            0x1,
3141            1,
3142            0,
3143            ctsuchaca::Chac27,
3144            ctsuchaca::Chac27,
3145            Ctsuchaca_SPEC,
3146            crate::common::RW,
3147        >::from_register(self, 0)
3148    }
3149
3150    #[doc = "CTSU Channel Enable Control A"]
3151    #[inline(always)]
3152    pub fn chac28(
3153        self,
3154    ) -> crate::common::RegisterField<
3155        28,
3156        0x1,
3157        1,
3158        0,
3159        ctsuchaca::Chac28,
3160        ctsuchaca::Chac28,
3161        Ctsuchaca_SPEC,
3162        crate::common::RW,
3163    > {
3164        crate::common::RegisterField::<
3165            28,
3166            0x1,
3167            1,
3168            0,
3169            ctsuchaca::Chac28,
3170            ctsuchaca::Chac28,
3171            Ctsuchaca_SPEC,
3172            crate::common::RW,
3173        >::from_register(self, 0)
3174    }
3175
3176    #[doc = "CTSU Channel Enable Control A"]
3177    #[inline(always)]
3178    pub fn chac30(
3179        self,
3180    ) -> crate::common::RegisterField<
3181        30,
3182        0x1,
3183        1,
3184        0,
3185        ctsuchaca::Chac30,
3186        ctsuchaca::Chac30,
3187        Ctsuchaca_SPEC,
3188        crate::common::RW,
3189    > {
3190        crate::common::RegisterField::<
3191            30,
3192            0x1,
3193            1,
3194            0,
3195            ctsuchaca::Chac30,
3196            ctsuchaca::Chac30,
3197            Ctsuchaca_SPEC,
3198            crate::common::RW,
3199        >::from_register(self, 0)
3200    }
3201
3202    #[doc = "CTSU Channel Enable Control A"]
3203    #[inline(always)]
3204    pub fn chac31(
3205        self,
3206    ) -> crate::common::RegisterField<
3207        31,
3208        0x1,
3209        1,
3210        0,
3211        ctsuchaca::Chac31,
3212        ctsuchaca::Chac31,
3213        Ctsuchaca_SPEC,
3214        crate::common::RW,
3215    > {
3216        crate::common::RegisterField::<
3217            31,
3218            0x1,
3219            1,
3220            0,
3221            ctsuchaca::Chac31,
3222            ctsuchaca::Chac31,
3223            Ctsuchaca_SPEC,
3224            crate::common::RW,
3225        >::from_register(self, 0)
3226    }
3227}
3228impl ::core::default::Default for Ctsuchaca {
3229    #[inline(always)]
3230    fn default() -> Ctsuchaca {
3231        <crate::RegValueT<Ctsuchaca_SPEC> as RegisterValue<_>>::new(0)
3232    }
3233}
3234pub mod ctsuchaca {
3235
3236    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3237    pub struct Chac00_SPEC;
3238    pub type Chac00 = crate::EnumBitfieldStruct<u8, Chac00_SPEC>;
3239    impl Chac00 {
3240        #[doc = "Do not measure"]
3241        pub const _0: Self = Self::new(0);
3242
3243        #[doc = "Measure"]
3244        pub const _1: Self = Self::new(1);
3245    }
3246    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3247    pub struct Chac02_SPEC;
3248    pub type Chac02 = crate::EnumBitfieldStruct<u8, Chac02_SPEC>;
3249    impl Chac02 {
3250        #[doc = "Do not measure"]
3251        pub const _0: Self = Self::new(0);
3252
3253        #[doc = "Measure"]
3254        pub const _1: Self = Self::new(1);
3255    }
3256    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3257    pub struct Chac04_SPEC;
3258    pub type Chac04 = crate::EnumBitfieldStruct<u8, Chac04_SPEC>;
3259    impl Chac04 {
3260        #[doc = "Do not measure"]
3261        pub const _0: Self = Self::new(0);
3262
3263        #[doc = "Measure"]
3264        pub const _1: Self = Self::new(1);
3265    }
3266    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3267    pub struct Chac05_SPEC;
3268    pub type Chac05 = crate::EnumBitfieldStruct<u8, Chac05_SPEC>;
3269    impl Chac05 {
3270        #[doc = "Do not measure"]
3271        pub const _0: Self = Self::new(0);
3272
3273        #[doc = "Measure"]
3274        pub const _1: Self = Self::new(1);
3275    }
3276    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3277    pub struct Chac06_SPEC;
3278    pub type Chac06 = crate::EnumBitfieldStruct<u8, Chac06_SPEC>;
3279    impl Chac06 {
3280        #[doc = "Do not measure"]
3281        pub const _0: Self = Self::new(0);
3282
3283        #[doc = "Measure"]
3284        pub const _1: Self = Self::new(1);
3285    }
3286    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3287    pub struct Chac07_SPEC;
3288    pub type Chac07 = crate::EnumBitfieldStruct<u8, Chac07_SPEC>;
3289    impl Chac07 {
3290        #[doc = "Do not measure"]
3291        pub const _0: Self = Self::new(0);
3292
3293        #[doc = "Measure"]
3294        pub const _1: Self = Self::new(1);
3295    }
3296    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3297    pub struct Chac08_SPEC;
3298    pub type Chac08 = crate::EnumBitfieldStruct<u8, Chac08_SPEC>;
3299    impl Chac08 {
3300        #[doc = "Do not measure"]
3301        pub const _0: Self = Self::new(0);
3302
3303        #[doc = "Measure"]
3304        pub const _1: Self = Self::new(1);
3305    }
3306    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3307    pub struct Chac09_SPEC;
3308    pub type Chac09 = crate::EnumBitfieldStruct<u8, Chac09_SPEC>;
3309    impl Chac09 {
3310        #[doc = "Do not measure"]
3311        pub const _0: Self = Self::new(0);
3312
3313        #[doc = "Measure"]
3314        pub const _1: Self = Self::new(1);
3315    }
3316    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3317    pub struct Chac10_SPEC;
3318    pub type Chac10 = crate::EnumBitfieldStruct<u8, Chac10_SPEC>;
3319    impl Chac10 {
3320        #[doc = "Do not measure"]
3321        pub const _0: Self = Self::new(0);
3322
3323        #[doc = "Measure"]
3324        pub const _1: Self = Self::new(1);
3325    }
3326    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3327    pub struct Chac11_SPEC;
3328    pub type Chac11 = crate::EnumBitfieldStruct<u8, Chac11_SPEC>;
3329    impl Chac11 {
3330        #[doc = "Do not measure"]
3331        pub const _0: Self = Self::new(0);
3332
3333        #[doc = "Measure"]
3334        pub const _1: Self = Self::new(1);
3335    }
3336    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3337    pub struct Chac12_SPEC;
3338    pub type Chac12 = crate::EnumBitfieldStruct<u8, Chac12_SPEC>;
3339    impl Chac12 {
3340        #[doc = "Do not measure"]
3341        pub const _0: Self = Self::new(0);
3342
3343        #[doc = "Measure"]
3344        pub const _1: Self = Self::new(1);
3345    }
3346    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3347    pub struct Chac13_SPEC;
3348    pub type Chac13 = crate::EnumBitfieldStruct<u8, Chac13_SPEC>;
3349    impl Chac13 {
3350        #[doc = "Do not measure"]
3351        pub const _0: Self = Self::new(0);
3352
3353        #[doc = "Measure"]
3354        pub const _1: Self = Self::new(1);
3355    }
3356    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3357    pub struct Chac14_SPEC;
3358    pub type Chac14 = crate::EnumBitfieldStruct<u8, Chac14_SPEC>;
3359    impl Chac14 {
3360        #[doc = "Do not measure"]
3361        pub const _0: Self = Self::new(0);
3362
3363        #[doc = "Measure"]
3364        pub const _1: Self = Self::new(1);
3365    }
3366    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3367    pub struct Chac15_SPEC;
3368    pub type Chac15 = crate::EnumBitfieldStruct<u8, Chac15_SPEC>;
3369    impl Chac15 {
3370        #[doc = "Do not measure"]
3371        pub const _0: Self = Self::new(0);
3372
3373        #[doc = "Measure"]
3374        pub const _1: Self = Self::new(1);
3375    }
3376    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3377    pub struct Chac16_SPEC;
3378    pub type Chac16 = crate::EnumBitfieldStruct<u8, Chac16_SPEC>;
3379    impl Chac16 {
3380        #[doc = "Do not measure"]
3381        pub const _0: Self = Self::new(0);
3382
3383        #[doc = "Measure"]
3384        pub const _1: Self = Self::new(1);
3385    }
3386    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3387    pub struct Chac17_SPEC;
3388    pub type Chac17 = crate::EnumBitfieldStruct<u8, Chac17_SPEC>;
3389    impl Chac17 {
3390        #[doc = "Do not measure"]
3391        pub const _0: Self = Self::new(0);
3392
3393        #[doc = "Measure"]
3394        pub const _1: Self = Self::new(1);
3395    }
3396    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3397    pub struct Chac18_SPEC;
3398    pub type Chac18 = crate::EnumBitfieldStruct<u8, Chac18_SPEC>;
3399    impl Chac18 {
3400        #[doc = "Do not measure"]
3401        pub const _0: Self = Self::new(0);
3402
3403        #[doc = "Measure"]
3404        pub const _1: Self = Self::new(1);
3405    }
3406    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3407    pub struct Chac21_SPEC;
3408    pub type Chac21 = crate::EnumBitfieldStruct<u8, Chac21_SPEC>;
3409    impl Chac21 {
3410        #[doc = "Do not measure"]
3411        pub const _0: Self = Self::new(0);
3412
3413        #[doc = "Measure"]
3414        pub const _1: Self = Self::new(1);
3415    }
3416    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3417    pub struct Chac22_SPEC;
3418    pub type Chac22 = crate::EnumBitfieldStruct<u8, Chac22_SPEC>;
3419    impl Chac22 {
3420        #[doc = "Do not measure"]
3421        pub const _0: Self = Self::new(0);
3422
3423        #[doc = "Measure"]
3424        pub const _1: Self = Self::new(1);
3425    }
3426    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3427    pub struct Chac23_SPEC;
3428    pub type Chac23 = crate::EnumBitfieldStruct<u8, Chac23_SPEC>;
3429    impl Chac23 {
3430        #[doc = "Do not measure"]
3431        pub const _0: Self = Self::new(0);
3432
3433        #[doc = "Measure"]
3434        pub const _1: Self = Self::new(1);
3435    }
3436    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3437    pub struct Chac24_SPEC;
3438    pub type Chac24 = crate::EnumBitfieldStruct<u8, Chac24_SPEC>;
3439    impl Chac24 {
3440        #[doc = "Do not measure"]
3441        pub const _0: Self = Self::new(0);
3442
3443        #[doc = "Measure"]
3444        pub const _1: Self = Self::new(1);
3445    }
3446    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3447    pub struct Chac25_SPEC;
3448    pub type Chac25 = crate::EnumBitfieldStruct<u8, Chac25_SPEC>;
3449    impl Chac25 {
3450        #[doc = "Do not measure"]
3451        pub const _0: Self = Self::new(0);
3452
3453        #[doc = "Measure"]
3454        pub const _1: Self = Self::new(1);
3455    }
3456    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3457    pub struct Chac26_SPEC;
3458    pub type Chac26 = crate::EnumBitfieldStruct<u8, Chac26_SPEC>;
3459    impl Chac26 {
3460        #[doc = "Do not measure"]
3461        pub const _0: Self = Self::new(0);
3462
3463        #[doc = "Measure"]
3464        pub const _1: Self = Self::new(1);
3465    }
3466    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3467    pub struct Chac27_SPEC;
3468    pub type Chac27 = crate::EnumBitfieldStruct<u8, Chac27_SPEC>;
3469    impl Chac27 {
3470        #[doc = "Do not measure"]
3471        pub const _0: Self = Self::new(0);
3472
3473        #[doc = "Measure"]
3474        pub const _1: Self = Self::new(1);
3475    }
3476    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3477    pub struct Chac28_SPEC;
3478    pub type Chac28 = crate::EnumBitfieldStruct<u8, Chac28_SPEC>;
3479    impl Chac28 {
3480        #[doc = "Do not measure"]
3481        pub const _0: Self = Self::new(0);
3482
3483        #[doc = "Measure"]
3484        pub const _1: Self = Self::new(1);
3485    }
3486    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3487    pub struct Chac30_SPEC;
3488    pub type Chac30 = crate::EnumBitfieldStruct<u8, Chac30_SPEC>;
3489    impl Chac30 {
3490        #[doc = "Do not measure"]
3491        pub const _0: Self = Self::new(0);
3492
3493        #[doc = "Measure"]
3494        pub const _1: Self = Self::new(1);
3495    }
3496    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3497    pub struct Chac31_SPEC;
3498    pub type Chac31 = crate::EnumBitfieldStruct<u8, Chac31_SPEC>;
3499    impl Chac31 {
3500        #[doc = "Do not measure"]
3501        pub const _0: Self = Self::new(0);
3502
3503        #[doc = "Measure"]
3504        pub const _1: Self = Self::new(1);
3505    }
3506}
3507#[doc(hidden)]
3508#[derive(Copy, Clone, Eq, PartialEq)]
3509pub struct Ctsuchacal_SPEC;
3510impl crate::sealed::RegSpec for Ctsuchacal_SPEC {
3511    type DataType = u16;
3512}
3513
3514#[doc = "CTSU Channel Enable Control Register A"]
3515pub type Ctsuchacal = crate::RegValueT<Ctsuchacal_SPEC>;
3516
3517impl NoBitfieldReg<Ctsuchacal_SPEC> for Ctsuchacal {}
3518impl ::core::default::Default for Ctsuchacal {
3519    #[inline(always)]
3520    fn default() -> Ctsuchacal {
3521        <crate::RegValueT<Ctsuchacal_SPEC> as RegisterValue<_>>::new(0)
3522    }
3523}
3524
3525#[doc(hidden)]
3526#[derive(Copy, Clone, Eq, PartialEq)]
3527pub struct Ctsuchac0_SPEC;
3528impl crate::sealed::RegSpec for Ctsuchac0_SPEC {
3529    type DataType = u8;
3530}
3531
3532#[doc = "CTSU Channel Enable Control Register A"]
3533pub type Ctsuchac0 = crate::RegValueT<Ctsuchac0_SPEC>;
3534
3535impl NoBitfieldReg<Ctsuchac0_SPEC> for Ctsuchac0 {}
3536impl ::core::default::Default for Ctsuchac0 {
3537    #[inline(always)]
3538    fn default() -> Ctsuchac0 {
3539        <crate::RegValueT<Ctsuchac0_SPEC> as RegisterValue<_>>::new(0)
3540    }
3541}
3542
3543#[doc(hidden)]
3544#[derive(Copy, Clone, Eq, PartialEq)]
3545pub struct Ctsuchac1_SPEC;
3546impl crate::sealed::RegSpec for Ctsuchac1_SPEC {
3547    type DataType = u8;
3548}
3549
3550#[doc = "CTSU Channel Enable Control Register A"]
3551pub type Ctsuchac1 = crate::RegValueT<Ctsuchac1_SPEC>;
3552
3553impl NoBitfieldReg<Ctsuchac1_SPEC> for Ctsuchac1 {}
3554impl ::core::default::Default for Ctsuchac1 {
3555    #[inline(always)]
3556    fn default() -> Ctsuchac1 {
3557        <crate::RegValueT<Ctsuchac1_SPEC> as RegisterValue<_>>::new(0)
3558    }
3559}
3560
3561#[doc(hidden)]
3562#[derive(Copy, Clone, Eq, PartialEq)]
3563pub struct Ctsuchacah_SPEC;
3564impl crate::sealed::RegSpec for Ctsuchacah_SPEC {
3565    type DataType = u16;
3566}
3567
3568#[doc = "CTSU Channel Enable Control Register A"]
3569pub type Ctsuchacah = crate::RegValueT<Ctsuchacah_SPEC>;
3570
3571impl NoBitfieldReg<Ctsuchacah_SPEC> for Ctsuchacah {}
3572impl ::core::default::Default for Ctsuchacah {
3573    #[inline(always)]
3574    fn default() -> Ctsuchacah {
3575        <crate::RegValueT<Ctsuchacah_SPEC> as RegisterValue<_>>::new(0)
3576    }
3577}
3578
3579#[doc(hidden)]
3580#[derive(Copy, Clone, Eq, PartialEq)]
3581pub struct Ctsuchac2_SPEC;
3582impl crate::sealed::RegSpec for Ctsuchac2_SPEC {
3583    type DataType = u8;
3584}
3585
3586#[doc = "CTSU Channel Enable Control Register A"]
3587pub type Ctsuchac2 = crate::RegValueT<Ctsuchac2_SPEC>;
3588
3589impl NoBitfieldReg<Ctsuchac2_SPEC> for Ctsuchac2 {}
3590impl ::core::default::Default for Ctsuchac2 {
3591    #[inline(always)]
3592    fn default() -> Ctsuchac2 {
3593        <crate::RegValueT<Ctsuchac2_SPEC> as RegisterValue<_>>::new(0)
3594    }
3595}
3596
3597#[doc(hidden)]
3598#[derive(Copy, Clone, Eq, PartialEq)]
3599pub struct Ctsuchac3_SPEC;
3600impl crate::sealed::RegSpec for Ctsuchac3_SPEC {
3601    type DataType = u8;
3602}
3603
3604#[doc = "CTSU Channel Enable Control Register A"]
3605pub type Ctsuchac3 = crate::RegValueT<Ctsuchac3_SPEC>;
3606
3607impl NoBitfieldReg<Ctsuchac3_SPEC> for Ctsuchac3 {}
3608impl ::core::default::Default for Ctsuchac3 {
3609    #[inline(always)]
3610    fn default() -> Ctsuchac3 {
3611        <crate::RegValueT<Ctsuchac3_SPEC> as RegisterValue<_>>::new(0)
3612    }
3613}
3614
3615#[doc(hidden)]
3616#[derive(Copy, Clone, Eq, PartialEq)]
3617pub struct Ctsuchacb_SPEC;
3618impl crate::sealed::RegSpec for Ctsuchacb_SPEC {
3619    type DataType = u32;
3620}
3621
3622#[doc = "CTSU Channel Enable Control Register B"]
3623pub type Ctsuchacb = crate::RegValueT<Ctsuchacb_SPEC>;
3624
3625impl Ctsuchacb {
3626    #[doc = "CTSU Channel Enable Control B"]
3627    #[inline(always)]
3628    pub fn chac32(
3629        self,
3630    ) -> crate::common::RegisterField<
3631        0,
3632        0x1,
3633        1,
3634        0,
3635        ctsuchacb::Chac32,
3636        ctsuchacb::Chac32,
3637        Ctsuchacb_SPEC,
3638        crate::common::RW,
3639    > {
3640        crate::common::RegisterField::<
3641            0,
3642            0x1,
3643            1,
3644            0,
3645            ctsuchacb::Chac32,
3646            ctsuchacb::Chac32,
3647            Ctsuchacb_SPEC,
3648            crate::common::RW,
3649        >::from_register(self, 0)
3650    }
3651
3652    #[doc = "CTSU Channel Enable Control B"]
3653    #[inline(always)]
3654    pub fn chac33(
3655        self,
3656    ) -> crate::common::RegisterField<
3657        1,
3658        0x1,
3659        1,
3660        0,
3661        ctsuchacb::Chac33,
3662        ctsuchacb::Chac33,
3663        Ctsuchacb_SPEC,
3664        crate::common::RW,
3665    > {
3666        crate::common::RegisterField::<
3667            1,
3668            0x1,
3669            1,
3670            0,
3671            ctsuchacb::Chac33,
3672            ctsuchacb::Chac33,
3673            Ctsuchacb_SPEC,
3674            crate::common::RW,
3675        >::from_register(self, 0)
3676    }
3677
3678    #[doc = "CTSU Channel Enable Control B"]
3679    #[inline(always)]
3680    pub fn chac34(
3681        self,
3682    ) -> crate::common::RegisterField<
3683        2,
3684        0x1,
3685        1,
3686        0,
3687        ctsuchacb::Chac34,
3688        ctsuchacb::Chac34,
3689        Ctsuchacb_SPEC,
3690        crate::common::RW,
3691    > {
3692        crate::common::RegisterField::<
3693            2,
3694            0x1,
3695            1,
3696            0,
3697            ctsuchacb::Chac34,
3698            ctsuchacb::Chac34,
3699            Ctsuchacb_SPEC,
3700            crate::common::RW,
3701        >::from_register(self, 0)
3702    }
3703}
3704impl ::core::default::Default for Ctsuchacb {
3705    #[inline(always)]
3706    fn default() -> Ctsuchacb {
3707        <crate::RegValueT<Ctsuchacb_SPEC> as RegisterValue<_>>::new(0)
3708    }
3709}
3710pub mod ctsuchacb {
3711
3712    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3713    pub struct Chac32_SPEC;
3714    pub type Chac32 = crate::EnumBitfieldStruct<u8, Chac32_SPEC>;
3715    impl Chac32 {
3716        #[doc = "Do not measure"]
3717        pub const _0: Self = Self::new(0);
3718
3719        #[doc = "Measure"]
3720        pub const _1: Self = Self::new(1);
3721    }
3722    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3723    pub struct Chac33_SPEC;
3724    pub type Chac33 = crate::EnumBitfieldStruct<u8, Chac33_SPEC>;
3725    impl Chac33 {
3726        #[doc = "Do not measure"]
3727        pub const _0: Self = Self::new(0);
3728
3729        #[doc = "Measure"]
3730        pub const _1: Self = Self::new(1);
3731    }
3732    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3733    pub struct Chac34_SPEC;
3734    pub type Chac34 = crate::EnumBitfieldStruct<u8, Chac34_SPEC>;
3735    impl Chac34 {
3736        #[doc = "Do not measure"]
3737        pub const _0: Self = Self::new(0);
3738
3739        #[doc = "Measure"]
3740        pub const _1: Self = Self::new(1);
3741    }
3742}
3743#[doc(hidden)]
3744#[derive(Copy, Clone, Eq, PartialEq)]
3745pub struct Ctsuchacbl_SPEC;
3746impl crate::sealed::RegSpec for Ctsuchacbl_SPEC {
3747    type DataType = u16;
3748}
3749
3750#[doc = "CTSU Channel Enable Control Register B"]
3751pub type Ctsuchacbl = crate::RegValueT<Ctsuchacbl_SPEC>;
3752
3753impl NoBitfieldReg<Ctsuchacbl_SPEC> for Ctsuchacbl {}
3754impl ::core::default::Default for Ctsuchacbl {
3755    #[inline(always)]
3756    fn default() -> Ctsuchacbl {
3757        <crate::RegValueT<Ctsuchacbl_SPEC> as RegisterValue<_>>::new(0)
3758    }
3759}
3760
3761#[doc(hidden)]
3762#[derive(Copy, Clone, Eq, PartialEq)]
3763pub struct Ctsuchac4_SPEC;
3764impl crate::sealed::RegSpec for Ctsuchac4_SPEC {
3765    type DataType = u8;
3766}
3767
3768#[doc = "CTSU Channel Enable Control Register B"]
3769pub type Ctsuchac4 = crate::RegValueT<Ctsuchac4_SPEC>;
3770
3771impl NoBitfieldReg<Ctsuchac4_SPEC> for Ctsuchac4 {}
3772impl ::core::default::Default for Ctsuchac4 {
3773    #[inline(always)]
3774    fn default() -> Ctsuchac4 {
3775        <crate::RegValueT<Ctsuchac4_SPEC> as RegisterValue<_>>::new(0)
3776    }
3777}
3778
3779#[doc(hidden)]
3780#[derive(Copy, Clone, Eq, PartialEq)]
3781pub struct Ctsuchtrca_SPEC;
3782impl crate::sealed::RegSpec for Ctsuchtrca_SPEC {
3783    type DataType = u32;
3784}
3785
3786#[doc = "CTSU Channel Transmit/Receive Control Register A"]
3787pub type Ctsuchtrca = crate::RegValueT<Ctsuchtrca_SPEC>;
3788
3789impl Ctsuchtrca {
3790    #[doc = "CTSU Channel Transmit/Receive Control A"]
3791    #[inline(always)]
3792    pub fn chtrc00(
3793        self,
3794    ) -> crate::common::RegisterField<
3795        0,
3796        0x1,
3797        1,
3798        0,
3799        ctsuchtrca::Chtrc00,
3800        ctsuchtrca::Chtrc00,
3801        Ctsuchtrca_SPEC,
3802        crate::common::RW,
3803    > {
3804        crate::common::RegisterField::<
3805            0,
3806            0x1,
3807            1,
3808            0,
3809            ctsuchtrca::Chtrc00,
3810            ctsuchtrca::Chtrc00,
3811            Ctsuchtrca_SPEC,
3812            crate::common::RW,
3813        >::from_register(self, 0)
3814    }
3815
3816    #[doc = "CTSU Channel Transmit/Receive Control A"]
3817    #[inline(always)]
3818    pub fn chtrc02(
3819        self,
3820    ) -> crate::common::RegisterField<
3821        2,
3822        0x1,
3823        1,
3824        0,
3825        ctsuchtrca::Chtrc02,
3826        ctsuchtrca::Chtrc02,
3827        Ctsuchtrca_SPEC,
3828        crate::common::RW,
3829    > {
3830        crate::common::RegisterField::<
3831            2,
3832            0x1,
3833            1,
3834            0,
3835            ctsuchtrca::Chtrc02,
3836            ctsuchtrca::Chtrc02,
3837            Ctsuchtrca_SPEC,
3838            crate::common::RW,
3839        >::from_register(self, 0)
3840    }
3841
3842    #[doc = "CTSU Channel Transmit/Receive Control A"]
3843    #[inline(always)]
3844    pub fn chtrc04(
3845        self,
3846    ) -> crate::common::RegisterField<
3847        4,
3848        0x1,
3849        1,
3850        0,
3851        ctsuchtrca::Chtrc04,
3852        ctsuchtrca::Chtrc04,
3853        Ctsuchtrca_SPEC,
3854        crate::common::RW,
3855    > {
3856        crate::common::RegisterField::<
3857            4,
3858            0x1,
3859            1,
3860            0,
3861            ctsuchtrca::Chtrc04,
3862            ctsuchtrca::Chtrc04,
3863            Ctsuchtrca_SPEC,
3864            crate::common::RW,
3865        >::from_register(self, 0)
3866    }
3867
3868    #[doc = "CTSU Channel Transmit/Receive Control A"]
3869    #[inline(always)]
3870    pub fn chtrc05(
3871        self,
3872    ) -> crate::common::RegisterField<
3873        5,
3874        0x1,
3875        1,
3876        0,
3877        ctsuchtrca::Chtrc05,
3878        ctsuchtrca::Chtrc05,
3879        Ctsuchtrca_SPEC,
3880        crate::common::RW,
3881    > {
3882        crate::common::RegisterField::<
3883            5,
3884            0x1,
3885            1,
3886            0,
3887            ctsuchtrca::Chtrc05,
3888            ctsuchtrca::Chtrc05,
3889            Ctsuchtrca_SPEC,
3890            crate::common::RW,
3891        >::from_register(self, 0)
3892    }
3893
3894    #[doc = "CTSU Channel Transmit/Receive Control A"]
3895    #[inline(always)]
3896    pub fn chtrc06(
3897        self,
3898    ) -> crate::common::RegisterField<
3899        6,
3900        0x1,
3901        1,
3902        0,
3903        ctsuchtrca::Chtrc06,
3904        ctsuchtrca::Chtrc06,
3905        Ctsuchtrca_SPEC,
3906        crate::common::RW,
3907    > {
3908        crate::common::RegisterField::<
3909            6,
3910            0x1,
3911            1,
3912            0,
3913            ctsuchtrca::Chtrc06,
3914            ctsuchtrca::Chtrc06,
3915            Ctsuchtrca_SPEC,
3916            crate::common::RW,
3917        >::from_register(self, 0)
3918    }
3919
3920    #[doc = "CTSU Channel Transmit/Receive Control A"]
3921    #[inline(always)]
3922    pub fn chtrc07(
3923        self,
3924    ) -> crate::common::RegisterField<
3925        7,
3926        0x1,
3927        1,
3928        0,
3929        ctsuchtrca::Chtrc07,
3930        ctsuchtrca::Chtrc07,
3931        Ctsuchtrca_SPEC,
3932        crate::common::RW,
3933    > {
3934        crate::common::RegisterField::<
3935            7,
3936            0x1,
3937            1,
3938            0,
3939            ctsuchtrca::Chtrc07,
3940            ctsuchtrca::Chtrc07,
3941            Ctsuchtrca_SPEC,
3942            crate::common::RW,
3943        >::from_register(self, 0)
3944    }
3945
3946    #[doc = "CTSU Channel Transmit/Receive Control A"]
3947    #[inline(always)]
3948    pub fn chtrc08(
3949        self,
3950    ) -> crate::common::RegisterField<
3951        8,
3952        0x1,
3953        1,
3954        0,
3955        ctsuchtrca::Chtrc08,
3956        ctsuchtrca::Chtrc08,
3957        Ctsuchtrca_SPEC,
3958        crate::common::RW,
3959    > {
3960        crate::common::RegisterField::<
3961            8,
3962            0x1,
3963            1,
3964            0,
3965            ctsuchtrca::Chtrc08,
3966            ctsuchtrca::Chtrc08,
3967            Ctsuchtrca_SPEC,
3968            crate::common::RW,
3969        >::from_register(self, 0)
3970    }
3971
3972    #[doc = "CTSU Channel Transmit/Receive Control A"]
3973    #[inline(always)]
3974    pub fn chtrc09(
3975        self,
3976    ) -> crate::common::RegisterField<
3977        9,
3978        0x1,
3979        1,
3980        0,
3981        ctsuchtrca::Chtrc09,
3982        ctsuchtrca::Chtrc09,
3983        Ctsuchtrca_SPEC,
3984        crate::common::RW,
3985    > {
3986        crate::common::RegisterField::<
3987            9,
3988            0x1,
3989            1,
3990            0,
3991            ctsuchtrca::Chtrc09,
3992            ctsuchtrca::Chtrc09,
3993            Ctsuchtrca_SPEC,
3994            crate::common::RW,
3995        >::from_register(self, 0)
3996    }
3997
3998    #[doc = "CTSU Channel Transmit/Receive Control A"]
3999    #[inline(always)]
4000    pub fn chtrc10(
4001        self,
4002    ) -> crate::common::RegisterField<
4003        10,
4004        0x1,
4005        1,
4006        0,
4007        ctsuchtrca::Chtrc10,
4008        ctsuchtrca::Chtrc10,
4009        Ctsuchtrca_SPEC,
4010        crate::common::RW,
4011    > {
4012        crate::common::RegisterField::<
4013            10,
4014            0x1,
4015            1,
4016            0,
4017            ctsuchtrca::Chtrc10,
4018            ctsuchtrca::Chtrc10,
4019            Ctsuchtrca_SPEC,
4020            crate::common::RW,
4021        >::from_register(self, 0)
4022    }
4023
4024    #[doc = "CTSU Channel Transmit/Receive Control A"]
4025    #[inline(always)]
4026    pub fn chtrc11(
4027        self,
4028    ) -> crate::common::RegisterField<
4029        11,
4030        0x1,
4031        1,
4032        0,
4033        ctsuchtrca::Chtrc11,
4034        ctsuchtrca::Chtrc11,
4035        Ctsuchtrca_SPEC,
4036        crate::common::RW,
4037    > {
4038        crate::common::RegisterField::<
4039            11,
4040            0x1,
4041            1,
4042            0,
4043            ctsuchtrca::Chtrc11,
4044            ctsuchtrca::Chtrc11,
4045            Ctsuchtrca_SPEC,
4046            crate::common::RW,
4047        >::from_register(self, 0)
4048    }
4049
4050    #[doc = "CTSU Channel Transmit/Receive Control A"]
4051    #[inline(always)]
4052    pub fn chtrc12(
4053        self,
4054    ) -> crate::common::RegisterField<
4055        12,
4056        0x1,
4057        1,
4058        0,
4059        ctsuchtrca::Chtrc12,
4060        ctsuchtrca::Chtrc12,
4061        Ctsuchtrca_SPEC,
4062        crate::common::RW,
4063    > {
4064        crate::common::RegisterField::<
4065            12,
4066            0x1,
4067            1,
4068            0,
4069            ctsuchtrca::Chtrc12,
4070            ctsuchtrca::Chtrc12,
4071            Ctsuchtrca_SPEC,
4072            crate::common::RW,
4073        >::from_register(self, 0)
4074    }
4075
4076    #[doc = "CTSU Channel Transmit/Receive Control A"]
4077    #[inline(always)]
4078    pub fn chtrc13(
4079        self,
4080    ) -> crate::common::RegisterField<
4081        13,
4082        0x1,
4083        1,
4084        0,
4085        ctsuchtrca::Chtrc13,
4086        ctsuchtrca::Chtrc13,
4087        Ctsuchtrca_SPEC,
4088        crate::common::RW,
4089    > {
4090        crate::common::RegisterField::<
4091            13,
4092            0x1,
4093            1,
4094            0,
4095            ctsuchtrca::Chtrc13,
4096            ctsuchtrca::Chtrc13,
4097            Ctsuchtrca_SPEC,
4098            crate::common::RW,
4099        >::from_register(self, 0)
4100    }
4101
4102    #[doc = "CTSU Channel Transmit/Receive Control A"]
4103    #[inline(always)]
4104    pub fn chtrc14(
4105        self,
4106    ) -> crate::common::RegisterField<
4107        14,
4108        0x1,
4109        1,
4110        0,
4111        ctsuchtrca::Chtrc14,
4112        ctsuchtrca::Chtrc14,
4113        Ctsuchtrca_SPEC,
4114        crate::common::RW,
4115    > {
4116        crate::common::RegisterField::<
4117            14,
4118            0x1,
4119            1,
4120            0,
4121            ctsuchtrca::Chtrc14,
4122            ctsuchtrca::Chtrc14,
4123            Ctsuchtrca_SPEC,
4124            crate::common::RW,
4125        >::from_register(self, 0)
4126    }
4127
4128    #[doc = "CTSU Channel Transmit/Receive Control A"]
4129    #[inline(always)]
4130    pub fn chtrc15(
4131        self,
4132    ) -> crate::common::RegisterField<
4133        15,
4134        0x1,
4135        1,
4136        0,
4137        ctsuchtrca::Chtrc15,
4138        ctsuchtrca::Chtrc15,
4139        Ctsuchtrca_SPEC,
4140        crate::common::RW,
4141    > {
4142        crate::common::RegisterField::<
4143            15,
4144            0x1,
4145            1,
4146            0,
4147            ctsuchtrca::Chtrc15,
4148            ctsuchtrca::Chtrc15,
4149            Ctsuchtrca_SPEC,
4150            crate::common::RW,
4151        >::from_register(self, 0)
4152    }
4153
4154    #[doc = "CTSU Channel Transmit/Receive Control A"]
4155    #[inline(always)]
4156    pub fn chtrc16(
4157        self,
4158    ) -> crate::common::RegisterField<
4159        16,
4160        0x1,
4161        1,
4162        0,
4163        ctsuchtrca::Chtrc16,
4164        ctsuchtrca::Chtrc16,
4165        Ctsuchtrca_SPEC,
4166        crate::common::RW,
4167    > {
4168        crate::common::RegisterField::<
4169            16,
4170            0x1,
4171            1,
4172            0,
4173            ctsuchtrca::Chtrc16,
4174            ctsuchtrca::Chtrc16,
4175            Ctsuchtrca_SPEC,
4176            crate::common::RW,
4177        >::from_register(self, 0)
4178    }
4179
4180    #[doc = "CTSU Channel Transmit/Receive Control A"]
4181    #[inline(always)]
4182    pub fn chtrc17(
4183        self,
4184    ) -> crate::common::RegisterField<
4185        17,
4186        0x1,
4187        1,
4188        0,
4189        ctsuchtrca::Chtrc17,
4190        ctsuchtrca::Chtrc17,
4191        Ctsuchtrca_SPEC,
4192        crate::common::RW,
4193    > {
4194        crate::common::RegisterField::<
4195            17,
4196            0x1,
4197            1,
4198            0,
4199            ctsuchtrca::Chtrc17,
4200            ctsuchtrca::Chtrc17,
4201            Ctsuchtrca_SPEC,
4202            crate::common::RW,
4203        >::from_register(self, 0)
4204    }
4205
4206    #[doc = "CTSU Channel Transmit/Receive Control A"]
4207    #[inline(always)]
4208    pub fn chtrc18(
4209        self,
4210    ) -> crate::common::RegisterField<
4211        18,
4212        0x1,
4213        1,
4214        0,
4215        ctsuchtrca::Chtrc18,
4216        ctsuchtrca::Chtrc18,
4217        Ctsuchtrca_SPEC,
4218        crate::common::RW,
4219    > {
4220        crate::common::RegisterField::<
4221            18,
4222            0x1,
4223            1,
4224            0,
4225            ctsuchtrca::Chtrc18,
4226            ctsuchtrca::Chtrc18,
4227            Ctsuchtrca_SPEC,
4228            crate::common::RW,
4229        >::from_register(self, 0)
4230    }
4231
4232    #[doc = "CTSU Channel Transmit/Receive Control A"]
4233    #[inline(always)]
4234    pub fn chtrc21(
4235        self,
4236    ) -> crate::common::RegisterField<
4237        21,
4238        0x1,
4239        1,
4240        0,
4241        ctsuchtrca::Chtrc21,
4242        ctsuchtrca::Chtrc21,
4243        Ctsuchtrca_SPEC,
4244        crate::common::RW,
4245    > {
4246        crate::common::RegisterField::<
4247            21,
4248            0x1,
4249            1,
4250            0,
4251            ctsuchtrca::Chtrc21,
4252            ctsuchtrca::Chtrc21,
4253            Ctsuchtrca_SPEC,
4254            crate::common::RW,
4255        >::from_register(self, 0)
4256    }
4257
4258    #[doc = "CTSU Channel Transmit/Receive Control A"]
4259    #[inline(always)]
4260    pub fn chtrc22(
4261        self,
4262    ) -> crate::common::RegisterField<
4263        22,
4264        0x1,
4265        1,
4266        0,
4267        ctsuchtrca::Chtrc22,
4268        ctsuchtrca::Chtrc22,
4269        Ctsuchtrca_SPEC,
4270        crate::common::RW,
4271    > {
4272        crate::common::RegisterField::<
4273            22,
4274            0x1,
4275            1,
4276            0,
4277            ctsuchtrca::Chtrc22,
4278            ctsuchtrca::Chtrc22,
4279            Ctsuchtrca_SPEC,
4280            crate::common::RW,
4281        >::from_register(self, 0)
4282    }
4283
4284    #[doc = "CTSU Channel Transmit/Receive Control A"]
4285    #[inline(always)]
4286    pub fn chtrc23(
4287        self,
4288    ) -> crate::common::RegisterField<
4289        23,
4290        0x1,
4291        1,
4292        0,
4293        ctsuchtrca::Chtrc23,
4294        ctsuchtrca::Chtrc23,
4295        Ctsuchtrca_SPEC,
4296        crate::common::RW,
4297    > {
4298        crate::common::RegisterField::<
4299            23,
4300            0x1,
4301            1,
4302            0,
4303            ctsuchtrca::Chtrc23,
4304            ctsuchtrca::Chtrc23,
4305            Ctsuchtrca_SPEC,
4306            crate::common::RW,
4307        >::from_register(self, 0)
4308    }
4309
4310    #[doc = "CTSU Channel Transmit/Receive Control A"]
4311    #[inline(always)]
4312    pub fn chtrc24(
4313        self,
4314    ) -> crate::common::RegisterField<
4315        24,
4316        0x1,
4317        1,
4318        0,
4319        ctsuchtrca::Chtrc24,
4320        ctsuchtrca::Chtrc24,
4321        Ctsuchtrca_SPEC,
4322        crate::common::RW,
4323    > {
4324        crate::common::RegisterField::<
4325            24,
4326            0x1,
4327            1,
4328            0,
4329            ctsuchtrca::Chtrc24,
4330            ctsuchtrca::Chtrc24,
4331            Ctsuchtrca_SPEC,
4332            crate::common::RW,
4333        >::from_register(self, 0)
4334    }
4335
4336    #[doc = "CTSU Channel Transmit/Receive Control A"]
4337    #[inline(always)]
4338    pub fn chtrc25(
4339        self,
4340    ) -> crate::common::RegisterField<
4341        25,
4342        0x1,
4343        1,
4344        0,
4345        ctsuchtrca::Chtrc25,
4346        ctsuchtrca::Chtrc25,
4347        Ctsuchtrca_SPEC,
4348        crate::common::RW,
4349    > {
4350        crate::common::RegisterField::<
4351            25,
4352            0x1,
4353            1,
4354            0,
4355            ctsuchtrca::Chtrc25,
4356            ctsuchtrca::Chtrc25,
4357            Ctsuchtrca_SPEC,
4358            crate::common::RW,
4359        >::from_register(self, 0)
4360    }
4361
4362    #[doc = "CTSU Channel Transmit/Receive Control A"]
4363    #[inline(always)]
4364    pub fn chtrc26(
4365        self,
4366    ) -> crate::common::RegisterField<
4367        26,
4368        0x1,
4369        1,
4370        0,
4371        ctsuchtrca::Chtrc26,
4372        ctsuchtrca::Chtrc26,
4373        Ctsuchtrca_SPEC,
4374        crate::common::RW,
4375    > {
4376        crate::common::RegisterField::<
4377            26,
4378            0x1,
4379            1,
4380            0,
4381            ctsuchtrca::Chtrc26,
4382            ctsuchtrca::Chtrc26,
4383            Ctsuchtrca_SPEC,
4384            crate::common::RW,
4385        >::from_register(self, 0)
4386    }
4387
4388    #[doc = "CTSU Channel Transmit/Receive Control A"]
4389    #[inline(always)]
4390    pub fn chtrc27(
4391        self,
4392    ) -> crate::common::RegisterField<
4393        27,
4394        0x1,
4395        1,
4396        0,
4397        ctsuchtrca::Chtrc27,
4398        ctsuchtrca::Chtrc27,
4399        Ctsuchtrca_SPEC,
4400        crate::common::RW,
4401    > {
4402        crate::common::RegisterField::<
4403            27,
4404            0x1,
4405            1,
4406            0,
4407            ctsuchtrca::Chtrc27,
4408            ctsuchtrca::Chtrc27,
4409            Ctsuchtrca_SPEC,
4410            crate::common::RW,
4411        >::from_register(self, 0)
4412    }
4413
4414    #[doc = "CTSU Channel Transmit/Receive Control A"]
4415    #[inline(always)]
4416    pub fn chtrc28(
4417        self,
4418    ) -> crate::common::RegisterField<
4419        28,
4420        0x1,
4421        1,
4422        0,
4423        ctsuchtrca::Chtrc28,
4424        ctsuchtrca::Chtrc28,
4425        Ctsuchtrca_SPEC,
4426        crate::common::RW,
4427    > {
4428        crate::common::RegisterField::<
4429            28,
4430            0x1,
4431            1,
4432            0,
4433            ctsuchtrca::Chtrc28,
4434            ctsuchtrca::Chtrc28,
4435            Ctsuchtrca_SPEC,
4436            crate::common::RW,
4437        >::from_register(self, 0)
4438    }
4439
4440    #[doc = "CTSU Channel Transmit/Receive Control A"]
4441    #[inline(always)]
4442    pub fn chtrc30(
4443        self,
4444    ) -> crate::common::RegisterField<
4445        30,
4446        0x1,
4447        1,
4448        0,
4449        ctsuchtrca::Chtrc30,
4450        ctsuchtrca::Chtrc30,
4451        Ctsuchtrca_SPEC,
4452        crate::common::RW,
4453    > {
4454        crate::common::RegisterField::<
4455            30,
4456            0x1,
4457            1,
4458            0,
4459            ctsuchtrca::Chtrc30,
4460            ctsuchtrca::Chtrc30,
4461            Ctsuchtrca_SPEC,
4462            crate::common::RW,
4463        >::from_register(self, 0)
4464    }
4465
4466    #[doc = "CTSU Channel Transmit/Receive Control A"]
4467    #[inline(always)]
4468    pub fn chtrc31(
4469        self,
4470    ) -> crate::common::RegisterField<
4471        31,
4472        0x1,
4473        1,
4474        0,
4475        ctsuchtrca::Chtrc31,
4476        ctsuchtrca::Chtrc31,
4477        Ctsuchtrca_SPEC,
4478        crate::common::RW,
4479    > {
4480        crate::common::RegisterField::<
4481            31,
4482            0x1,
4483            1,
4484            0,
4485            ctsuchtrca::Chtrc31,
4486            ctsuchtrca::Chtrc31,
4487            Ctsuchtrca_SPEC,
4488            crate::common::RW,
4489        >::from_register(self, 0)
4490    }
4491}
4492impl ::core::default::Default for Ctsuchtrca {
4493    #[inline(always)]
4494    fn default() -> Ctsuchtrca {
4495        <crate::RegValueT<Ctsuchtrca_SPEC> as RegisterValue<_>>::new(0)
4496    }
4497}
4498pub mod ctsuchtrca {
4499
4500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4501    pub struct Chtrc00_SPEC;
4502    pub type Chtrc00 = crate::EnumBitfieldStruct<u8, Chtrc00_SPEC>;
4503    impl Chtrc00 {
4504        #[doc = "Reception"]
4505        pub const _0: Self = Self::new(0);
4506
4507        #[doc = "Transmission"]
4508        pub const _1: Self = Self::new(1);
4509    }
4510    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4511    pub struct Chtrc02_SPEC;
4512    pub type Chtrc02 = crate::EnumBitfieldStruct<u8, Chtrc02_SPEC>;
4513    impl Chtrc02 {
4514        #[doc = "Reception"]
4515        pub const _0: Self = Self::new(0);
4516
4517        #[doc = "Transmission"]
4518        pub const _1: Self = Self::new(1);
4519    }
4520    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4521    pub struct Chtrc04_SPEC;
4522    pub type Chtrc04 = crate::EnumBitfieldStruct<u8, Chtrc04_SPEC>;
4523    impl Chtrc04 {
4524        #[doc = "Reception"]
4525        pub const _0: Self = Self::new(0);
4526
4527        #[doc = "Transmission"]
4528        pub const _1: Self = Self::new(1);
4529    }
4530    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4531    pub struct Chtrc05_SPEC;
4532    pub type Chtrc05 = crate::EnumBitfieldStruct<u8, Chtrc05_SPEC>;
4533    impl Chtrc05 {
4534        #[doc = "Reception"]
4535        pub const _0: Self = Self::new(0);
4536
4537        #[doc = "Transmission"]
4538        pub const _1: Self = Self::new(1);
4539    }
4540    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4541    pub struct Chtrc06_SPEC;
4542    pub type Chtrc06 = crate::EnumBitfieldStruct<u8, Chtrc06_SPEC>;
4543    impl Chtrc06 {
4544        #[doc = "Reception"]
4545        pub const _0: Self = Self::new(0);
4546
4547        #[doc = "Transmission"]
4548        pub const _1: Self = Self::new(1);
4549    }
4550    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4551    pub struct Chtrc07_SPEC;
4552    pub type Chtrc07 = crate::EnumBitfieldStruct<u8, Chtrc07_SPEC>;
4553    impl Chtrc07 {
4554        #[doc = "Reception"]
4555        pub const _0: Self = Self::new(0);
4556
4557        #[doc = "Transmission"]
4558        pub const _1: Self = Self::new(1);
4559    }
4560    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4561    pub struct Chtrc08_SPEC;
4562    pub type Chtrc08 = crate::EnumBitfieldStruct<u8, Chtrc08_SPEC>;
4563    impl Chtrc08 {
4564        #[doc = "Reception"]
4565        pub const _0: Self = Self::new(0);
4566
4567        #[doc = "Transmission"]
4568        pub const _1: Self = Self::new(1);
4569    }
4570    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4571    pub struct Chtrc09_SPEC;
4572    pub type Chtrc09 = crate::EnumBitfieldStruct<u8, Chtrc09_SPEC>;
4573    impl Chtrc09 {
4574        #[doc = "Reception"]
4575        pub const _0: Self = Self::new(0);
4576
4577        #[doc = "Transmission"]
4578        pub const _1: Self = Self::new(1);
4579    }
4580    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4581    pub struct Chtrc10_SPEC;
4582    pub type Chtrc10 = crate::EnumBitfieldStruct<u8, Chtrc10_SPEC>;
4583    impl Chtrc10 {
4584        #[doc = "Reception"]
4585        pub const _0: Self = Self::new(0);
4586
4587        #[doc = "Transmission"]
4588        pub const _1: Self = Self::new(1);
4589    }
4590    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4591    pub struct Chtrc11_SPEC;
4592    pub type Chtrc11 = crate::EnumBitfieldStruct<u8, Chtrc11_SPEC>;
4593    impl Chtrc11 {
4594        #[doc = "Reception"]
4595        pub const _0: Self = Self::new(0);
4596
4597        #[doc = "Transmission"]
4598        pub const _1: Self = Self::new(1);
4599    }
4600    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4601    pub struct Chtrc12_SPEC;
4602    pub type Chtrc12 = crate::EnumBitfieldStruct<u8, Chtrc12_SPEC>;
4603    impl Chtrc12 {
4604        #[doc = "Reception"]
4605        pub const _0: Self = Self::new(0);
4606
4607        #[doc = "Transmission"]
4608        pub const _1: Self = Self::new(1);
4609    }
4610    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4611    pub struct Chtrc13_SPEC;
4612    pub type Chtrc13 = crate::EnumBitfieldStruct<u8, Chtrc13_SPEC>;
4613    impl Chtrc13 {
4614        #[doc = "Reception"]
4615        pub const _0: Self = Self::new(0);
4616
4617        #[doc = "Transmission"]
4618        pub const _1: Self = Self::new(1);
4619    }
4620    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4621    pub struct Chtrc14_SPEC;
4622    pub type Chtrc14 = crate::EnumBitfieldStruct<u8, Chtrc14_SPEC>;
4623    impl Chtrc14 {
4624        #[doc = "Reception"]
4625        pub const _0: Self = Self::new(0);
4626
4627        #[doc = "Transmission"]
4628        pub const _1: Self = Self::new(1);
4629    }
4630    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4631    pub struct Chtrc15_SPEC;
4632    pub type Chtrc15 = crate::EnumBitfieldStruct<u8, Chtrc15_SPEC>;
4633    impl Chtrc15 {
4634        #[doc = "Reception"]
4635        pub const _0: Self = Self::new(0);
4636
4637        #[doc = "Transmission"]
4638        pub const _1: Self = Self::new(1);
4639    }
4640    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4641    pub struct Chtrc16_SPEC;
4642    pub type Chtrc16 = crate::EnumBitfieldStruct<u8, Chtrc16_SPEC>;
4643    impl Chtrc16 {
4644        #[doc = "Reception"]
4645        pub const _0: Self = Self::new(0);
4646
4647        #[doc = "Transmission"]
4648        pub const _1: Self = Self::new(1);
4649    }
4650    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4651    pub struct Chtrc17_SPEC;
4652    pub type Chtrc17 = crate::EnumBitfieldStruct<u8, Chtrc17_SPEC>;
4653    impl Chtrc17 {
4654        #[doc = "Reception"]
4655        pub const _0: Self = Self::new(0);
4656
4657        #[doc = "Transmission"]
4658        pub const _1: Self = Self::new(1);
4659    }
4660    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4661    pub struct Chtrc18_SPEC;
4662    pub type Chtrc18 = crate::EnumBitfieldStruct<u8, Chtrc18_SPEC>;
4663    impl Chtrc18 {
4664        #[doc = "Reception"]
4665        pub const _0: Self = Self::new(0);
4666
4667        #[doc = "Transmission"]
4668        pub const _1: Self = Self::new(1);
4669    }
4670    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4671    pub struct Chtrc21_SPEC;
4672    pub type Chtrc21 = crate::EnumBitfieldStruct<u8, Chtrc21_SPEC>;
4673    impl Chtrc21 {
4674        #[doc = "Reception"]
4675        pub const _0: Self = Self::new(0);
4676
4677        #[doc = "Transmission"]
4678        pub const _1: Self = Self::new(1);
4679    }
4680    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4681    pub struct Chtrc22_SPEC;
4682    pub type Chtrc22 = crate::EnumBitfieldStruct<u8, Chtrc22_SPEC>;
4683    impl Chtrc22 {
4684        #[doc = "Reception"]
4685        pub const _0: Self = Self::new(0);
4686
4687        #[doc = "Transmission"]
4688        pub const _1: Self = Self::new(1);
4689    }
4690    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4691    pub struct Chtrc23_SPEC;
4692    pub type Chtrc23 = crate::EnumBitfieldStruct<u8, Chtrc23_SPEC>;
4693    impl Chtrc23 {
4694        #[doc = "Reception"]
4695        pub const _0: Self = Self::new(0);
4696
4697        #[doc = "Transmission"]
4698        pub const _1: Self = Self::new(1);
4699    }
4700    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4701    pub struct Chtrc24_SPEC;
4702    pub type Chtrc24 = crate::EnumBitfieldStruct<u8, Chtrc24_SPEC>;
4703    impl Chtrc24 {
4704        #[doc = "Reception"]
4705        pub const _0: Self = Self::new(0);
4706
4707        #[doc = "Transmission"]
4708        pub const _1: Self = Self::new(1);
4709    }
4710    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4711    pub struct Chtrc25_SPEC;
4712    pub type Chtrc25 = crate::EnumBitfieldStruct<u8, Chtrc25_SPEC>;
4713    impl Chtrc25 {
4714        #[doc = "Reception"]
4715        pub const _0: Self = Self::new(0);
4716
4717        #[doc = "Transmission"]
4718        pub const _1: Self = Self::new(1);
4719    }
4720    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4721    pub struct Chtrc26_SPEC;
4722    pub type Chtrc26 = crate::EnumBitfieldStruct<u8, Chtrc26_SPEC>;
4723    impl Chtrc26 {
4724        #[doc = "Reception"]
4725        pub const _0: Self = Self::new(0);
4726
4727        #[doc = "Transmission"]
4728        pub const _1: Self = Self::new(1);
4729    }
4730    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4731    pub struct Chtrc27_SPEC;
4732    pub type Chtrc27 = crate::EnumBitfieldStruct<u8, Chtrc27_SPEC>;
4733    impl Chtrc27 {
4734        #[doc = "Reception"]
4735        pub const _0: Self = Self::new(0);
4736
4737        #[doc = "Transmission"]
4738        pub const _1: Self = Self::new(1);
4739    }
4740    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4741    pub struct Chtrc28_SPEC;
4742    pub type Chtrc28 = crate::EnumBitfieldStruct<u8, Chtrc28_SPEC>;
4743    impl Chtrc28 {
4744        #[doc = "Reception"]
4745        pub const _0: Self = Self::new(0);
4746
4747        #[doc = "Transmission"]
4748        pub const _1: Self = Self::new(1);
4749    }
4750    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4751    pub struct Chtrc30_SPEC;
4752    pub type Chtrc30 = crate::EnumBitfieldStruct<u8, Chtrc30_SPEC>;
4753    impl Chtrc30 {
4754        #[doc = "Reception"]
4755        pub const _0: Self = Self::new(0);
4756
4757        #[doc = "Transmission"]
4758        pub const _1: Self = Self::new(1);
4759    }
4760    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4761    pub struct Chtrc31_SPEC;
4762    pub type Chtrc31 = crate::EnumBitfieldStruct<u8, Chtrc31_SPEC>;
4763    impl Chtrc31 {
4764        #[doc = "Reception"]
4765        pub const _0: Self = Self::new(0);
4766
4767        #[doc = "Transmission"]
4768        pub const _1: Self = Self::new(1);
4769    }
4770}
4771#[doc(hidden)]
4772#[derive(Copy, Clone, Eq, PartialEq)]
4773pub struct Ctsuchtrcal_SPEC;
4774impl crate::sealed::RegSpec for Ctsuchtrcal_SPEC {
4775    type DataType = u16;
4776}
4777
4778#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4779pub type Ctsuchtrcal = crate::RegValueT<Ctsuchtrcal_SPEC>;
4780
4781impl NoBitfieldReg<Ctsuchtrcal_SPEC> for Ctsuchtrcal {}
4782impl ::core::default::Default for Ctsuchtrcal {
4783    #[inline(always)]
4784    fn default() -> Ctsuchtrcal {
4785        <crate::RegValueT<Ctsuchtrcal_SPEC> as RegisterValue<_>>::new(0)
4786    }
4787}
4788
4789#[doc(hidden)]
4790#[derive(Copy, Clone, Eq, PartialEq)]
4791pub struct Ctsuchtrc0_SPEC;
4792impl crate::sealed::RegSpec for Ctsuchtrc0_SPEC {
4793    type DataType = u8;
4794}
4795
4796#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4797pub type Ctsuchtrc0 = crate::RegValueT<Ctsuchtrc0_SPEC>;
4798
4799impl NoBitfieldReg<Ctsuchtrc0_SPEC> for Ctsuchtrc0 {}
4800impl ::core::default::Default for Ctsuchtrc0 {
4801    #[inline(always)]
4802    fn default() -> Ctsuchtrc0 {
4803        <crate::RegValueT<Ctsuchtrc0_SPEC> as RegisterValue<_>>::new(0)
4804    }
4805}
4806
4807#[doc(hidden)]
4808#[derive(Copy, Clone, Eq, PartialEq)]
4809pub struct Ctsuchtrc1_SPEC;
4810impl crate::sealed::RegSpec for Ctsuchtrc1_SPEC {
4811    type DataType = u8;
4812}
4813
4814#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4815pub type Ctsuchtrc1 = crate::RegValueT<Ctsuchtrc1_SPEC>;
4816
4817impl NoBitfieldReg<Ctsuchtrc1_SPEC> for Ctsuchtrc1 {}
4818impl ::core::default::Default for Ctsuchtrc1 {
4819    #[inline(always)]
4820    fn default() -> Ctsuchtrc1 {
4821        <crate::RegValueT<Ctsuchtrc1_SPEC> as RegisterValue<_>>::new(0)
4822    }
4823}
4824
4825#[doc(hidden)]
4826#[derive(Copy, Clone, Eq, PartialEq)]
4827pub struct Ctsuchtrcah_SPEC;
4828impl crate::sealed::RegSpec for Ctsuchtrcah_SPEC {
4829    type DataType = u16;
4830}
4831
4832#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4833pub type Ctsuchtrcah = crate::RegValueT<Ctsuchtrcah_SPEC>;
4834
4835impl NoBitfieldReg<Ctsuchtrcah_SPEC> for Ctsuchtrcah {}
4836impl ::core::default::Default for Ctsuchtrcah {
4837    #[inline(always)]
4838    fn default() -> Ctsuchtrcah {
4839        <crate::RegValueT<Ctsuchtrcah_SPEC> as RegisterValue<_>>::new(0)
4840    }
4841}
4842
4843#[doc(hidden)]
4844#[derive(Copy, Clone, Eq, PartialEq)]
4845pub struct Ctsuchtrc2_SPEC;
4846impl crate::sealed::RegSpec for Ctsuchtrc2_SPEC {
4847    type DataType = u8;
4848}
4849
4850#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4851pub type Ctsuchtrc2 = crate::RegValueT<Ctsuchtrc2_SPEC>;
4852
4853impl NoBitfieldReg<Ctsuchtrc2_SPEC> for Ctsuchtrc2 {}
4854impl ::core::default::Default for Ctsuchtrc2 {
4855    #[inline(always)]
4856    fn default() -> Ctsuchtrc2 {
4857        <crate::RegValueT<Ctsuchtrc2_SPEC> as RegisterValue<_>>::new(0)
4858    }
4859}
4860
4861#[doc(hidden)]
4862#[derive(Copy, Clone, Eq, PartialEq)]
4863pub struct Ctsuchtrc3_SPEC;
4864impl crate::sealed::RegSpec for Ctsuchtrc3_SPEC {
4865    type DataType = u8;
4866}
4867
4868#[doc = "CTSU Channel Transmit/Receive Control Register A"]
4869pub type Ctsuchtrc3 = crate::RegValueT<Ctsuchtrc3_SPEC>;
4870
4871impl NoBitfieldReg<Ctsuchtrc3_SPEC> for Ctsuchtrc3 {}
4872impl ::core::default::Default for Ctsuchtrc3 {
4873    #[inline(always)]
4874    fn default() -> Ctsuchtrc3 {
4875        <crate::RegValueT<Ctsuchtrc3_SPEC> as RegisterValue<_>>::new(0)
4876    }
4877}
4878
4879#[doc(hidden)]
4880#[derive(Copy, Clone, Eq, PartialEq)]
4881pub struct Ctsuchtrcb_SPEC;
4882impl crate::sealed::RegSpec for Ctsuchtrcb_SPEC {
4883    type DataType = u32;
4884}
4885
4886#[doc = "CTSU Channel Transmit/Receive Control Register B"]
4887pub type Ctsuchtrcb = crate::RegValueT<Ctsuchtrcb_SPEC>;
4888
4889impl Ctsuchtrcb {
4890    #[doc = "CTSU Channel Transmit/Receive Control B"]
4891    #[inline(always)]
4892    pub fn chtrc32(
4893        self,
4894    ) -> crate::common::RegisterField<
4895        0,
4896        0x1,
4897        1,
4898        0,
4899        ctsuchtrcb::Chtrc32,
4900        ctsuchtrcb::Chtrc32,
4901        Ctsuchtrcb_SPEC,
4902        crate::common::RW,
4903    > {
4904        crate::common::RegisterField::<
4905            0,
4906            0x1,
4907            1,
4908            0,
4909            ctsuchtrcb::Chtrc32,
4910            ctsuchtrcb::Chtrc32,
4911            Ctsuchtrcb_SPEC,
4912            crate::common::RW,
4913        >::from_register(self, 0)
4914    }
4915
4916    #[doc = "CTSU Channel Transmit/Receive Control B"]
4917    #[inline(always)]
4918    pub fn chtrc33(
4919        self,
4920    ) -> crate::common::RegisterField<
4921        1,
4922        0x1,
4923        1,
4924        0,
4925        ctsuchtrcb::Chtrc33,
4926        ctsuchtrcb::Chtrc33,
4927        Ctsuchtrcb_SPEC,
4928        crate::common::RW,
4929    > {
4930        crate::common::RegisterField::<
4931            1,
4932            0x1,
4933            1,
4934            0,
4935            ctsuchtrcb::Chtrc33,
4936            ctsuchtrcb::Chtrc33,
4937            Ctsuchtrcb_SPEC,
4938            crate::common::RW,
4939        >::from_register(self, 0)
4940    }
4941
4942    #[doc = "CTSU Channel Transmit/Receive Control B"]
4943    #[inline(always)]
4944    pub fn chtrc34(
4945        self,
4946    ) -> crate::common::RegisterField<
4947        2,
4948        0x1,
4949        1,
4950        0,
4951        ctsuchtrcb::Chtrc34,
4952        ctsuchtrcb::Chtrc34,
4953        Ctsuchtrcb_SPEC,
4954        crate::common::RW,
4955    > {
4956        crate::common::RegisterField::<
4957            2,
4958            0x1,
4959            1,
4960            0,
4961            ctsuchtrcb::Chtrc34,
4962            ctsuchtrcb::Chtrc34,
4963            Ctsuchtrcb_SPEC,
4964            crate::common::RW,
4965        >::from_register(self, 0)
4966    }
4967}
4968impl ::core::default::Default for Ctsuchtrcb {
4969    #[inline(always)]
4970    fn default() -> Ctsuchtrcb {
4971        <crate::RegValueT<Ctsuchtrcb_SPEC> as RegisterValue<_>>::new(0)
4972    }
4973}
4974pub mod ctsuchtrcb {
4975
4976    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4977    pub struct Chtrc32_SPEC;
4978    pub type Chtrc32 = crate::EnumBitfieldStruct<u8, Chtrc32_SPEC>;
4979    impl Chtrc32 {
4980        #[doc = "Reception"]
4981        pub const _0: Self = Self::new(0);
4982
4983        #[doc = "Transmission"]
4984        pub const _1: Self = Self::new(1);
4985    }
4986    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4987    pub struct Chtrc33_SPEC;
4988    pub type Chtrc33 = crate::EnumBitfieldStruct<u8, Chtrc33_SPEC>;
4989    impl Chtrc33 {
4990        #[doc = "Reception"]
4991        pub const _0: Self = Self::new(0);
4992
4993        #[doc = "Transmission"]
4994        pub const _1: Self = Self::new(1);
4995    }
4996    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4997    pub struct Chtrc34_SPEC;
4998    pub type Chtrc34 = crate::EnumBitfieldStruct<u8, Chtrc34_SPEC>;
4999    impl Chtrc34 {
5000        #[doc = "Reception"]
5001        pub const _0: Self = Self::new(0);
5002
5003        #[doc = "Transmission"]
5004        pub const _1: Self = Self::new(1);
5005    }
5006}
5007#[doc(hidden)]
5008#[derive(Copy, Clone, Eq, PartialEq)]
5009pub struct Ctsuchtrcbl_SPEC;
5010impl crate::sealed::RegSpec for Ctsuchtrcbl_SPEC {
5011    type DataType = u16;
5012}
5013
5014#[doc = "CTSU Channel Transmit/Receive Control Register B"]
5015pub type Ctsuchtrcbl = crate::RegValueT<Ctsuchtrcbl_SPEC>;
5016
5017impl NoBitfieldReg<Ctsuchtrcbl_SPEC> for Ctsuchtrcbl {}
5018impl ::core::default::Default for Ctsuchtrcbl {
5019    #[inline(always)]
5020    fn default() -> Ctsuchtrcbl {
5021        <crate::RegValueT<Ctsuchtrcbl_SPEC> as RegisterValue<_>>::new(0)
5022    }
5023}
5024
5025#[doc(hidden)]
5026#[derive(Copy, Clone, Eq, PartialEq)]
5027pub struct Ctsuchtrc4_SPEC;
5028impl crate::sealed::RegSpec for Ctsuchtrc4_SPEC {
5029    type DataType = u8;
5030}
5031
5032#[doc = "CTSU Channel Transmit/Receive Control Register B"]
5033pub type Ctsuchtrc4 = crate::RegValueT<Ctsuchtrc4_SPEC>;
5034
5035impl NoBitfieldReg<Ctsuchtrc4_SPEC> for Ctsuchtrc4 {}
5036impl ::core::default::Default for Ctsuchtrc4 {
5037    #[inline(always)]
5038    fn default() -> Ctsuchtrc4 {
5039        <crate::RegValueT<Ctsuchtrc4_SPEC> as RegisterValue<_>>::new(0)
5040    }
5041}
5042
5043#[doc(hidden)]
5044#[derive(Copy, Clone, Eq, PartialEq)]
5045pub struct Ctsusr_SPEC;
5046impl crate::sealed::RegSpec for Ctsusr_SPEC {
5047    type DataType = u32;
5048}
5049
5050#[doc = "CTSU Status Register"]
5051pub type Ctsusr = crate::RegValueT<Ctsusr_SPEC>;
5052
5053impl Ctsusr {
5054    #[doc = "CTSU Multi-clock Counter"]
5055    #[inline(always)]
5056    pub fn mfc(
5057        self,
5058    ) -> crate::common::RegisterField<
5059        0,
5060        0x3,
5061        1,
5062        0,
5063        ctsusr::Mfc,
5064        ctsusr::Mfc,
5065        Ctsusr_SPEC,
5066        crate::common::RW,
5067    > {
5068        crate::common::RegisterField::<
5069            0,
5070            0x3,
5071            1,
5072            0,
5073            ctsusr::Mfc,
5074            ctsusr::Mfc,
5075            Ctsusr_SPEC,
5076            crate::common::RW,
5077        >::from_register(self, 0)
5078    }
5079
5080    #[doc = "CTSU CTSUICOMP1 Flag Reset"]
5081    #[inline(always)]
5082    pub fn icomprst(
5083        self,
5084    ) -> crate::common::RegisterFieldBool<5, 1, 0, Ctsusr_SPEC, crate::common::W> {
5085        crate::common::RegisterFieldBool::<5, 1, 0, Ctsusr_SPEC, crate::common::W>::from_register(
5086            self, 0,
5087        )
5088    }
5089
5090    #[doc = "CTSU Sense Current Error Monitor"]
5091    #[inline(always)]
5092    pub fn icomp1(
5093        self,
5094    ) -> crate::common::RegisterField<
5095        6,
5096        0x1,
5097        1,
5098        0,
5099        ctsusr::Icomp1,
5100        ctsusr::Icomp1,
5101        Ctsusr_SPEC,
5102        crate::common::R,
5103    > {
5104        crate::common::RegisterField::<
5105            6,
5106            0x1,
5107            1,
5108            0,
5109            ctsusr::Icomp1,
5110            ctsusr::Icomp1,
5111            Ctsusr_SPEC,
5112            crate::common::R,
5113        >::from_register(self, 0)
5114    }
5115
5116    #[doc = "TSCAP Voltage Error Monitor"]
5117    #[inline(always)]
5118    pub fn icomp0(
5119        self,
5120    ) -> crate::common::RegisterField<
5121        7,
5122        0x1,
5123        1,
5124        0,
5125        ctsusr::Icomp0,
5126        ctsusr::Icomp0,
5127        Ctsusr_SPEC,
5128        crate::common::R,
5129    > {
5130        crate::common::RegisterField::<
5131            7,
5132            0x1,
5133            1,
5134            0,
5135            ctsusr::Icomp0,
5136            ctsusr::Icomp0,
5137            Ctsusr_SPEC,
5138            crate::common::R,
5139        >::from_register(self, 0)
5140    }
5141
5142    #[doc = "CTSU Measurement Status Counter"]
5143    #[inline(always)]
5144    pub fn stc(
5145        self,
5146    ) -> crate::common::RegisterField<
5147        8,
5148        0x7,
5149        1,
5150        0,
5151        ctsusr::Stc,
5152        ctsusr::Stc,
5153        Ctsusr_SPEC,
5154        crate::common::R,
5155    > {
5156        crate::common::RegisterField::<
5157            8,
5158            0x7,
5159            1,
5160            0,
5161            ctsusr::Stc,
5162            ctsusr::Stc,
5163            Ctsusr_SPEC,
5164            crate::common::R,
5165        >::from_register(self, 0)
5166    }
5167
5168    #[doc = "CTSU Data Transfer Status Flag"]
5169    #[inline(always)]
5170    pub fn dtsr(
5171        self,
5172    ) -> crate::common::RegisterField<
5173        12,
5174        0x1,
5175        1,
5176        0,
5177        ctsusr::Dtsr,
5178        ctsusr::Dtsr,
5179        Ctsusr_SPEC,
5180        crate::common::R,
5181    > {
5182        crate::common::RegisterField::<
5183            12,
5184            0x1,
5185            1,
5186            0,
5187            ctsusr::Dtsr,
5188            ctsusr::Dtsr,
5189            Ctsusr_SPEC,
5190            crate::common::R,
5191        >::from_register(self, 0)
5192    }
5193
5194    #[doc = "CTSU Sensor Counter Overflow Flag"]
5195    #[inline(always)]
5196    pub fn sensovf(
5197        self,
5198    ) -> crate::common::RegisterField<
5199        13,
5200        0x1,
5201        1,
5202        0,
5203        ctsusr::Sensovf,
5204        ctsusr::Sensovf,
5205        Ctsusr_SPEC,
5206        crate::common::RW,
5207    > {
5208        crate::common::RegisterField::<
5209            13,
5210            0x1,
5211            1,
5212            0,
5213            ctsusr::Sensovf,
5214            ctsusr::Sensovf,
5215            Ctsusr_SPEC,
5216            crate::common::RW,
5217        >::from_register(self, 0)
5218    }
5219
5220    #[doc = "CTSU SUCLK Counter Overflow Flag"]
5221    #[inline(always)]
5222    pub fn suovf(
5223        self,
5224    ) -> crate::common::RegisterField<
5225        14,
5226        0x1,
5227        1,
5228        0,
5229        ctsusr::Suovf,
5230        ctsusr::Suovf,
5231        Ctsusr_SPEC,
5232        crate::common::RW,
5233    > {
5234        crate::common::RegisterField::<
5235            14,
5236            0x1,
5237            1,
5238            0,
5239            ctsusr::Suovf,
5240            ctsusr::Suovf,
5241            Ctsusr_SPEC,
5242            crate::common::RW,
5243        >::from_register(self, 0)
5244    }
5245
5246    #[doc = "CTSU Mutual Capacitance Status Flag"]
5247    #[inline(always)]
5248    pub fn ps(
5249        self,
5250    ) -> crate::common::RegisterField<
5251        15,
5252        0x1,
5253        1,
5254        0,
5255        ctsusr::Ps,
5256        ctsusr::Ps,
5257        Ctsusr_SPEC,
5258        crate::common::R,
5259    > {
5260        crate::common::RegisterField::<
5261            15,
5262            0x1,
5263            1,
5264            0,
5265            ctsusr::Ps,
5266            ctsusr::Ps,
5267            Ctsusr_SPEC,
5268            crate::common::R,
5269        >::from_register(self, 0)
5270    }
5271
5272    #[doc = "CTSU CFC Read Channel Select"]
5273    #[inline(always)]
5274    pub fn cfcrdch(
5275        self,
5276    ) -> crate::common::RegisterField<
5277        16,
5278        0x3f,
5279        1,
5280        0,
5281        ctsusr::Cfcrdch,
5282        ctsusr::Cfcrdch,
5283        Ctsusr_SPEC,
5284        crate::common::RW,
5285    > {
5286        crate::common::RegisterField::<
5287            16,
5288            0x3f,
5289            1,
5290            0,
5291            ctsusr::Cfcrdch,
5292            ctsusr::Cfcrdch,
5293            Ctsusr_SPEC,
5294            crate::common::RW,
5295        >::from_register(self, 0)
5296    }
5297}
5298impl ::core::default::Default for Ctsusr {
5299    #[inline(always)]
5300    fn default() -> Ctsusr {
5301        <crate::RegValueT<Ctsusr_SPEC> as RegisterValue<_>>::new(0)
5302    }
5303}
5304pub mod ctsusr {
5305
5306    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5307    pub struct Mfc_SPEC;
5308    pub type Mfc = crate::EnumBitfieldStruct<u8, Mfc_SPEC>;
5309    impl Mfc {
5310        #[doc = "Multi-clock 0"]
5311        pub const _00: Self = Self::new(0);
5312
5313        #[doc = "Multi-clock 1"]
5314        pub const _01: Self = Self::new(1);
5315
5316        #[doc = "Multi-clock 2"]
5317        pub const _10: Self = Self::new(2);
5318
5319        #[doc = "Multi-clock 3"]
5320        pub const _11: Self = Self::new(3);
5321    }
5322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5323    pub struct Icomp1_SPEC;
5324    pub type Icomp1 = crate::EnumBitfieldStruct<u8, Icomp1_SPEC>;
5325    impl Icomp1 {
5326        #[doc = "Normal sensor current"]
5327        pub const _0: Self = Self::new(0);
5328
5329        #[doc = "Abnormal sensor current"]
5330        pub const _1: Self = Self::new(1);
5331    }
5332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5333    pub struct Icomp0_SPEC;
5334    pub type Icomp0 = crate::EnumBitfieldStruct<u8, Icomp0_SPEC>;
5335    impl Icomp0 {
5336        #[doc = "Normal TSCAP voltage"]
5337        pub const _0: Self = Self::new(0);
5338
5339        #[doc = "Abnormal TSCAP voltage"]
5340        pub const _1: Self = Self::new(1);
5341    }
5342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5343    pub struct Stc_SPEC;
5344    pub type Stc = crate::EnumBitfieldStruct<u8, Stc_SPEC>;
5345    impl Stc {
5346        #[doc = "Status 0"]
5347        pub const _000: Self = Self::new(0);
5348
5349        #[doc = "Status 1"]
5350        pub const _001: Self = Self::new(1);
5351
5352        #[doc = "Status 2"]
5353        pub const _010: Self = Self::new(2);
5354
5355        #[doc = "Status 3"]
5356        pub const _011: Self = Self::new(3);
5357
5358        #[doc = "Status 4"]
5359        pub const _100: Self = Self::new(4);
5360
5361        #[doc = "Status 5"]
5362        pub const _101: Self = Self::new(5);
5363    }
5364    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5365    pub struct Dtsr_SPEC;
5366    pub type Dtsr = crate::EnumBitfieldStruct<u8, Dtsr_SPEC>;
5367    impl Dtsr {
5368        #[doc = "Read"]
5369        pub const _0: Self = Self::new(0);
5370
5371        #[doc = "Not read"]
5372        pub const _1: Self = Self::new(1);
5373    }
5374    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5375    pub struct Sensovf_SPEC;
5376    pub type Sensovf = crate::EnumBitfieldStruct<u8, Sensovf_SPEC>;
5377    impl Sensovf {
5378        #[doc = "No overflow occurred"]
5379        pub const _0: Self = Self::new(0);
5380
5381        #[doc = "Overflow occurred"]
5382        pub const _1: Self = Self::new(1);
5383    }
5384    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5385    pub struct Suovf_SPEC;
5386    pub type Suovf = crate::EnumBitfieldStruct<u8, Suovf_SPEC>;
5387    impl Suovf {
5388        #[doc = "No overflow occurred"]
5389        pub const _0: Self = Self::new(0);
5390
5391        #[doc = "Overflow occurred"]
5392        pub const _1: Self = Self::new(1);
5393    }
5394    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5395    pub struct Ps_SPEC;
5396    pub type Ps = crate::EnumBitfieldStruct<u8, Ps_SPEC>;
5397    impl Ps {
5398        #[doc = "First measurement"]
5399        pub const _0: Self = Self::new(0);
5400
5401        #[doc = "Second measurement"]
5402        pub const _1: Self = Self::new(1);
5403    }
5404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5405    pub struct Cfcrdch_SPEC;
5406    pub type Cfcrdch = crate::EnumBitfieldStruct<u8, Cfcrdch_SPEC>;
5407    impl Cfcrdch {
5408        #[doc = "TS00"]
5409        pub const _0_X_00: Self = Self::new(0);
5410
5411        #[doc = "TS02 (CFC)"]
5412        pub const _0_X_02: Self = Self::new(2);
5413
5414        #[doc = "TS04"]
5415        pub const _0_X_04: Self = Self::new(4);
5416
5417        #[doc = "TS05"]
5418        pub const _0_X_05: Self = Self::new(5);
5419
5420        #[doc = "TS06"]
5421        pub const _0_X_06: Self = Self::new(6);
5422
5423        #[doc = "TS07"]
5424        pub const _0_X_07: Self = Self::new(7);
5425
5426        #[doc = "TS08 (CFC)"]
5427        pub const _0_X_08: Self = Self::new(8);
5428
5429        #[doc = "TS09 (CFC)"]
5430        pub const _0_X_09: Self = Self::new(9);
5431
5432        #[doc = "TS10 (CFC)"]
5433        pub const _0_X_0_A: Self = Self::new(10);
5434
5435        #[doc = "TS11 (CFC)"]
5436        pub const _0_X_0_B: Self = Self::new(11);
5437
5438        #[doc = "TS12 (CFC)"]
5439        pub const _0_X_0_C: Self = Self::new(12);
5440
5441        #[doc = "TS13 (CFC)"]
5442        pub const _0_X_0_D: Self = Self::new(13);
5443
5444        #[doc = "TS14 (CFC)"]
5445        pub const _0_X_0_E: Self = Self::new(14);
5446
5447        #[doc = "TS15 (CFC)"]
5448        pub const _0_X_0_F: Self = Self::new(15);
5449
5450        #[doc = "TS16 (CFC)"]
5451        pub const _0_X_10: Self = Self::new(16);
5452
5453        #[doc = "TS17"]
5454        pub const _0_X_11: Self = Self::new(17);
5455
5456        #[doc = "TS18"]
5457        pub const _0_X_12: Self = Self::new(18);
5458
5459        #[doc = "TS21"]
5460        pub const _0_X_15: Self = Self::new(21);
5461
5462        #[doc = "TS22"]
5463        pub const _0_X_16: Self = Self::new(22);
5464
5465        #[doc = "TS23"]
5466        pub const _0_X_17: Self = Self::new(23);
5467
5468        #[doc = "TS24"]
5469        pub const _0_X_18: Self = Self::new(24);
5470
5471        #[doc = "TS25"]
5472        pub const _0_X_19: Self = Self::new(25);
5473
5474        #[doc = "TS26 (CFC)"]
5475        pub const _0_X_1_A: Self = Self::new(26);
5476
5477        #[doc = "TS27 (CFC)"]
5478        pub const _0_X_1_B: Self = Self::new(27);
5479
5480        #[doc = "TS28 (CFC)"]
5481        pub const _0_X_1_C: Self = Self::new(28);
5482
5483        #[doc = "TS30 (CFC)"]
5484        pub const _0_X_1_E: Self = Self::new(30);
5485
5486        #[doc = "TS31 (CFC)"]
5487        pub const _0_X_1_F: Self = Self::new(31);
5488
5489        #[doc = "TS32 (CFC)"]
5490        pub const _0_X_20: Self = Self::new(32);
5491
5492        #[doc = "TS33 (CFC)"]
5493        pub const _0_X_21: Self = Self::new(33);
5494
5495        #[doc = "TS34 (CFC)"]
5496        pub const _0_X_22: Self = Self::new(34);
5497    }
5498}
5499#[doc(hidden)]
5500#[derive(Copy, Clone, Eq, PartialEq)]
5501pub struct Ctsusrl_SPEC;
5502impl crate::sealed::RegSpec for Ctsusrl_SPEC {
5503    type DataType = u16;
5504}
5505
5506#[doc = "CTSU Status Register"]
5507pub type Ctsusrl = crate::RegValueT<Ctsusrl_SPEC>;
5508
5509impl NoBitfieldReg<Ctsusrl_SPEC> for Ctsusrl {}
5510impl ::core::default::Default for Ctsusrl {
5511    #[inline(always)]
5512    fn default() -> Ctsusrl {
5513        <crate::RegValueT<Ctsusrl_SPEC> as RegisterValue<_>>::new(0)
5514    }
5515}
5516
5517#[doc(hidden)]
5518#[derive(Copy, Clone, Eq, PartialEq)]
5519pub struct Ctsusr0_SPEC;
5520impl crate::sealed::RegSpec for Ctsusr0_SPEC {
5521    type DataType = u8;
5522}
5523
5524#[doc = "CTSU Status Register"]
5525pub type Ctsusr0 = crate::RegValueT<Ctsusr0_SPEC>;
5526
5527impl NoBitfieldReg<Ctsusr0_SPEC> for Ctsusr0 {}
5528impl ::core::default::Default for Ctsusr0 {
5529    #[inline(always)]
5530    fn default() -> Ctsusr0 {
5531        <crate::RegValueT<Ctsusr0_SPEC> as RegisterValue<_>>::new(0)
5532    }
5533}
5534
5535#[doc(hidden)]
5536#[derive(Copy, Clone, Eq, PartialEq)]
5537pub struct Ctsust_SPEC;
5538impl crate::sealed::RegSpec for Ctsust_SPEC {
5539    type DataType = u8;
5540}
5541
5542#[doc = "CTSU Status Register"]
5543pub type Ctsust = crate::RegValueT<Ctsust_SPEC>;
5544
5545impl NoBitfieldReg<Ctsust_SPEC> for Ctsust {}
5546impl ::core::default::Default for Ctsust {
5547    #[inline(always)]
5548    fn default() -> Ctsust {
5549        <crate::RegValueT<Ctsust_SPEC> as RegisterValue<_>>::new(0)
5550    }
5551}
5552
5553#[doc(hidden)]
5554#[derive(Copy, Clone, Eq, PartialEq)]
5555pub struct Ctsusrh_SPEC;
5556impl crate::sealed::RegSpec for Ctsusrh_SPEC {
5557    type DataType = u16;
5558}
5559
5560#[doc = "CTSU Status Register"]
5561pub type Ctsusrh = crate::RegValueT<Ctsusrh_SPEC>;
5562
5563impl NoBitfieldReg<Ctsusrh_SPEC> for Ctsusrh {}
5564impl ::core::default::Default for Ctsusrh {
5565    #[inline(always)]
5566    fn default() -> Ctsusrh {
5567        <crate::RegValueT<Ctsusrh_SPEC> as RegisterValue<_>>::new(0)
5568    }
5569}
5570
5571#[doc(hidden)]
5572#[derive(Copy, Clone, Eq, PartialEq)]
5573pub struct Ctsusr2_SPEC;
5574impl crate::sealed::RegSpec for Ctsusr2_SPEC {
5575    type DataType = u8;
5576}
5577
5578#[doc = "CTSU Status Register"]
5579pub type Ctsusr2 = crate::RegValueT<Ctsusr2_SPEC>;
5580
5581impl NoBitfieldReg<Ctsusr2_SPEC> for Ctsusr2 {}
5582impl ::core::default::Default for Ctsusr2 {
5583    #[inline(always)]
5584    fn default() -> Ctsusr2 {
5585        <crate::RegValueT<Ctsusr2_SPEC> as RegisterValue<_>>::new(0)
5586    }
5587}
5588
5589#[doc(hidden)]
5590#[derive(Copy, Clone, Eq, PartialEq)]
5591pub struct Ctsuso_SPEC;
5592impl crate::sealed::RegSpec for Ctsuso_SPEC {
5593    type DataType = u32;
5594}
5595
5596#[doc = "CTSU Sensor Offset Register"]
5597pub type Ctsuso = crate::RegValueT<Ctsuso_SPEC>;
5598
5599impl Ctsuso {
5600    #[doc = "CTSU Sensor Offset Adjustment"]
5601    #[inline(always)]
5602    pub fn so(
5603        self,
5604    ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Ctsuso_SPEC, crate::common::RW>
5605    {
5606        crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Ctsuso_SPEC,crate::common::RW>::from_register(self,0)
5607    }
5608
5609    #[doc = "CTSU Measurement Count Setting"]
5610    #[inline(always)]
5611    pub fn snum(
5612        self,
5613    ) -> crate::common::RegisterField<10, 0xff, 1, 0, u8, u8, Ctsuso_SPEC, crate::common::RW> {
5614        crate::common::RegisterField::<10,0xff,1,0,u8,u8,Ctsuso_SPEC,crate::common::RW>::from_register(self,0)
5615    }
5616
5617    #[doc = "Spread Spectrum Frequency"]
5618    #[inline(always)]
5619    pub fn ssdiv(
5620        self,
5621    ) -> crate::common::RegisterField<20, 0xf, 1, 0, u8, u8, Ctsuso_SPEC, crate::common::RW> {
5622        crate::common::RegisterField::<20,0xf,1,0,u8,u8,Ctsuso_SPEC,crate::common::RW>::from_register(self,0)
5623    }
5624
5625    #[doc = "CTSU Base Clock Setting"]
5626    #[inline(always)]
5627    pub fn sdpa(
5628        self,
5629    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ctsuso_SPEC, crate::common::RW> {
5630        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ctsuso_SPEC,crate::common::RW>::from_register(self,0)
5631    }
5632}
5633impl ::core::default::Default for Ctsuso {
5634    #[inline(always)]
5635    fn default() -> Ctsuso {
5636        <crate::RegValueT<Ctsuso_SPEC> as RegisterValue<_>>::new(0)
5637    }
5638}
5639
5640#[doc(hidden)]
5641#[derive(Copy, Clone, Eq, PartialEq)]
5642pub struct Ctsuso0_SPEC;
5643impl crate::sealed::RegSpec for Ctsuso0_SPEC {
5644    type DataType = u16;
5645}
5646
5647#[doc = "CTSU Sensor Offset Register"]
5648pub type Ctsuso0 = crate::RegValueT<Ctsuso0_SPEC>;
5649
5650impl NoBitfieldReg<Ctsuso0_SPEC> for Ctsuso0 {}
5651impl ::core::default::Default for Ctsuso0 {
5652    #[inline(always)]
5653    fn default() -> Ctsuso0 {
5654        <crate::RegValueT<Ctsuso0_SPEC> as RegisterValue<_>>::new(0)
5655    }
5656}
5657
5658#[doc(hidden)]
5659#[derive(Copy, Clone, Eq, PartialEq)]
5660pub struct Ctsuso1_SPEC;
5661impl crate::sealed::RegSpec for Ctsuso1_SPEC {
5662    type DataType = u16;
5663}
5664
5665#[doc = "CTSU Sensor Offset Register"]
5666pub type Ctsuso1 = crate::RegValueT<Ctsuso1_SPEC>;
5667
5668impl NoBitfieldReg<Ctsuso1_SPEC> for Ctsuso1 {}
5669impl ::core::default::Default for Ctsuso1 {
5670    #[inline(always)]
5671    fn default() -> Ctsuso1 {
5672        <crate::RegValueT<Ctsuso1_SPEC> as RegisterValue<_>>::new(0)
5673    }
5674}
5675
5676#[doc(hidden)]
5677#[derive(Copy, Clone, Eq, PartialEq)]
5678pub struct Ctsuscnt_SPEC;
5679impl crate::sealed::RegSpec for Ctsuscnt_SPEC {
5680    type DataType = u32;
5681}
5682
5683#[doc = "CTSU Sensor Counter Register"]
5684pub type Ctsuscnt = crate::RegValueT<Ctsuscnt_SPEC>;
5685
5686impl Ctsuscnt {
5687    #[doc = "CTSU Sensor Counter"]
5688    #[inline(always)]
5689    pub fn senscnt(
5690        self,
5691    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Ctsuscnt_SPEC, crate::common::R>
5692    {
5693        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Ctsuscnt_SPEC,crate::common::R>::from_register(self,0)
5694    }
5695
5696    #[doc = "CTSU SUCLK Counter"]
5697    #[inline(always)]
5698    pub fn suckcnt(
5699        self,
5700    ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, u16, Ctsuscnt_SPEC, crate::common::R>
5701    {
5702        crate::common::RegisterField::<16,0xffff,1,0,u16,u16,Ctsuscnt_SPEC,crate::common::R>::from_register(self,0)
5703    }
5704}
5705impl ::core::default::Default for Ctsuscnt {
5706    #[inline(always)]
5707    fn default() -> Ctsuscnt {
5708        <crate::RegValueT<Ctsuscnt_SPEC> as RegisterValue<_>>::new(0)
5709    }
5710}
5711
5712#[doc(hidden)]
5713#[derive(Copy, Clone, Eq, PartialEq)]
5714pub struct Ctsusc_SPEC;
5715impl crate::sealed::RegSpec for Ctsusc_SPEC {
5716    type DataType = u16;
5717}
5718
5719#[doc = "CTSU Sensor Counter Register"]
5720pub type Ctsusc = crate::RegValueT<Ctsusc_SPEC>;
5721
5722impl NoBitfieldReg<Ctsusc_SPEC> for Ctsusc {}
5723impl ::core::default::Default for Ctsusc {
5724    #[inline(always)]
5725    fn default() -> Ctsusc {
5726        <crate::RegValueT<Ctsusc_SPEC> as RegisterValue<_>>::new(0)
5727    }
5728}
5729
5730#[doc(hidden)]
5731#[derive(Copy, Clone, Eq, PartialEq)]
5732pub struct Ctsucalib_SPEC;
5733impl crate::sealed::RegSpec for Ctsucalib_SPEC {
5734    type DataType = u32;
5735}
5736
5737#[doc = "CTSU Calibration Register"]
5738pub type Ctsucalib = crate::RegValueT<Ctsucalib_SPEC>;
5739
5740impl Ctsucalib {
5741    #[doc = "TS Pin Fixed Output"]
5742    #[inline(always)]
5743    pub fn tsod(
5744        self,
5745    ) -> crate::common::RegisterField<
5746        2,
5747        0x1,
5748        1,
5749        0,
5750        ctsucalib::Tsod,
5751        ctsucalib::Tsod,
5752        Ctsucalib_SPEC,
5753        crate::common::RW,
5754    > {
5755        crate::common::RegisterField::<
5756            2,
5757            0x1,
5758            1,
5759            0,
5760            ctsucalib::Tsod,
5761            ctsucalib::Tsod,
5762            Ctsucalib_SPEC,
5763            crate::common::RW,
5764        >::from_register(self, 0)
5765    }
5766
5767    #[doc = "Power Supply Calibration Select"]
5768    #[inline(always)]
5769    pub fn drv(
5770        self,
5771    ) -> crate::common::RegisterField<
5772        3,
5773        0x1,
5774        1,
5775        0,
5776        ctsucalib::Drv,
5777        ctsucalib::Drv,
5778        Ctsucalib_SPEC,
5779        crate::common::RW,
5780    > {
5781        crate::common::RegisterField::<
5782            3,
5783            0x1,
5784            1,
5785            0,
5786            ctsucalib::Drv,
5787            ctsucalib::Drv,
5788            Ctsucalib_SPEC,
5789            crate::common::RW,
5790        >::from_register(self, 0)
5791    }
5792
5793    #[doc = "Observation Clock Select"]
5794    #[inline(always)]
5795    pub fn clksel(
5796        self,
5797    ) -> crate::common::RegisterField<
5798        4,
5799        0x3,
5800        1,
5801        0,
5802        ctsucalib::Clksel,
5803        ctsucalib::Clksel,
5804        Ctsucalib_SPEC,
5805        crate::common::RW,
5806    > {
5807        crate::common::RegisterField::<
5808            4,
5809            0x3,
5810            1,
5811            0,
5812            ctsucalib::Clksel,
5813            ctsucalib::Clksel,
5814            Ctsucalib_SPEC,
5815            crate::common::RW,
5816        >::from_register(self, 0)
5817    }
5818
5819    #[doc = "SUCLK Forced Oscillation Control"]
5820    #[inline(always)]
5821    pub fn suclken(
5822        self,
5823    ) -> crate::common::RegisterField<
5824        6,
5825        0x1,
5826        1,
5827        0,
5828        ctsucalib::Suclken,
5829        ctsucalib::Suclken,
5830        Ctsucalib_SPEC,
5831        crate::common::RW,
5832    > {
5833        crate::common::RegisterField::<
5834            6,
5835            0x1,
5836            1,
5837            0,
5838            ctsucalib::Suclken,
5839            ctsucalib::Suclken,
5840            Ctsucalib_SPEC,
5841            crate::common::RW,
5842        >::from_register(self, 0)
5843    }
5844
5845    #[doc = "Switched Capacitor Operation Calibration Select Bit"]
5846    #[inline(always)]
5847    pub fn tsoc(
5848        self,
5849    ) -> crate::common::RegisterField<
5850        7,
5851        0x1,
5852        1,
5853        0,
5854        ctsucalib::Tsoc,
5855        ctsucalib::Tsoc,
5856        Ctsucalib_SPEC,
5857        crate::common::RW,
5858    > {
5859        crate::common::RegisterField::<
5860            7,
5861            0x1,
5862            1,
5863            0,
5864            ctsucalib::Tsoc,
5865            ctsucalib::Tsoc,
5866            Ctsucalib_SPEC,
5867            crate::common::RW,
5868        >::from_register(self, 0)
5869    }
5870
5871    #[doc = "Read Count Select of Sensor Counter"]
5872    #[inline(always)]
5873    pub fn cntrdsel(
5874        self,
5875    ) -> crate::common::RegisterField<
5876        8,
5877        0x1,
5878        1,
5879        0,
5880        ctsucalib::Cntrdsel,
5881        ctsucalib::Cntrdsel,
5882        Ctsucalib_SPEC,
5883        crate::common::RW,
5884    > {
5885        crate::common::RegisterField::<
5886            8,
5887            0x1,
5888            1,
5889            0,
5890            ctsucalib::Cntrdsel,
5891            ctsucalib::Cntrdsel,
5892            Ctsucalib_SPEC,
5893            crate::common::RW,
5894        >::from_register(self, 0)
5895    }
5896
5897    #[doc = "TS Pin Fixed Output Value Set"]
5898    #[inline(always)]
5899    pub fn ioc(
5900        self,
5901    ) -> crate::common::RegisterField<
5902        9,
5903        0x1,
5904        1,
5905        0,
5906        ctsucalib::Ioc,
5907        ctsucalib::Ioc,
5908        Ctsucalib_SPEC,
5909        crate::common::RW,
5910    > {
5911        crate::common::RegisterField::<
5912            9,
5913            0x1,
5914            1,
5915            0,
5916            ctsucalib::Ioc,
5917            ctsucalib::Ioc,
5918            Ctsucalib_SPEC,
5919            crate::common::RW,
5920        >::from_register(self, 0)
5921    }
5922
5923    #[doc = "CFC Counter Read Mode Select"]
5924    #[inline(always)]
5925    pub fn cfcrdmd(
5926        self,
5927    ) -> crate::common::RegisterField<
5928        10,
5929        0x1,
5930        1,
5931        0,
5932        ctsucalib::Cfcrdmd,
5933        ctsucalib::Cfcrdmd,
5934        Ctsucalib_SPEC,
5935        crate::common::RW,
5936    > {
5937        crate::common::RegisterField::<
5938            10,
5939            0x1,
5940            1,
5941            0,
5942            ctsucalib::Cfcrdmd,
5943            ctsucalib::Cfcrdmd,
5944            Ctsucalib_SPEC,
5945            crate::common::RW,
5946        >::from_register(self, 0)
5947    }
5948
5949    #[doc = "Down Converter Control"]
5950    #[inline(always)]
5951    pub fn dcoff(
5952        self,
5953    ) -> crate::common::RegisterField<
5954        11,
5955        0x1,
5956        1,
5957        0,
5958        ctsucalib::Dcoff,
5959        ctsucalib::Dcoff,
5960        Ctsucalib_SPEC,
5961        crate::common::RW,
5962    > {
5963        crate::common::RegisterField::<
5964            11,
5965            0x1,
5966            1,
5967            0,
5968            ctsucalib::Dcoff,
5969            ctsucalib::Dcoff,
5970            Ctsucalib_SPEC,
5971            crate::common::RW,
5972        >::from_register(self, 0)
5973    }
5974
5975    #[doc = "Observation CFC Clock Select"]
5976    #[inline(always)]
5977    pub fn cfcsel(
5978        self,
5979    ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, Ctsucalib_SPEC, crate::common::RW>
5980    {
5981        crate::common::RegisterField::<16,0x3f,1,0,u8,u8,Ctsucalib_SPEC,crate::common::RW>::from_register(self,0)
5982    }
5983
5984    #[doc = "CFC Oscillator Calibration Mode Select"]
5985    #[inline(always)]
5986    pub fn cfcmode(
5987        self,
5988    ) -> crate::common::RegisterField<
5989        22,
5990        0x1,
5991        1,
5992        0,
5993        ctsucalib::Cfcmode,
5994        ctsucalib::Cfcmode,
5995        Ctsucalib_SPEC,
5996        crate::common::RW,
5997    > {
5998        crate::common::RegisterField::<
5999            22,
6000            0x1,
6001            1,
6002            0,
6003            ctsucalib::Cfcmode,
6004            ctsucalib::Cfcmode,
6005            Ctsucalib_SPEC,
6006            crate::common::RW,
6007        >::from_register(self, 0)
6008    }
6009
6010    #[doc = "Current Offset DAC Current Matrix Calibration Select"]
6011    #[inline(always)]
6012    pub fn dacmsel(
6013        self,
6014    ) -> crate::common::RegisterField<
6015        24,
6016        0x1,
6017        1,
6018        0,
6019        ctsucalib::Dacmsel,
6020        ctsucalib::Dacmsel,
6021        Ctsucalib_SPEC,
6022        crate::common::RW,
6023    > {
6024        crate::common::RegisterField::<
6025            24,
6026            0x1,
6027            1,
6028            0,
6029            ctsucalib::Dacmsel,
6030            ctsucalib::Dacmsel,
6031            Ctsucalib_SPEC,
6032            crate::common::RW,
6033        >::from_register(self, 0)
6034    }
6035
6036    #[doc = "Offset Current Adjustment for Calibration"]
6037    #[inline(always)]
6038    pub fn daccarry(
6039        self,
6040    ) -> crate::common::RegisterField<
6041        25,
6042        0x1,
6043        1,
6044        0,
6045        ctsucalib::Daccarry,
6046        ctsucalib::Daccarry,
6047        Ctsucalib_SPEC,
6048        crate::common::RW,
6049    > {
6050        crate::common::RegisterField::<
6051            25,
6052            0x1,
6053            1,
6054            0,
6055            ctsucalib::Daccarry,
6056            ctsucalib::Daccarry,
6057            Ctsucalib_SPEC,
6058            crate::common::RW,
6059        >::from_register(self, 0)
6060    }
6061
6062    #[doc = "Current Control Oscillator Input Current Matrix Calibration Select"]
6063    #[inline(always)]
6064    pub fn sumsel(
6065        self,
6066    ) -> crate::common::RegisterField<
6067        26,
6068        0x1,
6069        1,
6070        0,
6071        ctsucalib::Sumsel,
6072        ctsucalib::Sumsel,
6073        Ctsucalib_SPEC,
6074        crate::common::RW,
6075    > {
6076        crate::common::RegisterField::<
6077            26,
6078            0x1,
6079            1,
6080            0,
6081            ctsucalib::Sumsel,
6082            ctsucalib::Sumsel,
6083            Ctsucalib_SPEC,
6084            crate::common::RW,
6085        >::from_register(self, 0)
6086    }
6087
6088    #[doc = "Current Control Oscillator Input Current Adjustment for SUCLK"]
6089    #[inline(always)]
6090    pub fn sucarry(
6091        self,
6092    ) -> crate::common::RegisterField<
6093        27,
6094        0x1,
6095        1,
6096        0,
6097        ctsucalib::Sucarry,
6098        ctsucalib::Sucarry,
6099        Ctsucalib_SPEC,
6100        crate::common::RW,
6101    > {
6102        crate::common::RegisterField::<
6103            27,
6104            0x1,
6105            1,
6106            0,
6107            ctsucalib::Sucarry,
6108            ctsucalib::Sucarry,
6109            Ctsucalib_SPEC,
6110            crate::common::RW,
6111        >::from_register(self, 0)
6112    }
6113
6114    #[doc = "Modulation Clock Select for Offset Current Circuits"]
6115    #[inline(always)]
6116    pub fn dacclk(
6117        self,
6118    ) -> crate::common::RegisterField<
6119        28,
6120        0x1,
6121        1,
6122        0,
6123        ctsucalib::Dacclk,
6124        ctsucalib::Dacclk,
6125        Ctsucalib_SPEC,
6126        crate::common::RW,
6127    > {
6128        crate::common::RegisterField::<
6129            28,
6130            0x1,
6131            1,
6132            0,
6133            ctsucalib::Dacclk,
6134            ctsucalib::Dacclk,
6135            Ctsucalib_SPEC,
6136            crate::common::RW,
6137        >::from_register(self, 0)
6138    }
6139
6140    #[doc = "Modulation Clock Select for Current Controlled Oscillator Input Current of SUCLK"]
6141    #[inline(always)]
6142    pub fn ccoclk(
6143        self,
6144    ) -> crate::common::RegisterField<
6145        29,
6146        0x1,
6147        1,
6148        0,
6149        ctsucalib::Ccoclk,
6150        ctsucalib::Ccoclk,
6151        Ctsucalib_SPEC,
6152        crate::common::RW,
6153    > {
6154        crate::common::RegisterField::<
6155            29,
6156            0x1,
6157            1,
6158            0,
6159            ctsucalib::Ccoclk,
6160            ctsucalib::Ccoclk,
6161            Ctsucalib_SPEC,
6162            crate::common::RW,
6163        >::from_register(self, 0)
6164    }
6165
6166    #[doc = "Calibration Selection of Current Controlled Oscillator for Measurement"]
6167    #[inline(always)]
6168    pub fn ccocalib(
6169        self,
6170    ) -> crate::common::RegisterField<
6171        30,
6172        0x1,
6173        1,
6174        0,
6175        ctsucalib::Ccocalib,
6176        ctsucalib::Ccocalib,
6177        Ctsucalib_SPEC,
6178        crate::common::RW,
6179    > {
6180        crate::common::RegisterField::<
6181            30,
6182            0x1,
6183            1,
6184            0,
6185            ctsucalib::Ccocalib,
6186            ctsucalib::Ccocalib,
6187            Ctsucalib_SPEC,
6188            crate::common::RW,
6189        >::from_register(self, 0)
6190    }
6191
6192    #[doc = "Transmit Pin Inverted Output"]
6193    #[inline(always)]
6194    pub fn txrev(
6195        self,
6196    ) -> crate::common::RegisterField<
6197        31,
6198        0x1,
6199        1,
6200        0,
6201        ctsucalib::Txrev,
6202        ctsucalib::Txrev,
6203        Ctsucalib_SPEC,
6204        crate::common::RW,
6205    > {
6206        crate::common::RegisterField::<
6207            31,
6208            0x1,
6209            1,
6210            0,
6211            ctsucalib::Txrev,
6212            ctsucalib::Txrev,
6213            Ctsucalib_SPEC,
6214            crate::common::RW,
6215        >::from_register(self, 0)
6216    }
6217}
6218impl ::core::default::Default for Ctsucalib {
6219    #[inline(always)]
6220    fn default() -> Ctsucalib {
6221        <crate::RegValueT<Ctsucalib_SPEC> as RegisterValue<_>>::new(0)
6222    }
6223}
6224pub mod ctsucalib {
6225
6226    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6227    pub struct Tsod_SPEC;
6228    pub type Tsod = crate::EnumBitfieldStruct<u8, Tsod_SPEC>;
6229    impl Tsod {
6230        #[doc = "Capacitance measurement mode"]
6231        pub const _0: Self = Self::new(0);
6232
6233        #[doc = "Output high or low from TS terminals (controlling by the IOC bit)"]
6234        pub const _1: Self = Self::new(1);
6235    }
6236    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6237    pub struct Drv_SPEC;
6238    pub type Drv = crate::EnumBitfieldStruct<u8, Drv_SPEC>;
6239    impl Drv {
6240        #[doc = "Capacitance measurement mode"]
6241        pub const _0: Self = Self::new(0);
6242
6243        #[doc = "Power supply calibration mode"]
6244        pub const _1: Self = Self::new(1);
6245    }
6246    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6247    pub struct Clksel_SPEC;
6248    pub type Clksel = crate::EnumBitfieldStruct<u8, Clksel_SPEC>;
6249    impl Clksel {
6250        #[doc = "Not selected (L fixed output)"]
6251        pub const _00: Self = Self::new(0);
6252
6253        #[doc = "Measurement clock (divided by 8)"]
6254        pub const _01: Self = Self::new(1);
6255
6256        #[doc = "CFC clock (divided by 8)"]
6257        pub const _10: Self = Self::new(2);
6258
6259        #[doc = "SUCLK (divided by 8)"]
6260        pub const _11: Self = Self::new(3);
6261    }
6262    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6263    pub struct Suclken_SPEC;
6264    pub type Suclken = crate::EnumBitfieldStruct<u8, Suclken_SPEC>;
6265    impl Suclken {
6266        #[doc = "SUCLK oscillation only during measurement"]
6267        pub const _0: Self = Self::new(0);
6268
6269        #[doc = "SUCLK always oscillates"]
6270        pub const _1: Self = Self::new(1);
6271    }
6272    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6273    pub struct Tsoc_SPEC;
6274    pub type Tsoc = crate::EnumBitfieldStruct<u8, Tsoc_SPEC>;
6275    impl Tsoc {
6276        #[doc = "Capacitance measurement mode"]
6277        pub const _0: Self = Self::new(0);
6278
6279        #[doc = "Switched capacitor operation calibration mode"]
6280        pub const _1: Self = Self::new(1);
6281    }
6282    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6283    pub struct Cntrdsel_SPEC;
6284    pub type Cntrdsel = crate::EnumBitfieldStruct<u8, Cntrdsel_SPEC>;
6285    impl Cntrdsel {
6286        #[doc = "Read once"]
6287        pub const _0: Self = Self::new(0);
6288
6289        #[doc = "Read twice"]
6290        pub const _1: Self = Self::new(1);
6291    }
6292    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6293    pub struct Ioc_SPEC;
6294    pub type Ioc = crate::EnumBitfieldStruct<u8, Ioc_SPEC>;
6295    impl Ioc {
6296        #[doc = "Low level"]
6297        pub const _0: Self = Self::new(0);
6298
6299        #[doc = "High level"]
6300        pub const _1: Self = Self::new(1);
6301    }
6302    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6303    pub struct Cfcrdmd_SPEC;
6304    pub type Cfcrdmd = crate::EnumBitfieldStruct<u8, Cfcrdmd_SPEC>;
6305    impl Cfcrdmd {
6306        #[doc = "Except for mutual capacitance parallel measurement mode"]
6307        pub const _0: Self = Self::new(0);
6308
6309        #[doc = "Mutual capacitance parallel measurement mode"]
6310        pub const _1: Self = Self::new(1);
6311    }
6312    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6313    pub struct Dcoff_SPEC;
6314    pub type Dcoff = crate::EnumBitfieldStruct<u8, Dcoff_SPEC>;
6315    impl Dcoff {
6316        #[doc = "Voltage down converter operation (TSCAP voltage generation)"]
6317        pub const _0: Self = Self::new(0);
6318
6319        #[doc = "The voltage down converter is off"]
6320        pub const _1: Self = Self::new(1);
6321    }
6322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6323    pub struct Cfcmode_SPEC;
6324    pub type Cfcmode = crate::EnumBitfieldStruct<u8, Cfcmode_SPEC>;
6325    impl Cfcmode {
6326        #[doc = "CFC current measurement (Capacitance measurement mode)"]
6327        pub const _0: Self = Self::new(0);
6328
6329        #[doc = "External current measurement for calibration"]
6330        pub const _1: Self = Self::new(1);
6331    }
6332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6333    pub struct Dacmsel_SPEC;
6334    pub type Dacmsel = crate::EnumBitfieldStruct<u8, Dacmsel_SPEC>;
6335    impl Dacmsel {
6336        #[doc = "Capacitance measurement mode"]
6337        pub const _0: Self = Self::new(0);
6338
6339        #[doc = "Current offset DAC current Calibration mode"]
6340        pub const _1: Self = Self::new(1);
6341    }
6342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6343    pub struct Daccarry_SPEC;
6344    pub type Daccarry = crate::EnumBitfieldStruct<u8, Daccarry_SPEC>;
6345    impl Daccarry {
6346        #[doc = "Normal operation"]
6347        pub const _0: Self = Self::new(0);
6348
6349        #[doc = "All current sources can be turned on"]
6350        pub const _1: Self = Self::new(1);
6351    }
6352    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6353    pub struct Sumsel_SPEC;
6354    pub type Sumsel = crate::EnumBitfieldStruct<u8, Sumsel_SPEC>;
6355    impl Sumsel {
6356        #[doc = "Capacitance measurement mode"]
6357        pub const _0: Self = Self::new(0);
6358
6359        #[doc = "Current control oscillator input current matrix calibration mode"]
6360        pub const _1: Self = Self::new(1);
6361    }
6362    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6363    pub struct Sucarry_SPEC;
6364    pub type Sucarry = crate::EnumBitfieldStruct<u8, Sucarry_SPEC>;
6365    impl Sucarry {
6366        #[doc = "Normal operation"]
6367        pub const _0: Self = Self::new(0);
6368
6369        #[doc = "All current sources can be turned on"]
6370        pub const _1: Self = Self::new(1);
6371    }
6372    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6373    pub struct Dacclk_SPEC;
6374    pub type Dacclk = crate::EnumBitfieldStruct<u8, Dacclk_SPEC>;
6375    impl Dacclk {
6376        #[doc = "Operating clock selected by CTSUCRA.CLK \\[1:0\\]"]
6377        pub const _0: Self = Self::new(0);
6378
6379        #[doc = "SUCLK"]
6380        pub const _1: Self = Self::new(1);
6381    }
6382    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6383    pub struct Ccoclk_SPEC;
6384    pub type Ccoclk = crate::EnumBitfieldStruct<u8, Ccoclk_SPEC>;
6385    impl Ccoclk {
6386        #[doc = "Operating clock selected by CTSUCRA.CLK \\[1:0\\]"]
6387        pub const _0: Self = Self::new(0);
6388
6389        #[doc = "SUCLK"]
6390        pub const _1: Self = Self::new(1);
6391    }
6392    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6393    pub struct Ccocalib_SPEC;
6394    pub type Ccocalib = crate::EnumBitfieldStruct<u8, Ccocalib_SPEC>;
6395    impl Ccocalib {
6396        #[doc = "Capacitance measurement mode"]
6397        pub const _0: Self = Self::new(0);
6398
6399        #[doc = "Oscillator calibration mode"]
6400        pub const _1: Self = Self::new(1);
6401    }
6402    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6403    pub struct Txrev_SPEC;
6404    pub type Txrev = crate::EnumBitfieldStruct<u8, Txrev_SPEC>;
6405    impl Txrev {
6406        #[doc = "Normal"]
6407        pub const _0: Self = Self::new(0);
6408
6409        #[doc = "Invert"]
6410        pub const _1: Self = Self::new(1);
6411    }
6412}
6413#[doc(hidden)]
6414#[derive(Copy, Clone, Eq, PartialEq)]
6415pub struct Ctsudbgr0_SPEC;
6416impl crate::sealed::RegSpec for Ctsudbgr0_SPEC {
6417    type DataType = u16;
6418}
6419
6420#[doc = "CTSU Calibration Register"]
6421pub type Ctsudbgr0 = crate::RegValueT<Ctsudbgr0_SPEC>;
6422
6423impl NoBitfieldReg<Ctsudbgr0_SPEC> for Ctsudbgr0 {}
6424impl ::core::default::Default for Ctsudbgr0 {
6425    #[inline(always)]
6426    fn default() -> Ctsudbgr0 {
6427        <crate::RegValueT<Ctsudbgr0_SPEC> as RegisterValue<_>>::new(0)
6428    }
6429}
6430
6431#[doc(hidden)]
6432#[derive(Copy, Clone, Eq, PartialEq)]
6433pub struct Ctsudbgr1_SPEC;
6434impl crate::sealed::RegSpec for Ctsudbgr1_SPEC {
6435    type DataType = u16;
6436}
6437
6438#[doc = "CTSU Calibration Register"]
6439pub type Ctsudbgr1 = crate::RegValueT<Ctsudbgr1_SPEC>;
6440
6441impl NoBitfieldReg<Ctsudbgr1_SPEC> for Ctsudbgr1 {}
6442impl ::core::default::Default for Ctsudbgr1 {
6443    #[inline(always)]
6444    fn default() -> Ctsudbgr1 {
6445        <crate::RegValueT<Ctsudbgr1_SPEC> as RegisterValue<_>>::new(0)
6446    }
6447}
6448
6449#[doc(hidden)]
6450#[derive(Copy, Clone, Eq, PartialEq)]
6451pub struct Ctsusuclka_SPEC;
6452impl crate::sealed::RegSpec for Ctsusuclka_SPEC {
6453    type DataType = u32;
6454}
6455
6456#[doc = "CTSU Sensor Unit Clock Control Register A"]
6457pub type Ctsusuclka = crate::RegValueT<Ctsusuclka_SPEC>;
6458
6459impl NoBitfieldReg<Ctsusuclka_SPEC> for Ctsusuclka {}
6460impl ::core::default::Default for Ctsusuclka {
6461    #[inline(always)]
6462    fn default() -> Ctsusuclka {
6463        <crate::RegValueT<Ctsusuclka_SPEC> as RegisterValue<_>>::new(0)
6464    }
6465}
6466
6467#[doc(hidden)]
6468#[derive(Copy, Clone, Eq, PartialEq)]
6469pub struct Ctsusuclk0_SPEC;
6470impl crate::sealed::RegSpec for Ctsusuclk0_SPEC {
6471    type DataType = u16;
6472}
6473
6474#[doc = "CTSU Sensor Unit Clock Control Register A"]
6475pub type Ctsusuclk0 = crate::RegValueT<Ctsusuclk0_SPEC>;
6476
6477impl NoBitfieldReg<Ctsusuclk0_SPEC> for Ctsusuclk0 {}
6478impl ::core::default::Default for Ctsusuclk0 {
6479    #[inline(always)]
6480    fn default() -> Ctsusuclk0 {
6481        <crate::RegValueT<Ctsusuclk0_SPEC> as RegisterValue<_>>::new(0)
6482    }
6483}
6484
6485#[doc(hidden)]
6486#[derive(Copy, Clone, Eq, PartialEq)]
6487pub struct Ctsusuclk1_SPEC;
6488impl crate::sealed::RegSpec for Ctsusuclk1_SPEC {
6489    type DataType = u16;
6490}
6491
6492#[doc = "CTSU Sensor Unit Clock Control Register A"]
6493pub type Ctsusuclk1 = crate::RegValueT<Ctsusuclk1_SPEC>;
6494
6495impl NoBitfieldReg<Ctsusuclk1_SPEC> for Ctsusuclk1 {}
6496impl ::core::default::Default for Ctsusuclk1 {
6497    #[inline(always)]
6498    fn default() -> Ctsusuclk1 {
6499        <crate::RegValueT<Ctsusuclk1_SPEC> as RegisterValue<_>>::new(0)
6500    }
6501}
6502
6503#[doc(hidden)]
6504#[derive(Copy, Clone, Eq, PartialEq)]
6505pub struct Ctsusuclkb_SPEC;
6506impl crate::sealed::RegSpec for Ctsusuclkb_SPEC {
6507    type DataType = u32;
6508}
6509
6510#[doc = "CTSU Sensor Unit Clock Control Register B"]
6511pub type Ctsusuclkb = crate::RegValueT<Ctsusuclkb_SPEC>;
6512
6513impl Ctsusuclkb {
6514    #[doc = "CTSU SUCLK Frequency Adjustment"]
6515    #[inline(always)]
6516    pub fn suadj2(
6517        self,
6518    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsusuclkb_SPEC, crate::common::RW>
6519    {
6520        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsusuclkb_SPEC,crate::common::RW>::from_register(self,0)
6521    }
6522
6523    #[doc = "CTSU SUCLK Multiplier Rate Setting"]
6524    #[inline(always)]
6525    pub fn sumulti2(
6526        self,
6527    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ctsusuclkb_SPEC, crate::common::RW>
6528    {
6529        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ctsusuclkb_SPEC,crate::common::RW>::from_register(self,0)
6530    }
6531
6532    #[doc = "CTSU SUCLK Frequency Adjustment"]
6533    #[inline(always)]
6534    pub fn suadj3(
6535        self,
6536    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ctsusuclkb_SPEC, crate::common::RW>
6537    {
6538        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ctsusuclkb_SPEC,crate::common::RW>::from_register(self,0)
6539    }
6540
6541    #[doc = "CTSU SUCLK Multiplier Rate Setting"]
6542    #[inline(always)]
6543    pub fn sumulti3(
6544        self,
6545    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ctsusuclkb_SPEC, crate::common::RW>
6546    {
6547        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ctsusuclkb_SPEC,crate::common::RW>::from_register(self,0)
6548    }
6549}
6550impl ::core::default::Default for Ctsusuclkb {
6551    #[inline(always)]
6552    fn default() -> Ctsusuclkb {
6553        <crate::RegValueT<Ctsusuclkb_SPEC> as RegisterValue<_>>::new(0)
6554    }
6555}
6556
6557#[doc(hidden)]
6558#[derive(Copy, Clone, Eq, PartialEq)]
6559pub struct Ctsusuclk2_SPEC;
6560impl crate::sealed::RegSpec for Ctsusuclk2_SPEC {
6561    type DataType = u16;
6562}
6563
6564#[doc = "CTSU Sensor Unit Clock Control Register B"]
6565pub type Ctsusuclk2 = crate::RegValueT<Ctsusuclk2_SPEC>;
6566
6567impl NoBitfieldReg<Ctsusuclk2_SPEC> for Ctsusuclk2 {}
6568impl ::core::default::Default for Ctsusuclk2 {
6569    #[inline(always)]
6570    fn default() -> Ctsusuclk2 {
6571        <crate::RegValueT<Ctsusuclk2_SPEC> as RegisterValue<_>>::new(0)
6572    }
6573}
6574
6575#[doc(hidden)]
6576#[derive(Copy, Clone, Eq, PartialEq)]
6577pub struct Ctsusuclk3_SPEC;
6578impl crate::sealed::RegSpec for Ctsusuclk3_SPEC {
6579    type DataType = u16;
6580}
6581
6582#[doc = "CTSU Sensor Unit Clock Control Register B"]
6583pub type Ctsusuclk3 = crate::RegValueT<Ctsusuclk3_SPEC>;
6584
6585impl NoBitfieldReg<Ctsusuclk3_SPEC> for Ctsusuclk3 {}
6586impl ::core::default::Default for Ctsusuclk3 {
6587    #[inline(always)]
6588    fn default() -> Ctsusuclk3 {
6589        <crate::RegValueT<Ctsusuclk3_SPEC> as RegisterValue<_>>::new(0)
6590    }
6591}
6592
6593#[doc(hidden)]
6594#[derive(Copy, Clone, Eq, PartialEq)]
6595pub struct Ctsucfccnt_SPEC;
6596impl crate::sealed::RegSpec for Ctsucfccnt_SPEC {
6597    type DataType = u32;
6598}
6599
6600#[doc = "CTSU CFC Counter Register"]
6601pub type Ctsucfccnt = crate::RegValueT<Ctsucfccnt_SPEC>;
6602
6603impl Ctsucfccnt {
6604    #[doc = "CTSU CFC Counter"]
6605    #[inline(always)]
6606    pub fn cfccnt(
6607        self,
6608    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Ctsucfccnt_SPEC, crate::common::R>
6609    {
6610        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Ctsucfccnt_SPEC,crate::common::R>::from_register(self,0)
6611    }
6612}
6613impl ::core::default::Default for Ctsucfccnt {
6614    #[inline(always)]
6615    fn default() -> Ctsucfccnt {
6616        <crate::RegValueT<Ctsucfccnt_SPEC> as RegisterValue<_>>::new(0)
6617    }
6618}
6619
6620#[doc(hidden)]
6621#[derive(Copy, Clone, Eq, PartialEq)]
6622pub struct Ctsucfccntl_SPEC;
6623impl crate::sealed::RegSpec for Ctsucfccntl_SPEC {
6624    type DataType = u16;
6625}
6626
6627#[doc = "CTSU CFC Counter Register"]
6628pub type Ctsucfccntl = crate::RegValueT<Ctsucfccntl_SPEC>;
6629
6630impl NoBitfieldReg<Ctsucfccntl_SPEC> for Ctsucfccntl {}
6631impl ::core::default::Default for Ctsucfccntl {
6632    #[inline(always)]
6633    fn default() -> Ctsucfccntl {
6634        <crate::RegValueT<Ctsucfccntl_SPEC> as RegisterValue<_>>::new(0)
6635    }
6636}