1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Peripheral Interface"]
28unsafe impl ::core::marker::Send for super::Spi0 {}
29unsafe impl ::core::marker::Sync for super::Spi0 {}
30impl super::Spi0 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "SPI Control Register"]
38 #[inline(always)]
39 pub const fn spcr(&self) -> &'static crate::common::Reg<self::Spcr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Spcr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "SPI Slave Select Polarity Register"]
48 #[inline(always)]
49 pub const fn sslp(&self) -> &'static crate::common::Reg<self::Sslp_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Sslp_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(1usize),
53 )
54 }
55 }
56
57 #[doc = "SPI Pin Control Register"]
58 #[inline(always)]
59 pub const fn sppcr(&self) -> &'static crate::common::Reg<self::Sppcr_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Sppcr_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(2usize),
63 )
64 }
65 }
66
67 #[doc = "SPI Status Register"]
68 #[inline(always)]
69 pub const fn spsr(&self) -> &'static crate::common::Reg<self::Spsr_SPEC, crate::common::RW> {
70 unsafe {
71 crate::common::Reg::<self::Spsr_SPEC, crate::common::RW>::from_ptr(
72 self._svd2pac_as_ptr().add(3usize),
73 )
74 }
75 }
76
77 #[doc = "SPI Data Register"]
78 #[inline(always)]
79 pub const fn spdr(&self) -> &'static crate::common::Reg<self::Spdr_SPEC, crate::common::RW> {
80 unsafe {
81 crate::common::Reg::<self::Spdr_SPEC, crate::common::RW>::from_ptr(
82 self._svd2pac_as_ptr().add(4usize),
83 )
84 }
85 }
86
87 #[doc = "SPI Data Register"]
88 #[inline(always)]
89 pub const fn spdr_ha(
90 &self,
91 ) -> &'static crate::common::Reg<self::SpdrHa_SPEC, crate::common::RW> {
92 unsafe {
93 crate::common::Reg::<self::SpdrHa_SPEC, crate::common::RW>::from_ptr(
94 self._svd2pac_as_ptr().add(4usize),
95 )
96 }
97 }
98
99 #[doc = "SPI Data Register"]
100 #[inline(always)]
101 pub const fn spdr_by(
102 &self,
103 ) -> &'static crate::common::Reg<self::SpdrBy_SPEC, crate::common::RW> {
104 unsafe {
105 crate::common::Reg::<self::SpdrBy_SPEC, crate::common::RW>::from_ptr(
106 self._svd2pac_as_ptr().add(4usize),
107 )
108 }
109 }
110
111 #[doc = "SPI Bit Rate Register"]
112 #[inline(always)]
113 pub const fn spbr(&self) -> &'static crate::common::Reg<self::Spbr_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Spbr_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(10usize),
117 )
118 }
119 }
120
121 #[doc = "SPI Data Control Register"]
122 #[inline(always)]
123 pub const fn spdcr(&self) -> &'static crate::common::Reg<self::Spdcr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Spdcr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(11usize),
127 )
128 }
129 }
130
131 #[doc = "SPI Clock Delay Register"]
132 #[inline(always)]
133 pub const fn spckd(&self) -> &'static crate::common::Reg<self::Spckd_SPEC, crate::common::RW> {
134 unsafe {
135 crate::common::Reg::<self::Spckd_SPEC, crate::common::RW>::from_ptr(
136 self._svd2pac_as_ptr().add(12usize),
137 )
138 }
139 }
140
141 #[doc = "SPI Slave Select Negation Delay Register"]
142 #[inline(always)]
143 pub const fn sslnd(&self) -> &'static crate::common::Reg<self::Sslnd_SPEC, crate::common::RW> {
144 unsafe {
145 crate::common::Reg::<self::Sslnd_SPEC, crate::common::RW>::from_ptr(
146 self._svd2pac_as_ptr().add(13usize),
147 )
148 }
149 }
150
151 #[doc = "SPI Next-Access Delay Register"]
152 #[inline(always)]
153 pub const fn spnd(&self) -> &'static crate::common::Reg<self::Spnd_SPEC, crate::common::RW> {
154 unsafe {
155 crate::common::Reg::<self::Spnd_SPEC, crate::common::RW>::from_ptr(
156 self._svd2pac_as_ptr().add(14usize),
157 )
158 }
159 }
160
161 #[doc = "SPI Control Register 2"]
162 #[inline(always)]
163 pub const fn spcr2(&self) -> &'static crate::common::Reg<self::Spcr2_SPEC, crate::common::RW> {
164 unsafe {
165 crate::common::Reg::<self::Spcr2_SPEC, crate::common::RW>::from_ptr(
166 self._svd2pac_as_ptr().add(15usize),
167 )
168 }
169 }
170
171 #[doc = "SPI Command Register 0"]
172 #[inline(always)]
173 pub const fn spcmd0(
174 &self,
175 ) -> &'static crate::common::Reg<self::Spcmd0_SPEC, crate::common::RW> {
176 unsafe {
177 crate::common::Reg::<self::Spcmd0_SPEC, crate::common::RW>::from_ptr(
178 self._svd2pac_as_ptr().add(16usize),
179 )
180 }
181 }
182}
183#[doc(hidden)]
184#[derive(Copy, Clone, Eq, PartialEq)]
185pub struct Spcr_SPEC;
186impl crate::sealed::RegSpec for Spcr_SPEC {
187 type DataType = u8;
188}
189
190#[doc = "SPI Control Register"]
191pub type Spcr = crate::RegValueT<Spcr_SPEC>;
192
193impl Spcr {
194 #[doc = "SPI Mode Select"]
195 #[inline(always)]
196 pub fn spms(
197 self,
198 ) -> crate::common::RegisterField<
199 0,
200 0x1,
201 1,
202 0,
203 spcr::Spms,
204 spcr::Spms,
205 Spcr_SPEC,
206 crate::common::RW,
207 > {
208 crate::common::RegisterField::<
209 0,
210 0x1,
211 1,
212 0,
213 spcr::Spms,
214 spcr::Spms,
215 Spcr_SPEC,
216 crate::common::RW,
217 >::from_register(self, 0)
218 }
219
220 #[doc = "Communications Operating Mode Select"]
221 #[inline(always)]
222 pub fn txmd(
223 self,
224 ) -> crate::common::RegisterField<
225 1,
226 0x1,
227 1,
228 0,
229 spcr::Txmd,
230 spcr::Txmd,
231 Spcr_SPEC,
232 crate::common::RW,
233 > {
234 crate::common::RegisterField::<
235 1,
236 0x1,
237 1,
238 0,
239 spcr::Txmd,
240 spcr::Txmd,
241 Spcr_SPEC,
242 crate::common::RW,
243 >::from_register(self, 0)
244 }
245
246 #[doc = "Mode Fault Error Detection Enable"]
247 #[inline(always)]
248 pub fn modfen(
249 self,
250 ) -> crate::common::RegisterField<
251 2,
252 0x1,
253 1,
254 0,
255 spcr::Modfen,
256 spcr::Modfen,
257 Spcr_SPEC,
258 crate::common::RW,
259 > {
260 crate::common::RegisterField::<
261 2,
262 0x1,
263 1,
264 0,
265 spcr::Modfen,
266 spcr::Modfen,
267 Spcr_SPEC,
268 crate::common::RW,
269 >::from_register(self, 0)
270 }
271
272 #[doc = "SPI Master/Slave Mode Select"]
273 #[inline(always)]
274 pub fn mstr(
275 self,
276 ) -> crate::common::RegisterField<
277 3,
278 0x1,
279 1,
280 0,
281 spcr::Mstr,
282 spcr::Mstr,
283 Spcr_SPEC,
284 crate::common::RW,
285 > {
286 crate::common::RegisterField::<
287 3,
288 0x1,
289 1,
290 0,
291 spcr::Mstr,
292 spcr::Mstr,
293 Spcr_SPEC,
294 crate::common::RW,
295 >::from_register(self, 0)
296 }
297
298 #[doc = "SPI Error Interrupt Enable"]
299 #[inline(always)]
300 pub fn speie(
301 self,
302 ) -> crate::common::RegisterField<
303 4,
304 0x1,
305 1,
306 0,
307 spcr::Speie,
308 spcr::Speie,
309 Spcr_SPEC,
310 crate::common::RW,
311 > {
312 crate::common::RegisterField::<
313 4,
314 0x1,
315 1,
316 0,
317 spcr::Speie,
318 spcr::Speie,
319 Spcr_SPEC,
320 crate::common::RW,
321 >::from_register(self, 0)
322 }
323
324 #[doc = "Transmit Buffer Empty Interrupt Enable"]
325 #[inline(always)]
326 pub fn sptie(
327 self,
328 ) -> crate::common::RegisterField<
329 5,
330 0x1,
331 1,
332 0,
333 spcr::Sptie,
334 spcr::Sptie,
335 Spcr_SPEC,
336 crate::common::RW,
337 > {
338 crate::common::RegisterField::<
339 5,
340 0x1,
341 1,
342 0,
343 spcr::Sptie,
344 spcr::Sptie,
345 Spcr_SPEC,
346 crate::common::RW,
347 >::from_register(self, 0)
348 }
349
350 #[doc = "SPI Function Enable"]
351 #[inline(always)]
352 pub fn spe(
353 self,
354 ) -> crate::common::RegisterField<
355 6,
356 0x1,
357 1,
358 0,
359 spcr::Spe,
360 spcr::Spe,
361 Spcr_SPEC,
362 crate::common::RW,
363 > {
364 crate::common::RegisterField::<
365 6,
366 0x1,
367 1,
368 0,
369 spcr::Spe,
370 spcr::Spe,
371 Spcr_SPEC,
372 crate::common::RW,
373 >::from_register(self, 0)
374 }
375
376 #[doc = "SPI Receive Buffer Full Interrupt Enable"]
377 #[inline(always)]
378 pub fn sprie(
379 self,
380 ) -> crate::common::RegisterField<
381 7,
382 0x1,
383 1,
384 0,
385 spcr::Sprie,
386 spcr::Sprie,
387 Spcr_SPEC,
388 crate::common::RW,
389 > {
390 crate::common::RegisterField::<
391 7,
392 0x1,
393 1,
394 0,
395 spcr::Sprie,
396 spcr::Sprie,
397 Spcr_SPEC,
398 crate::common::RW,
399 >::from_register(self, 0)
400 }
401}
402impl ::core::default::Default for Spcr {
403 #[inline(always)]
404 fn default() -> Spcr {
405 <crate::RegValueT<Spcr_SPEC> as RegisterValue<_>>::new(0)
406 }
407}
408pub mod spcr {
409
410 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
411 pub struct Spms_SPEC;
412 pub type Spms = crate::EnumBitfieldStruct<u8, Spms_SPEC>;
413 impl Spms {
414 #[doc = "Select SPI operation (4-wire method)"]
415 pub const _0: Self = Self::new(0);
416
417 #[doc = "Select clock synchronous operation (3-wire method)"]
418 pub const _1: Self = Self::new(1);
419 }
420 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
421 pub struct Txmd_SPEC;
422 pub type Txmd = crate::EnumBitfieldStruct<u8, Txmd_SPEC>;
423 impl Txmd {
424 #[doc = "Select full-duplex synchronous serial communications"]
425 pub const _0: Self = Self::new(0);
426
427 #[doc = "Select serial communications with transmit-only"]
428 pub const _1: Self = Self::new(1);
429 }
430 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
431 pub struct Modfen_SPEC;
432 pub type Modfen = crate::EnumBitfieldStruct<u8, Modfen_SPEC>;
433 impl Modfen {
434 #[doc = "Disable detection of mode fault errors"]
435 pub const _0: Self = Self::new(0);
436
437 #[doc = "Enable detection of mode fault errors"]
438 pub const _1: Self = Self::new(1);
439 }
440 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
441 pub struct Mstr_SPEC;
442 pub type Mstr = crate::EnumBitfieldStruct<u8, Mstr_SPEC>;
443 impl Mstr {
444 #[doc = "Select slave mode"]
445 pub const _0: Self = Self::new(0);
446
447 #[doc = "Select master mode"]
448 pub const _1: Self = Self::new(1);
449 }
450 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
451 pub struct Speie_SPEC;
452 pub type Speie = crate::EnumBitfieldStruct<u8, Speie_SPEC>;
453 impl Speie {
454 #[doc = "Disable SPI error interrupt requests"]
455 pub const _0: Self = Self::new(0);
456
457 #[doc = "Enable SPI error interrupt requests"]
458 pub const _1: Self = Self::new(1);
459 }
460 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
461 pub struct Sptie_SPEC;
462 pub type Sptie = crate::EnumBitfieldStruct<u8, Sptie_SPEC>;
463 impl Sptie {
464 #[doc = "Disable transmit buffer empty interrupt requests"]
465 pub const _0: Self = Self::new(0);
466
467 #[doc = "Enable transmit buffer empty interrupt requests"]
468 pub const _1: Self = Self::new(1);
469 }
470 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
471 pub struct Spe_SPEC;
472 pub type Spe = crate::EnumBitfieldStruct<u8, Spe_SPEC>;
473 impl Spe {
474 #[doc = "Disable SPI function"]
475 pub const _0: Self = Self::new(0);
476
477 #[doc = "Enable SPI function"]
478 pub const _1: Self = Self::new(1);
479 }
480 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
481 pub struct Sprie_SPEC;
482 pub type Sprie = crate::EnumBitfieldStruct<u8, Sprie_SPEC>;
483 impl Sprie {
484 #[doc = "Disable SPI receive buffer full interrupt requests"]
485 pub const _0: Self = Self::new(0);
486
487 #[doc = "Enable SPI receive buffer full interrupt requests"]
488 pub const _1: Self = Self::new(1);
489 }
490}
491#[doc(hidden)]
492#[derive(Copy, Clone, Eq, PartialEq)]
493pub struct Sslp_SPEC;
494impl crate::sealed::RegSpec for Sslp_SPEC {
495 type DataType = u8;
496}
497
498#[doc = "SPI Slave Select Polarity Register"]
499pub type Sslp = crate::RegValueT<Sslp_SPEC>;
500
501impl Sslp {
502 #[doc = "SSLn0 Signal Polarity Setting"]
503 #[inline(always)]
504 pub fn ssl0p(
505 self,
506 ) -> crate::common::RegisterField<
507 0,
508 0x1,
509 1,
510 0,
511 sslp::Ssl0P,
512 sslp::Ssl0P,
513 Sslp_SPEC,
514 crate::common::RW,
515 > {
516 crate::common::RegisterField::<
517 0,
518 0x1,
519 1,
520 0,
521 sslp::Ssl0P,
522 sslp::Ssl0P,
523 Sslp_SPEC,
524 crate::common::RW,
525 >::from_register(self, 0)
526 }
527
528 #[doc = "SSLn1 Signal Polarity Setting"]
529 #[inline(always)]
530 pub fn ssl1p(
531 self,
532 ) -> crate::common::RegisterField<
533 1,
534 0x1,
535 1,
536 0,
537 sslp::Ssl1P,
538 sslp::Ssl1P,
539 Sslp_SPEC,
540 crate::common::RW,
541 > {
542 crate::common::RegisterField::<
543 1,
544 0x1,
545 1,
546 0,
547 sslp::Ssl1P,
548 sslp::Ssl1P,
549 Sslp_SPEC,
550 crate::common::RW,
551 >::from_register(self, 0)
552 }
553
554 #[doc = "SSLn2 Signal Polarity Setting"]
555 #[inline(always)]
556 pub fn ssl2p(
557 self,
558 ) -> crate::common::RegisterField<
559 2,
560 0x1,
561 1,
562 0,
563 sslp::Ssl2P,
564 sslp::Ssl2P,
565 Sslp_SPEC,
566 crate::common::RW,
567 > {
568 crate::common::RegisterField::<
569 2,
570 0x1,
571 1,
572 0,
573 sslp::Ssl2P,
574 sslp::Ssl2P,
575 Sslp_SPEC,
576 crate::common::RW,
577 >::from_register(self, 0)
578 }
579
580 #[doc = "SSLn3 Signal Polarity Setting"]
581 #[inline(always)]
582 pub fn ssl3p(
583 self,
584 ) -> crate::common::RegisterField<
585 3,
586 0x1,
587 1,
588 0,
589 sslp::Ssl3P,
590 sslp::Ssl3P,
591 Sslp_SPEC,
592 crate::common::RW,
593 > {
594 crate::common::RegisterField::<
595 3,
596 0x1,
597 1,
598 0,
599 sslp::Ssl3P,
600 sslp::Ssl3P,
601 Sslp_SPEC,
602 crate::common::RW,
603 >::from_register(self, 0)
604 }
605}
606impl ::core::default::Default for Sslp {
607 #[inline(always)]
608 fn default() -> Sslp {
609 <crate::RegValueT<Sslp_SPEC> as RegisterValue<_>>::new(0)
610 }
611}
612pub mod sslp {
613
614 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
615 pub struct Ssl0P_SPEC;
616 pub type Ssl0P = crate::EnumBitfieldStruct<u8, Ssl0P_SPEC>;
617 impl Ssl0P {
618 #[doc = "Set SSLn0 signal to active-low"]
619 pub const _0: Self = Self::new(0);
620
621 #[doc = "Set SSLn0 signal to active-high"]
622 pub const _1: Self = Self::new(1);
623 }
624 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
625 pub struct Ssl1P_SPEC;
626 pub type Ssl1P = crate::EnumBitfieldStruct<u8, Ssl1P_SPEC>;
627 impl Ssl1P {
628 #[doc = "Set SSLn1 signal to active-low"]
629 pub const _0: Self = Self::new(0);
630
631 #[doc = "Set SSLn1 signal to active-high"]
632 pub const _1: Self = Self::new(1);
633 }
634 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
635 pub struct Ssl2P_SPEC;
636 pub type Ssl2P = crate::EnumBitfieldStruct<u8, Ssl2P_SPEC>;
637 impl Ssl2P {
638 #[doc = "Set SSLn2 signal to active-low"]
639 pub const _0: Self = Self::new(0);
640
641 #[doc = "Set SSLn2 signal to active-high"]
642 pub const _1: Self = Self::new(1);
643 }
644 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
645 pub struct Ssl3P_SPEC;
646 pub type Ssl3P = crate::EnumBitfieldStruct<u8, Ssl3P_SPEC>;
647 impl Ssl3P {
648 #[doc = "Set SSLn3 signal to active-low"]
649 pub const _0: Self = Self::new(0);
650
651 #[doc = "Set SSLn3 signal to active-high"]
652 pub const _1: Self = Self::new(1);
653 }
654}
655#[doc(hidden)]
656#[derive(Copy, Clone, Eq, PartialEq)]
657pub struct Sppcr_SPEC;
658impl crate::sealed::RegSpec for Sppcr_SPEC {
659 type DataType = u8;
660}
661
662#[doc = "SPI Pin Control Register"]
663pub type Sppcr = crate::RegValueT<Sppcr_SPEC>;
664
665impl Sppcr {
666 #[doc = "SPI Loopback"]
667 #[inline(always)]
668 pub fn splp(
669 self,
670 ) -> crate::common::RegisterField<
671 0,
672 0x1,
673 1,
674 0,
675 sppcr::Splp,
676 sppcr::Splp,
677 Sppcr_SPEC,
678 crate::common::RW,
679 > {
680 crate::common::RegisterField::<
681 0,
682 0x1,
683 1,
684 0,
685 sppcr::Splp,
686 sppcr::Splp,
687 Sppcr_SPEC,
688 crate::common::RW,
689 >::from_register(self, 0)
690 }
691
692 #[doc = "SPI Loopback 2"]
693 #[inline(always)]
694 pub fn splp2(
695 self,
696 ) -> crate::common::RegisterField<
697 1,
698 0x1,
699 1,
700 0,
701 sppcr::Splp2,
702 sppcr::Splp2,
703 Sppcr_SPEC,
704 crate::common::RW,
705 > {
706 crate::common::RegisterField::<
707 1,
708 0x1,
709 1,
710 0,
711 sppcr::Splp2,
712 sppcr::Splp2,
713 Sppcr_SPEC,
714 crate::common::RW,
715 >::from_register(self, 0)
716 }
717
718 #[doc = "MOSI Idle Fixed Value"]
719 #[inline(always)]
720 pub fn moifv(
721 self,
722 ) -> crate::common::RegisterField<
723 4,
724 0x1,
725 1,
726 0,
727 sppcr::Moifv,
728 sppcr::Moifv,
729 Sppcr_SPEC,
730 crate::common::RW,
731 > {
732 crate::common::RegisterField::<
733 4,
734 0x1,
735 1,
736 0,
737 sppcr::Moifv,
738 sppcr::Moifv,
739 Sppcr_SPEC,
740 crate::common::RW,
741 >::from_register(self, 0)
742 }
743
744 #[doc = "MOSI Idle Value Fixing Enable"]
745 #[inline(always)]
746 pub fn moife(
747 self,
748 ) -> crate::common::RegisterField<
749 5,
750 0x1,
751 1,
752 0,
753 sppcr::Moife,
754 sppcr::Moife,
755 Sppcr_SPEC,
756 crate::common::RW,
757 > {
758 crate::common::RegisterField::<
759 5,
760 0x1,
761 1,
762 0,
763 sppcr::Moife,
764 sppcr::Moife,
765 Sppcr_SPEC,
766 crate::common::RW,
767 >::from_register(self, 0)
768 }
769}
770impl ::core::default::Default for Sppcr {
771 #[inline(always)]
772 fn default() -> Sppcr {
773 <crate::RegValueT<Sppcr_SPEC> as RegisterValue<_>>::new(0)
774 }
775}
776pub mod sppcr {
777
778 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
779 pub struct Splp_SPEC;
780 pub type Splp = crate::EnumBitfieldStruct<u8, Splp_SPEC>;
781 impl Splp {
782 #[doc = "Normal mode"]
783 pub const _0: Self = Self::new(0);
784
785 #[doc = "Loopback mode (receive data = inverted transmit data)"]
786 pub const _1: Self = Self::new(1);
787 }
788 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
789 pub struct Splp2_SPEC;
790 pub type Splp2 = crate::EnumBitfieldStruct<u8, Splp2_SPEC>;
791 impl Splp2 {
792 #[doc = "Normal mode"]
793 pub const _0: Self = Self::new(0);
794
795 #[doc = "Loopback mode (receive data = transmit data)"]
796 pub const _1: Self = Self::new(1);
797 }
798 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
799 pub struct Moifv_SPEC;
800 pub type Moifv = crate::EnumBitfieldStruct<u8, Moifv_SPEC>;
801 impl Moifv {
802 #[doc = "Set level output on MOSIn pin during MOSI idling to low"]
803 pub const _0: Self = Self::new(0);
804
805 #[doc = "Set level output on MOSIn pin during MOSI idling to high"]
806 pub const _1: Self = Self::new(1);
807 }
808 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
809 pub struct Moife_SPEC;
810 pub type Moife = crate::EnumBitfieldStruct<u8, Moife_SPEC>;
811 impl Moife {
812 #[doc = "Set MOSI output value to equal final data from previous transfer"]
813 pub const _0: Self = Self::new(0);
814
815 #[doc = "Set MOSI output value to equal value set in the MOIFV bit"]
816 pub const _1: Self = Self::new(1);
817 }
818}
819#[doc(hidden)]
820#[derive(Copy, Clone, Eq, PartialEq)]
821pub struct Spsr_SPEC;
822impl crate::sealed::RegSpec for Spsr_SPEC {
823 type DataType = u8;
824}
825
826#[doc = "SPI Status Register"]
827pub type Spsr = crate::RegValueT<Spsr_SPEC>;
828
829impl Spsr {
830 #[doc = "Overrun Error Flag"]
831 #[inline(always)]
832 pub fn ovrf(
833 self,
834 ) -> crate::common::RegisterField<
835 0,
836 0x1,
837 1,
838 0,
839 spsr::Ovrf,
840 spsr::Ovrf,
841 Spsr_SPEC,
842 crate::common::RW,
843 > {
844 crate::common::RegisterField::<
845 0,
846 0x1,
847 1,
848 0,
849 spsr::Ovrf,
850 spsr::Ovrf,
851 Spsr_SPEC,
852 crate::common::RW,
853 >::from_register(self, 0)
854 }
855
856 #[doc = "SPI Idle Flag"]
857 #[inline(always)]
858 pub fn idlnf(
859 self,
860 ) -> crate::common::RegisterField<
861 1,
862 0x1,
863 1,
864 0,
865 spsr::Idlnf,
866 spsr::Idlnf,
867 Spsr_SPEC,
868 crate::common::R,
869 > {
870 crate::common::RegisterField::<
871 1,
872 0x1,
873 1,
874 0,
875 spsr::Idlnf,
876 spsr::Idlnf,
877 Spsr_SPEC,
878 crate::common::R,
879 >::from_register(self, 0)
880 }
881
882 #[doc = "Mode Fault Error Flag"]
883 #[inline(always)]
884 pub fn modf(
885 self,
886 ) -> crate::common::RegisterField<
887 2,
888 0x1,
889 1,
890 0,
891 spsr::Modf,
892 spsr::Modf,
893 Spsr_SPEC,
894 crate::common::RW,
895 > {
896 crate::common::RegisterField::<
897 2,
898 0x1,
899 1,
900 0,
901 spsr::Modf,
902 spsr::Modf,
903 Spsr_SPEC,
904 crate::common::RW,
905 >::from_register(self, 0)
906 }
907
908 #[doc = "Parity Error Flag"]
909 #[inline(always)]
910 pub fn perf(
911 self,
912 ) -> crate::common::RegisterField<
913 3,
914 0x1,
915 1,
916 0,
917 spsr::Perf,
918 spsr::Perf,
919 Spsr_SPEC,
920 crate::common::RW,
921 > {
922 crate::common::RegisterField::<
923 3,
924 0x1,
925 1,
926 0,
927 spsr::Perf,
928 spsr::Perf,
929 Spsr_SPEC,
930 crate::common::RW,
931 >::from_register(self, 0)
932 }
933
934 #[doc = "Underrun Error Flag"]
935 #[inline(always)]
936 pub fn udrf(
937 self,
938 ) -> crate::common::RegisterField<
939 4,
940 0x1,
941 1,
942 0,
943 spsr::Udrf,
944 spsr::Udrf,
945 Spsr_SPEC,
946 crate::common::RW,
947 > {
948 crate::common::RegisterField::<
949 4,
950 0x1,
951 1,
952 0,
953 spsr::Udrf,
954 spsr::Udrf,
955 Spsr_SPEC,
956 crate::common::RW,
957 >::from_register(self, 0)
958 }
959
960 #[doc = "SPI Transmit Buffer Empty Flag"]
961 #[inline(always)]
962 pub fn sptef(
963 self,
964 ) -> crate::common::RegisterField<
965 5,
966 0x1,
967 1,
968 0,
969 spsr::Sptef,
970 spsr::Sptef,
971 Spsr_SPEC,
972 crate::common::RW,
973 > {
974 crate::common::RegisterField::<
975 5,
976 0x1,
977 1,
978 0,
979 spsr::Sptef,
980 spsr::Sptef,
981 Spsr_SPEC,
982 crate::common::RW,
983 >::from_register(self, 0)
984 }
985
986 #[doc = "SPI Receive Buffer Full Flag"]
987 #[inline(always)]
988 pub fn sprf(
989 self,
990 ) -> crate::common::RegisterField<
991 7,
992 0x1,
993 1,
994 0,
995 spsr::Sprf,
996 spsr::Sprf,
997 Spsr_SPEC,
998 crate::common::RW,
999 > {
1000 crate::common::RegisterField::<
1001 7,
1002 0x1,
1003 1,
1004 0,
1005 spsr::Sprf,
1006 spsr::Sprf,
1007 Spsr_SPEC,
1008 crate::common::RW,
1009 >::from_register(self, 0)
1010 }
1011}
1012impl ::core::default::Default for Spsr {
1013 #[inline(always)]
1014 fn default() -> Spsr {
1015 <crate::RegValueT<Spsr_SPEC> as RegisterValue<_>>::new(32)
1016 }
1017}
1018pub mod spsr {
1019
1020 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1021 pub struct Ovrf_SPEC;
1022 pub type Ovrf = crate::EnumBitfieldStruct<u8, Ovrf_SPEC>;
1023 impl Ovrf {
1024 #[doc = "No overrun error occurred"]
1025 pub const _0: Self = Self::new(0);
1026
1027 #[doc = "Overrun error occurred"]
1028 pub const _1: Self = Self::new(1);
1029 }
1030 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1031 pub struct Idlnf_SPEC;
1032 pub type Idlnf = crate::EnumBitfieldStruct<u8, Idlnf_SPEC>;
1033 impl Idlnf {
1034 #[doc = "SPI is in the idle state"]
1035 pub const _0: Self = Self::new(0);
1036
1037 #[doc = "SPI is in the transfer state"]
1038 pub const _1: Self = Self::new(1);
1039 }
1040 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1041 pub struct Modf_SPEC;
1042 pub type Modf = crate::EnumBitfieldStruct<u8, Modf_SPEC>;
1043 impl Modf {
1044 #[doc = "No mode fault or underrun error occurred"]
1045 pub const _0: Self = Self::new(0);
1046
1047 #[doc = "Mode fault error or underrun error occurred"]
1048 pub const _1: Self = Self::new(1);
1049 }
1050 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1051 pub struct Perf_SPEC;
1052 pub type Perf = crate::EnumBitfieldStruct<u8, Perf_SPEC>;
1053 impl Perf {
1054 #[doc = "No parity error occurred"]
1055 pub const _0: Self = Self::new(0);
1056
1057 #[doc = "Parity error occurred"]
1058 pub const _1: Self = Self::new(1);
1059 }
1060 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1061 pub struct Udrf_SPEC;
1062 pub type Udrf = crate::EnumBitfieldStruct<u8, Udrf_SPEC>;
1063 impl Udrf {
1064 #[doc = "Mode fault error occurred (MODF = 1)"]
1065 pub const _0: Self = Self::new(0);
1066
1067 #[doc = "Underrun error occurred (MODF = 1)"]
1068 pub const _1: Self = Self::new(1);
1069 }
1070 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1071 pub struct Sptef_SPEC;
1072 pub type Sptef = crate::EnumBitfieldStruct<u8, Sptef_SPEC>;
1073 impl Sptef {
1074 #[doc = "Data is in the transmit buffer"]
1075 pub const _0: Self = Self::new(0);
1076
1077 #[doc = "No data is in the transmit buffer"]
1078 pub const _1: Self = Self::new(1);
1079 }
1080 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1081 pub struct Sprf_SPEC;
1082 pub type Sprf = crate::EnumBitfieldStruct<u8, Sprf_SPEC>;
1083 impl Sprf {
1084 #[doc = "No valid data is in SPDR/SPDR_HA"]
1085 pub const _0: Self = Self::new(0);
1086
1087 #[doc = "Valid data is in SPDR/SPDR_HA"]
1088 pub const _1: Self = Self::new(1);
1089 }
1090}
1091#[doc(hidden)]
1092#[derive(Copy, Clone, Eq, PartialEq)]
1093pub struct Spdr_SPEC;
1094impl crate::sealed::RegSpec for Spdr_SPEC {
1095 type DataType = u32;
1096}
1097
1098#[doc = "SPI Data Register"]
1099pub type Spdr = crate::RegValueT<Spdr_SPEC>;
1100
1101impl NoBitfieldReg<Spdr_SPEC> for Spdr {}
1102impl ::core::default::Default for Spdr {
1103 #[inline(always)]
1104 fn default() -> Spdr {
1105 <crate::RegValueT<Spdr_SPEC> as RegisterValue<_>>::new(0)
1106 }
1107}
1108
1109#[doc(hidden)]
1110#[derive(Copy, Clone, Eq, PartialEq)]
1111pub struct SpdrHa_SPEC;
1112impl crate::sealed::RegSpec for SpdrHa_SPEC {
1113 type DataType = u16;
1114}
1115
1116#[doc = "SPI Data Register"]
1117pub type SpdrHa = crate::RegValueT<SpdrHa_SPEC>;
1118
1119impl NoBitfieldReg<SpdrHa_SPEC> for SpdrHa {}
1120impl ::core::default::Default for SpdrHa {
1121 #[inline(always)]
1122 fn default() -> SpdrHa {
1123 <crate::RegValueT<SpdrHa_SPEC> as RegisterValue<_>>::new(0)
1124 }
1125}
1126
1127#[doc(hidden)]
1128#[derive(Copy, Clone, Eq, PartialEq)]
1129pub struct SpdrBy_SPEC;
1130impl crate::sealed::RegSpec for SpdrBy_SPEC {
1131 type DataType = u8;
1132}
1133
1134#[doc = "SPI Data Register"]
1135pub type SpdrBy = crate::RegValueT<SpdrBy_SPEC>;
1136
1137impl NoBitfieldReg<SpdrBy_SPEC> for SpdrBy {}
1138impl ::core::default::Default for SpdrBy {
1139 #[inline(always)]
1140 fn default() -> SpdrBy {
1141 <crate::RegValueT<SpdrBy_SPEC> as RegisterValue<_>>::new(0)
1142 }
1143}
1144
1145#[doc(hidden)]
1146#[derive(Copy, Clone, Eq, PartialEq)]
1147pub struct Spbr_SPEC;
1148impl crate::sealed::RegSpec for Spbr_SPEC {
1149 type DataType = u8;
1150}
1151
1152#[doc = "SPI Bit Rate Register"]
1153pub type Spbr = crate::RegValueT<Spbr_SPEC>;
1154
1155impl NoBitfieldReg<Spbr_SPEC> for Spbr {}
1156impl ::core::default::Default for Spbr {
1157 #[inline(always)]
1158 fn default() -> Spbr {
1159 <crate::RegValueT<Spbr_SPEC> as RegisterValue<_>>::new(255)
1160 }
1161}
1162
1163#[doc(hidden)]
1164#[derive(Copy, Clone, Eq, PartialEq)]
1165pub struct Spdcr_SPEC;
1166impl crate::sealed::RegSpec for Spdcr_SPEC {
1167 type DataType = u8;
1168}
1169
1170#[doc = "SPI Data Control Register"]
1171pub type Spdcr = crate::RegValueT<Spdcr_SPEC>;
1172
1173impl Spdcr {
1174 #[doc = "SPI Receive/Transmit Data Select"]
1175 #[inline(always)]
1176 pub fn sprdtd(
1177 self,
1178 ) -> crate::common::RegisterField<
1179 4,
1180 0x1,
1181 1,
1182 0,
1183 spdcr::Sprdtd,
1184 spdcr::Sprdtd,
1185 Spdcr_SPEC,
1186 crate::common::RW,
1187 > {
1188 crate::common::RegisterField::<
1189 4,
1190 0x1,
1191 1,
1192 0,
1193 spdcr::Sprdtd,
1194 spdcr::Sprdtd,
1195 Spdcr_SPEC,
1196 crate::common::RW,
1197 >::from_register(self, 0)
1198 }
1199
1200 #[doc = "SPI Word Access/Halfword Access Specification"]
1201 #[inline(always)]
1202 pub fn splw(
1203 self,
1204 ) -> crate::common::RegisterField<
1205 5,
1206 0x1,
1207 1,
1208 0,
1209 spdcr::Splw,
1210 spdcr::Splw,
1211 Spdcr_SPEC,
1212 crate::common::RW,
1213 > {
1214 crate::common::RegisterField::<
1215 5,
1216 0x1,
1217 1,
1218 0,
1219 spdcr::Splw,
1220 spdcr::Splw,
1221 Spdcr_SPEC,
1222 crate::common::RW,
1223 >::from_register(self, 0)
1224 }
1225
1226 #[doc = "SPI Byte Access Specification"]
1227 #[inline(always)]
1228 pub fn spbyt(
1229 self,
1230 ) -> crate::common::RegisterField<
1231 6,
1232 0x1,
1233 1,
1234 0,
1235 spdcr::Spbyt,
1236 spdcr::Spbyt,
1237 Spdcr_SPEC,
1238 crate::common::RW,
1239 > {
1240 crate::common::RegisterField::<
1241 6,
1242 0x1,
1243 1,
1244 0,
1245 spdcr::Spbyt,
1246 spdcr::Spbyt,
1247 Spdcr_SPEC,
1248 crate::common::RW,
1249 >::from_register(self, 0)
1250 }
1251}
1252impl ::core::default::Default for Spdcr {
1253 #[inline(always)]
1254 fn default() -> Spdcr {
1255 <crate::RegValueT<Spdcr_SPEC> as RegisterValue<_>>::new(0)
1256 }
1257}
1258pub mod spdcr {
1259
1260 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1261 pub struct Sprdtd_SPEC;
1262 pub type Sprdtd = crate::EnumBitfieldStruct<u8, Sprdtd_SPEC>;
1263 impl Sprdtd {
1264 #[doc = "Read SPDR/SPDR_HA values from receive buffer"]
1265 pub const _0: Self = Self::new(0);
1266
1267 #[doc = "Read SPDR/SPDR_HA values from transmit buffer, but only if the transmit buffer is empty"]
1268 pub const _1: Self = Self::new(1);
1269 }
1270 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1271 pub struct Splw_SPEC;
1272 pub type Splw = crate::EnumBitfieldStruct<u8, Splw_SPEC>;
1273 impl Splw {
1274 #[doc = "Set SPDR_HA to valid for halfword access"]
1275 pub const _0: Self = Self::new(0);
1276
1277 #[doc = "Set SPDR to valid for word access"]
1278 pub const _1: Self = Self::new(1);
1279 }
1280 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1281 pub struct Spbyt_SPEC;
1282 pub type Spbyt = crate::EnumBitfieldStruct<u8, Spbyt_SPEC>;
1283 impl Spbyt {
1284 #[doc = "SPDR/SPDR_HA is accessed in halfword or word (SPLW is valid)"]
1285 pub const _0: Self = Self::new(0);
1286
1287 #[doc = "SPDR_BY is accessed in byte (SPLW is invalid)"]
1288 pub const _1: Self = Self::new(1);
1289 }
1290}
1291#[doc(hidden)]
1292#[derive(Copy, Clone, Eq, PartialEq)]
1293pub struct Spckd_SPEC;
1294impl crate::sealed::RegSpec for Spckd_SPEC {
1295 type DataType = u8;
1296}
1297
1298#[doc = "SPI Clock Delay Register"]
1299pub type Spckd = crate::RegValueT<Spckd_SPEC>;
1300
1301impl Spckd {
1302 #[doc = "RSPCK Delay Setting"]
1303 #[inline(always)]
1304 pub fn sckdl(
1305 self,
1306 ) -> crate::common::RegisterField<
1307 0,
1308 0x7,
1309 1,
1310 0,
1311 spckd::Sckdl,
1312 spckd::Sckdl,
1313 Spckd_SPEC,
1314 crate::common::RW,
1315 > {
1316 crate::common::RegisterField::<
1317 0,
1318 0x7,
1319 1,
1320 0,
1321 spckd::Sckdl,
1322 spckd::Sckdl,
1323 Spckd_SPEC,
1324 crate::common::RW,
1325 >::from_register(self, 0)
1326 }
1327}
1328impl ::core::default::Default for Spckd {
1329 #[inline(always)]
1330 fn default() -> Spckd {
1331 <crate::RegValueT<Spckd_SPEC> as RegisterValue<_>>::new(0)
1332 }
1333}
1334pub mod spckd {
1335
1336 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1337 pub struct Sckdl_SPEC;
1338 pub type Sckdl = crate::EnumBitfieldStruct<u8, Sckdl_SPEC>;
1339 impl Sckdl {
1340 #[doc = "1 RSPCK"]
1341 pub const _000: Self = Self::new(0);
1342
1343 #[doc = "2 RSPCK"]
1344 pub const _001: Self = Self::new(1);
1345
1346 #[doc = "3 RSPCK"]
1347 pub const _010: Self = Self::new(2);
1348
1349 #[doc = "4 RSPCK"]
1350 pub const _011: Self = Self::new(3);
1351
1352 #[doc = "5 RSPCK"]
1353 pub const _100: Self = Self::new(4);
1354
1355 #[doc = "6 RSPCK"]
1356 pub const _101: Self = Self::new(5);
1357
1358 #[doc = "7 RSPCK"]
1359 pub const _110: Self = Self::new(6);
1360
1361 #[doc = "8 RSPCK"]
1362 pub const _111: Self = Self::new(7);
1363 }
1364}
1365#[doc(hidden)]
1366#[derive(Copy, Clone, Eq, PartialEq)]
1367pub struct Sslnd_SPEC;
1368impl crate::sealed::RegSpec for Sslnd_SPEC {
1369 type DataType = u8;
1370}
1371
1372#[doc = "SPI Slave Select Negation Delay Register"]
1373pub type Sslnd = crate::RegValueT<Sslnd_SPEC>;
1374
1375impl Sslnd {
1376 #[doc = "SSL Negation Delay Setting"]
1377 #[inline(always)]
1378 pub fn slndl(
1379 self,
1380 ) -> crate::common::RegisterField<
1381 0,
1382 0x7,
1383 1,
1384 0,
1385 sslnd::Slndl,
1386 sslnd::Slndl,
1387 Sslnd_SPEC,
1388 crate::common::RW,
1389 > {
1390 crate::common::RegisterField::<
1391 0,
1392 0x7,
1393 1,
1394 0,
1395 sslnd::Slndl,
1396 sslnd::Slndl,
1397 Sslnd_SPEC,
1398 crate::common::RW,
1399 >::from_register(self, 0)
1400 }
1401}
1402impl ::core::default::Default for Sslnd {
1403 #[inline(always)]
1404 fn default() -> Sslnd {
1405 <crate::RegValueT<Sslnd_SPEC> as RegisterValue<_>>::new(0)
1406 }
1407}
1408pub mod sslnd {
1409
1410 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1411 pub struct Slndl_SPEC;
1412 pub type Slndl = crate::EnumBitfieldStruct<u8, Slndl_SPEC>;
1413 impl Slndl {
1414 #[doc = "1 RSPCK"]
1415 pub const _000: Self = Self::new(0);
1416
1417 #[doc = "2 RSPCK"]
1418 pub const _001: Self = Self::new(1);
1419
1420 #[doc = "3 RSPCK"]
1421 pub const _010: Self = Self::new(2);
1422
1423 #[doc = "4 RSPCK"]
1424 pub const _011: Self = Self::new(3);
1425
1426 #[doc = "5 RSPCK"]
1427 pub const _100: Self = Self::new(4);
1428
1429 #[doc = "6 RSPCK"]
1430 pub const _101: Self = Self::new(5);
1431
1432 #[doc = "7 RSPCK"]
1433 pub const _110: Self = Self::new(6);
1434
1435 #[doc = "8 RSPCK"]
1436 pub const _111: Self = Self::new(7);
1437 }
1438}
1439#[doc(hidden)]
1440#[derive(Copy, Clone, Eq, PartialEq)]
1441pub struct Spnd_SPEC;
1442impl crate::sealed::RegSpec for Spnd_SPEC {
1443 type DataType = u8;
1444}
1445
1446#[doc = "SPI Next-Access Delay Register"]
1447pub type Spnd = crate::RegValueT<Spnd_SPEC>;
1448
1449impl Spnd {
1450 #[doc = "SPI Next-Access Delay Setting"]
1451 #[inline(always)]
1452 pub fn spndl(
1453 self,
1454 ) -> crate::common::RegisterField<
1455 0,
1456 0x7,
1457 1,
1458 0,
1459 spnd::Spndl,
1460 spnd::Spndl,
1461 Spnd_SPEC,
1462 crate::common::RW,
1463 > {
1464 crate::common::RegisterField::<
1465 0,
1466 0x7,
1467 1,
1468 0,
1469 spnd::Spndl,
1470 spnd::Spndl,
1471 Spnd_SPEC,
1472 crate::common::RW,
1473 >::from_register(self, 0)
1474 }
1475}
1476impl ::core::default::Default for Spnd {
1477 #[inline(always)]
1478 fn default() -> Spnd {
1479 <crate::RegValueT<Spnd_SPEC> as RegisterValue<_>>::new(0)
1480 }
1481}
1482pub mod spnd {
1483
1484 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1485 pub struct Spndl_SPEC;
1486 pub type Spndl = crate::EnumBitfieldStruct<u8, Spndl_SPEC>;
1487 impl Spndl {
1488 #[doc = "1 RSPCK + 2 PCLKB"]
1489 pub const _000: Self = Self::new(0);
1490
1491 #[doc = "2 RSPCK + 2 PCLKB"]
1492 pub const _001: Self = Self::new(1);
1493
1494 #[doc = "3 RSPCK + 2 PCLKB"]
1495 pub const _010: Self = Self::new(2);
1496
1497 #[doc = "4 RSPCK + 2 PCLKB"]
1498 pub const _011: Self = Self::new(3);
1499
1500 #[doc = "5 RSPCK + 2 PCLKB"]
1501 pub const _100: Self = Self::new(4);
1502
1503 #[doc = "6 RSPCK + 2 PCLKB"]
1504 pub const _101: Self = Self::new(5);
1505
1506 #[doc = "7 RSPCK + 2 PCLKB"]
1507 pub const _110: Self = Self::new(6);
1508
1509 #[doc = "8 RSPCK + 2 PCLKB"]
1510 pub const _111: Self = Self::new(7);
1511 }
1512}
1513#[doc(hidden)]
1514#[derive(Copy, Clone, Eq, PartialEq)]
1515pub struct Spcr2_SPEC;
1516impl crate::sealed::RegSpec for Spcr2_SPEC {
1517 type DataType = u8;
1518}
1519
1520#[doc = "SPI Control Register 2"]
1521pub type Spcr2 = crate::RegValueT<Spcr2_SPEC>;
1522
1523impl Spcr2 {
1524 #[doc = "Parity Enable"]
1525 #[inline(always)]
1526 pub fn sppe(
1527 self,
1528 ) -> crate::common::RegisterField<
1529 0,
1530 0x1,
1531 1,
1532 0,
1533 spcr2::Sppe,
1534 spcr2::Sppe,
1535 Spcr2_SPEC,
1536 crate::common::RW,
1537 > {
1538 crate::common::RegisterField::<
1539 0,
1540 0x1,
1541 1,
1542 0,
1543 spcr2::Sppe,
1544 spcr2::Sppe,
1545 Spcr2_SPEC,
1546 crate::common::RW,
1547 >::from_register(self, 0)
1548 }
1549
1550 #[doc = "Parity Mode"]
1551 #[inline(always)]
1552 pub fn spoe(
1553 self,
1554 ) -> crate::common::RegisterField<
1555 1,
1556 0x1,
1557 1,
1558 0,
1559 spcr2::Spoe,
1560 spcr2::Spoe,
1561 Spcr2_SPEC,
1562 crate::common::RW,
1563 > {
1564 crate::common::RegisterField::<
1565 1,
1566 0x1,
1567 1,
1568 0,
1569 spcr2::Spoe,
1570 spcr2::Spoe,
1571 Spcr2_SPEC,
1572 crate::common::RW,
1573 >::from_register(self, 0)
1574 }
1575
1576 #[doc = "SPI Idle Interrupt Enable"]
1577 #[inline(always)]
1578 pub fn spiie(
1579 self,
1580 ) -> crate::common::RegisterField<
1581 2,
1582 0x1,
1583 1,
1584 0,
1585 spcr2::Spiie,
1586 spcr2::Spiie,
1587 Spcr2_SPEC,
1588 crate::common::RW,
1589 > {
1590 crate::common::RegisterField::<
1591 2,
1592 0x1,
1593 1,
1594 0,
1595 spcr2::Spiie,
1596 spcr2::Spiie,
1597 Spcr2_SPEC,
1598 crate::common::RW,
1599 >::from_register(self, 0)
1600 }
1601
1602 #[doc = "Parity Self-Testing"]
1603 #[inline(always)]
1604 pub fn pte(
1605 self,
1606 ) -> crate::common::RegisterField<
1607 3,
1608 0x1,
1609 1,
1610 0,
1611 spcr2::Pte,
1612 spcr2::Pte,
1613 Spcr2_SPEC,
1614 crate::common::RW,
1615 > {
1616 crate::common::RegisterField::<
1617 3,
1618 0x1,
1619 1,
1620 0,
1621 spcr2::Pte,
1622 spcr2::Pte,
1623 Spcr2_SPEC,
1624 crate::common::RW,
1625 >::from_register(self, 0)
1626 }
1627
1628 #[doc = "RSPCK Auto-Stop Function Enable"]
1629 #[inline(always)]
1630 pub fn sckase(
1631 self,
1632 ) -> crate::common::RegisterField<
1633 4,
1634 0x1,
1635 1,
1636 0,
1637 spcr2::Sckase,
1638 spcr2::Sckase,
1639 Spcr2_SPEC,
1640 crate::common::RW,
1641 > {
1642 crate::common::RegisterField::<
1643 4,
1644 0x1,
1645 1,
1646 0,
1647 spcr2::Sckase,
1648 spcr2::Sckase,
1649 Spcr2_SPEC,
1650 crate::common::RW,
1651 >::from_register(self, 0)
1652 }
1653}
1654impl ::core::default::Default for Spcr2 {
1655 #[inline(always)]
1656 fn default() -> Spcr2 {
1657 <crate::RegValueT<Spcr2_SPEC> as RegisterValue<_>>::new(0)
1658 }
1659}
1660pub mod spcr2 {
1661
1662 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1663 pub struct Sppe_SPEC;
1664 pub type Sppe = crate::EnumBitfieldStruct<u8, Sppe_SPEC>;
1665 impl Sppe {
1666 #[doc = "Do not add parity bit to transmit data and do not check parity bit of receive data"]
1667 pub const _0: Self = Self::new(0);
1668
1669 #[doc = "When SPCR.TXMD = 0: Add parity bit to transmit data and check parity bit of receive data When SPCR.TXMD = 1: Add parity bit to transmit data but do not check parity bit of receive data"]
1670 pub const _1: Self = Self::new(1);
1671 }
1672 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1673 pub struct Spoe_SPEC;
1674 pub type Spoe = crate::EnumBitfieldStruct<u8, Spoe_SPEC>;
1675 impl Spoe {
1676 #[doc = "Select even parity for transmission and reception"]
1677 pub const _0: Self = Self::new(0);
1678
1679 #[doc = "Select odd parity for transmission and reception"]
1680 pub const _1: Self = Self::new(1);
1681 }
1682 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1683 pub struct Spiie_SPEC;
1684 pub type Spiie = crate::EnumBitfieldStruct<u8, Spiie_SPEC>;
1685 impl Spiie {
1686 #[doc = "Disable idle interrupt requests"]
1687 pub const _0: Self = Self::new(0);
1688
1689 #[doc = "Enable idle interrupt requests"]
1690 pub const _1: Self = Self::new(1);
1691 }
1692 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1693 pub struct Pte_SPEC;
1694 pub type Pte = crate::EnumBitfieldStruct<u8, Pte_SPEC>;
1695 impl Pte {
1696 #[doc = "Disable self-diagnosis function of the parity circuit"]
1697 pub const _0: Self = Self::new(0);
1698
1699 #[doc = "Enable self-diagnosis function of the parity circuit"]
1700 pub const _1: Self = Self::new(1);
1701 }
1702 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1703 pub struct Sckase_SPEC;
1704 pub type Sckase = crate::EnumBitfieldStruct<u8, Sckase_SPEC>;
1705 impl Sckase {
1706 #[doc = "Disable RSPCK auto-stop function"]
1707 pub const _0: Self = Self::new(0);
1708
1709 #[doc = "Enable RSPCK auto-stop function"]
1710 pub const _1: Self = Self::new(1);
1711 }
1712}
1713#[doc(hidden)]
1714#[derive(Copy, Clone, Eq, PartialEq)]
1715pub struct Spcmd0_SPEC;
1716impl crate::sealed::RegSpec for Spcmd0_SPEC {
1717 type DataType = u16;
1718}
1719
1720#[doc = "SPI Command Register 0"]
1721pub type Spcmd0 = crate::RegValueT<Spcmd0_SPEC>;
1722
1723impl Spcmd0 {
1724 #[doc = "RSPCK Phase Setting"]
1725 #[inline(always)]
1726 pub fn cpha(
1727 self,
1728 ) -> crate::common::RegisterField<
1729 0,
1730 0x1,
1731 1,
1732 0,
1733 spcmd0::Cpha,
1734 spcmd0::Cpha,
1735 Spcmd0_SPEC,
1736 crate::common::RW,
1737 > {
1738 crate::common::RegisterField::<
1739 0,
1740 0x1,
1741 1,
1742 0,
1743 spcmd0::Cpha,
1744 spcmd0::Cpha,
1745 Spcmd0_SPEC,
1746 crate::common::RW,
1747 >::from_register(self, 0)
1748 }
1749
1750 #[doc = "RSPCK Polarity Setting"]
1751 #[inline(always)]
1752 pub fn cpol(
1753 self,
1754 ) -> crate::common::RegisterField<
1755 1,
1756 0x1,
1757 1,
1758 0,
1759 spcmd0::Cpol,
1760 spcmd0::Cpol,
1761 Spcmd0_SPEC,
1762 crate::common::RW,
1763 > {
1764 crate::common::RegisterField::<
1765 1,
1766 0x1,
1767 1,
1768 0,
1769 spcmd0::Cpol,
1770 spcmd0::Cpol,
1771 Spcmd0_SPEC,
1772 crate::common::RW,
1773 >::from_register(self, 0)
1774 }
1775
1776 #[doc = "Bit Rate Division Setting"]
1777 #[inline(always)]
1778 pub fn brdv(
1779 self,
1780 ) -> crate::common::RegisterField<
1781 2,
1782 0x3,
1783 1,
1784 0,
1785 spcmd0::Brdv,
1786 spcmd0::Brdv,
1787 Spcmd0_SPEC,
1788 crate::common::RW,
1789 > {
1790 crate::common::RegisterField::<
1791 2,
1792 0x3,
1793 1,
1794 0,
1795 spcmd0::Brdv,
1796 spcmd0::Brdv,
1797 Spcmd0_SPEC,
1798 crate::common::RW,
1799 >::from_register(self, 0)
1800 }
1801
1802 #[doc = "SSL Signal Assertion Setting"]
1803 #[inline(always)]
1804 pub fn ssla(
1805 self,
1806 ) -> crate::common::RegisterField<
1807 4,
1808 0x7,
1809 1,
1810 0,
1811 spcmd0::Ssla,
1812 spcmd0::Ssla,
1813 Spcmd0_SPEC,
1814 crate::common::RW,
1815 > {
1816 crate::common::RegisterField::<
1817 4,
1818 0x7,
1819 1,
1820 0,
1821 spcmd0::Ssla,
1822 spcmd0::Ssla,
1823 Spcmd0_SPEC,
1824 crate::common::RW,
1825 >::from_register(self, 0)
1826 }
1827
1828 #[doc = "SPI Data Length Setting"]
1829 #[inline(always)]
1830 pub fn spb(
1831 self,
1832 ) -> crate::common::RegisterField<
1833 8,
1834 0xf,
1835 1,
1836 0,
1837 spcmd0::Spb,
1838 spcmd0::Spb,
1839 Spcmd0_SPEC,
1840 crate::common::RW,
1841 > {
1842 crate::common::RegisterField::<
1843 8,
1844 0xf,
1845 1,
1846 0,
1847 spcmd0::Spb,
1848 spcmd0::Spb,
1849 Spcmd0_SPEC,
1850 crate::common::RW,
1851 >::from_register(self, 0)
1852 }
1853
1854 #[doc = "SPI LSB First"]
1855 #[inline(always)]
1856 pub fn lsbf(
1857 self,
1858 ) -> crate::common::RegisterField<
1859 12,
1860 0x1,
1861 1,
1862 0,
1863 spcmd0::Lsbf,
1864 spcmd0::Lsbf,
1865 Spcmd0_SPEC,
1866 crate::common::RW,
1867 > {
1868 crate::common::RegisterField::<
1869 12,
1870 0x1,
1871 1,
1872 0,
1873 spcmd0::Lsbf,
1874 spcmd0::Lsbf,
1875 Spcmd0_SPEC,
1876 crate::common::RW,
1877 >::from_register(self, 0)
1878 }
1879
1880 #[doc = "SPI Next-Access Delay Enable"]
1881 #[inline(always)]
1882 pub fn spnden(
1883 self,
1884 ) -> crate::common::RegisterField<
1885 13,
1886 0x1,
1887 1,
1888 0,
1889 spcmd0::Spnden,
1890 spcmd0::Spnden,
1891 Spcmd0_SPEC,
1892 crate::common::RW,
1893 > {
1894 crate::common::RegisterField::<
1895 13,
1896 0x1,
1897 1,
1898 0,
1899 spcmd0::Spnden,
1900 spcmd0::Spnden,
1901 Spcmd0_SPEC,
1902 crate::common::RW,
1903 >::from_register(self, 0)
1904 }
1905
1906 #[doc = "SSL Negation Delay Setting Enable"]
1907 #[inline(always)]
1908 pub fn slnden(
1909 self,
1910 ) -> crate::common::RegisterField<
1911 14,
1912 0x1,
1913 1,
1914 0,
1915 spcmd0::Slnden,
1916 spcmd0::Slnden,
1917 Spcmd0_SPEC,
1918 crate::common::RW,
1919 > {
1920 crate::common::RegisterField::<
1921 14,
1922 0x1,
1923 1,
1924 0,
1925 spcmd0::Slnden,
1926 spcmd0::Slnden,
1927 Spcmd0_SPEC,
1928 crate::common::RW,
1929 >::from_register(self, 0)
1930 }
1931
1932 #[doc = "RSPCK Delay Setting Enable"]
1933 #[inline(always)]
1934 pub fn sckden(
1935 self,
1936 ) -> crate::common::RegisterField<
1937 15,
1938 0x1,
1939 1,
1940 0,
1941 spcmd0::Sckden,
1942 spcmd0::Sckden,
1943 Spcmd0_SPEC,
1944 crate::common::RW,
1945 > {
1946 crate::common::RegisterField::<
1947 15,
1948 0x1,
1949 1,
1950 0,
1951 spcmd0::Sckden,
1952 spcmd0::Sckden,
1953 Spcmd0_SPEC,
1954 crate::common::RW,
1955 >::from_register(self, 0)
1956 }
1957}
1958impl ::core::default::Default for Spcmd0 {
1959 #[inline(always)]
1960 fn default() -> Spcmd0 {
1961 <crate::RegValueT<Spcmd0_SPEC> as RegisterValue<_>>::new(1805)
1962 }
1963}
1964pub mod spcmd0 {
1965
1966 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1967 pub struct Cpha_SPEC;
1968 pub type Cpha = crate::EnumBitfieldStruct<u8, Cpha_SPEC>;
1969 impl Cpha {
1970 #[doc = "Select data sampling on leading edge, data change on trailing edge"]
1971 pub const _0: Self = Self::new(0);
1972
1973 #[doc = "Select data change on leading edge, data sampling on trailing edge"]
1974 pub const _1: Self = Self::new(1);
1975 }
1976 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1977 pub struct Cpol_SPEC;
1978 pub type Cpol = crate::EnumBitfieldStruct<u8, Cpol_SPEC>;
1979 impl Cpol {
1980 #[doc = "Set RSPCK low during idle"]
1981 pub const _0: Self = Self::new(0);
1982
1983 #[doc = "Set RSPCK high during idle"]
1984 pub const _1: Self = Self::new(1);
1985 }
1986 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1987 pub struct Brdv_SPEC;
1988 pub type Brdv = crate::EnumBitfieldStruct<u8, Brdv_SPEC>;
1989 impl Brdv {
1990 #[doc = "Base bit rate"]
1991 pub const _00: Self = Self::new(0);
1992
1993 #[doc = "Base bit rate divided by 2"]
1994 pub const _01: Self = Self::new(1);
1995
1996 #[doc = "Base bit rate divided by 4"]
1997 pub const _10: Self = Self::new(2);
1998
1999 #[doc = "Base bit rate divided by 8"]
2000 pub const _11: Self = Self::new(3);
2001 }
2002 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2003 pub struct Ssla_SPEC;
2004 pub type Ssla = crate::EnumBitfieldStruct<u8, Ssla_SPEC>;
2005 impl Ssla {
2006 #[doc = "SSL0"]
2007 pub const _000: Self = Self::new(0);
2008
2009 #[doc = "SSL1"]
2010 pub const _001: Self = Self::new(1);
2011
2012 #[doc = "SSL2"]
2013 pub const _010: Self = Self::new(2);
2014
2015 #[doc = "SSL3"]
2016 pub const _011: Self = Self::new(3);
2017 }
2018 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2019 pub struct Spb_SPEC;
2020 pub type Spb = crate::EnumBitfieldStruct<u8, Spb_SPEC>;
2021 impl Spb {
2022 #[doc = "20 bits"]
2023 pub const _0_X_0: Self = Self::new(0);
2024
2025 #[doc = "24 bits"]
2026 pub const _0_X_1: Self = Self::new(1);
2027
2028 #[doc = "32 bits"]
2029 pub const _0_X_2: Self = Self::new(2);
2030
2031 #[doc = "32 bits"]
2032 pub const _0_X_3: Self = Self::new(3);
2033
2034 #[doc = "9 bits"]
2035 pub const _0_X_8: Self = Self::new(8);
2036
2037 #[doc = "10 bits"]
2038 pub const _0_X_9: Self = Self::new(9);
2039
2040 #[doc = "11 bits"]
2041 pub const _0_X_A: Self = Self::new(10);
2042
2043 #[doc = "12 bits"]
2044 pub const _0_X_B: Self = Self::new(11);
2045
2046 #[doc = "13 bits"]
2047 pub const _0_X_C: Self = Self::new(12);
2048
2049 #[doc = "14 bits"]
2050 pub const _0_X_D: Self = Self::new(13);
2051
2052 #[doc = "15 bits"]
2053 pub const _0_X_E: Self = Self::new(14);
2054
2055 #[doc = "16 bits"]
2056 pub const _0_X_F: Self = Self::new(15);
2057 }
2058 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2059 pub struct Lsbf_SPEC;
2060 pub type Lsbf = crate::EnumBitfieldStruct<u8, Lsbf_SPEC>;
2061 impl Lsbf {
2062 #[doc = "MSB-first"]
2063 pub const _0: Self = Self::new(0);
2064
2065 #[doc = "LSB-first"]
2066 pub const _1: Self = Self::new(1);
2067 }
2068 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2069 pub struct Spnden_SPEC;
2070 pub type Spnden = crate::EnumBitfieldStruct<u8, Spnden_SPEC>;
2071 impl Spnden {
2072 #[doc = "Select next-access delay of 1 RSPCK + 2 PCLKB"]
2073 pub const _0: Self = Self::new(0);
2074
2075 #[doc = "Select next-access delay equal to the setting in the SPI Next-Access Delay Register (SPND)"]
2076 pub const _1: Self = Self::new(1);
2077 }
2078 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2079 pub struct Slnden_SPEC;
2080 pub type Slnden = crate::EnumBitfieldStruct<u8, Slnden_SPEC>;
2081 impl Slnden {
2082 #[doc = "Select SSL negation delay of 1 RSPCK"]
2083 pub const _0: Self = Self::new(0);
2084
2085 #[doc = "Select SSL negation delay equal to the setting in the SPI Slave Select Negation Delay Register (SSLND)"]
2086 pub const _1: Self = Self::new(1);
2087 }
2088 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2089 pub struct Sckden_SPEC;
2090 pub type Sckden = crate::EnumBitfieldStruct<u8, Sckden_SPEC>;
2091 impl Sckden {
2092 #[doc = "Select RSPCK delay of 1 RSPCK"]
2093 pub const _0: Self = Self::new(0);
2094
2095 #[doc = "Select RSPCK delay equal to the setting in the SPI Clock Delay Register (SPCKD)"]
2096 pub const _1: Self = Self::new(1);
2097 }
2098}