ra2a2_pac/
sdadc24_b.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.02, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:01:00 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"24-Bit Sigma-Delta A/D Converter B"]
28unsafe impl ::core::marker::Send for super::Sdadc24B {}
29unsafe impl ::core::marker::Sync for super::Sdadc24B {}
30impl super::Sdadc24B {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Sigma-Delta A/D Clock Control Register"]
38    #[inline(always)]
39    pub const fn sdadccr(
40        &self,
41    ) -> &'static crate::common::Reg<self::Sdadccr_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Sdadccr_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "Sigma-Delta A/D Mode Register"]
50    #[inline(always)]
51    pub const fn sdadmr(
52        &self,
53    ) -> &'static crate::common::Reg<self::Sdadmr_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Sdadmr_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(4usize),
57            )
58        }
59    }
60
61    #[doc = "Sigma-Delta A/D Reset Register"]
62    #[inline(always)]
63    pub const fn sdadrr(
64        &self,
65    ) -> &'static crate::common::Reg<self::Sdadrr_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Sdadrr_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(12usize),
69            )
70        }
71    }
72
73    #[doc = "Sigma-Delta A/D Gain Control Register"]
74    #[inline(always)]
75    pub const fn sdadgcr(
76        &self,
77    ) -> &'static crate::common::Reg<self::Sdadgcr_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Sdadgcr_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(16usize),
81            )
82        }
83    }
84
85    #[doc = "Sigma-Delta A/D HPF Control Register"]
86    #[inline(always)]
87    pub const fn sdadhpfcr(
88        &self,
89    ) -> &'static crate::common::Reg<self::Sdadhpfcr_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Sdadhpfcr_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(24usize),
93            )
94        }
95    }
96
97    #[doc = "Sigma-Delta A/D Interrupt Control Register"]
98    #[inline(always)]
99    pub const fn sdadicr(
100        &self,
101    ) -> &'static crate::common::Reg<self::Sdadicr_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Sdadicr_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(32usize),
105            )
106        }
107    }
108
109    #[doc = "Sigma-Delta A/D Interrupt Clear Register"]
110    #[inline(always)]
111    pub const fn sdadiclr(
112        &self,
113    ) -> &'static crate::common::Reg<self::Sdadiclr_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::Sdadiclr_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(36usize),
117            )
118        }
119    }
120
121    #[doc = "Sigma-Delta A/D Interrupt Status Register"]
122    #[inline(always)]
123    pub const fn sdadisr(
124        &self,
125    ) -> &'static crate::common::Reg<self::Sdadisr_SPEC, crate::common::RW> {
126        unsafe {
127            crate::common::Reg::<self::Sdadisr_SPEC, crate::common::RW>::from_ptr(
128                self._svd2pac_as_ptr().add(40usize),
129            )
130        }
131    }
132
133    #[doc = "Sigma-Delta A/D Phase Control Register %s"]
134    #[inline(always)]
135    pub const fn sdadphcr(
136        &self,
137    ) -> &'static crate::common::ClusterRegisterArray<
138        crate::common::Reg<self::Sdadphcr_SPEC, crate::common::RW>,
139        8,
140        0x4,
141    > {
142        unsafe {
143            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x40usize))
144        }
145    }
146    #[inline(always)]
147    pub const fn sdadphcr0(
148        &self,
149    ) -> &'static crate::common::Reg<self::Sdadphcr_SPEC, crate::common::RW> {
150        unsafe {
151            crate::common::Reg::<self::Sdadphcr_SPEC, crate::common::RW>::from_ptr(
152                self._svd2pac_as_ptr().add(0x40usize),
153            )
154        }
155    }
156    #[inline(always)]
157    pub const fn sdadphcr1(
158        &self,
159    ) -> &'static crate::common::Reg<self::Sdadphcr_SPEC, crate::common::RW> {
160        unsafe {
161            crate::common::Reg::<self::Sdadphcr_SPEC, crate::common::RW>::from_ptr(
162                self._svd2pac_as_ptr().add(0x44usize),
163            )
164        }
165    }
166    #[inline(always)]
167    pub const fn sdadphcr2(
168        &self,
169    ) -> &'static crate::common::Reg<self::Sdadphcr_SPEC, crate::common::RW> {
170        unsafe {
171            crate::common::Reg::<self::Sdadphcr_SPEC, crate::common::RW>::from_ptr(
172                self._svd2pac_as_ptr().add(0x48usize),
173            )
174        }
175    }
176    #[inline(always)]
177    pub const fn sdadphcr3(
178        &self,
179    ) -> &'static crate::common::Reg<self::Sdadphcr_SPEC, crate::common::RW> {
180        unsafe {
181            crate::common::Reg::<self::Sdadphcr_SPEC, crate::common::RW>::from_ptr(
182                self._svd2pac_as_ptr().add(0x4cusize),
183            )
184        }
185    }
186    #[inline(always)]
187    pub const fn sdadphcr4(
188        &self,
189    ) -> &'static crate::common::Reg<self::Sdadphcr_SPEC, crate::common::RW> {
190        unsafe {
191            crate::common::Reg::<self::Sdadphcr_SPEC, crate::common::RW>::from_ptr(
192                self._svd2pac_as_ptr().add(0x50usize),
193            )
194        }
195    }
196    #[inline(always)]
197    pub const fn sdadphcr5(
198        &self,
199    ) -> &'static crate::common::Reg<self::Sdadphcr_SPEC, crate::common::RW> {
200        unsafe {
201            crate::common::Reg::<self::Sdadphcr_SPEC, crate::common::RW>::from_ptr(
202                self._svd2pac_as_ptr().add(0x54usize),
203            )
204        }
205    }
206    #[inline(always)]
207    pub const fn sdadphcr6(
208        &self,
209    ) -> &'static crate::common::Reg<self::Sdadphcr_SPEC, crate::common::RW> {
210        unsafe {
211            crate::common::Reg::<self::Sdadphcr_SPEC, crate::common::RW>::from_ptr(
212                self._svd2pac_as_ptr().add(0x58usize),
213            )
214        }
215    }
216    #[inline(always)]
217    pub const fn sdadphcr7(
218        &self,
219    ) -> &'static crate::common::Reg<self::Sdadphcr_SPEC, crate::common::RW> {
220        unsafe {
221            crate::common::Reg::<self::Sdadphcr_SPEC, crate::common::RW>::from_ptr(
222                self._svd2pac_as_ptr().add(0x5cusize),
223            )
224        }
225    }
226
227    #[doc = "Sigma-Delta A/D Conversion Result Register %s Type 1"]
228    #[inline(always)]
229    pub const fn sdadcr(
230        &self,
231    ) -> &'static crate::common::ClusterRegisterArray<
232        crate::common::Reg<self::Sdadcr_SPEC, crate::common::R>,
233        7,
234        0x4,
235    > {
236        unsafe {
237            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x80usize))
238        }
239    }
240    #[inline(always)]
241    pub const fn sdadcr0(
242        &self,
243    ) -> &'static crate::common::Reg<self::Sdadcr_SPEC, crate::common::R> {
244        unsafe {
245            crate::common::Reg::<self::Sdadcr_SPEC, crate::common::R>::from_ptr(
246                self._svd2pac_as_ptr().add(0x80usize),
247            )
248        }
249    }
250    #[inline(always)]
251    pub const fn sdadcr1(
252        &self,
253    ) -> &'static crate::common::Reg<self::Sdadcr_SPEC, crate::common::R> {
254        unsafe {
255            crate::common::Reg::<self::Sdadcr_SPEC, crate::common::R>::from_ptr(
256                self._svd2pac_as_ptr().add(0x84usize),
257            )
258        }
259    }
260    #[inline(always)]
261    pub const fn sdadcr2(
262        &self,
263    ) -> &'static crate::common::Reg<self::Sdadcr_SPEC, crate::common::R> {
264        unsafe {
265            crate::common::Reg::<self::Sdadcr_SPEC, crate::common::R>::from_ptr(
266                self._svd2pac_as_ptr().add(0x88usize),
267            )
268        }
269    }
270    #[inline(always)]
271    pub const fn sdadcr3(
272        &self,
273    ) -> &'static crate::common::Reg<self::Sdadcr_SPEC, crate::common::R> {
274        unsafe {
275            crate::common::Reg::<self::Sdadcr_SPEC, crate::common::R>::from_ptr(
276                self._svd2pac_as_ptr().add(0x8cusize),
277            )
278        }
279    }
280    #[inline(always)]
281    pub const fn sdadcr4(
282        &self,
283    ) -> &'static crate::common::Reg<self::Sdadcr_SPEC, crate::common::R> {
284        unsafe {
285            crate::common::Reg::<self::Sdadcr_SPEC, crate::common::R>::from_ptr(
286                self._svd2pac_as_ptr().add(0x90usize),
287            )
288        }
289    }
290    #[inline(always)]
291    pub const fn sdadcr5(
292        &self,
293    ) -> &'static crate::common::Reg<self::Sdadcr_SPEC, crate::common::R> {
294        unsafe {
295            crate::common::Reg::<self::Sdadcr_SPEC, crate::common::R>::from_ptr(
296                self._svd2pac_as_ptr().add(0x94usize),
297            )
298        }
299    }
300    #[inline(always)]
301    pub const fn sdadcr6(
302        &self,
303    ) -> &'static crate::common::Reg<self::Sdadcr_SPEC, crate::common::R> {
304        unsafe {
305            crate::common::Reg::<self::Sdadcr_SPEC, crate::common::R>::from_ptr(
306                self._svd2pac_as_ptr().add(0x98usize),
307            )
308        }
309    }
310
311    #[doc = "Sigma-Delta A/D Conversion Result Register %s Type 2"]
312    #[inline(always)]
313    pub const fn sdadcrt2(
314        &self,
315    ) -> &'static crate::common::ClusterRegisterArray<
316        crate::common::Reg<self::Sdadcrt2_SPEC, crate::common::R>,
317        4,
318        0x4,
319    > {
320        unsafe {
321            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xa0usize))
322        }
323    }
324    #[inline(always)]
325    pub const fn sdadcr0t2(
326        &self,
327    ) -> &'static crate::common::Reg<self::Sdadcrt2_SPEC, crate::common::R> {
328        unsafe {
329            crate::common::Reg::<self::Sdadcrt2_SPEC, crate::common::R>::from_ptr(
330                self._svd2pac_as_ptr().add(0xa0usize),
331            )
332        }
333    }
334    #[inline(always)]
335    pub const fn sdadcr1t2(
336        &self,
337    ) -> &'static crate::common::Reg<self::Sdadcrt2_SPEC, crate::common::R> {
338        unsafe {
339            crate::common::Reg::<self::Sdadcrt2_SPEC, crate::common::R>::from_ptr(
340                self._svd2pac_as_ptr().add(0xa4usize),
341            )
342        }
343    }
344    #[inline(always)]
345    pub const fn sdadcr2t2(
346        &self,
347    ) -> &'static crate::common::Reg<self::Sdadcrt2_SPEC, crate::common::R> {
348        unsafe {
349            crate::common::Reg::<self::Sdadcrt2_SPEC, crate::common::R>::from_ptr(
350                self._svd2pac_as_ptr().add(0xa8usize),
351            )
352        }
353    }
354    #[inline(always)]
355    pub const fn sdadcr3t2(
356        &self,
357    ) -> &'static crate::common::Reg<self::Sdadcrt2_SPEC, crate::common::R> {
358        unsafe {
359            crate::common::Reg::<self::Sdadcrt2_SPEC, crate::common::R>::from_ptr(
360                self._svd2pac_as_ptr().add(0xacusize),
361            )
362        }
363    }
364
365    #[doc = "Sigma-Delta A/D Conversion Result Register (LPF) %s Type 1"]
366    #[inline(always)]
367    pub const fn sdadcrlpf(
368        &self,
369    ) -> &'static crate::common::ClusterRegisterArray<
370        crate::common::Reg<self::Sdadcrlpf_SPEC, crate::common::R>,
371        7,
372        0x4,
373    > {
374        unsafe {
375            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xc0usize))
376        }
377    }
378    #[inline(always)]
379    pub const fn sdadcrlpf0(
380        &self,
381    ) -> &'static crate::common::Reg<self::Sdadcrlpf_SPEC, crate::common::R> {
382        unsafe {
383            crate::common::Reg::<self::Sdadcrlpf_SPEC, crate::common::R>::from_ptr(
384                self._svd2pac_as_ptr().add(0xc0usize),
385            )
386        }
387    }
388    #[inline(always)]
389    pub const fn sdadcrlpf1(
390        &self,
391    ) -> &'static crate::common::Reg<self::Sdadcrlpf_SPEC, crate::common::R> {
392        unsafe {
393            crate::common::Reg::<self::Sdadcrlpf_SPEC, crate::common::R>::from_ptr(
394                self._svd2pac_as_ptr().add(0xc4usize),
395            )
396        }
397    }
398    #[inline(always)]
399    pub const fn sdadcrlpf2(
400        &self,
401    ) -> &'static crate::common::Reg<self::Sdadcrlpf_SPEC, crate::common::R> {
402        unsafe {
403            crate::common::Reg::<self::Sdadcrlpf_SPEC, crate::common::R>::from_ptr(
404                self._svd2pac_as_ptr().add(0xc8usize),
405            )
406        }
407    }
408    #[inline(always)]
409    pub const fn sdadcrlpf3(
410        &self,
411    ) -> &'static crate::common::Reg<self::Sdadcrlpf_SPEC, crate::common::R> {
412        unsafe {
413            crate::common::Reg::<self::Sdadcrlpf_SPEC, crate::common::R>::from_ptr(
414                self._svd2pac_as_ptr().add(0xccusize),
415            )
416        }
417    }
418    #[inline(always)]
419    pub const fn sdadcrlpf4(
420        &self,
421    ) -> &'static crate::common::Reg<self::Sdadcrlpf_SPEC, crate::common::R> {
422        unsafe {
423            crate::common::Reg::<self::Sdadcrlpf_SPEC, crate::common::R>::from_ptr(
424                self._svd2pac_as_ptr().add(0xd0usize),
425            )
426        }
427    }
428    #[inline(always)]
429    pub const fn sdadcrlpf5(
430        &self,
431    ) -> &'static crate::common::Reg<self::Sdadcrlpf_SPEC, crate::common::R> {
432        unsafe {
433            crate::common::Reg::<self::Sdadcrlpf_SPEC, crate::common::R>::from_ptr(
434                self._svd2pac_as_ptr().add(0xd4usize),
435            )
436        }
437    }
438    #[inline(always)]
439    pub const fn sdadcrlpf6(
440        &self,
441    ) -> &'static crate::common::Reg<self::Sdadcrlpf_SPEC, crate::common::R> {
442        unsafe {
443            crate::common::Reg::<self::Sdadcrlpf_SPEC, crate::common::R>::from_ptr(
444                self._svd2pac_as_ptr().add(0xd8usize),
445            )
446        }
447    }
448
449    #[doc = "Sigma-Delta A/D Conversion Result Register (LPF) %s Type 2"]
450    #[inline(always)]
451    pub const fn sdadcrlpft2(
452        &self,
453    ) -> &'static crate::common::ClusterRegisterArray<
454        crate::common::Reg<self::Sdadcrlpft2_SPEC, crate::common::R>,
455        4,
456        0x4,
457    > {
458        unsafe {
459            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xe0usize))
460        }
461    }
462    #[inline(always)]
463    pub const fn sdadcrlpf0t2(
464        &self,
465    ) -> &'static crate::common::Reg<self::Sdadcrlpft2_SPEC, crate::common::R> {
466        unsafe {
467            crate::common::Reg::<self::Sdadcrlpft2_SPEC, crate::common::R>::from_ptr(
468                self._svd2pac_as_ptr().add(0xe0usize),
469            )
470        }
471    }
472    #[inline(always)]
473    pub const fn sdadcrlpf1t2(
474        &self,
475    ) -> &'static crate::common::Reg<self::Sdadcrlpft2_SPEC, crate::common::R> {
476        unsafe {
477            crate::common::Reg::<self::Sdadcrlpft2_SPEC, crate::common::R>::from_ptr(
478                self._svd2pac_as_ptr().add(0xe4usize),
479            )
480        }
481    }
482    #[inline(always)]
483    pub const fn sdadcrlpf2t2(
484        &self,
485    ) -> &'static crate::common::Reg<self::Sdadcrlpft2_SPEC, crate::common::R> {
486        unsafe {
487            crate::common::Reg::<self::Sdadcrlpft2_SPEC, crate::common::R>::from_ptr(
488                self._svd2pac_as_ptr().add(0xe8usize),
489            )
490        }
491    }
492    #[inline(always)]
493    pub const fn sdadcrlpf3t2(
494        &self,
495    ) -> &'static crate::common::Reg<self::Sdadcrlpft2_SPEC, crate::common::R> {
496        unsafe {
497            crate::common::Reg::<self::Sdadcrlpft2_SPEC, crate::common::R>::from_ptr(
498                self._svd2pac_as_ptr().add(0xecusize),
499            )
500        }
501    }
502}
503#[doc(hidden)]
504#[derive(Copy, Clone, Eq, PartialEq)]
505pub struct Sdadccr_SPEC;
506impl crate::sealed::RegSpec for Sdadccr_SPEC {
507    type DataType = u8;
508}
509
510#[doc = "Sigma-Delta A/D Clock Control Register"]
511pub type Sdadccr = crate::RegValueT<Sdadccr_SPEC>;
512
513impl Sdadccr {
514    #[doc = "Operating clock of the digital block"]
515    #[inline(always)]
516    pub fn ck(
517        self,
518    ) -> crate::common::RegisterField<
519        0,
520        0x3,
521        1,
522        0,
523        sdadccr::Ck,
524        sdadccr::Ck,
525        Sdadccr_SPEC,
526        crate::common::RW,
527    > {
528        crate::common::RegisterField::<
529            0,
530            0x3,
531            1,
532            0,
533            sdadccr::Ck,
534            sdadccr::Ck,
535            Sdadccr_SPEC,
536            crate::common::RW,
537        >::from_register(self, 0)
538    }
539}
540impl ::core::default::Default for Sdadccr {
541    #[inline(always)]
542    fn default() -> Sdadccr {
543        <crate::RegValueT<Sdadccr_SPEC> as RegisterValue<_>>::new(0)
544    }
545}
546pub mod sdadccr {
547
548    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
549    pub struct Ck_SPEC;
550    pub type Ck = crate::EnumBitfieldStruct<u8, Ck_SPEC>;
551    impl Ck {
552        #[doc = "Disabled"]
553        pub const _00: Self = Self::new(0);
554
555        #[doc = "Set when SDADCCLK frequency is 12.0 MHz or 12.8 MHz"]
556        pub const _10: Self = Self::new(2);
557
558        #[doc = "Set when SDADCCLK frequency is 16.0 MHz"]
559        pub const _11: Self = Self::new(3);
560    }
561}
562#[doc(hidden)]
563#[derive(Copy, Clone, Eq, PartialEq)]
564pub struct Sdadmr_SPEC;
565impl crate::sealed::RegSpec for Sdadmr_SPEC {
566    type DataType = u32;
567}
568
569#[doc = "Sigma-Delta A/D Mode Register"]
570pub type Sdadmr = crate::RegValueT<Sdadmr_SPEC>;
571
572impl Sdadmr {
573    #[doc = "Sigma-Delta A/D converter operation enable for channel n"]
574    #[inline(always)]
575    pub fn ce0(
576        self,
577    ) -> crate::common::RegisterField<
578        0,
579        0x1,
580        1,
581        0,
582        sdadmr::Ce0,
583        sdadmr::Ce0,
584        Sdadmr_SPEC,
585        crate::common::RW,
586    > {
587        crate::common::RegisterField::<
588            0,
589            0x1,
590            1,
591            0,
592            sdadmr::Ce0,
593            sdadmr::Ce0,
594            Sdadmr_SPEC,
595            crate::common::RW,
596        >::from_register(self, 0)
597    }
598
599    #[doc = "Sigma-Delta A/D converter operation enable for channel n"]
600    #[inline(always)]
601    pub fn ce1(
602        self,
603    ) -> crate::common::RegisterField<
604        1,
605        0x1,
606        1,
607        0,
608        sdadmr::Ce1,
609        sdadmr::Ce1,
610        Sdadmr_SPEC,
611        crate::common::RW,
612    > {
613        crate::common::RegisterField::<
614            1,
615            0x1,
616            1,
617            0,
618            sdadmr::Ce1,
619            sdadmr::Ce1,
620            Sdadmr_SPEC,
621            crate::common::RW,
622        >::from_register(self, 0)
623    }
624
625    #[doc = "Sigma-Delta A/D converter operation enable for channel n"]
626    #[inline(always)]
627    pub fn ce2(
628        self,
629    ) -> crate::common::RegisterField<
630        2,
631        0x1,
632        1,
633        0,
634        sdadmr::Ce2,
635        sdadmr::Ce2,
636        Sdadmr_SPEC,
637        crate::common::RW,
638    > {
639        crate::common::RegisterField::<
640            2,
641            0x1,
642            1,
643            0,
644            sdadmr::Ce2,
645            sdadmr::Ce2,
646            Sdadmr_SPEC,
647            crate::common::RW,
648        >::from_register(self, 0)
649    }
650
651    #[doc = "Sigma-Delta A/D converter operation enable for channel n"]
652    #[inline(always)]
653    pub fn ce3(
654        self,
655    ) -> crate::common::RegisterField<
656        3,
657        0x1,
658        1,
659        0,
660        sdadmr::Ce3,
661        sdadmr::Ce3,
662        Sdadmr_SPEC,
663        crate::common::RW,
664    > {
665        crate::common::RegisterField::<
666            3,
667            0x1,
668            1,
669            0,
670            sdadmr::Ce3,
671            sdadmr::Ce3,
672            Sdadmr_SPEC,
673            crate::common::RW,
674        >::from_register(self, 0)
675    }
676
677    #[doc = "Sigma-Delta A/D converter operation enable for channel n"]
678    #[inline(always)]
679    pub fn ce4(
680        self,
681    ) -> crate::common::RegisterField<
682        4,
683        0x1,
684        1,
685        0,
686        sdadmr::Ce4,
687        sdadmr::Ce4,
688        Sdadmr_SPEC,
689        crate::common::RW,
690    > {
691        crate::common::RegisterField::<
692            4,
693            0x1,
694            1,
695            0,
696            sdadmr::Ce4,
697            sdadmr::Ce4,
698            Sdadmr_SPEC,
699            crate::common::RW,
700        >::from_register(self, 0)
701    }
702
703    #[doc = "Sigma-Delta A/D converter operation enable for channel n"]
704    #[inline(always)]
705    pub fn ce5(
706        self,
707    ) -> crate::common::RegisterField<
708        5,
709        0x1,
710        1,
711        0,
712        sdadmr::Ce5,
713        sdadmr::Ce5,
714        Sdadmr_SPEC,
715        crate::common::RW,
716    > {
717        crate::common::RegisterField::<
718            5,
719            0x1,
720            1,
721            0,
722            sdadmr::Ce5,
723            sdadmr::Ce5,
724            Sdadmr_SPEC,
725            crate::common::RW,
726        >::from_register(self, 0)
727    }
728
729    #[doc = "Sigma-Delta A/D converter operation enable for channel n"]
730    #[inline(always)]
731    pub fn ce6(
732        self,
733    ) -> crate::common::RegisterField<
734        6,
735        0x1,
736        1,
737        0,
738        sdadmr::Ce6,
739        sdadmr::Ce6,
740        Sdadmr_SPEC,
741        crate::common::RW,
742    > {
743        crate::common::RegisterField::<
744            6,
745            0x1,
746            1,
747            0,
748            sdadmr::Ce6,
749            sdadmr::Ce6,
750            Sdadmr_SPEC,
751            crate::common::RW,
752        >::from_register(self, 0)
753    }
754
755    #[doc = "Sigma-Delta A/D converter power-on control for channel n"]
756    #[inline(always)]
757    pub fn pon0(
758        self,
759    ) -> crate::common::RegisterField<
760        16,
761        0x1,
762        1,
763        0,
764        sdadmr::Pon0,
765        sdadmr::Pon0,
766        Sdadmr_SPEC,
767        crate::common::RW,
768    > {
769        crate::common::RegisterField::<
770            16,
771            0x1,
772            1,
773            0,
774            sdadmr::Pon0,
775            sdadmr::Pon0,
776            Sdadmr_SPEC,
777            crate::common::RW,
778        >::from_register(self, 0)
779    }
780
781    #[doc = "Sigma-Delta A/D converter power-on control for channel n"]
782    #[inline(always)]
783    pub fn pon1(
784        self,
785    ) -> crate::common::RegisterField<
786        17,
787        0x1,
788        1,
789        0,
790        sdadmr::Pon1,
791        sdadmr::Pon1,
792        Sdadmr_SPEC,
793        crate::common::RW,
794    > {
795        crate::common::RegisterField::<
796            17,
797            0x1,
798            1,
799            0,
800            sdadmr::Pon1,
801            sdadmr::Pon1,
802            Sdadmr_SPEC,
803            crate::common::RW,
804        >::from_register(self, 0)
805    }
806
807    #[doc = "Sigma-Delta A/D converter power-on control for channel n"]
808    #[inline(always)]
809    pub fn pon2(
810        self,
811    ) -> crate::common::RegisterField<
812        18,
813        0x1,
814        1,
815        0,
816        sdadmr::Pon2,
817        sdadmr::Pon2,
818        Sdadmr_SPEC,
819        crate::common::RW,
820    > {
821        crate::common::RegisterField::<
822            18,
823            0x1,
824            1,
825            0,
826            sdadmr::Pon2,
827            sdadmr::Pon2,
828            Sdadmr_SPEC,
829            crate::common::RW,
830        >::from_register(self, 0)
831    }
832
833    #[doc = "Sigma-Delta A/D converter power-on control for channel n"]
834    #[inline(always)]
835    pub fn pon3(
836        self,
837    ) -> crate::common::RegisterField<
838        19,
839        0x1,
840        1,
841        0,
842        sdadmr::Pon3,
843        sdadmr::Pon3,
844        Sdadmr_SPEC,
845        crate::common::RW,
846    > {
847        crate::common::RegisterField::<
848            19,
849            0x1,
850            1,
851            0,
852            sdadmr::Pon3,
853            sdadmr::Pon3,
854            Sdadmr_SPEC,
855            crate::common::RW,
856        >::from_register(self, 0)
857    }
858
859    #[doc = "Sigma-Delta A/D converter power-on control for channel n"]
860    #[inline(always)]
861    pub fn pon4(
862        self,
863    ) -> crate::common::RegisterField<
864        20,
865        0x1,
866        1,
867        0,
868        sdadmr::Pon4,
869        sdadmr::Pon4,
870        Sdadmr_SPEC,
871        crate::common::RW,
872    > {
873        crate::common::RegisterField::<
874            20,
875            0x1,
876            1,
877            0,
878            sdadmr::Pon4,
879            sdadmr::Pon4,
880            Sdadmr_SPEC,
881            crate::common::RW,
882        >::from_register(self, 0)
883    }
884
885    #[doc = "Sigma-Delta A/D converter power-on control for channel n"]
886    #[inline(always)]
887    pub fn pon5(
888        self,
889    ) -> crate::common::RegisterField<
890        21,
891        0x1,
892        1,
893        0,
894        sdadmr::Pon5,
895        sdadmr::Pon5,
896        Sdadmr_SPEC,
897        crate::common::RW,
898    > {
899        crate::common::RegisterField::<
900            21,
901            0x1,
902            1,
903            0,
904            sdadmr::Pon5,
905            sdadmr::Pon5,
906            Sdadmr_SPEC,
907            crate::common::RW,
908        >::from_register(self, 0)
909    }
910
911    #[doc = "Sigma-Delta A/D converter power-on control for channel n"]
912    #[inline(always)]
913    pub fn pon6(
914        self,
915    ) -> crate::common::RegisterField<
916        22,
917        0x1,
918        1,
919        0,
920        sdadmr::Pon6,
921        sdadmr::Pon6,
922        Sdadmr_SPEC,
923        crate::common::RW,
924    > {
925        crate::common::RegisterField::<
926            22,
927            0x1,
928            1,
929            0,
930            sdadmr::Pon6,
931            sdadmr::Pon6,
932            Sdadmr_SPEC,
933            crate::common::RW,
934        >::from_register(self, 0)
935    }
936
937    #[doc = "Sampling mode select"]
938    #[inline(always)]
939    pub fn fr(
940        self,
941    ) -> crate::common::RegisterField<
942        28,
943        0x3,
944        1,
945        0,
946        sdadmr::Fr,
947        sdadmr::Fr,
948        Sdadmr_SPEC,
949        crate::common::RW,
950    > {
951        crate::common::RegisterField::<
952            28,
953            0x3,
954            1,
955            0,
956            sdadmr::Fr,
957            sdadmr::Fr,
958            Sdadmr_SPEC,
959            crate::common::RW,
960        >::from_register(self, 0)
961    }
962
963    #[doc = "Resolution of A/D conversion result reading"]
964    #[inline(always)]
965    pub fn typ(
966        self,
967    ) -> crate::common::RegisterField<
968        30,
969        0x1,
970        1,
971        0,
972        sdadmr::Typ,
973        sdadmr::Typ,
974        Sdadmr_SPEC,
975        crate::common::RW,
976    > {
977        crate::common::RegisterField::<
978            30,
979            0x1,
980            1,
981            0,
982            sdadmr::Typ,
983            sdadmr::Typ,
984            Sdadmr_SPEC,
985            crate::common::RW,
986        >::from_register(self, 0)
987    }
988}
989impl ::core::default::Default for Sdadmr {
990    #[inline(always)]
991    fn default() -> Sdadmr {
992        <crate::RegValueT<Sdadmr_SPEC> as RegisterValue<_>>::new(0)
993    }
994}
995pub mod sdadmr {
996
997    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
998    pub struct Ce0_SPEC;
999    pub type Ce0 = crate::EnumBitfieldStruct<u8, Ce0_SPEC>;
1000    impl Ce0 {
1001        #[doc = "Electric charge reset"]
1002        pub const _0: Self = Self::new(0);
1003
1004        #[doc = "Normal operation"]
1005        pub const _1: Self = Self::new(1);
1006    }
1007    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1008    pub struct Ce1_SPEC;
1009    pub type Ce1 = crate::EnumBitfieldStruct<u8, Ce1_SPEC>;
1010    impl Ce1 {
1011        #[doc = "Electric charge reset"]
1012        pub const _0: Self = Self::new(0);
1013
1014        #[doc = "Normal operation"]
1015        pub const _1: Self = Self::new(1);
1016    }
1017    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1018    pub struct Ce2_SPEC;
1019    pub type Ce2 = crate::EnumBitfieldStruct<u8, Ce2_SPEC>;
1020    impl Ce2 {
1021        #[doc = "Electric charge reset"]
1022        pub const _0: Self = Self::new(0);
1023
1024        #[doc = "Normal operation"]
1025        pub const _1: Self = Self::new(1);
1026    }
1027    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1028    pub struct Ce3_SPEC;
1029    pub type Ce3 = crate::EnumBitfieldStruct<u8, Ce3_SPEC>;
1030    impl Ce3 {
1031        #[doc = "Electric charge reset"]
1032        pub const _0: Self = Self::new(0);
1033
1034        #[doc = "Normal operation"]
1035        pub const _1: Self = Self::new(1);
1036    }
1037    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1038    pub struct Ce4_SPEC;
1039    pub type Ce4 = crate::EnumBitfieldStruct<u8, Ce4_SPEC>;
1040    impl Ce4 {
1041        #[doc = "Electric charge reset"]
1042        pub const _0: Self = Self::new(0);
1043
1044        #[doc = "Normal operation"]
1045        pub const _1: Self = Self::new(1);
1046    }
1047    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1048    pub struct Ce5_SPEC;
1049    pub type Ce5 = crate::EnumBitfieldStruct<u8, Ce5_SPEC>;
1050    impl Ce5 {
1051        #[doc = "Electric charge reset"]
1052        pub const _0: Self = Self::new(0);
1053
1054        #[doc = "Normal operation"]
1055        pub const _1: Self = Self::new(1);
1056    }
1057    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1058    pub struct Ce6_SPEC;
1059    pub type Ce6 = crate::EnumBitfieldStruct<u8, Ce6_SPEC>;
1060    impl Ce6 {
1061        #[doc = "Electric charge reset"]
1062        pub const _0: Self = Self::new(0);
1063
1064        #[doc = "Normal operation"]
1065        pub const _1: Self = Self::new(1);
1066    }
1067    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1068    pub struct Pon0_SPEC;
1069    pub type Pon0 = crate::EnumBitfieldStruct<u8, Pon0_SPEC>;
1070    impl Pon0 {
1071        #[doc = "Power off"]
1072        pub const _0: Self = Self::new(0);
1073
1074        #[doc = "Power on"]
1075        pub const _1: Self = Self::new(1);
1076    }
1077    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1078    pub struct Pon1_SPEC;
1079    pub type Pon1 = crate::EnumBitfieldStruct<u8, Pon1_SPEC>;
1080    impl Pon1 {
1081        #[doc = "Power off"]
1082        pub const _0: Self = Self::new(0);
1083
1084        #[doc = "Power on"]
1085        pub const _1: Self = Self::new(1);
1086    }
1087    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1088    pub struct Pon2_SPEC;
1089    pub type Pon2 = crate::EnumBitfieldStruct<u8, Pon2_SPEC>;
1090    impl Pon2 {
1091        #[doc = "Power off"]
1092        pub const _0: Self = Self::new(0);
1093
1094        #[doc = "Power on"]
1095        pub const _1: Self = Self::new(1);
1096    }
1097    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1098    pub struct Pon3_SPEC;
1099    pub type Pon3 = crate::EnumBitfieldStruct<u8, Pon3_SPEC>;
1100    impl Pon3 {
1101        #[doc = "Power off"]
1102        pub const _0: Self = Self::new(0);
1103
1104        #[doc = "Power on"]
1105        pub const _1: Self = Self::new(1);
1106    }
1107    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1108    pub struct Pon4_SPEC;
1109    pub type Pon4 = crate::EnumBitfieldStruct<u8, Pon4_SPEC>;
1110    impl Pon4 {
1111        #[doc = "Power off"]
1112        pub const _0: Self = Self::new(0);
1113
1114        #[doc = "Power on"]
1115        pub const _1: Self = Self::new(1);
1116    }
1117    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1118    pub struct Pon5_SPEC;
1119    pub type Pon5 = crate::EnumBitfieldStruct<u8, Pon5_SPEC>;
1120    impl Pon5 {
1121        #[doc = "Power off"]
1122        pub const _0: Self = Self::new(0);
1123
1124        #[doc = "Power on"]
1125        pub const _1: Self = Self::new(1);
1126    }
1127    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1128    pub struct Pon6_SPEC;
1129    pub type Pon6 = crate::EnumBitfieldStruct<u8, Pon6_SPEC>;
1130    impl Pon6 {
1131        #[doc = "Power off"]
1132        pub const _0: Self = Self::new(0);
1133
1134        #[doc = "Power on"]
1135        pub const _1: Self = Self::new(1);
1136    }
1137    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1138    pub struct Fr_SPEC;
1139    pub type Fr = crate::EnumBitfieldStruct<u8, Fr_SPEC>;
1140    impl Fr {
1141        #[doc = "4 kHz sampling mode"]
1142        pub const _00: Self = Self::new(0);
1143
1144        #[doc = "8 kHz sampling mode"]
1145        pub const _01: Self = Self::new(1);
1146
1147        #[doc = "8 kHz/4 kHz hybrid sampling mode"]
1148        pub const _10: Self = Self::new(2);
1149
1150        #[doc = "Setting prohibited"]
1151        pub const _11: Self = Self::new(3);
1152    }
1153    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1154    pub struct Typ_SPEC;
1155    pub type Typ = crate::EnumBitfieldStruct<u8, Typ_SPEC>;
1156    impl Typ {
1157        #[doc = "24-bit resolution"]
1158        pub const _0: Self = Self::new(0);
1159
1160        #[doc = "16-bit resolution"]
1161        pub const _1: Self = Self::new(1);
1162    }
1163}
1164#[doc(hidden)]
1165#[derive(Copy, Clone, Eq, PartialEq)]
1166pub struct Sdadrr_SPEC;
1167impl crate::sealed::RegSpec for Sdadrr_SPEC {
1168    type DataType = u8;
1169}
1170
1171#[doc = "Sigma-Delta A/D Reset Register"]
1172pub type Sdadrr = crate::RegValueT<Sdadrr_SPEC>;
1173
1174impl Sdadrr {
1175    #[doc = "Sigma-Delta A/D converter reset"]
1176    #[inline(always)]
1177    pub fn res(
1178        self,
1179    ) -> crate::common::RegisterField<
1180        0,
1181        0x1,
1182        1,
1183        0,
1184        sdadrr::Res,
1185        sdadrr::Res,
1186        Sdadrr_SPEC,
1187        crate::common::RW,
1188    > {
1189        crate::common::RegisterField::<
1190            0,
1191            0x1,
1192            1,
1193            0,
1194            sdadrr::Res,
1195            sdadrr::Res,
1196            Sdadrr_SPEC,
1197            crate::common::RW,
1198        >::from_register(self, 0)
1199    }
1200}
1201impl ::core::default::Default for Sdadrr {
1202    #[inline(always)]
1203    fn default() -> Sdadrr {
1204        <crate::RegValueT<Sdadrr_SPEC> as RegisterValue<_>>::new(0)
1205    }
1206}
1207pub mod sdadrr {
1208
1209    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1210    pub struct Res_SPEC;
1211    pub type Res = crate::EnumBitfieldStruct<u8, Res_SPEC>;
1212    impl Res {
1213        #[doc = "Normal operation"]
1214        pub const _0: Self = Self::new(0);
1215
1216        #[doc = "Reset state"]
1217        pub const _1: Self = Self::new(1);
1218    }
1219}
1220#[doc(hidden)]
1221#[derive(Copy, Clone, Eq, PartialEq)]
1222pub struct Sdadgcr_SPEC;
1223impl crate::sealed::RegSpec for Sdadgcr_SPEC {
1224    type DataType = u32;
1225}
1226
1227#[doc = "Sigma-Delta A/D Gain Control Register"]
1228pub type Sdadgcr = crate::RegValueT<Sdadgcr_SPEC>;
1229
1230impl Sdadgcr {
1231    #[doc = "Preamplifier gain for channel 0"]
1232    #[inline(always)]
1233    pub fn gain0(
1234        self,
1235    ) -> crate::common::RegisterField<
1236        0,
1237        0x7,
1238        1,
1239        0,
1240        sdadgcr::Gain0,
1241        sdadgcr::Gain0,
1242        Sdadgcr_SPEC,
1243        crate::common::RW,
1244    > {
1245        crate::common::RegisterField::<
1246            0,
1247            0x7,
1248            1,
1249            0,
1250            sdadgcr::Gain0,
1251            sdadgcr::Gain0,
1252            Sdadgcr_SPEC,
1253            crate::common::RW,
1254        >::from_register(self, 0)
1255    }
1256
1257    #[doc = "Preamplifier gain for channel 1"]
1258    #[inline(always)]
1259    pub fn gain1(
1260        self,
1261    ) -> crate::common::RegisterField<
1262        4,
1263        0x7,
1264        1,
1265        0,
1266        sdadgcr::Gain1,
1267        sdadgcr::Gain1,
1268        Sdadgcr_SPEC,
1269        crate::common::RW,
1270    > {
1271        crate::common::RegisterField::<
1272            4,
1273            0x7,
1274            1,
1275            0,
1276            sdadgcr::Gain1,
1277            sdadgcr::Gain1,
1278            Sdadgcr_SPEC,
1279            crate::common::RW,
1280        >::from_register(self, 0)
1281    }
1282
1283    #[doc = "Preamplifier gain for channel 2"]
1284    #[inline(always)]
1285    pub fn gain2(
1286        self,
1287    ) -> crate::common::RegisterField<
1288        8,
1289        0x7,
1290        1,
1291        0,
1292        sdadgcr::Gain2,
1293        sdadgcr::Gain2,
1294        Sdadgcr_SPEC,
1295        crate::common::RW,
1296    > {
1297        crate::common::RegisterField::<
1298            8,
1299            0x7,
1300            1,
1301            0,
1302            sdadgcr::Gain2,
1303            sdadgcr::Gain2,
1304            Sdadgcr_SPEC,
1305            crate::common::RW,
1306        >::from_register(self, 0)
1307    }
1308
1309    #[doc = "Preamplifier gain for channel 3"]
1310    #[inline(always)]
1311    pub fn gain3(
1312        self,
1313    ) -> crate::common::RegisterField<
1314        12,
1315        0x7,
1316        1,
1317        0,
1318        sdadgcr::Gain3,
1319        sdadgcr::Gain3,
1320        Sdadgcr_SPEC,
1321        crate::common::RW,
1322    > {
1323        crate::common::RegisterField::<
1324            12,
1325            0x7,
1326            1,
1327            0,
1328            sdadgcr::Gain3,
1329            sdadgcr::Gain3,
1330            Sdadgcr_SPEC,
1331            crate::common::RW,
1332        >::from_register(self, 0)
1333    }
1334
1335    #[doc = "Preamplifier gain for channel 4"]
1336    #[inline(always)]
1337    pub fn gain4(
1338        self,
1339    ) -> crate::common::RegisterField<
1340        16,
1341        0x7,
1342        1,
1343        0,
1344        sdadgcr::Gain4,
1345        sdadgcr::Gain4,
1346        Sdadgcr_SPEC,
1347        crate::common::RW,
1348    > {
1349        crate::common::RegisterField::<
1350            16,
1351            0x7,
1352            1,
1353            0,
1354            sdadgcr::Gain4,
1355            sdadgcr::Gain4,
1356            Sdadgcr_SPEC,
1357            crate::common::RW,
1358        >::from_register(self, 0)
1359    }
1360
1361    #[doc = "Preamplifier gain for channel 5"]
1362    #[inline(always)]
1363    pub fn gain5(
1364        self,
1365    ) -> crate::common::RegisterField<
1366        20,
1367        0x7,
1368        1,
1369        0,
1370        sdadgcr::Gain5,
1371        sdadgcr::Gain5,
1372        Sdadgcr_SPEC,
1373        crate::common::RW,
1374    > {
1375        crate::common::RegisterField::<
1376            20,
1377            0x7,
1378            1,
1379            0,
1380            sdadgcr::Gain5,
1381            sdadgcr::Gain5,
1382            Sdadgcr_SPEC,
1383            crate::common::RW,
1384        >::from_register(self, 0)
1385    }
1386
1387    #[doc = "Preamplifier gain for channel 6"]
1388    #[inline(always)]
1389    pub fn gain6(
1390        self,
1391    ) -> crate::common::RegisterField<
1392        24,
1393        0x7,
1394        1,
1395        0,
1396        sdadgcr::Gain6,
1397        sdadgcr::Gain6,
1398        Sdadgcr_SPEC,
1399        crate::common::RW,
1400    > {
1401        crate::common::RegisterField::<
1402            24,
1403            0x7,
1404            1,
1405            0,
1406            sdadgcr::Gain6,
1407            sdadgcr::Gain6,
1408            Sdadgcr_SPEC,
1409            crate::common::RW,
1410        >::from_register(self, 0)
1411    }
1412}
1413impl ::core::default::Default for Sdadgcr {
1414    #[inline(always)]
1415    fn default() -> Sdadgcr {
1416        <crate::RegValueT<Sdadgcr_SPEC> as RegisterValue<_>>::new(0)
1417    }
1418}
1419pub mod sdadgcr {
1420
1421    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1422    pub struct Gain0_SPEC;
1423    pub type Gain0 = crate::EnumBitfieldStruct<u8, Gain0_SPEC>;
1424    impl Gain0 {
1425        #[doc = "1x"]
1426        pub const _0_X_0: Self = Self::new(0);
1427
1428        #[doc = "2x"]
1429        pub const _0_X_1: Self = Self::new(1);
1430
1431        #[doc = "4x"]
1432        pub const _0_X_2: Self = Self::new(2);
1433
1434        #[doc = "8x"]
1435        pub const _0_X_3: Self = Self::new(3);
1436
1437        #[doc = "16x"]
1438        pub const _0_X_4: Self = Self::new(4);
1439
1440        #[doc = "32x"]
1441        pub const _0_X_5: Self = Self::new(5);
1442    }
1443    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1444    pub struct Gain1_SPEC;
1445    pub type Gain1 = crate::EnumBitfieldStruct<u8, Gain1_SPEC>;
1446    impl Gain1 {
1447        #[doc = "1x"]
1448        pub const _0_X_0: Self = Self::new(0);
1449
1450        #[doc = "2x"]
1451        pub const _0_X_1: Self = Self::new(1);
1452
1453        #[doc = "4x"]
1454        pub const _0_X_2: Self = Self::new(2);
1455
1456        #[doc = "8x"]
1457        pub const _0_X_3: Self = Self::new(3);
1458
1459        #[doc = "16x"]
1460        pub const _0_X_4: Self = Self::new(4);
1461
1462        #[doc = "32x"]
1463        pub const _0_X_5: Self = Self::new(5);
1464    }
1465    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1466    pub struct Gain2_SPEC;
1467    pub type Gain2 = crate::EnumBitfieldStruct<u8, Gain2_SPEC>;
1468    impl Gain2 {
1469        #[doc = "1x"]
1470        pub const _0_X_0: Self = Self::new(0);
1471
1472        #[doc = "2x"]
1473        pub const _0_X_1: Self = Self::new(1);
1474
1475        #[doc = "4x"]
1476        pub const _0_X_2: Self = Self::new(2);
1477
1478        #[doc = "8x"]
1479        pub const _0_X_3: Self = Self::new(3);
1480
1481        #[doc = "16x"]
1482        pub const _0_X_4: Self = Self::new(4);
1483
1484        #[doc = "32x"]
1485        pub const _0_X_5: Self = Self::new(5);
1486    }
1487    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1488    pub struct Gain3_SPEC;
1489    pub type Gain3 = crate::EnumBitfieldStruct<u8, Gain3_SPEC>;
1490    impl Gain3 {
1491        #[doc = "1x"]
1492        pub const _0_X_0: Self = Self::new(0);
1493
1494        #[doc = "2x"]
1495        pub const _0_X_1: Self = Self::new(1);
1496
1497        #[doc = "4x"]
1498        pub const _0_X_2: Self = Self::new(2);
1499
1500        #[doc = "8x"]
1501        pub const _0_X_3: Self = Self::new(3);
1502
1503        #[doc = "16x"]
1504        pub const _0_X_4: Self = Self::new(4);
1505
1506        #[doc = "32x"]
1507        pub const _0_X_5: Self = Self::new(5);
1508    }
1509    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1510    pub struct Gain4_SPEC;
1511    pub type Gain4 = crate::EnumBitfieldStruct<u8, Gain4_SPEC>;
1512    impl Gain4 {
1513        #[doc = "1x"]
1514        pub const _0_X_0: Self = Self::new(0);
1515
1516        #[doc = "2x"]
1517        pub const _0_X_1: Self = Self::new(1);
1518
1519        #[doc = "4x"]
1520        pub const _0_X_2: Self = Self::new(2);
1521
1522        #[doc = "8x"]
1523        pub const _0_X_3: Self = Self::new(3);
1524
1525        #[doc = "16x"]
1526        pub const _0_X_4: Self = Self::new(4);
1527
1528        #[doc = "32x"]
1529        pub const _0_X_5: Self = Self::new(5);
1530    }
1531    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1532    pub struct Gain5_SPEC;
1533    pub type Gain5 = crate::EnumBitfieldStruct<u8, Gain5_SPEC>;
1534    impl Gain5 {
1535        #[doc = "1x"]
1536        pub const _0_X_0: Self = Self::new(0);
1537
1538        #[doc = "2x"]
1539        pub const _0_X_1: Self = Self::new(1);
1540
1541        #[doc = "4x"]
1542        pub const _0_X_2: Self = Self::new(2);
1543
1544        #[doc = "8x"]
1545        pub const _0_X_3: Self = Self::new(3);
1546
1547        #[doc = "16x"]
1548        pub const _0_X_4: Self = Self::new(4);
1549
1550        #[doc = "32x"]
1551        pub const _0_X_5: Self = Self::new(5);
1552    }
1553    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1554    pub struct Gain6_SPEC;
1555    pub type Gain6 = crate::EnumBitfieldStruct<u8, Gain6_SPEC>;
1556    impl Gain6 {
1557        #[doc = "1x"]
1558        pub const _0_X_0: Self = Self::new(0);
1559
1560        #[doc = "2x"]
1561        pub const _0_X_1: Self = Self::new(1);
1562
1563        #[doc = "4x"]
1564        pub const _0_X_2: Self = Self::new(2);
1565
1566        #[doc = "8x"]
1567        pub const _0_X_3: Self = Self::new(3);
1568
1569        #[doc = "16x"]
1570        pub const _0_X_4: Self = Self::new(4);
1571
1572        #[doc = "32x"]
1573        pub const _0_X_5: Self = Self::new(5);
1574    }
1575}
1576#[doc(hidden)]
1577#[derive(Copy, Clone, Eq, PartialEq)]
1578pub struct Sdadhpfcr_SPEC;
1579impl crate::sealed::RegSpec for Sdadhpfcr_SPEC {
1580    type DataType = u32;
1581}
1582
1583#[doc = "Sigma-Delta A/D HPF Control Register"]
1584pub type Sdadhpfcr = crate::RegValueT<Sdadhpfcr_SPEC>;
1585
1586impl Sdadhpfcr {
1587    #[doc = "HPF bypass for channel n Type 1 output"]
1588    #[inline(always)]
1589    pub fn dis0(
1590        self,
1591    ) -> crate::common::RegisterField<
1592        0,
1593        0x1,
1594        1,
1595        0,
1596        sdadhpfcr::Dis0,
1597        sdadhpfcr::Dis0,
1598        Sdadhpfcr_SPEC,
1599        crate::common::RW,
1600    > {
1601        crate::common::RegisterField::<
1602            0,
1603            0x1,
1604            1,
1605            0,
1606            sdadhpfcr::Dis0,
1607            sdadhpfcr::Dis0,
1608            Sdadhpfcr_SPEC,
1609            crate::common::RW,
1610        >::from_register(self, 0)
1611    }
1612
1613    #[doc = "HPF bypass for channel n Type 1 output"]
1614    #[inline(always)]
1615    pub fn dis1(
1616        self,
1617    ) -> crate::common::RegisterField<
1618        1,
1619        0x1,
1620        1,
1621        0,
1622        sdadhpfcr::Dis1,
1623        sdadhpfcr::Dis1,
1624        Sdadhpfcr_SPEC,
1625        crate::common::RW,
1626    > {
1627        crate::common::RegisterField::<
1628            1,
1629            0x1,
1630            1,
1631            0,
1632            sdadhpfcr::Dis1,
1633            sdadhpfcr::Dis1,
1634            Sdadhpfcr_SPEC,
1635            crate::common::RW,
1636        >::from_register(self, 0)
1637    }
1638
1639    #[doc = "HPF bypass for channel n Type 1 output"]
1640    #[inline(always)]
1641    pub fn dis2(
1642        self,
1643    ) -> crate::common::RegisterField<
1644        2,
1645        0x1,
1646        1,
1647        0,
1648        sdadhpfcr::Dis2,
1649        sdadhpfcr::Dis2,
1650        Sdadhpfcr_SPEC,
1651        crate::common::RW,
1652    > {
1653        crate::common::RegisterField::<
1654            2,
1655            0x1,
1656            1,
1657            0,
1658            sdadhpfcr::Dis2,
1659            sdadhpfcr::Dis2,
1660            Sdadhpfcr_SPEC,
1661            crate::common::RW,
1662        >::from_register(self, 0)
1663    }
1664
1665    #[doc = "HPF bypass for channel n Type 1 output"]
1666    #[inline(always)]
1667    pub fn dis3(
1668        self,
1669    ) -> crate::common::RegisterField<
1670        3,
1671        0x1,
1672        1,
1673        0,
1674        sdadhpfcr::Dis3,
1675        sdadhpfcr::Dis3,
1676        Sdadhpfcr_SPEC,
1677        crate::common::RW,
1678    > {
1679        crate::common::RegisterField::<
1680            3,
1681            0x1,
1682            1,
1683            0,
1684            sdadhpfcr::Dis3,
1685            sdadhpfcr::Dis3,
1686            Sdadhpfcr_SPEC,
1687            crate::common::RW,
1688        >::from_register(self, 0)
1689    }
1690
1691    #[doc = "HPF bypass for channel n Type 1 output"]
1692    #[inline(always)]
1693    pub fn dis4(
1694        self,
1695    ) -> crate::common::RegisterField<
1696        4,
1697        0x1,
1698        1,
1699        0,
1700        sdadhpfcr::Dis4,
1701        sdadhpfcr::Dis4,
1702        Sdadhpfcr_SPEC,
1703        crate::common::RW,
1704    > {
1705        crate::common::RegisterField::<
1706            4,
1707            0x1,
1708            1,
1709            0,
1710            sdadhpfcr::Dis4,
1711            sdadhpfcr::Dis4,
1712            Sdadhpfcr_SPEC,
1713            crate::common::RW,
1714        >::from_register(self, 0)
1715    }
1716
1717    #[doc = "HPF bypass for channel n Type 1 output"]
1718    #[inline(always)]
1719    pub fn dis5(
1720        self,
1721    ) -> crate::common::RegisterField<
1722        5,
1723        0x1,
1724        1,
1725        0,
1726        sdadhpfcr::Dis5,
1727        sdadhpfcr::Dis5,
1728        Sdadhpfcr_SPEC,
1729        crate::common::RW,
1730    > {
1731        crate::common::RegisterField::<
1732            5,
1733            0x1,
1734            1,
1735            0,
1736            sdadhpfcr::Dis5,
1737            sdadhpfcr::Dis5,
1738            Sdadhpfcr_SPEC,
1739            crate::common::RW,
1740        >::from_register(self, 0)
1741    }
1742
1743    #[doc = "HPF bypass for channel n Type 1 output"]
1744    #[inline(always)]
1745    pub fn dis6(
1746        self,
1747    ) -> crate::common::RegisterField<
1748        6,
1749        0x1,
1750        1,
1751        0,
1752        sdadhpfcr::Dis6,
1753        sdadhpfcr::Dis6,
1754        Sdadhpfcr_SPEC,
1755        crate::common::RW,
1756    > {
1757        crate::common::RegisterField::<
1758            6,
1759            0x1,
1760            1,
1761            0,
1762            sdadhpfcr::Dis6,
1763            sdadhpfcr::Dis6,
1764            Sdadhpfcr_SPEC,
1765            crate::common::RW,
1766        >::from_register(self, 0)
1767    }
1768
1769    #[doc = "HPF bypass for channel m Type 2 output"]
1770    #[inline(always)]
1771    pub fn dis3t2(
1772        self,
1773    ) -> crate::common::RegisterField<
1774        16,
1775        0x1,
1776        1,
1777        0,
1778        sdadhpfcr::Dis3T2,
1779        sdadhpfcr::Dis3T2,
1780        Sdadhpfcr_SPEC,
1781        crate::common::RW,
1782    > {
1783        crate::common::RegisterField::<
1784            16,
1785            0x1,
1786            1,
1787            0,
1788            sdadhpfcr::Dis3T2,
1789            sdadhpfcr::Dis3T2,
1790            Sdadhpfcr_SPEC,
1791            crate::common::RW,
1792        >::from_register(self, 0)
1793    }
1794
1795    #[doc = "HPF bypass for channel m Type 2 output"]
1796    #[inline(always)]
1797    pub fn dis0t2(
1798        self,
1799    ) -> crate::common::RegisterField<
1800        17,
1801        0x1,
1802        1,
1803        0,
1804        sdadhpfcr::Dis0T2,
1805        sdadhpfcr::Dis0T2,
1806        Sdadhpfcr_SPEC,
1807        crate::common::RW,
1808    > {
1809        crate::common::RegisterField::<
1810            17,
1811            0x1,
1812            1,
1813            0,
1814            sdadhpfcr::Dis0T2,
1815            sdadhpfcr::Dis0T2,
1816            Sdadhpfcr_SPEC,
1817            crate::common::RW,
1818        >::from_register(self, 0)
1819    }
1820
1821    #[doc = "Cut-off frequency of HPF (see )"]
1822    #[inline(always)]
1823    pub fn cof(
1824        self,
1825    ) -> crate::common::RegisterField<28, 0x3, 1, 0, u8, u8, Sdadhpfcr_SPEC, crate::common::RW>
1826    {
1827        crate::common::RegisterField::<28,0x3,1,0,u8,u8,Sdadhpfcr_SPEC,crate::common::RW>::from_register(self,0)
1828    }
1829}
1830impl ::core::default::Default for Sdadhpfcr {
1831    #[inline(always)]
1832    fn default() -> Sdadhpfcr {
1833        <crate::RegValueT<Sdadhpfcr_SPEC> as RegisterValue<_>>::new(0)
1834    }
1835}
1836pub mod sdadhpfcr {
1837
1838    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1839    pub struct Dis0_SPEC;
1840    pub type Dis0 = crate::EnumBitfieldStruct<u8, Dis0_SPEC>;
1841    impl Dis0 {
1842        #[doc = "HPF enabled"]
1843        pub const _0: Self = Self::new(0);
1844
1845        #[doc = "HPF disabled"]
1846        pub const _1: Self = Self::new(1);
1847    }
1848    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1849    pub struct Dis1_SPEC;
1850    pub type Dis1 = crate::EnumBitfieldStruct<u8, Dis1_SPEC>;
1851    impl Dis1 {
1852        #[doc = "HPF enabled"]
1853        pub const _0: Self = Self::new(0);
1854
1855        #[doc = "HPF disabled"]
1856        pub const _1: Self = Self::new(1);
1857    }
1858    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1859    pub struct Dis2_SPEC;
1860    pub type Dis2 = crate::EnumBitfieldStruct<u8, Dis2_SPEC>;
1861    impl Dis2 {
1862        #[doc = "HPF enabled"]
1863        pub const _0: Self = Self::new(0);
1864
1865        #[doc = "HPF disabled"]
1866        pub const _1: Self = Self::new(1);
1867    }
1868    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1869    pub struct Dis3_SPEC;
1870    pub type Dis3 = crate::EnumBitfieldStruct<u8, Dis3_SPEC>;
1871    impl Dis3 {
1872        #[doc = "HPF enabled"]
1873        pub const _0: Self = Self::new(0);
1874
1875        #[doc = "HPF disabled"]
1876        pub const _1: Self = Self::new(1);
1877    }
1878    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1879    pub struct Dis4_SPEC;
1880    pub type Dis4 = crate::EnumBitfieldStruct<u8, Dis4_SPEC>;
1881    impl Dis4 {
1882        #[doc = "HPF enabled"]
1883        pub const _0: Self = Self::new(0);
1884
1885        #[doc = "HPF disabled"]
1886        pub const _1: Self = Self::new(1);
1887    }
1888    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1889    pub struct Dis5_SPEC;
1890    pub type Dis5 = crate::EnumBitfieldStruct<u8, Dis5_SPEC>;
1891    impl Dis5 {
1892        #[doc = "HPF enabled"]
1893        pub const _0: Self = Self::new(0);
1894
1895        #[doc = "HPF disabled"]
1896        pub const _1: Self = Self::new(1);
1897    }
1898    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1899    pub struct Dis6_SPEC;
1900    pub type Dis6 = crate::EnumBitfieldStruct<u8, Dis6_SPEC>;
1901    impl Dis6 {
1902        #[doc = "HPF enabled"]
1903        pub const _0: Self = Self::new(0);
1904
1905        #[doc = "HPF disabled"]
1906        pub const _1: Self = Self::new(1);
1907    }
1908    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1909    pub struct Dis3T2_SPEC;
1910    pub type Dis3T2 = crate::EnumBitfieldStruct<u8, Dis3T2_SPEC>;
1911    impl Dis3T2 {
1912        #[doc = "HPF enabled"]
1913        pub const _0: Self = Self::new(0);
1914
1915        #[doc = "HPF disabled"]
1916        pub const _1: Self = Self::new(1);
1917    }
1918    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1919    pub struct Dis0T2_SPEC;
1920    pub type Dis0T2 = crate::EnumBitfieldStruct<u8, Dis0T2_SPEC>;
1921    impl Dis0T2 {
1922        #[doc = "HPF enabled"]
1923        pub const _0: Self = Self::new(0);
1924
1925        #[doc = "HPF disabled"]
1926        pub const _1: Self = Self::new(1);
1927    }
1928}
1929#[doc(hidden)]
1930#[derive(Copy, Clone, Eq, PartialEq)]
1931pub struct Sdadicr_SPEC;
1932impl crate::sealed::RegSpec for Sdadicr_SPEC {
1933    type DataType = u8;
1934}
1935
1936#[doc = "Sigma-Delta A/D Interrupt Control Register"]
1937pub type Sdadicr = crate::RegValueT<Sdadicr_SPEC>;
1938
1939impl Sdadicr {
1940    #[doc = "Detection channel for zero-cross detection 0"]
1941    #[inline(always)]
1942    pub fn zcctl0(
1943        self,
1944    ) -> crate::common::RegisterField<
1945        0,
1946        0x1,
1947        1,
1948        0,
1949        sdadicr::Zcctl0,
1950        sdadicr::Zcctl0,
1951        Sdadicr_SPEC,
1952        crate::common::RW,
1953    > {
1954        crate::common::RegisterField::<
1955            0,
1956            0x1,
1957            1,
1958            0,
1959            sdadicr::Zcctl0,
1960            sdadicr::Zcctl0,
1961            Sdadicr_SPEC,
1962            crate::common::RW,
1963        >::from_register(self, 0)
1964    }
1965
1966    #[doc = "Interrupt output mode for zero-cross detection 0"]
1967    #[inline(always)]
1968    pub fn zcmd0(
1969        self,
1970    ) -> crate::common::RegisterField<
1971        1,
1972        0x1,
1973        1,
1974        0,
1975        sdadicr::Zcmd0,
1976        sdadicr::Zcmd0,
1977        Sdadicr_SPEC,
1978        crate::common::RW,
1979    > {
1980        crate::common::RegisterField::<
1981            1,
1982            0x1,
1983            1,
1984            0,
1985            sdadicr::Zcmd0,
1986            sdadicr::Zcmd0,
1987            Sdadicr_SPEC,
1988            crate::common::RW,
1989        >::from_register(self, 0)
1990    }
1991
1992    #[doc = "Falling edge detection enable for zero-cross detection 0"]
1993    #[inline(always)]
1994    pub fn zcegn0(
1995        self,
1996    ) -> crate::common::RegisterField<
1997        2,
1998        0x1,
1999        1,
2000        0,
2001        sdadicr::Zcegn0,
2002        sdadicr::Zcegn0,
2003        Sdadicr_SPEC,
2004        crate::common::RW,
2005    > {
2006        crate::common::RegisterField::<
2007            2,
2008            0x1,
2009            1,
2010            0,
2011            sdadicr::Zcegn0,
2012            sdadicr::Zcegn0,
2013            Sdadicr_SPEC,
2014            crate::common::RW,
2015        >::from_register(self, 0)
2016    }
2017
2018    #[doc = "Rising edge detection enable for zero-cross detection 0"]
2019    #[inline(always)]
2020    pub fn zcegp0(
2021        self,
2022    ) -> crate::common::RegisterField<
2023        3,
2024        0x1,
2025        1,
2026        0,
2027        sdadicr::Zcegp0,
2028        sdadicr::Zcegp0,
2029        Sdadicr_SPEC,
2030        crate::common::RW,
2031    > {
2032        crate::common::RegisterField::<
2033            3,
2034            0x1,
2035            1,
2036            0,
2037            sdadicr::Zcegp0,
2038            sdadicr::Zcegp0,
2039            Sdadicr_SPEC,
2040            crate::common::RW,
2041        >::from_register(self, 0)
2042    }
2043
2044    #[doc = "Detection channel for zero-cross detection 1"]
2045    #[inline(always)]
2046    pub fn zcctl1(
2047        self,
2048    ) -> crate::common::RegisterField<
2049        4,
2050        0x1,
2051        1,
2052        0,
2053        sdadicr::Zcctl1,
2054        sdadicr::Zcctl1,
2055        Sdadicr_SPEC,
2056        crate::common::RW,
2057    > {
2058        crate::common::RegisterField::<
2059            4,
2060            0x1,
2061            1,
2062            0,
2063            sdadicr::Zcctl1,
2064            sdadicr::Zcctl1,
2065            Sdadicr_SPEC,
2066            crate::common::RW,
2067        >::from_register(self, 0)
2068    }
2069
2070    #[doc = "Interrupt output mode for zero-cross detection 1"]
2071    #[inline(always)]
2072    pub fn zcmd1(
2073        self,
2074    ) -> crate::common::RegisterField<
2075        5,
2076        0x1,
2077        1,
2078        0,
2079        sdadicr::Zcmd1,
2080        sdadicr::Zcmd1,
2081        Sdadicr_SPEC,
2082        crate::common::RW,
2083    > {
2084        crate::common::RegisterField::<
2085            5,
2086            0x1,
2087            1,
2088            0,
2089            sdadicr::Zcmd1,
2090            sdadicr::Zcmd1,
2091            Sdadicr_SPEC,
2092            crate::common::RW,
2093        >::from_register(self, 0)
2094    }
2095
2096    #[doc = "Falling edge detection enable for zero-cross detection 1"]
2097    #[inline(always)]
2098    pub fn zcegn1(
2099        self,
2100    ) -> crate::common::RegisterField<
2101        6,
2102        0x1,
2103        1,
2104        0,
2105        sdadicr::Zcegn1,
2106        sdadicr::Zcegn1,
2107        Sdadicr_SPEC,
2108        crate::common::RW,
2109    > {
2110        crate::common::RegisterField::<
2111            6,
2112            0x1,
2113            1,
2114            0,
2115            sdadicr::Zcegn1,
2116            sdadicr::Zcegn1,
2117            Sdadicr_SPEC,
2118            crate::common::RW,
2119        >::from_register(self, 0)
2120    }
2121
2122    #[doc = "Rising edge detection enable for Zero-cross detection 1"]
2123    #[inline(always)]
2124    pub fn zcegp1(
2125        self,
2126    ) -> crate::common::RegisterField<
2127        7,
2128        0x1,
2129        1,
2130        0,
2131        sdadicr::Zcegp1,
2132        sdadicr::Zcegp1,
2133        Sdadicr_SPEC,
2134        crate::common::RW,
2135    > {
2136        crate::common::RegisterField::<
2137            7,
2138            0x1,
2139            1,
2140            0,
2141            sdadicr::Zcegp1,
2142            sdadicr::Zcegp1,
2143            Sdadicr_SPEC,
2144            crate::common::RW,
2145        >::from_register(self, 0)
2146    }
2147}
2148impl ::core::default::Default for Sdadicr {
2149    #[inline(always)]
2150    fn default() -> Sdadicr {
2151        <crate::RegValueT<Sdadicr_SPEC> as RegisterValue<_>>::new(0)
2152    }
2153}
2154pub mod sdadicr {
2155
2156    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2157    pub struct Zcctl0_SPEC;
2158    pub type Zcctl0 = crate::EnumBitfieldStruct<u8, Zcctl0_SPEC>;
2159    impl Zcctl0 {
2160        #[doc = "Channel 2"]
2161        pub const _0: Self = Self::new(0);
2162
2163        #[doc = "Channel 1"]
2164        pub const _1: Self = Self::new(1);
2165    }
2166    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2167    pub struct Zcmd0_SPEC;
2168    pub type Zcmd0 = crate::EnumBitfieldStruct<u8, Zcmd0_SPEC>;
2169    impl Zcmd0 {
2170        #[doc = "Pulse output mode"]
2171        pub const _0: Self = Self::new(0);
2172
2173        #[doc = "Level output mode"]
2174        pub const _1: Self = Self::new(1);
2175    }
2176    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2177    pub struct Zcegn0_SPEC;
2178    pub type Zcegn0 = crate::EnumBitfieldStruct<u8, Zcegn0_SPEC>;
2179    impl Zcegn0 {
2180        #[doc = "Disabled"]
2181        pub const _0: Self = Self::new(0);
2182
2183        #[doc = "Enabled"]
2184        pub const _1: Self = Self::new(1);
2185    }
2186    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2187    pub struct Zcegp0_SPEC;
2188    pub type Zcegp0 = crate::EnumBitfieldStruct<u8, Zcegp0_SPEC>;
2189    impl Zcegp0 {
2190        #[doc = "Disabled"]
2191        pub const _0: Self = Self::new(0);
2192
2193        #[doc = "Enabled"]
2194        pub const _1: Self = Self::new(1);
2195    }
2196    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2197    pub struct Zcctl1_SPEC;
2198    pub type Zcctl1 = crate::EnumBitfieldStruct<u8, Zcctl1_SPEC>;
2199    impl Zcctl1 {
2200        #[doc = "Channel 3"]
2201        pub const _0: Self = Self::new(0);
2202
2203        #[doc = "Channel 0"]
2204        pub const _1: Self = Self::new(1);
2205    }
2206    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2207    pub struct Zcmd1_SPEC;
2208    pub type Zcmd1 = crate::EnumBitfieldStruct<u8, Zcmd1_SPEC>;
2209    impl Zcmd1 {
2210        #[doc = "Pulse output mode"]
2211        pub const _0: Self = Self::new(0);
2212
2213        #[doc = "Level output mode"]
2214        pub const _1: Self = Self::new(1);
2215    }
2216    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2217    pub struct Zcegn1_SPEC;
2218    pub type Zcegn1 = crate::EnumBitfieldStruct<u8, Zcegn1_SPEC>;
2219    impl Zcegn1 {
2220        #[doc = "Disabled"]
2221        pub const _0: Self = Self::new(0);
2222
2223        #[doc = "Enabled"]
2224        pub const _1: Self = Self::new(1);
2225    }
2226    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2227    pub struct Zcegp1_SPEC;
2228    pub type Zcegp1 = crate::EnumBitfieldStruct<u8, Zcegp1_SPEC>;
2229    impl Zcegp1 {
2230        #[doc = "Disabled"]
2231        pub const _0: Self = Self::new(0);
2232
2233        #[doc = "Enabled"]
2234        pub const _1: Self = Self::new(1);
2235    }
2236}
2237#[doc(hidden)]
2238#[derive(Copy, Clone, Eq, PartialEq)]
2239pub struct Sdadiclr_SPEC;
2240impl crate::sealed::RegSpec for Sdadiclr_SPEC {
2241    type DataType = u8;
2242}
2243
2244#[doc = "Sigma-Delta A/D Interrupt Clear Register"]
2245pub type Sdadiclr = crate::RegValueT<Sdadiclr_SPEC>;
2246
2247impl Sdadiclr {
2248    #[doc = "Zero-cross detection interrupt 0 clear"]
2249    #[inline(always)]
2250    pub fn icl0(
2251        self,
2252    ) -> crate::common::RegisterField<
2253        0,
2254        0x1,
2255        1,
2256        0,
2257        sdadiclr::Icl0,
2258        sdadiclr::Icl0,
2259        Sdadiclr_SPEC,
2260        crate::common::W,
2261    > {
2262        crate::common::RegisterField::<
2263            0,
2264            0x1,
2265            1,
2266            0,
2267            sdadiclr::Icl0,
2268            sdadiclr::Icl0,
2269            Sdadiclr_SPEC,
2270            crate::common::W,
2271        >::from_register(self, 0)
2272    }
2273
2274    #[doc = "Zero-cross detection interrupt 1 clear"]
2275    #[inline(always)]
2276    pub fn icl1(
2277        self,
2278    ) -> crate::common::RegisterField<
2279        4,
2280        0x1,
2281        1,
2282        0,
2283        sdadiclr::Icl1,
2284        sdadiclr::Icl1,
2285        Sdadiclr_SPEC,
2286        crate::common::W,
2287    > {
2288        crate::common::RegisterField::<
2289            4,
2290            0x1,
2291            1,
2292            0,
2293            sdadiclr::Icl1,
2294            sdadiclr::Icl1,
2295            Sdadiclr_SPEC,
2296            crate::common::W,
2297        >::from_register(self, 0)
2298    }
2299}
2300impl ::core::default::Default for Sdadiclr {
2301    #[inline(always)]
2302    fn default() -> Sdadiclr {
2303        <crate::RegValueT<Sdadiclr_SPEC> as RegisterValue<_>>::new(0)
2304    }
2305}
2306pub mod sdadiclr {
2307
2308    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2309    pub struct Icl0_SPEC;
2310    pub type Icl0 = crate::EnumBitfieldStruct<u8, Icl0_SPEC>;
2311    impl Icl0 {
2312        #[doc = "No operation"]
2313        pub const _0: Self = Self::new(0);
2314
2315        #[doc = "Clears zero-cross detection interrupt 0 (SDADC_ADZC0)"]
2316        pub const _1: Self = Self::new(1);
2317    }
2318    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2319    pub struct Icl1_SPEC;
2320    pub type Icl1 = crate::EnumBitfieldStruct<u8, Icl1_SPEC>;
2321    impl Icl1 {
2322        #[doc = "No operation"]
2323        pub const _0: Self = Self::new(0);
2324
2325        #[doc = "Clears zero-cross detection interrupt 1 (SDADC_ADZC1)"]
2326        pub const _1: Self = Self::new(1);
2327    }
2328}
2329#[doc(hidden)]
2330#[derive(Copy, Clone, Eq, PartialEq)]
2331pub struct Sdadisr_SPEC;
2332impl crate::sealed::RegSpec for Sdadisr_SPEC {
2333    type DataType = u8;
2334}
2335
2336#[doc = "Sigma-Delta A/D Interrupt Status Register"]
2337pub type Sdadisr = crate::RegValueT<Sdadisr_SPEC>;
2338
2339impl Sdadisr {
2340    #[doc = "Zero-cross detection interrupt status for zero-cross detection 0"]
2341    #[inline(always)]
2342    pub fn zci0(
2343        self,
2344    ) -> crate::common::RegisterField<
2345        0,
2346        0x1,
2347        1,
2348        0,
2349        sdadisr::Zci0,
2350        sdadisr::Zci0,
2351        Sdadisr_SPEC,
2352        crate::common::R,
2353    > {
2354        crate::common::RegisterField::<
2355            0,
2356            0x1,
2357            1,
2358            0,
2359            sdadisr::Zci0,
2360            sdadisr::Zci0,
2361            Sdadisr_SPEC,
2362            crate::common::R,
2363        >::from_register(self, 0)
2364    }
2365
2366    #[doc = "DF output status for zero-cross detection 0"]
2367    #[inline(always)]
2368    pub fn zc0(
2369        self,
2370    ) -> crate::common::RegisterField<
2371        1,
2372        0x1,
2373        1,
2374        0,
2375        sdadisr::Zc0,
2376        sdadisr::Zc0,
2377        Sdadisr_SPEC,
2378        crate::common::R,
2379    > {
2380        crate::common::RegisterField::<
2381            1,
2382            0x1,
2383            1,
2384            0,
2385            sdadisr::Zc0,
2386            sdadisr::Zc0,
2387            Sdadisr_SPEC,
2388            crate::common::R,
2389        >::from_register(self, 0)
2390    }
2391
2392    #[doc = "Zero-cross detection interrupt status for zero-cross detection 1"]
2393    #[inline(always)]
2394    pub fn zci1(
2395        self,
2396    ) -> crate::common::RegisterField<
2397        4,
2398        0x1,
2399        1,
2400        0,
2401        sdadisr::Zci1,
2402        sdadisr::Zci1,
2403        Sdadisr_SPEC,
2404        crate::common::R,
2405    > {
2406        crate::common::RegisterField::<
2407            4,
2408            0x1,
2409            1,
2410            0,
2411            sdadisr::Zci1,
2412            sdadisr::Zci1,
2413            Sdadisr_SPEC,
2414            crate::common::R,
2415        >::from_register(self, 0)
2416    }
2417
2418    #[doc = "DF output status for Zero-cross detection 1"]
2419    #[inline(always)]
2420    pub fn zc1(
2421        self,
2422    ) -> crate::common::RegisterField<
2423        5,
2424        0x1,
2425        1,
2426        0,
2427        sdadisr::Zc1,
2428        sdadisr::Zc1,
2429        Sdadisr_SPEC,
2430        crate::common::R,
2431    > {
2432        crate::common::RegisterField::<
2433            5,
2434            0x1,
2435            1,
2436            0,
2437            sdadisr::Zc1,
2438            sdadisr::Zc1,
2439            Sdadisr_SPEC,
2440            crate::common::R,
2441        >::from_register(self, 0)
2442    }
2443}
2444impl ::core::default::Default for Sdadisr {
2445    #[inline(always)]
2446    fn default() -> Sdadisr {
2447        <crate::RegValueT<Sdadisr_SPEC> as RegisterValue<_>>::new(34)
2448    }
2449}
2450pub mod sdadisr {
2451
2452    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2453    pub struct Zci0_SPEC;
2454    pub type Zci0 = crate::EnumBitfieldStruct<u8, Zci0_SPEC>;
2455    impl Zci0 {
2456        #[doc = "Zero-cross detection interrupt 0 (SDADC_ADZC0) signal is 0"]
2457        pub const _0: Self = Self::new(0);
2458
2459        #[doc = "Zero-cross detection interrupt 0 (SDADC_ADZC0) signal is 1"]
2460        pub const _1: Self = Self::new(1);
2461    }
2462    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2463    pub struct Zc0_SPEC;
2464    pub type Zc0 = crate::EnumBitfieldStruct<u8, Zc0_SPEC>;
2465    impl Zc0 {
2466        #[doc = "DF output is negative"]
2467        pub const _0: Self = Self::new(0);
2468
2469        #[doc = "DF output is positive"]
2470        pub const _1: Self = Self::new(1);
2471    }
2472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2473    pub struct Zci1_SPEC;
2474    pub type Zci1 = crate::EnumBitfieldStruct<u8, Zci1_SPEC>;
2475    impl Zci1 {
2476        #[doc = "Zero-cross detection interrupt 1 (SDADC_ADZC1) signal is 0"]
2477        pub const _0: Self = Self::new(0);
2478
2479        #[doc = "Zero-cross detection interrupt 1 (SDADC_ADZC1) signal is 1"]
2480        pub const _1: Self = Self::new(1);
2481    }
2482    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2483    pub struct Zc1_SPEC;
2484    pub type Zc1 = crate::EnumBitfieldStruct<u8, Zc1_SPEC>;
2485    impl Zc1 {
2486        #[doc = "DF output is negative"]
2487        pub const _0: Self = Self::new(0);
2488
2489        #[doc = "DF output is positive"]
2490        pub const _1: Self = Self::new(1);
2491    }
2492}
2493#[doc(hidden)]
2494#[derive(Copy, Clone, Eq, PartialEq)]
2495pub struct Sdadphcr_SPEC;
2496impl crate::sealed::RegSpec for Sdadphcr_SPEC {
2497    type DataType = u16;
2498}
2499
2500#[doc = "Sigma-Delta A/D Phase Control Register %s"]
2501pub type Sdadphcr = crate::RegValueT<Sdadphcr_SPEC>;
2502
2503impl Sdadphcr {
2504    #[doc = "Phase adjustment for channel n (n = 0 to 6)"]
2505    #[inline(always)]
2506    pub fn ph(
2507        self,
2508    ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Sdadphcr_SPEC, crate::common::RW>
2509    {
2510        crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Sdadphcr_SPEC,crate::common::RW>::from_register(self,0)
2511    }
2512}
2513impl ::core::default::Default for Sdadphcr {
2514    #[inline(always)]
2515    fn default() -> Sdadphcr {
2516        <crate::RegValueT<Sdadphcr_SPEC> as RegisterValue<_>>::new(0)
2517    }
2518}
2519
2520#[doc(hidden)]
2521#[derive(Copy, Clone, Eq, PartialEq)]
2522pub struct Sdadcr_SPEC;
2523impl crate::sealed::RegSpec for Sdadcr_SPEC {
2524    type DataType = u32;
2525}
2526
2527#[doc = "Sigma-Delta A/D Conversion Result Register %s Type 1"]
2528pub type Sdadcr = crate::RegValueT<Sdadcr_SPEC>;
2529
2530impl Sdadcr {
2531    #[doc = "A/D conversion result for channel n Type 1"]
2532    #[inline(always)]
2533    pub fn sdadcr(
2534        self,
2535    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Sdadcr_SPEC, crate::common::R>
2536    {
2537        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Sdadcr_SPEC,crate::common::R>::from_register(self,0)
2538    }
2539}
2540impl ::core::default::Default for Sdadcr {
2541    #[inline(always)]
2542    fn default() -> Sdadcr {
2543        <crate::RegValueT<Sdadcr_SPEC> as RegisterValue<_>>::new(0)
2544    }
2545}
2546
2547#[doc(hidden)]
2548#[derive(Copy, Clone, Eq, PartialEq)]
2549pub struct Sdadcrt2_SPEC;
2550impl crate::sealed::RegSpec for Sdadcrt2_SPEC {
2551    type DataType = u32;
2552}
2553
2554#[doc = "Sigma-Delta A/D Conversion Result Register %s Type 2"]
2555pub type Sdadcrt2 = crate::RegValueT<Sdadcrt2_SPEC>;
2556
2557impl Sdadcrt2 {
2558    #[doc = "A/D conversion result for channel m Type 2"]
2559    #[inline(always)]
2560    pub fn sdadcr(
2561        self,
2562    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Sdadcrt2_SPEC, crate::common::R>
2563    {
2564        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Sdadcrt2_SPEC,crate::common::R>::from_register(self,0)
2565    }
2566}
2567impl ::core::default::Default for Sdadcrt2 {
2568    #[inline(always)]
2569    fn default() -> Sdadcrt2 {
2570        <crate::RegValueT<Sdadcrt2_SPEC> as RegisterValue<_>>::new(0)
2571    }
2572}
2573
2574#[doc(hidden)]
2575#[derive(Copy, Clone, Eq, PartialEq)]
2576pub struct Sdadcrlpf_SPEC;
2577impl crate::sealed::RegSpec for Sdadcrlpf_SPEC {
2578    type DataType = u32;
2579}
2580
2581#[doc = "Sigma-Delta A/D Conversion Result Register (LPF) %s Type 1"]
2582pub type Sdadcrlpf = crate::RegValueT<Sdadcrlpf_SPEC>;
2583
2584impl Sdadcrlpf {
2585    #[doc = "A/D conversion result for channel n LPF output Type 1"]
2586    #[inline(always)]
2587    pub fn sdadcr(
2588        self,
2589    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Sdadcrlpf_SPEC, crate::common::R>
2590    {
2591        crate::common::RegisterField::<
2592            0,
2593            0xffffffff,
2594            1,
2595            0,
2596            u32,
2597            u32,
2598            Sdadcrlpf_SPEC,
2599            crate::common::R,
2600        >::from_register(self, 0)
2601    }
2602}
2603impl ::core::default::Default for Sdadcrlpf {
2604    #[inline(always)]
2605    fn default() -> Sdadcrlpf {
2606        <crate::RegValueT<Sdadcrlpf_SPEC> as RegisterValue<_>>::new(0)
2607    }
2608}
2609
2610#[doc(hidden)]
2611#[derive(Copy, Clone, Eq, PartialEq)]
2612pub struct Sdadcrlpft2_SPEC;
2613impl crate::sealed::RegSpec for Sdadcrlpft2_SPEC {
2614    type DataType = u32;
2615}
2616
2617#[doc = "Sigma-Delta A/D Conversion Result Register (LPF) %s Type 2"]
2618pub type Sdadcrlpft2 = crate::RegValueT<Sdadcrlpft2_SPEC>;
2619
2620impl Sdadcrlpft2 {
2621    #[doc = "A/D conversion result for channel m LPF output Type 2"]
2622    #[inline(always)]
2623    pub fn sdadcr(
2624        self,
2625    ) -> crate::common::RegisterField<
2626        0,
2627        0xffffffff,
2628        1,
2629        0,
2630        u32,
2631        u32,
2632        Sdadcrlpft2_SPEC,
2633        crate::common::R,
2634    > {
2635        crate::common::RegisterField::<
2636            0,
2637            0xffffffff,
2638            1,
2639            0,
2640            u32,
2641            u32,
2642            Sdadcrlpft2_SPEC,
2643            crate::common::R,
2644        >::from_register(self, 0)
2645    }
2646}
2647impl ::core::default::Default for Sdadcrlpft2 {
2648    #[inline(always)]
2649    fn default() -> Sdadcrlpft2 {
2650        <crate::RegValueT<Sdadcrlpft2_SPEC> as RegisterValue<_>>::new(0)
2651    }
2652}
ra2a2_pac/sdadc24_b.rs

ra2a2_pac/
sdadc24_b.rs
