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ra2a2_pac/
iic0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.02, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:01:00 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Inter-Integrated Circuit 0"]
28unsafe impl ::core::marker::Send for super::Iic0 {}
29unsafe impl ::core::marker::Sync for super::Iic0 {}
30impl super::Iic0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "I2C Bus Control Register 1"]
38    #[inline(always)]
39    pub const fn iccr1(&self) -> &'static crate::common::Reg<self::Iccr1_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Iccr1_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "I2C Bus Control Register 2"]
48    #[inline(always)]
49    pub const fn iccr2(&self) -> &'static crate::common::Reg<self::Iccr2_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Iccr2_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(1usize),
53            )
54        }
55    }
56
57    #[doc = "I2C Bus Mode Register 1"]
58    #[inline(always)]
59    pub const fn icmr1(&self) -> &'static crate::common::Reg<self::Icmr1_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Icmr1_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(2usize),
63            )
64        }
65    }
66
67    #[doc = "I2C Bus Mode Register 2"]
68    #[inline(always)]
69    pub const fn icmr2(&self) -> &'static crate::common::Reg<self::Icmr2_SPEC, crate::common::RW> {
70        unsafe {
71            crate::common::Reg::<self::Icmr2_SPEC, crate::common::RW>::from_ptr(
72                self._svd2pac_as_ptr().add(3usize),
73            )
74        }
75    }
76
77    #[doc = "I2C Bus Mode Register 3"]
78    #[inline(always)]
79    pub const fn icmr3(&self) -> &'static crate::common::Reg<self::Icmr3_SPEC, crate::common::RW> {
80        unsafe {
81            crate::common::Reg::<self::Icmr3_SPEC, crate::common::RW>::from_ptr(
82                self._svd2pac_as_ptr().add(4usize),
83            )
84        }
85    }
86
87    #[doc = "I2C Bus Function Enable Register"]
88    #[inline(always)]
89    pub const fn icfer(&self) -> &'static crate::common::Reg<self::Icfer_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Icfer_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(5usize),
93            )
94        }
95    }
96
97    #[doc = "I2C Bus Status Enable Register"]
98    #[inline(always)]
99    pub const fn icser(&self) -> &'static crate::common::Reg<self::Icser_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Icser_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(6usize),
103            )
104        }
105    }
106
107    #[doc = "I2C Bus Interrupt Enable Register"]
108    #[inline(always)]
109    pub const fn icier(&self) -> &'static crate::common::Reg<self::Icier_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Icier_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(7usize),
113            )
114        }
115    }
116
117    #[doc = "I2C Bus Status Register 1"]
118    #[inline(always)]
119    pub const fn icsr1(&self) -> &'static crate::common::Reg<self::Icsr1_SPEC, crate::common::RW> {
120        unsafe {
121            crate::common::Reg::<self::Icsr1_SPEC, crate::common::RW>::from_ptr(
122                self._svd2pac_as_ptr().add(8usize),
123            )
124        }
125    }
126
127    #[doc = "I2C Bus Status Register 2"]
128    #[inline(always)]
129    pub const fn icsr2(&self) -> &'static crate::common::Reg<self::Icsr2_SPEC, crate::common::RW> {
130        unsafe {
131            crate::common::Reg::<self::Icsr2_SPEC, crate::common::RW>::from_ptr(
132                self._svd2pac_as_ptr().add(9usize),
133            )
134        }
135    }
136
137    #[doc = "Slave Address Register Ly"]
138    #[inline(always)]
139    pub const fn sarl(
140        &self,
141    ) -> &'static crate::common::ClusterRegisterArray<
142        crate::common::Reg<self::Sarl_SPEC, crate::common::RW>,
143        3,
144        0x2,
145    > {
146        unsafe {
147            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xausize))
148        }
149    }
150    #[inline(always)]
151    pub const fn sarl0(&self) -> &'static crate::common::Reg<self::Sarl_SPEC, crate::common::RW> {
152        unsafe {
153            crate::common::Reg::<self::Sarl_SPEC, crate::common::RW>::from_ptr(
154                self._svd2pac_as_ptr().add(0xausize),
155            )
156        }
157    }
158    #[inline(always)]
159    pub const fn sarl1(&self) -> &'static crate::common::Reg<self::Sarl_SPEC, crate::common::RW> {
160        unsafe {
161            crate::common::Reg::<self::Sarl_SPEC, crate::common::RW>::from_ptr(
162                self._svd2pac_as_ptr().add(0xcusize),
163            )
164        }
165    }
166    #[inline(always)]
167    pub const fn sarl2(&self) -> &'static crate::common::Reg<self::Sarl_SPEC, crate::common::RW> {
168        unsafe {
169            crate::common::Reg::<self::Sarl_SPEC, crate::common::RW>::from_ptr(
170                self._svd2pac_as_ptr().add(0xeusize),
171            )
172        }
173    }
174
175    #[doc = "Slave Address Register Uy"]
176    #[inline(always)]
177    pub const fn saru(
178        &self,
179    ) -> &'static crate::common::ClusterRegisterArray<
180        crate::common::Reg<self::Saru_SPEC, crate::common::RW>,
181        3,
182        0x2,
183    > {
184        unsafe {
185            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xbusize))
186        }
187    }
188    #[inline(always)]
189    pub const fn saru0(&self) -> &'static crate::common::Reg<self::Saru_SPEC, crate::common::RW> {
190        unsafe {
191            crate::common::Reg::<self::Saru_SPEC, crate::common::RW>::from_ptr(
192                self._svd2pac_as_ptr().add(0xbusize),
193            )
194        }
195    }
196    #[inline(always)]
197    pub const fn saru1(&self) -> &'static crate::common::Reg<self::Saru_SPEC, crate::common::RW> {
198        unsafe {
199            crate::common::Reg::<self::Saru_SPEC, crate::common::RW>::from_ptr(
200                self._svd2pac_as_ptr().add(0xdusize),
201            )
202        }
203    }
204    #[inline(always)]
205    pub const fn saru2(&self) -> &'static crate::common::Reg<self::Saru_SPEC, crate::common::RW> {
206        unsafe {
207            crate::common::Reg::<self::Saru_SPEC, crate::common::RW>::from_ptr(
208                self._svd2pac_as_ptr().add(0xfusize),
209            )
210        }
211    }
212
213    #[doc = "I2C Bus Bit Rate Low-Level Register"]
214    #[inline(always)]
215    pub const fn icbrl(&self) -> &'static crate::common::Reg<self::Icbrl_SPEC, crate::common::RW> {
216        unsafe {
217            crate::common::Reg::<self::Icbrl_SPEC, crate::common::RW>::from_ptr(
218                self._svd2pac_as_ptr().add(16usize),
219            )
220        }
221    }
222
223    #[doc = "I2C Bus Bit Rate High-Level Register"]
224    #[inline(always)]
225    pub const fn icbrh(&self) -> &'static crate::common::Reg<self::Icbrh_SPEC, crate::common::RW> {
226        unsafe {
227            crate::common::Reg::<self::Icbrh_SPEC, crate::common::RW>::from_ptr(
228                self._svd2pac_as_ptr().add(17usize),
229            )
230        }
231    }
232
233    #[doc = "I2C Bus Transmit Data Register"]
234    #[inline(always)]
235    pub const fn icdrt(&self) -> &'static crate::common::Reg<self::Icdrt_SPEC, crate::common::RW> {
236        unsafe {
237            crate::common::Reg::<self::Icdrt_SPEC, crate::common::RW>::from_ptr(
238                self._svd2pac_as_ptr().add(18usize),
239            )
240        }
241    }
242
243    #[doc = "I2C Bus Receive Data Register"]
244    #[inline(always)]
245    pub const fn icdrr(&self) -> &'static crate::common::Reg<self::Icdrr_SPEC, crate::common::R> {
246        unsafe {
247            crate::common::Reg::<self::Icdrr_SPEC, crate::common::R>::from_ptr(
248                self._svd2pac_as_ptr().add(19usize),
249            )
250        }
251    }
252}
253#[doc(hidden)]
254#[derive(Copy, Clone, Eq, PartialEq)]
255pub struct Iccr1_SPEC;
256impl crate::sealed::RegSpec for Iccr1_SPEC {
257    type DataType = u8;
258}
259
260#[doc = "I2C Bus Control Register 1"]
261pub type Iccr1 = crate::RegValueT<Iccr1_SPEC>;
262
263impl Iccr1 {
264    #[doc = "SDA Line Monitor"]
265    #[inline(always)]
266    pub fn sdai(
267        self,
268    ) -> crate::common::RegisterField<
269        0,
270        0x1,
271        1,
272        0,
273        iccr1::Sdai,
274        iccr1::Sdai,
275        Iccr1_SPEC,
276        crate::common::R,
277    > {
278        crate::common::RegisterField::<
279            0,
280            0x1,
281            1,
282            0,
283            iccr1::Sdai,
284            iccr1::Sdai,
285            Iccr1_SPEC,
286            crate::common::R,
287        >::from_register(self, 0)
288    }
289
290    #[doc = "SCL Line Monitor"]
291    #[inline(always)]
292    pub fn scli(
293        self,
294    ) -> crate::common::RegisterField<
295        1,
296        0x1,
297        1,
298        0,
299        iccr1::Scli,
300        iccr1::Scli,
301        Iccr1_SPEC,
302        crate::common::R,
303    > {
304        crate::common::RegisterField::<
305            1,
306            0x1,
307            1,
308            0,
309            iccr1::Scli,
310            iccr1::Scli,
311            Iccr1_SPEC,
312            crate::common::R,
313        >::from_register(self, 0)
314    }
315
316    #[doc = "SDA Output Control/Monitor"]
317    #[inline(always)]
318    pub fn sdao(
319        self,
320    ) -> crate::common::RegisterField<
321        2,
322        0x1,
323        1,
324        0,
325        iccr1::Sdao,
326        iccr1::Sdao,
327        Iccr1_SPEC,
328        crate::common::RW,
329    > {
330        crate::common::RegisterField::<
331            2,
332            0x1,
333            1,
334            0,
335            iccr1::Sdao,
336            iccr1::Sdao,
337            Iccr1_SPEC,
338            crate::common::RW,
339        >::from_register(self, 0)
340    }
341
342    #[doc = "SCL Output Control/Monitor"]
343    #[inline(always)]
344    pub fn sclo(
345        self,
346    ) -> crate::common::RegisterField<
347        3,
348        0x1,
349        1,
350        0,
351        iccr1::Sclo,
352        iccr1::Sclo,
353        Iccr1_SPEC,
354        crate::common::RW,
355    > {
356        crate::common::RegisterField::<
357            3,
358            0x1,
359            1,
360            0,
361            iccr1::Sclo,
362            iccr1::Sclo,
363            Iccr1_SPEC,
364            crate::common::RW,
365        >::from_register(self, 0)
366    }
367
368    #[doc = "SCLO/SDAO Write Protect"]
369    #[inline(always)]
370    pub fn sowp(
371        self,
372    ) -> crate::common::RegisterField<
373        4,
374        0x1,
375        1,
376        0,
377        iccr1::Sowp,
378        iccr1::Sowp,
379        Iccr1_SPEC,
380        crate::common::W,
381    > {
382        crate::common::RegisterField::<
383            4,
384            0x1,
385            1,
386            0,
387            iccr1::Sowp,
388            iccr1::Sowp,
389            Iccr1_SPEC,
390            crate::common::W,
391        >::from_register(self, 0)
392    }
393
394    #[doc = "Extra SCL Clock Cycle Output"]
395    #[inline(always)]
396    pub fn clo(
397        self,
398    ) -> crate::common::RegisterField<
399        5,
400        0x1,
401        1,
402        0,
403        iccr1::Clo,
404        iccr1::Clo,
405        Iccr1_SPEC,
406        crate::common::RW,
407    > {
408        crate::common::RegisterField::<
409            5,
410            0x1,
411            1,
412            0,
413            iccr1::Clo,
414            iccr1::Clo,
415            Iccr1_SPEC,
416            crate::common::RW,
417        >::from_register(self, 0)
418    }
419
420    #[doc = "I2C Bus Interface Internal Reset"]
421    #[inline(always)]
422    pub fn iicrst(
423        self,
424    ) -> crate::common::RegisterField<
425        6,
426        0x1,
427        1,
428        0,
429        iccr1::Iicrst,
430        iccr1::Iicrst,
431        Iccr1_SPEC,
432        crate::common::RW,
433    > {
434        crate::common::RegisterField::<
435            6,
436            0x1,
437            1,
438            0,
439            iccr1::Iicrst,
440            iccr1::Iicrst,
441            Iccr1_SPEC,
442            crate::common::RW,
443        >::from_register(self, 0)
444    }
445
446    #[doc = "I2C Bus Interface Enable"]
447    #[inline(always)]
448    pub fn ice(
449        self,
450    ) -> crate::common::RegisterField<
451        7,
452        0x1,
453        1,
454        0,
455        iccr1::Ice,
456        iccr1::Ice,
457        Iccr1_SPEC,
458        crate::common::RW,
459    > {
460        crate::common::RegisterField::<
461            7,
462            0x1,
463            1,
464            0,
465            iccr1::Ice,
466            iccr1::Ice,
467            Iccr1_SPEC,
468            crate::common::RW,
469        >::from_register(self, 0)
470    }
471}
472impl ::core::default::Default for Iccr1 {
473    #[inline(always)]
474    fn default() -> Iccr1 {
475        <crate::RegValueT<Iccr1_SPEC> as RegisterValue<_>>::new(31)
476    }
477}
478pub mod iccr1 {
479
480    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
481    pub struct Sdai_SPEC;
482    pub type Sdai = crate::EnumBitfieldStruct<u8, Sdai_SPEC>;
483    impl Sdai {
484        #[doc = "SDAn line is low"]
485        pub const _0: Self = Self::new(0);
486
487        #[doc = "SDAn line is high"]
488        pub const _1: Self = Self::new(1);
489    }
490    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
491    pub struct Scli_SPEC;
492    pub type Scli = crate::EnumBitfieldStruct<u8, Scli_SPEC>;
493    impl Scli {
494        #[doc = "SCLn line is low"]
495        pub const _0: Self = Self::new(0);
496
497        #[doc = "SCLn line is high"]
498        pub const _1: Self = Self::new(1);
499    }
500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
501    pub struct Sdao_SPEC;
502    pub type Sdao = crate::EnumBitfieldStruct<u8, Sdao_SPEC>;
503    impl Sdao {
504        #[doc = "Read: IIC drives SDAn pin low Write: IIC drives SDAn pin low"]
505        pub const _0: Self = Self::new(0);
506
507        #[doc = "Read: IIC releases SDAn pin Write: IIC releases SDAn pin"]
508        pub const _1: Self = Self::new(1);
509    }
510    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
511    pub struct Sclo_SPEC;
512    pub type Sclo = crate::EnumBitfieldStruct<u8, Sclo_SPEC>;
513    impl Sclo {
514        #[doc = "Read: IIC drives SCLn pin low Write: IIC drives SCLn pin low"]
515        pub const _0: Self = Self::new(0);
516
517        #[doc = "Read: IIC releases SCLn pin Write: IIC releases SCLn pin"]
518        pub const _1: Self = Self::new(1);
519    }
520    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
521    pub struct Sowp_SPEC;
522    pub type Sowp = crate::EnumBitfieldStruct<u8, Sowp_SPEC>;
523    impl Sowp {
524        #[doc = "Write enable SCLO and SDAO bits"]
525        pub const _0: Self = Self::new(0);
526
527        #[doc = "Write protect SCLO and SDAO bits"]
528        pub const _1: Self = Self::new(1);
529    }
530    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
531    pub struct Clo_SPEC;
532    pub type Clo = crate::EnumBitfieldStruct<u8, Clo_SPEC>;
533    impl Clo {
534        #[doc = "Do not output extra SCL clock cycle (default)"]
535        pub const _0: Self = Self::new(0);
536
537        #[doc = "Output extra SCL clock cycle"]
538        pub const _1: Self = Self::new(1);
539    }
540    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
541    pub struct Iicrst_SPEC;
542    pub type Iicrst = crate::EnumBitfieldStruct<u8, Iicrst_SPEC>;
543    impl Iicrst {
544        #[doc = "Release IIC reset or internal reset"]
545        pub const _0: Self = Self::new(0);
546
547        #[doc = "Initiate IIC reset or internal reset"]
548        pub const _1: Self = Self::new(1);
549    }
550    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
551    pub struct Ice_SPEC;
552    pub type Ice = crate::EnumBitfieldStruct<u8, Ice_SPEC>;
553    impl Ice {
554        #[doc = "Disable (SCLn and SDAn pins in inactive state)"]
555        pub const _0: Self = Self::new(0);
556
557        #[doc = "Enable (SCLn and SDAn pins in active state)"]
558        pub const _1: Self = Self::new(1);
559    }
560}
561#[doc(hidden)]
562#[derive(Copy, Clone, Eq, PartialEq)]
563pub struct Iccr2_SPEC;
564impl crate::sealed::RegSpec for Iccr2_SPEC {
565    type DataType = u8;
566}
567
568#[doc = "I2C Bus Control Register 2"]
569pub type Iccr2 = crate::RegValueT<Iccr2_SPEC>;
570
571impl Iccr2 {
572    #[doc = "Start Condition Issuance Request"]
573    #[inline(always)]
574    pub fn st(
575        self,
576    ) -> crate::common::RegisterField<
577        1,
578        0x1,
579        1,
580        0,
581        iccr2::St,
582        iccr2::St,
583        Iccr2_SPEC,
584        crate::common::RW,
585    > {
586        crate::common::RegisterField::<
587            1,
588            0x1,
589            1,
590            0,
591            iccr2::St,
592            iccr2::St,
593            Iccr2_SPEC,
594            crate::common::RW,
595        >::from_register(self, 0)
596    }
597
598    #[doc = "Restart Condition Issuance Request"]
599    #[inline(always)]
600    pub fn rs(
601        self,
602    ) -> crate::common::RegisterField<
603        2,
604        0x1,
605        1,
606        0,
607        iccr2::Rs,
608        iccr2::Rs,
609        Iccr2_SPEC,
610        crate::common::RW,
611    > {
612        crate::common::RegisterField::<
613            2,
614            0x1,
615            1,
616            0,
617            iccr2::Rs,
618            iccr2::Rs,
619            Iccr2_SPEC,
620            crate::common::RW,
621        >::from_register(self, 0)
622    }
623
624    #[doc = "Stop Condition Issuance Request"]
625    #[inline(always)]
626    pub fn sp(
627        self,
628    ) -> crate::common::RegisterField<
629        3,
630        0x1,
631        1,
632        0,
633        iccr2::Sp,
634        iccr2::Sp,
635        Iccr2_SPEC,
636        crate::common::RW,
637    > {
638        crate::common::RegisterField::<
639            3,
640            0x1,
641            1,
642            0,
643            iccr2::Sp,
644            iccr2::Sp,
645            Iccr2_SPEC,
646            crate::common::RW,
647        >::from_register(self, 0)
648    }
649
650    #[doc = "Transmit/Receive Mode"]
651    #[inline(always)]
652    pub fn trs(
653        self,
654    ) -> crate::common::RegisterField<
655        5,
656        0x1,
657        1,
658        0,
659        iccr2::Trs,
660        iccr2::Trs,
661        Iccr2_SPEC,
662        crate::common::RW,
663    > {
664        crate::common::RegisterField::<
665            5,
666            0x1,
667            1,
668            0,
669            iccr2::Trs,
670            iccr2::Trs,
671            Iccr2_SPEC,
672            crate::common::RW,
673        >::from_register(self, 0)
674    }
675
676    #[doc = "Master/Slave Mode"]
677    #[inline(always)]
678    pub fn mst(
679        self,
680    ) -> crate::common::RegisterField<
681        6,
682        0x1,
683        1,
684        0,
685        iccr2::Mst,
686        iccr2::Mst,
687        Iccr2_SPEC,
688        crate::common::RW,
689    > {
690        crate::common::RegisterField::<
691            6,
692            0x1,
693            1,
694            0,
695            iccr2::Mst,
696            iccr2::Mst,
697            Iccr2_SPEC,
698            crate::common::RW,
699        >::from_register(self, 0)
700    }
701
702    #[doc = "Bus Busy Detection Flag"]
703    #[inline(always)]
704    pub fn bbsy(
705        self,
706    ) -> crate::common::RegisterField<
707        7,
708        0x1,
709        1,
710        0,
711        iccr2::Bbsy,
712        iccr2::Bbsy,
713        Iccr2_SPEC,
714        crate::common::R,
715    > {
716        crate::common::RegisterField::<
717            7,
718            0x1,
719            1,
720            0,
721            iccr2::Bbsy,
722            iccr2::Bbsy,
723            Iccr2_SPEC,
724            crate::common::R,
725        >::from_register(self, 0)
726    }
727}
728impl ::core::default::Default for Iccr2 {
729    #[inline(always)]
730    fn default() -> Iccr2 {
731        <crate::RegValueT<Iccr2_SPEC> as RegisterValue<_>>::new(0)
732    }
733}
734pub mod iccr2 {
735
736    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
737    pub struct St_SPEC;
738    pub type St = crate::EnumBitfieldStruct<u8, St_SPEC>;
739    impl St {
740        #[doc = "Do not issue a start condition request"]
741        pub const _0: Self = Self::new(0);
742
743        #[doc = "Issue a start condition request"]
744        pub const _1: Self = Self::new(1);
745    }
746    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
747    pub struct Rs_SPEC;
748    pub type Rs = crate::EnumBitfieldStruct<u8, Rs_SPEC>;
749    impl Rs {
750        #[doc = "Do not issue a restart condition request"]
751        pub const _0: Self = Self::new(0);
752
753        #[doc = "Issue a restart condition request"]
754        pub const _1: Self = Self::new(1);
755    }
756    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
757    pub struct Sp_SPEC;
758    pub type Sp = crate::EnumBitfieldStruct<u8, Sp_SPEC>;
759    impl Sp {
760        #[doc = "Do not issue a stop condition request"]
761        pub const _0: Self = Self::new(0);
762
763        #[doc = "Issue a stop condition request"]
764        pub const _1: Self = Self::new(1);
765    }
766    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
767    pub struct Trs_SPEC;
768    pub type Trs = crate::EnumBitfieldStruct<u8, Trs_SPEC>;
769    impl Trs {
770        #[doc = "Receive mode"]
771        pub const _0: Self = Self::new(0);
772
773        #[doc = "Transmit mode"]
774        pub const _1: Self = Self::new(1);
775    }
776    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
777    pub struct Mst_SPEC;
778    pub type Mst = crate::EnumBitfieldStruct<u8, Mst_SPEC>;
779    impl Mst {
780        #[doc = "Slave mode"]
781        pub const _0: Self = Self::new(0);
782
783        #[doc = "Master mode"]
784        pub const _1: Self = Self::new(1);
785    }
786    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
787    pub struct Bbsy_SPEC;
788    pub type Bbsy = crate::EnumBitfieldStruct<u8, Bbsy_SPEC>;
789    impl Bbsy {
790        #[doc = "I2C bus released (bus free state)"]
791        pub const _0: Self = Self::new(0);
792
793        #[doc = "I2C bus occupied (bus busy state)"]
794        pub const _1: Self = Self::new(1);
795    }
796}
797#[doc(hidden)]
798#[derive(Copy, Clone, Eq, PartialEq)]
799pub struct Icmr1_SPEC;
800impl crate::sealed::RegSpec for Icmr1_SPEC {
801    type DataType = u8;
802}
803
804#[doc = "I2C Bus Mode Register 1"]
805pub type Icmr1 = crate::RegValueT<Icmr1_SPEC>;
806
807impl Icmr1 {
808    #[doc = "Bit Counter"]
809    #[inline(always)]
810    pub fn bc(
811        self,
812    ) -> crate::common::RegisterField<
813        0,
814        0x7,
815        1,
816        0,
817        icmr1::Bc,
818        icmr1::Bc,
819        Icmr1_SPEC,
820        crate::common::RW,
821    > {
822        crate::common::RegisterField::<
823            0,
824            0x7,
825            1,
826            0,
827            icmr1::Bc,
828            icmr1::Bc,
829            Icmr1_SPEC,
830            crate::common::RW,
831        >::from_register(self, 0)
832    }
833
834    #[doc = "BC Write Protect"]
835    #[inline(always)]
836    pub fn bcwp(
837        self,
838    ) -> crate::common::RegisterField<
839        3,
840        0x1,
841        1,
842        0,
843        icmr1::Bcwp,
844        icmr1::Bcwp,
845        Icmr1_SPEC,
846        crate::common::W,
847    > {
848        crate::common::RegisterField::<
849            3,
850            0x1,
851            1,
852            0,
853            icmr1::Bcwp,
854            icmr1::Bcwp,
855            Icmr1_SPEC,
856            crate::common::W,
857        >::from_register(self, 0)
858    }
859
860    #[doc = "Internal Reference Clock Select"]
861    #[inline(always)]
862    pub fn cks(
863        self,
864    ) -> crate::common::RegisterField<4, 0x7, 1, 0, u8, u8, Icmr1_SPEC, crate::common::RW> {
865        crate::common::RegisterField::<4,0x7,1,0,u8,u8,Icmr1_SPEC,crate::common::RW>::from_register(self,0)
866    }
867
868    #[doc = "MST/TRS Write Protect"]
869    #[inline(always)]
870    pub fn mtwp(
871        self,
872    ) -> crate::common::RegisterField<
873        7,
874        0x1,
875        1,
876        0,
877        icmr1::Mtwp,
878        icmr1::Mtwp,
879        Icmr1_SPEC,
880        crate::common::RW,
881    > {
882        crate::common::RegisterField::<
883            7,
884            0x1,
885            1,
886            0,
887            icmr1::Mtwp,
888            icmr1::Mtwp,
889            Icmr1_SPEC,
890            crate::common::RW,
891        >::from_register(self, 0)
892    }
893}
894impl ::core::default::Default for Icmr1 {
895    #[inline(always)]
896    fn default() -> Icmr1 {
897        <crate::RegValueT<Icmr1_SPEC> as RegisterValue<_>>::new(8)
898    }
899}
900pub mod icmr1 {
901
902    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
903    pub struct Bc_SPEC;
904    pub type Bc = crate::EnumBitfieldStruct<u8, Bc_SPEC>;
905    impl Bc {
906        #[doc = "9 bits"]
907        pub const _000: Self = Self::new(0);
908
909        #[doc = "2 bits"]
910        pub const _001: Self = Self::new(1);
911
912        #[doc = "3 bits"]
913        pub const _010: Self = Self::new(2);
914
915        #[doc = "4 bits"]
916        pub const _011: Self = Self::new(3);
917
918        #[doc = "5 bits"]
919        pub const _100: Self = Self::new(4);
920
921        #[doc = "6 bits"]
922        pub const _101: Self = Self::new(5);
923
924        #[doc = "7 bits"]
925        pub const _110: Self = Self::new(6);
926
927        #[doc = "8 bits"]
928        pub const _111: Self = Self::new(7);
929    }
930    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
931    pub struct Bcwp_SPEC;
932    pub type Bcwp = crate::EnumBitfieldStruct<u8, Bcwp_SPEC>;
933    impl Bcwp {
934        #[doc = "Write enable BC\\[2:0\\] bits"]
935        pub const _0: Self = Self::new(0);
936
937        #[doc = "Write protect BC\\[2:0\\] bits"]
938        pub const _1: Self = Self::new(1);
939    }
940    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
941    pub struct Mtwp_SPEC;
942    pub type Mtwp = crate::EnumBitfieldStruct<u8, Mtwp_SPEC>;
943    impl Mtwp {
944        #[doc = "Write protect MST and TRS bits in ICCR2"]
945        pub const _0: Self = Self::new(0);
946
947        #[doc = "Write enable MST and TRS bits in ICCR2"]
948        pub const _1: Self = Self::new(1);
949    }
950}
951#[doc(hidden)]
952#[derive(Copy, Clone, Eq, PartialEq)]
953pub struct Icmr2_SPEC;
954impl crate::sealed::RegSpec for Icmr2_SPEC {
955    type DataType = u8;
956}
957
958#[doc = "I2C Bus Mode Register 2"]
959pub type Icmr2 = crate::RegValueT<Icmr2_SPEC>;
960
961impl Icmr2 {
962    #[doc = "Timeout Detection Time Select"]
963    #[inline(always)]
964    pub fn tmos(
965        self,
966    ) -> crate::common::RegisterField<
967        0,
968        0x1,
969        1,
970        0,
971        icmr2::Tmos,
972        icmr2::Tmos,
973        Icmr2_SPEC,
974        crate::common::RW,
975    > {
976        crate::common::RegisterField::<
977            0,
978            0x1,
979            1,
980            0,
981            icmr2::Tmos,
982            icmr2::Tmos,
983            Icmr2_SPEC,
984            crate::common::RW,
985        >::from_register(self, 0)
986    }
987
988    #[doc = "Timeout L Count Control"]
989    #[inline(always)]
990    pub fn tmol(
991        self,
992    ) -> crate::common::RegisterField<
993        1,
994        0x1,
995        1,
996        0,
997        icmr2::Tmol,
998        icmr2::Tmol,
999        Icmr2_SPEC,
1000        crate::common::RW,
1001    > {
1002        crate::common::RegisterField::<
1003            1,
1004            0x1,
1005            1,
1006            0,
1007            icmr2::Tmol,
1008            icmr2::Tmol,
1009            Icmr2_SPEC,
1010            crate::common::RW,
1011        >::from_register(self, 0)
1012    }
1013
1014    #[doc = "Timeout H Count Control"]
1015    #[inline(always)]
1016    pub fn tmoh(
1017        self,
1018    ) -> crate::common::RegisterField<
1019        2,
1020        0x1,
1021        1,
1022        0,
1023        icmr2::Tmoh,
1024        icmr2::Tmoh,
1025        Icmr2_SPEC,
1026        crate::common::RW,
1027    > {
1028        crate::common::RegisterField::<
1029            2,
1030            0x1,
1031            1,
1032            0,
1033            icmr2::Tmoh,
1034            icmr2::Tmoh,
1035            Icmr2_SPEC,
1036            crate::common::RW,
1037        >::from_register(self, 0)
1038    }
1039
1040    #[doc = "SDA Output Delay Counter"]
1041    #[inline(always)]
1042    pub fn sddl(
1043        self,
1044    ) -> crate::common::RegisterField<
1045        4,
1046        0x7,
1047        1,
1048        0,
1049        icmr2::Sddl,
1050        icmr2::Sddl,
1051        Icmr2_SPEC,
1052        crate::common::RW,
1053    > {
1054        crate::common::RegisterField::<
1055            4,
1056            0x7,
1057            1,
1058            0,
1059            icmr2::Sddl,
1060            icmr2::Sddl,
1061            Icmr2_SPEC,
1062            crate::common::RW,
1063        >::from_register(self, 0)
1064    }
1065
1066    #[doc = "SDA Output Delay Clock Source Select"]
1067    #[inline(always)]
1068    pub fn dlcs(
1069        self,
1070    ) -> crate::common::RegisterField<
1071        7,
1072        0x1,
1073        1,
1074        0,
1075        icmr2::Dlcs,
1076        icmr2::Dlcs,
1077        Icmr2_SPEC,
1078        crate::common::RW,
1079    > {
1080        crate::common::RegisterField::<
1081            7,
1082            0x1,
1083            1,
1084            0,
1085            icmr2::Dlcs,
1086            icmr2::Dlcs,
1087            Icmr2_SPEC,
1088            crate::common::RW,
1089        >::from_register(self, 0)
1090    }
1091}
1092impl ::core::default::Default for Icmr2 {
1093    #[inline(always)]
1094    fn default() -> Icmr2 {
1095        <crate::RegValueT<Icmr2_SPEC> as RegisterValue<_>>::new(6)
1096    }
1097}
1098pub mod icmr2 {
1099
1100    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1101    pub struct Tmos_SPEC;
1102    pub type Tmos = crate::EnumBitfieldStruct<u8, Tmos_SPEC>;
1103    impl Tmos {
1104        #[doc = "Select long mode"]
1105        pub const _0: Self = Self::new(0);
1106
1107        #[doc = "Select short mode"]
1108        pub const _1: Self = Self::new(1);
1109    }
1110    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1111    pub struct Tmol_SPEC;
1112    pub type Tmol = crate::EnumBitfieldStruct<u8, Tmol_SPEC>;
1113    impl Tmol {
1114        #[doc = "Disable count while SCLn line is low"]
1115        pub const _0: Self = Self::new(0);
1116
1117        #[doc = "Enable count while SCLn line is low"]
1118        pub const _1: Self = Self::new(1);
1119    }
1120    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1121    pub struct Tmoh_SPEC;
1122    pub type Tmoh = crate::EnumBitfieldStruct<u8, Tmoh_SPEC>;
1123    impl Tmoh {
1124        #[doc = "Disable count while SCLn line is high"]
1125        pub const _0: Self = Self::new(0);
1126
1127        #[doc = "Enable count while SCLn line is high"]
1128        pub const _1: Self = Self::new(1);
1129    }
1130    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1131    pub struct Sddl_SPEC;
1132    pub type Sddl = crate::EnumBitfieldStruct<u8, Sddl_SPEC>;
1133    impl Sddl {
1134        #[doc = "No output delay"]
1135        pub const _000: Self = Self::new(0);
1136
1137        #[doc = "1 cycle (when ICMR2.DLCS = 0 (IIC)) 1 or 2 cycles (when ICMR2.DLCS = 1 (/2))"]
1138        pub const _001: Self = Self::new(1);
1139
1140        #[doc = "2 cycles (when ICMR2.DLCS = 0 ()) 3 or 4 cycles (when ICMR2.DLCS = 1 (/2))"]
1141        pub const _010: Self = Self::new(2);
1142
1143        #[doc = "3 cycles (when ICMR2.DLCS = 0 ()) 5 or 6 cycles (when ICMR2.DLCS = 1 (/2))"]
1144        pub const _011: Self = Self::new(3);
1145
1146        #[doc = "4 cycles (when ICMR2.DLCS = 0 ()) 7 or 8 cycles (when ICMR2.DLCS = 1 (/2))"]
1147        pub const _100: Self = Self::new(4);
1148
1149        #[doc = "5 cycles (when ICMR2.DLCS = 0 ()) 9 or 10 cycles (when ICMR2.DLCS = 1 (/2))"]
1150        pub const _101: Self = Self::new(5);
1151
1152        #[doc = "6 cycles (when ICMR2.DLCS = 0 ()) 11 or 12 cycles (when ICMR2.DLCS = 1 (/2))"]
1153        pub const _110: Self = Self::new(6);
1154
1155        #[doc = "7 cycles (when ICMR2.DLCS = 0 ()) 13 or 14 cycles (when ICMR2.DLCS = 1 (/2))"]
1156        pub const _111: Self = Self::new(7);
1157    }
1158    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1159    pub struct Dlcs_SPEC;
1160    pub type Dlcs = crate::EnumBitfieldStruct<u8, Dlcs_SPEC>;
1161    impl Dlcs {
1162        #[doc = "Select internal reference clock () as the clock source for SDA output delay counter"]
1163        pub const _0: Self = Self::new(0);
1164
1165        #[doc = "Select internal reference clock divided by 2 (/2) as the clock source for SDA output delay counter"]
1166        pub const _1: Self = Self::new(1);
1167    }
1168}
1169#[doc(hidden)]
1170#[derive(Copy, Clone, Eq, PartialEq)]
1171pub struct Icmr3_SPEC;
1172impl crate::sealed::RegSpec for Icmr3_SPEC {
1173    type DataType = u8;
1174}
1175
1176#[doc = "I2C Bus Mode Register 3"]
1177pub type Icmr3 = crate::RegValueT<Icmr3_SPEC>;
1178
1179impl Icmr3 {
1180    #[doc = "Noise Filter Stage Select"]
1181    #[inline(always)]
1182    pub fn nf(
1183        self,
1184    ) -> crate::common::RegisterField<
1185        0,
1186        0x3,
1187        1,
1188        0,
1189        icmr3::Nf,
1190        icmr3::Nf,
1191        Icmr3_SPEC,
1192        crate::common::RW,
1193    > {
1194        crate::common::RegisterField::<
1195            0,
1196            0x3,
1197            1,
1198            0,
1199            icmr3::Nf,
1200            icmr3::Nf,
1201            Icmr3_SPEC,
1202            crate::common::RW,
1203        >::from_register(self, 0)
1204    }
1205
1206    #[doc = "Receive Acknowledge"]
1207    #[inline(always)]
1208    pub fn ackbr(
1209        self,
1210    ) -> crate::common::RegisterField<
1211        2,
1212        0x1,
1213        1,
1214        0,
1215        icmr3::Ackbr,
1216        icmr3::Ackbr,
1217        Icmr3_SPEC,
1218        crate::common::R,
1219    > {
1220        crate::common::RegisterField::<
1221            2,
1222            0x1,
1223            1,
1224            0,
1225            icmr3::Ackbr,
1226            icmr3::Ackbr,
1227            Icmr3_SPEC,
1228            crate::common::R,
1229        >::from_register(self, 0)
1230    }
1231
1232    #[doc = "Transmit Acknowledge"]
1233    #[inline(always)]
1234    pub fn ackbt(
1235        self,
1236    ) -> crate::common::RegisterField<
1237        3,
1238        0x1,
1239        1,
1240        0,
1241        icmr3::Ackbt,
1242        icmr3::Ackbt,
1243        Icmr3_SPEC,
1244        crate::common::RW,
1245    > {
1246        crate::common::RegisterField::<
1247            3,
1248            0x1,
1249            1,
1250            0,
1251            icmr3::Ackbt,
1252            icmr3::Ackbt,
1253            Icmr3_SPEC,
1254            crate::common::RW,
1255        >::from_register(self, 0)
1256    }
1257
1258    #[doc = "ACKBT Write Protect"]
1259    #[inline(always)]
1260    pub fn ackwp(
1261        self,
1262    ) -> crate::common::RegisterField<
1263        4,
1264        0x1,
1265        1,
1266        0,
1267        icmr3::Ackwp,
1268        icmr3::Ackwp,
1269        Icmr3_SPEC,
1270        crate::common::RW,
1271    > {
1272        crate::common::RegisterField::<
1273            4,
1274            0x1,
1275            1,
1276            0,
1277            icmr3::Ackwp,
1278            icmr3::Ackwp,
1279            Icmr3_SPEC,
1280            crate::common::RW,
1281        >::from_register(self, 0)
1282    }
1283
1284    #[doc = "RDRF Flag Set Timing Select"]
1285    #[inline(always)]
1286    pub fn rdrfs(
1287        self,
1288    ) -> crate::common::RegisterField<
1289        5,
1290        0x1,
1291        1,
1292        0,
1293        icmr3::Rdrfs,
1294        icmr3::Rdrfs,
1295        Icmr3_SPEC,
1296        crate::common::RW,
1297    > {
1298        crate::common::RegisterField::<
1299            5,
1300            0x1,
1301            1,
1302            0,
1303            icmr3::Rdrfs,
1304            icmr3::Rdrfs,
1305            Icmr3_SPEC,
1306            crate::common::RW,
1307        >::from_register(self, 0)
1308    }
1309
1310    #[doc = "Low-hold is released by reading ICDRR."]
1311    #[inline(always)]
1312    pub fn wait(
1313        self,
1314    ) -> crate::common::RegisterField<
1315        6,
1316        0x1,
1317        1,
1318        0,
1319        icmr3::Wait,
1320        icmr3::Wait,
1321        Icmr3_SPEC,
1322        crate::common::RW,
1323    > {
1324        crate::common::RegisterField::<
1325            6,
1326            0x1,
1327            1,
1328            0,
1329            icmr3::Wait,
1330            icmr3::Wait,
1331            Icmr3_SPEC,
1332            crate::common::RW,
1333        >::from_register(self, 0)
1334    }
1335
1336    #[doc = "SMBus/I2C Bus Select"]
1337    #[inline(always)]
1338    pub fn smbs(
1339        self,
1340    ) -> crate::common::RegisterField<
1341        7,
1342        0x1,
1343        1,
1344        0,
1345        icmr3::Smbs,
1346        icmr3::Smbs,
1347        Icmr3_SPEC,
1348        crate::common::RW,
1349    > {
1350        crate::common::RegisterField::<
1351            7,
1352            0x1,
1353            1,
1354            0,
1355            icmr3::Smbs,
1356            icmr3::Smbs,
1357            Icmr3_SPEC,
1358            crate::common::RW,
1359        >::from_register(self, 0)
1360    }
1361}
1362impl ::core::default::Default for Icmr3 {
1363    #[inline(always)]
1364    fn default() -> Icmr3 {
1365        <crate::RegValueT<Icmr3_SPEC> as RegisterValue<_>>::new(0)
1366    }
1367}
1368pub mod icmr3 {
1369
1370    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1371    pub struct Nf_SPEC;
1372    pub type Nf = crate::EnumBitfieldStruct<u8, Nf_SPEC>;
1373    impl Nf {
1374        #[doc = "Filter out noise of up to 1 cycle (single-stage filter)"]
1375        pub const _00: Self = Self::new(0);
1376
1377        #[doc = "Filter out noise of up to 2 cycles (2-stage filter)"]
1378        pub const _01: Self = Self::new(1);
1379
1380        #[doc = "Filter out noise of up to 3 cycles (3-stage filter)"]
1381        pub const _10: Self = Self::new(2);
1382
1383        #[doc = "Filter out noise of up to 4 cycles (4-stage filter)"]
1384        pub const _11: Self = Self::new(3);
1385    }
1386    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1387    pub struct Ackbr_SPEC;
1388    pub type Ackbr = crate::EnumBitfieldStruct<u8, Ackbr_SPEC>;
1389    impl Ackbr {
1390        #[doc = "0 received as the acknowledge bit (ACK reception)"]
1391        pub const _0: Self = Self::new(0);
1392
1393        #[doc = "1 received as the acknowledge bit (NACK reception)"]
1394        pub const _1: Self = Self::new(1);
1395    }
1396    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1397    pub struct Ackbt_SPEC;
1398    pub type Ackbt = crate::EnumBitfieldStruct<u8, Ackbt_SPEC>;
1399    impl Ackbt {
1400        #[doc = "Send 0 as the acknowledge bit (ACK transmission)"]
1401        pub const _0: Self = Self::new(0);
1402
1403        #[doc = "Send 1 as the acknowledge bit (NACK transmission)"]
1404        pub const _1: Self = Self::new(1);
1405    }
1406    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1407    pub struct Ackwp_SPEC;
1408    pub type Ackwp = crate::EnumBitfieldStruct<u8, Ackwp_SPEC>;
1409    impl Ackwp {
1410        #[doc = "Write protect ACKBT bit"]
1411        pub const _0: Self = Self::new(0);
1412
1413        #[doc = "Write enable ACKBT bit"]
1414        pub const _1: Self = Self::new(1);
1415    }
1416    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1417    pub struct Rdrfs_SPEC;
1418    pub type Rdrfs = crate::EnumBitfieldStruct<u8, Rdrfs_SPEC>;
1419    impl Rdrfs {
1420        #[doc = "Set the RDRF flag on the rising edge of the 9th SCL clock cycle. The SCLn line is not held low on the falling edge of the 8th clock cycle."]
1421        pub const _0: Self = Self::new(0);
1422
1423        #[doc = "Set the RDRF flag on the rising edge of the 8th SCL clock cycle. The SCLn line is held low on the falling edge of the 8th clock cycle."]
1424        pub const _1: Self = Self::new(1);
1425    }
1426    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1427    pub struct Wait_SPEC;
1428    pub type Wait = crate::EnumBitfieldStruct<u8, Wait_SPEC>;
1429    impl Wait {
1430        #[doc = "No wait (The SCLn line is not held low during the period between the 9th clock cycle and the 1st clock cycle.)"]
1431        pub const _0: Self = Self::new(0);
1432
1433        #[doc = "Wait (The SCLn line is held low during the period between the 9th clock cycle and the 1st clock cycle.)"]
1434        pub const _1: Self = Self::new(1);
1435    }
1436    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1437    pub struct Smbs_SPEC;
1438    pub type Smbs = crate::EnumBitfieldStruct<u8, Smbs_SPEC>;
1439    impl Smbs {
1440        #[doc = "Select I2C Bus"]
1441        pub const _0: Self = Self::new(0);
1442
1443        #[doc = "Select SMBus"]
1444        pub const _1: Self = Self::new(1);
1445    }
1446}
1447#[doc(hidden)]
1448#[derive(Copy, Clone, Eq, PartialEq)]
1449pub struct Icfer_SPEC;
1450impl crate::sealed::RegSpec for Icfer_SPEC {
1451    type DataType = u8;
1452}
1453
1454#[doc = "I2C Bus Function Enable Register"]
1455pub type Icfer = crate::RegValueT<Icfer_SPEC>;
1456
1457impl Icfer {
1458    #[doc = "Timeout Function Enable"]
1459    #[inline(always)]
1460    pub fn tmoe(
1461        self,
1462    ) -> crate::common::RegisterField<
1463        0,
1464        0x1,
1465        1,
1466        0,
1467        icfer::Tmoe,
1468        icfer::Tmoe,
1469        Icfer_SPEC,
1470        crate::common::RW,
1471    > {
1472        crate::common::RegisterField::<
1473            0,
1474            0x1,
1475            1,
1476            0,
1477            icfer::Tmoe,
1478            icfer::Tmoe,
1479            Icfer_SPEC,
1480            crate::common::RW,
1481        >::from_register(self, 0)
1482    }
1483
1484    #[doc = "Master Arbitration-Lost Detection Enable"]
1485    #[inline(always)]
1486    pub fn male(
1487        self,
1488    ) -> crate::common::RegisterField<
1489        1,
1490        0x1,
1491        1,
1492        0,
1493        icfer::Male,
1494        icfer::Male,
1495        Icfer_SPEC,
1496        crate::common::RW,
1497    > {
1498        crate::common::RegisterField::<
1499            1,
1500            0x1,
1501            1,
1502            0,
1503            icfer::Male,
1504            icfer::Male,
1505            Icfer_SPEC,
1506            crate::common::RW,
1507        >::from_register(self, 0)
1508    }
1509
1510    #[doc = "NACK Transmission Arbitration-Lost Detection Enable"]
1511    #[inline(always)]
1512    pub fn nale(
1513        self,
1514    ) -> crate::common::RegisterField<
1515        2,
1516        0x1,
1517        1,
1518        0,
1519        icfer::Nale,
1520        icfer::Nale,
1521        Icfer_SPEC,
1522        crate::common::RW,
1523    > {
1524        crate::common::RegisterField::<
1525            2,
1526            0x1,
1527            1,
1528            0,
1529            icfer::Nale,
1530            icfer::Nale,
1531            Icfer_SPEC,
1532            crate::common::RW,
1533        >::from_register(self, 0)
1534    }
1535
1536    #[doc = "Slave Arbitration-Lost Detection Enable"]
1537    #[inline(always)]
1538    pub fn sale(
1539        self,
1540    ) -> crate::common::RegisterField<
1541        3,
1542        0x1,
1543        1,
1544        0,
1545        icfer::Sale,
1546        icfer::Sale,
1547        Icfer_SPEC,
1548        crate::common::RW,
1549    > {
1550        crate::common::RegisterField::<
1551            3,
1552            0x1,
1553            1,
1554            0,
1555            icfer::Sale,
1556            icfer::Sale,
1557            Icfer_SPEC,
1558            crate::common::RW,
1559        >::from_register(self, 0)
1560    }
1561
1562    #[doc = "NACK Reception Transfer Suspension Enable"]
1563    #[inline(always)]
1564    pub fn nacke(
1565        self,
1566    ) -> crate::common::RegisterField<
1567        4,
1568        0x1,
1569        1,
1570        0,
1571        icfer::Nacke,
1572        icfer::Nacke,
1573        Icfer_SPEC,
1574        crate::common::RW,
1575    > {
1576        crate::common::RegisterField::<
1577            4,
1578            0x1,
1579            1,
1580            0,
1581            icfer::Nacke,
1582            icfer::Nacke,
1583            Icfer_SPEC,
1584            crate::common::RW,
1585        >::from_register(self, 0)
1586    }
1587
1588    #[doc = "Digital Noise Filter Circuit Enable"]
1589    #[inline(always)]
1590    pub fn nfe(
1591        self,
1592    ) -> crate::common::RegisterField<
1593        5,
1594        0x1,
1595        1,
1596        0,
1597        icfer::Nfe,
1598        icfer::Nfe,
1599        Icfer_SPEC,
1600        crate::common::RW,
1601    > {
1602        crate::common::RegisterField::<
1603            5,
1604            0x1,
1605            1,
1606            0,
1607            icfer::Nfe,
1608            icfer::Nfe,
1609            Icfer_SPEC,
1610            crate::common::RW,
1611        >::from_register(self, 0)
1612    }
1613
1614    #[doc = "SCL Synchronous Circuit Enable"]
1615    #[inline(always)]
1616    pub fn scle(
1617        self,
1618    ) -> crate::common::RegisterField<
1619        6,
1620        0x1,
1621        1,
1622        0,
1623        icfer::Scle,
1624        icfer::Scle,
1625        Icfer_SPEC,
1626        crate::common::RW,
1627    > {
1628        crate::common::RegisterField::<
1629            6,
1630            0x1,
1631            1,
1632            0,
1633            icfer::Scle,
1634            icfer::Scle,
1635            Icfer_SPEC,
1636            crate::common::RW,
1637        >::from_register(self, 0)
1638    }
1639}
1640impl ::core::default::Default for Icfer {
1641    #[inline(always)]
1642    fn default() -> Icfer {
1643        <crate::RegValueT<Icfer_SPEC> as RegisterValue<_>>::new(114)
1644    }
1645}
1646pub mod icfer {
1647
1648    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1649    pub struct Tmoe_SPEC;
1650    pub type Tmoe = crate::EnumBitfieldStruct<u8, Tmoe_SPEC>;
1651    impl Tmoe {
1652        #[doc = "Disable"]
1653        pub const _0: Self = Self::new(0);
1654
1655        #[doc = "Enable"]
1656        pub const _1: Self = Self::new(1);
1657    }
1658    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1659    pub struct Male_SPEC;
1660    pub type Male = crate::EnumBitfieldStruct<u8, Male_SPEC>;
1661    impl Male {
1662        #[doc = "Disable the arbitration-lost detection function and disable automatic clearing of the MST and TRS bits in ICCR2 when arbitration is lost"]
1663        pub const _0: Self = Self::new(0);
1664
1665        #[doc = "Enable the arbitration-lost detection function and enable automatic clearing of the MST and TRS bits in ICCR2 when arbitration is lost"]
1666        pub const _1: Self = Self::new(1);
1667    }
1668    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1669    pub struct Nale_SPEC;
1670    pub type Nale = crate::EnumBitfieldStruct<u8, Nale_SPEC>;
1671    impl Nale {
1672        #[doc = "Disable"]
1673        pub const _0: Self = Self::new(0);
1674
1675        #[doc = "Enable"]
1676        pub const _1: Self = Self::new(1);
1677    }
1678    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1679    pub struct Sale_SPEC;
1680    pub type Sale = crate::EnumBitfieldStruct<u8, Sale_SPEC>;
1681    impl Sale {
1682        #[doc = "Disable"]
1683        pub const _0: Self = Self::new(0);
1684
1685        #[doc = "Enable"]
1686        pub const _1: Self = Self::new(1);
1687    }
1688    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1689    pub struct Nacke_SPEC;
1690    pub type Nacke = crate::EnumBitfieldStruct<u8, Nacke_SPEC>;
1691    impl Nacke {
1692        #[doc = "Do not suspend transfer operation during NACK reception (disable transfer suspension)"]
1693        pub const _0: Self = Self::new(0);
1694
1695        #[doc = "Suspend transfer operation during NACK reception (enable transfer suspension)"]
1696        pub const _1: Self = Self::new(1);
1697    }
1698    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1699    pub struct Nfe_SPEC;
1700    pub type Nfe = crate::EnumBitfieldStruct<u8, Nfe_SPEC>;
1701    impl Nfe {
1702        #[doc = "Do not use the digital noise filter circuit"]
1703        pub const _0: Self = Self::new(0);
1704
1705        #[doc = "Use the digital noise filter circuit"]
1706        pub const _1: Self = Self::new(1);
1707    }
1708    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1709    pub struct Scle_SPEC;
1710    pub type Scle = crate::EnumBitfieldStruct<u8, Scle_SPEC>;
1711    impl Scle {
1712        #[doc = "Do not use the SCL synchronous circuit"]
1713        pub const _0: Self = Self::new(0);
1714
1715        #[doc = "Use the SCL synchronous circuit"]
1716        pub const _1: Self = Self::new(1);
1717    }
1718}
1719#[doc(hidden)]
1720#[derive(Copy, Clone, Eq, PartialEq)]
1721pub struct Icser_SPEC;
1722impl crate::sealed::RegSpec for Icser_SPEC {
1723    type DataType = u8;
1724}
1725
1726#[doc = "I2C Bus Status Enable Register"]
1727pub type Icser = crate::RegValueT<Icser_SPEC>;
1728
1729impl Icser {
1730    #[doc = "Slave Address Register 0 Enable"]
1731    #[inline(always)]
1732    pub fn sar0e(
1733        self,
1734    ) -> crate::common::RegisterField<
1735        0,
1736        0x1,
1737        1,
1738        0,
1739        icser::Sar0E,
1740        icser::Sar0E,
1741        Icser_SPEC,
1742        crate::common::RW,
1743    > {
1744        crate::common::RegisterField::<
1745            0,
1746            0x1,
1747            1,
1748            0,
1749            icser::Sar0E,
1750            icser::Sar0E,
1751            Icser_SPEC,
1752            crate::common::RW,
1753        >::from_register(self, 0)
1754    }
1755
1756    #[doc = "Slave Address Register 1 Enable"]
1757    #[inline(always)]
1758    pub fn sar1e(
1759        self,
1760    ) -> crate::common::RegisterField<
1761        1,
1762        0x1,
1763        1,
1764        0,
1765        icser::Sar1E,
1766        icser::Sar1E,
1767        Icser_SPEC,
1768        crate::common::RW,
1769    > {
1770        crate::common::RegisterField::<
1771            1,
1772            0x1,
1773            1,
1774            0,
1775            icser::Sar1E,
1776            icser::Sar1E,
1777            Icser_SPEC,
1778            crate::common::RW,
1779        >::from_register(self, 0)
1780    }
1781
1782    #[doc = "Slave Address Register 2 Enable"]
1783    #[inline(always)]
1784    pub fn sar2e(
1785        self,
1786    ) -> crate::common::RegisterField<
1787        2,
1788        0x1,
1789        1,
1790        0,
1791        icser::Sar2E,
1792        icser::Sar2E,
1793        Icser_SPEC,
1794        crate::common::RW,
1795    > {
1796        crate::common::RegisterField::<
1797            2,
1798            0x1,
1799            1,
1800            0,
1801            icser::Sar2E,
1802            icser::Sar2E,
1803            Icser_SPEC,
1804            crate::common::RW,
1805        >::from_register(self, 0)
1806    }
1807
1808    #[doc = "General Call Address Enable"]
1809    #[inline(always)]
1810    pub fn gcae(
1811        self,
1812    ) -> crate::common::RegisterField<
1813        3,
1814        0x1,
1815        1,
1816        0,
1817        icser::Gcae,
1818        icser::Gcae,
1819        Icser_SPEC,
1820        crate::common::RW,
1821    > {
1822        crate::common::RegisterField::<
1823            3,
1824            0x1,
1825            1,
1826            0,
1827            icser::Gcae,
1828            icser::Gcae,
1829            Icser_SPEC,
1830            crate::common::RW,
1831        >::from_register(self, 0)
1832    }
1833
1834    #[doc = "Device-ID Address Detection Enable"]
1835    #[inline(always)]
1836    pub fn dide(
1837        self,
1838    ) -> crate::common::RegisterField<
1839        5,
1840        0x1,
1841        1,
1842        0,
1843        icser::Dide,
1844        icser::Dide,
1845        Icser_SPEC,
1846        crate::common::RW,
1847    > {
1848        crate::common::RegisterField::<
1849            5,
1850            0x1,
1851            1,
1852            0,
1853            icser::Dide,
1854            icser::Dide,
1855            Icser_SPEC,
1856            crate::common::RW,
1857        >::from_register(self, 0)
1858    }
1859
1860    #[doc = "Host Address Enable"]
1861    #[inline(always)]
1862    pub fn hoae(
1863        self,
1864    ) -> crate::common::RegisterField<
1865        7,
1866        0x1,
1867        1,
1868        0,
1869        icser::Hoae,
1870        icser::Hoae,
1871        Icser_SPEC,
1872        crate::common::RW,
1873    > {
1874        crate::common::RegisterField::<
1875            7,
1876            0x1,
1877            1,
1878            0,
1879            icser::Hoae,
1880            icser::Hoae,
1881            Icser_SPEC,
1882            crate::common::RW,
1883        >::from_register(self, 0)
1884    }
1885}
1886impl ::core::default::Default for Icser {
1887    #[inline(always)]
1888    fn default() -> Icser {
1889        <crate::RegValueT<Icser_SPEC> as RegisterValue<_>>::new(9)
1890    }
1891}
1892pub mod icser {
1893
1894    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1895    pub struct Sar0E_SPEC;
1896    pub type Sar0E = crate::EnumBitfieldStruct<u8, Sar0E_SPEC>;
1897    impl Sar0E {
1898        #[doc = "Disable slave address in SARL0 and SARU0"]
1899        pub const _0: Self = Self::new(0);
1900
1901        #[doc = "Enable slave address in SARL0 and SARU0"]
1902        pub const _1: Self = Self::new(1);
1903    }
1904    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1905    pub struct Sar1E_SPEC;
1906    pub type Sar1E = crate::EnumBitfieldStruct<u8, Sar1E_SPEC>;
1907    impl Sar1E {
1908        #[doc = "Disable slave address in SARL1 and SARU1"]
1909        pub const _0: Self = Self::new(0);
1910
1911        #[doc = "Enable slave address in SARL1 and SARU1"]
1912        pub const _1: Self = Self::new(1);
1913    }
1914    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1915    pub struct Sar2E_SPEC;
1916    pub type Sar2E = crate::EnumBitfieldStruct<u8, Sar2E_SPEC>;
1917    impl Sar2E {
1918        #[doc = "Disable slave address in SARL2 and SARU2"]
1919        pub const _0: Self = Self::new(0);
1920
1921        #[doc = "Enable slave address in SARL2 and SARU2"]
1922        pub const _1: Self = Self::new(1);
1923    }
1924    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1925    pub struct Gcae_SPEC;
1926    pub type Gcae = crate::EnumBitfieldStruct<u8, Gcae_SPEC>;
1927    impl Gcae {
1928        #[doc = "Disable general call address detection"]
1929        pub const _0: Self = Self::new(0);
1930
1931        #[doc = "Enable general call address detection"]
1932        pub const _1: Self = Self::new(1);
1933    }
1934    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1935    pub struct Dide_SPEC;
1936    pub type Dide = crate::EnumBitfieldStruct<u8, Dide_SPEC>;
1937    impl Dide {
1938        #[doc = "Disable device-ID address detection"]
1939        pub const _0: Self = Self::new(0);
1940
1941        #[doc = "Enable device-ID address detection"]
1942        pub const _1: Self = Self::new(1);
1943    }
1944    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1945    pub struct Hoae_SPEC;
1946    pub type Hoae = crate::EnumBitfieldStruct<u8, Hoae_SPEC>;
1947    impl Hoae {
1948        #[doc = "Disable host address detection"]
1949        pub const _0: Self = Self::new(0);
1950
1951        #[doc = "Enable host address detection"]
1952        pub const _1: Self = Self::new(1);
1953    }
1954}
1955#[doc(hidden)]
1956#[derive(Copy, Clone, Eq, PartialEq)]
1957pub struct Icier_SPEC;
1958impl crate::sealed::RegSpec for Icier_SPEC {
1959    type DataType = u8;
1960}
1961
1962#[doc = "I2C Bus Interrupt Enable Register"]
1963pub type Icier = crate::RegValueT<Icier_SPEC>;
1964
1965impl Icier {
1966    #[doc = "Timeout Interrupt Request Enable"]
1967    #[inline(always)]
1968    pub fn tmoie(
1969        self,
1970    ) -> crate::common::RegisterField<
1971        0,
1972        0x1,
1973        1,
1974        0,
1975        icier::Tmoie,
1976        icier::Tmoie,
1977        Icier_SPEC,
1978        crate::common::RW,
1979    > {
1980        crate::common::RegisterField::<
1981            0,
1982            0x1,
1983            1,
1984            0,
1985            icier::Tmoie,
1986            icier::Tmoie,
1987            Icier_SPEC,
1988            crate::common::RW,
1989        >::from_register(self, 0)
1990    }
1991
1992    #[doc = "Arbitration-Lost Interrupt Request Enable"]
1993    #[inline(always)]
1994    pub fn alie(
1995        self,
1996    ) -> crate::common::RegisterField<
1997        1,
1998        0x1,
1999        1,
2000        0,
2001        icier::Alie,
2002        icier::Alie,
2003        Icier_SPEC,
2004        crate::common::RW,
2005    > {
2006        crate::common::RegisterField::<
2007            1,
2008            0x1,
2009            1,
2010            0,
2011            icier::Alie,
2012            icier::Alie,
2013            Icier_SPEC,
2014            crate::common::RW,
2015        >::from_register(self, 0)
2016    }
2017
2018    #[doc = "Start Condition Detection Interrupt Request Enable"]
2019    #[inline(always)]
2020    pub fn stie(
2021        self,
2022    ) -> crate::common::RegisterField<
2023        2,
2024        0x1,
2025        1,
2026        0,
2027        icier::Stie,
2028        icier::Stie,
2029        Icier_SPEC,
2030        crate::common::RW,
2031    > {
2032        crate::common::RegisterField::<
2033            2,
2034            0x1,
2035            1,
2036            0,
2037            icier::Stie,
2038            icier::Stie,
2039            Icier_SPEC,
2040            crate::common::RW,
2041        >::from_register(self, 0)
2042    }
2043
2044    #[doc = "Stop Condition Detection Interrupt Request Enable"]
2045    #[inline(always)]
2046    pub fn spie(
2047        self,
2048    ) -> crate::common::RegisterField<
2049        3,
2050        0x1,
2051        1,
2052        0,
2053        icier::Spie,
2054        icier::Spie,
2055        Icier_SPEC,
2056        crate::common::RW,
2057    > {
2058        crate::common::RegisterField::<
2059            3,
2060            0x1,
2061            1,
2062            0,
2063            icier::Spie,
2064            icier::Spie,
2065            Icier_SPEC,
2066            crate::common::RW,
2067        >::from_register(self, 0)
2068    }
2069
2070    #[doc = "NACK Reception Interrupt Request Enable"]
2071    #[inline(always)]
2072    pub fn nakie(
2073        self,
2074    ) -> crate::common::RegisterField<
2075        4,
2076        0x1,
2077        1,
2078        0,
2079        icier::Nakie,
2080        icier::Nakie,
2081        Icier_SPEC,
2082        crate::common::RW,
2083    > {
2084        crate::common::RegisterField::<
2085            4,
2086            0x1,
2087            1,
2088            0,
2089            icier::Nakie,
2090            icier::Nakie,
2091            Icier_SPEC,
2092            crate::common::RW,
2093        >::from_register(self, 0)
2094    }
2095
2096    #[doc = "Receive Data Full Interrupt Request Enable"]
2097    #[inline(always)]
2098    pub fn rie(
2099        self,
2100    ) -> crate::common::RegisterField<
2101        5,
2102        0x1,
2103        1,
2104        0,
2105        icier::Rie,
2106        icier::Rie,
2107        Icier_SPEC,
2108        crate::common::RW,
2109    > {
2110        crate::common::RegisterField::<
2111            5,
2112            0x1,
2113            1,
2114            0,
2115            icier::Rie,
2116            icier::Rie,
2117            Icier_SPEC,
2118            crate::common::RW,
2119        >::from_register(self, 0)
2120    }
2121
2122    #[doc = "Transmit End Interrupt Request Enable"]
2123    #[inline(always)]
2124    pub fn teie(
2125        self,
2126    ) -> crate::common::RegisterField<
2127        6,
2128        0x1,
2129        1,
2130        0,
2131        icier::Teie,
2132        icier::Teie,
2133        Icier_SPEC,
2134        crate::common::RW,
2135    > {
2136        crate::common::RegisterField::<
2137            6,
2138            0x1,
2139            1,
2140            0,
2141            icier::Teie,
2142            icier::Teie,
2143            Icier_SPEC,
2144            crate::common::RW,
2145        >::from_register(self, 0)
2146    }
2147
2148    #[doc = "Transmit Data Empty Interrupt Request Enable"]
2149    #[inline(always)]
2150    pub fn tie(
2151        self,
2152    ) -> crate::common::RegisterField<
2153        7,
2154        0x1,
2155        1,
2156        0,
2157        icier::Tie,
2158        icier::Tie,
2159        Icier_SPEC,
2160        crate::common::RW,
2161    > {
2162        crate::common::RegisterField::<
2163            7,
2164            0x1,
2165            1,
2166            0,
2167            icier::Tie,
2168            icier::Tie,
2169            Icier_SPEC,
2170            crate::common::RW,
2171        >::from_register(self, 0)
2172    }
2173}
2174impl ::core::default::Default for Icier {
2175    #[inline(always)]
2176    fn default() -> Icier {
2177        <crate::RegValueT<Icier_SPEC> as RegisterValue<_>>::new(0)
2178    }
2179}
2180pub mod icier {
2181
2182    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2183    pub struct Tmoie_SPEC;
2184    pub type Tmoie = crate::EnumBitfieldStruct<u8, Tmoie_SPEC>;
2185    impl Tmoie {
2186        #[doc = "Disable timeout interrupt (TMOI) request"]
2187        pub const _0: Self = Self::new(0);
2188
2189        #[doc = "Enable timeout interrupt (TMOI) request"]
2190        pub const _1: Self = Self::new(1);
2191    }
2192    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2193    pub struct Alie_SPEC;
2194    pub type Alie = crate::EnumBitfieldStruct<u8, Alie_SPEC>;
2195    impl Alie {
2196        #[doc = "Disable arbitration-lost interrupt (ALI) request"]
2197        pub const _0: Self = Self::new(0);
2198
2199        #[doc = "Enable arbitration-lost interrupt (ALI) request"]
2200        pub const _1: Self = Self::new(1);
2201    }
2202    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2203    pub struct Stie_SPEC;
2204    pub type Stie = crate::EnumBitfieldStruct<u8, Stie_SPEC>;
2205    impl Stie {
2206        #[doc = "Disable start condition detection interrupt (STI) request"]
2207        pub const _0: Self = Self::new(0);
2208
2209        #[doc = "Enable start condition detection interrupt (STI) request"]
2210        pub const _1: Self = Self::new(1);
2211    }
2212    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2213    pub struct Spie_SPEC;
2214    pub type Spie = crate::EnumBitfieldStruct<u8, Spie_SPEC>;
2215    impl Spie {
2216        #[doc = "Disable stop condition detection interrupt (SPI) request"]
2217        pub const _0: Self = Self::new(0);
2218
2219        #[doc = "Enable stop condition detection interrupt (SPI) request"]
2220        pub const _1: Self = Self::new(1);
2221    }
2222    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2223    pub struct Nakie_SPEC;
2224    pub type Nakie = crate::EnumBitfieldStruct<u8, Nakie_SPEC>;
2225    impl Nakie {
2226        #[doc = "Disable NACK reception interrupt (NAKI) request"]
2227        pub const _0: Self = Self::new(0);
2228
2229        #[doc = "Enable NACK reception interrupt (NAKI) request"]
2230        pub const _1: Self = Self::new(1);
2231    }
2232    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2233    pub struct Rie_SPEC;
2234    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
2235    impl Rie {
2236        #[doc = "Disable receive data full interrupt (IICn_RXI) request"]
2237        pub const _0: Self = Self::new(0);
2238
2239        #[doc = "Enable receive data full interrupt (IICn_RXI) request"]
2240        pub const _1: Self = Self::new(1);
2241    }
2242    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2243    pub struct Teie_SPEC;
2244    pub type Teie = crate::EnumBitfieldStruct<u8, Teie_SPEC>;
2245    impl Teie {
2246        #[doc = "Disable transmit end interrupt (IICn_TEI) request"]
2247        pub const _0: Self = Self::new(0);
2248
2249        #[doc = "Enable transmit end interrupt (IICn_TEI) request"]
2250        pub const _1: Self = Self::new(1);
2251    }
2252    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2253    pub struct Tie_SPEC;
2254    pub type Tie = crate::EnumBitfieldStruct<u8, Tie_SPEC>;
2255    impl Tie {
2256        #[doc = "Disable transmit data empty interrupt (IICn_TXI) request"]
2257        pub const _0: Self = Self::new(0);
2258
2259        #[doc = "Enable transmit data empty interrupt (IICn_TXI) request"]
2260        pub const _1: Self = Self::new(1);
2261    }
2262}
2263#[doc(hidden)]
2264#[derive(Copy, Clone, Eq, PartialEq)]
2265pub struct Icsr1_SPEC;
2266impl crate::sealed::RegSpec for Icsr1_SPEC {
2267    type DataType = u8;
2268}
2269
2270#[doc = "I2C Bus Status Register 1"]
2271pub type Icsr1 = crate::RegValueT<Icsr1_SPEC>;
2272
2273impl Icsr1 {
2274    #[doc = "Slave Address 0 Detection Flag"]
2275    #[inline(always)]
2276    pub fn aas0(
2277        self,
2278    ) -> crate::common::RegisterField<
2279        0,
2280        0x1,
2281        1,
2282        0,
2283        icsr1::Aas0,
2284        icsr1::Aas0,
2285        Icsr1_SPEC,
2286        crate::common::RW,
2287    > {
2288        crate::common::RegisterField::<
2289            0,
2290            0x1,
2291            1,
2292            0,
2293            icsr1::Aas0,
2294            icsr1::Aas0,
2295            Icsr1_SPEC,
2296            crate::common::RW,
2297        >::from_register(self, 0)
2298    }
2299
2300    #[doc = "Slave Address 1 Detection Flag"]
2301    #[inline(always)]
2302    pub fn aas1(
2303        self,
2304    ) -> crate::common::RegisterField<
2305        1,
2306        0x1,
2307        1,
2308        0,
2309        icsr1::Aas1,
2310        icsr1::Aas1,
2311        Icsr1_SPEC,
2312        crate::common::RW,
2313    > {
2314        crate::common::RegisterField::<
2315            1,
2316            0x1,
2317            1,
2318            0,
2319            icsr1::Aas1,
2320            icsr1::Aas1,
2321            Icsr1_SPEC,
2322            crate::common::RW,
2323        >::from_register(self, 0)
2324    }
2325
2326    #[doc = "Slave Address 2 Detection Flag"]
2327    #[inline(always)]
2328    pub fn aas2(
2329        self,
2330    ) -> crate::common::RegisterField<
2331        2,
2332        0x1,
2333        1,
2334        0,
2335        icsr1::Aas2,
2336        icsr1::Aas2,
2337        Icsr1_SPEC,
2338        crate::common::RW,
2339    > {
2340        crate::common::RegisterField::<
2341            2,
2342            0x1,
2343            1,
2344            0,
2345            icsr1::Aas2,
2346            icsr1::Aas2,
2347            Icsr1_SPEC,
2348            crate::common::RW,
2349        >::from_register(self, 0)
2350    }
2351
2352    #[doc = "General Call Address Detection Flag"]
2353    #[inline(always)]
2354    pub fn gca(
2355        self,
2356    ) -> crate::common::RegisterField<
2357        3,
2358        0x1,
2359        1,
2360        0,
2361        icsr1::Gca,
2362        icsr1::Gca,
2363        Icsr1_SPEC,
2364        crate::common::RW,
2365    > {
2366        crate::common::RegisterField::<
2367            3,
2368            0x1,
2369            1,
2370            0,
2371            icsr1::Gca,
2372            icsr1::Gca,
2373            Icsr1_SPEC,
2374            crate::common::RW,
2375        >::from_register(self, 0)
2376    }
2377
2378    #[doc = "Device-ID Address Detection Flag"]
2379    #[inline(always)]
2380    pub fn did(
2381        self,
2382    ) -> crate::common::RegisterField<
2383        5,
2384        0x1,
2385        1,
2386        0,
2387        icsr1::Did,
2388        icsr1::Did,
2389        Icsr1_SPEC,
2390        crate::common::RW,
2391    > {
2392        crate::common::RegisterField::<
2393            5,
2394            0x1,
2395            1,
2396            0,
2397            icsr1::Did,
2398            icsr1::Did,
2399            Icsr1_SPEC,
2400            crate::common::RW,
2401        >::from_register(self, 0)
2402    }
2403
2404    #[doc = "Host Address Detection Flag"]
2405    #[inline(always)]
2406    pub fn hoa(
2407        self,
2408    ) -> crate::common::RegisterField<
2409        7,
2410        0x1,
2411        1,
2412        0,
2413        icsr1::Hoa,
2414        icsr1::Hoa,
2415        Icsr1_SPEC,
2416        crate::common::RW,
2417    > {
2418        crate::common::RegisterField::<
2419            7,
2420            0x1,
2421            1,
2422            0,
2423            icsr1::Hoa,
2424            icsr1::Hoa,
2425            Icsr1_SPEC,
2426            crate::common::RW,
2427        >::from_register(self, 0)
2428    }
2429}
2430impl ::core::default::Default for Icsr1 {
2431    #[inline(always)]
2432    fn default() -> Icsr1 {
2433        <crate::RegValueT<Icsr1_SPEC> as RegisterValue<_>>::new(0)
2434    }
2435}
2436pub mod icsr1 {
2437
2438    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2439    pub struct Aas0_SPEC;
2440    pub type Aas0 = crate::EnumBitfieldStruct<u8, Aas0_SPEC>;
2441    impl Aas0 {
2442        #[doc = "Slave address 0 not detected"]
2443        pub const _0: Self = Self::new(0);
2444
2445        #[doc = "Slave address 0 detected"]
2446        pub const _1: Self = Self::new(1);
2447    }
2448    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2449    pub struct Aas1_SPEC;
2450    pub type Aas1 = crate::EnumBitfieldStruct<u8, Aas1_SPEC>;
2451    impl Aas1 {
2452        #[doc = "Slave address 1 not detected"]
2453        pub const _0: Self = Self::new(0);
2454
2455        #[doc = "Slave address 1 detected"]
2456        pub const _1: Self = Self::new(1);
2457    }
2458    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2459    pub struct Aas2_SPEC;
2460    pub type Aas2 = crate::EnumBitfieldStruct<u8, Aas2_SPEC>;
2461    impl Aas2 {
2462        #[doc = "Slave address 2 not detected"]
2463        pub const _0: Self = Self::new(0);
2464
2465        #[doc = "Slave address 2 detected"]
2466        pub const _1: Self = Self::new(1);
2467    }
2468    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2469    pub struct Gca_SPEC;
2470    pub type Gca = crate::EnumBitfieldStruct<u8, Gca_SPEC>;
2471    impl Gca {
2472        #[doc = "General call address not detected"]
2473        pub const _0: Self = Self::new(0);
2474
2475        #[doc = "General call address detected"]
2476        pub const _1: Self = Self::new(1);
2477    }
2478    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2479    pub struct Did_SPEC;
2480    pub type Did = crate::EnumBitfieldStruct<u8, Did_SPEC>;
2481    impl Did {
2482        #[doc = "Device-ID command not detected"]
2483        pub const _0: Self = Self::new(0);
2484
2485        #[doc = "Device-ID command detected"]
2486        pub const _1: Self = Self::new(1);
2487    }
2488    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2489    pub struct Hoa_SPEC;
2490    pub type Hoa = crate::EnumBitfieldStruct<u8, Hoa_SPEC>;
2491    impl Hoa {
2492        #[doc = "Host address not detected"]
2493        pub const _0: Self = Self::new(0);
2494
2495        #[doc = "Host address detected"]
2496        pub const _1: Self = Self::new(1);
2497    }
2498}
2499#[doc(hidden)]
2500#[derive(Copy, Clone, Eq, PartialEq)]
2501pub struct Icsr2_SPEC;
2502impl crate::sealed::RegSpec for Icsr2_SPEC {
2503    type DataType = u8;
2504}
2505
2506#[doc = "I2C Bus Status Register 2"]
2507pub type Icsr2 = crate::RegValueT<Icsr2_SPEC>;
2508
2509impl Icsr2 {
2510    #[doc = "Timeout Detection Flag"]
2511    #[inline(always)]
2512    pub fn tmof(
2513        self,
2514    ) -> crate::common::RegisterField<
2515        0,
2516        0x1,
2517        1,
2518        0,
2519        icsr2::Tmof,
2520        icsr2::Tmof,
2521        Icsr2_SPEC,
2522        crate::common::RW,
2523    > {
2524        crate::common::RegisterField::<
2525            0,
2526            0x1,
2527            1,
2528            0,
2529            icsr2::Tmof,
2530            icsr2::Tmof,
2531            Icsr2_SPEC,
2532            crate::common::RW,
2533        >::from_register(self, 0)
2534    }
2535
2536    #[doc = "Arbitration-Lost Flag"]
2537    #[inline(always)]
2538    pub fn al(
2539        self,
2540    ) -> crate::common::RegisterField<
2541        1,
2542        0x1,
2543        1,
2544        0,
2545        icsr2::Al,
2546        icsr2::Al,
2547        Icsr2_SPEC,
2548        crate::common::RW,
2549    > {
2550        crate::common::RegisterField::<
2551            1,
2552            0x1,
2553            1,
2554            0,
2555            icsr2::Al,
2556            icsr2::Al,
2557            Icsr2_SPEC,
2558            crate::common::RW,
2559        >::from_register(self, 0)
2560    }
2561
2562    #[doc = "Start Condition Detection Flag"]
2563    #[inline(always)]
2564    pub fn start(
2565        self,
2566    ) -> crate::common::RegisterField<
2567        2,
2568        0x1,
2569        1,
2570        0,
2571        icsr2::Start,
2572        icsr2::Start,
2573        Icsr2_SPEC,
2574        crate::common::RW,
2575    > {
2576        crate::common::RegisterField::<
2577            2,
2578            0x1,
2579            1,
2580            0,
2581            icsr2::Start,
2582            icsr2::Start,
2583            Icsr2_SPEC,
2584            crate::common::RW,
2585        >::from_register(self, 0)
2586    }
2587
2588    #[doc = "Stop Condition Detection Flag"]
2589    #[inline(always)]
2590    pub fn stop(
2591        self,
2592    ) -> crate::common::RegisterField<
2593        3,
2594        0x1,
2595        1,
2596        0,
2597        icsr2::Stop,
2598        icsr2::Stop,
2599        Icsr2_SPEC,
2600        crate::common::RW,
2601    > {
2602        crate::common::RegisterField::<
2603            3,
2604            0x1,
2605            1,
2606            0,
2607            icsr2::Stop,
2608            icsr2::Stop,
2609            Icsr2_SPEC,
2610            crate::common::RW,
2611        >::from_register(self, 0)
2612    }
2613
2614    #[doc = "NACK Detection Flag"]
2615    #[inline(always)]
2616    pub fn nackf(
2617        self,
2618    ) -> crate::common::RegisterField<
2619        4,
2620        0x1,
2621        1,
2622        0,
2623        icsr2::Nackf,
2624        icsr2::Nackf,
2625        Icsr2_SPEC,
2626        crate::common::RW,
2627    > {
2628        crate::common::RegisterField::<
2629            4,
2630            0x1,
2631            1,
2632            0,
2633            icsr2::Nackf,
2634            icsr2::Nackf,
2635            Icsr2_SPEC,
2636            crate::common::RW,
2637        >::from_register(self, 0)
2638    }
2639
2640    #[doc = "Receive Data Full Flag"]
2641    #[inline(always)]
2642    pub fn rdrf(
2643        self,
2644    ) -> crate::common::RegisterField<
2645        5,
2646        0x1,
2647        1,
2648        0,
2649        icsr2::Rdrf,
2650        icsr2::Rdrf,
2651        Icsr2_SPEC,
2652        crate::common::RW,
2653    > {
2654        crate::common::RegisterField::<
2655            5,
2656            0x1,
2657            1,
2658            0,
2659            icsr2::Rdrf,
2660            icsr2::Rdrf,
2661            Icsr2_SPEC,
2662            crate::common::RW,
2663        >::from_register(self, 0)
2664    }
2665
2666    #[doc = "Transmit End Flag"]
2667    #[inline(always)]
2668    pub fn tend(
2669        self,
2670    ) -> crate::common::RegisterField<
2671        6,
2672        0x1,
2673        1,
2674        0,
2675        icsr2::Tend,
2676        icsr2::Tend,
2677        Icsr2_SPEC,
2678        crate::common::RW,
2679    > {
2680        crate::common::RegisterField::<
2681            6,
2682            0x1,
2683            1,
2684            0,
2685            icsr2::Tend,
2686            icsr2::Tend,
2687            Icsr2_SPEC,
2688            crate::common::RW,
2689        >::from_register(self, 0)
2690    }
2691
2692    #[doc = "Transmit Data Empty Flag"]
2693    #[inline(always)]
2694    pub fn tdre(
2695        self,
2696    ) -> crate::common::RegisterField<
2697        7,
2698        0x1,
2699        1,
2700        0,
2701        icsr2::Tdre,
2702        icsr2::Tdre,
2703        Icsr2_SPEC,
2704        crate::common::R,
2705    > {
2706        crate::common::RegisterField::<
2707            7,
2708            0x1,
2709            1,
2710            0,
2711            icsr2::Tdre,
2712            icsr2::Tdre,
2713            Icsr2_SPEC,
2714            crate::common::R,
2715        >::from_register(self, 0)
2716    }
2717}
2718impl ::core::default::Default for Icsr2 {
2719    #[inline(always)]
2720    fn default() -> Icsr2 {
2721        <crate::RegValueT<Icsr2_SPEC> as RegisterValue<_>>::new(0)
2722    }
2723}
2724pub mod icsr2 {
2725
2726    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2727    pub struct Tmof_SPEC;
2728    pub type Tmof = crate::EnumBitfieldStruct<u8, Tmof_SPEC>;
2729    impl Tmof {
2730        #[doc = "Timeout not detected"]
2731        pub const _0: Self = Self::new(0);
2732
2733        #[doc = "Timeout detected"]
2734        pub const _1: Self = Self::new(1);
2735    }
2736    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2737    pub struct Al_SPEC;
2738    pub type Al = crate::EnumBitfieldStruct<u8, Al_SPEC>;
2739    impl Al {
2740        #[doc = "Arbitration not lost"]
2741        pub const _0: Self = Self::new(0);
2742
2743        #[doc = "Arbitration lost"]
2744        pub const _1: Self = Self::new(1);
2745    }
2746    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2747    pub struct Start_SPEC;
2748    pub type Start = crate::EnumBitfieldStruct<u8, Start_SPEC>;
2749    impl Start {
2750        #[doc = "Start condition not detected"]
2751        pub const _0: Self = Self::new(0);
2752
2753        #[doc = "Start condition detected"]
2754        pub const _1: Self = Self::new(1);
2755    }
2756    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2757    pub struct Stop_SPEC;
2758    pub type Stop = crate::EnumBitfieldStruct<u8, Stop_SPEC>;
2759    impl Stop {
2760        #[doc = "Stop condition not detected"]
2761        pub const _0: Self = Self::new(0);
2762
2763        #[doc = "Stop condition detected"]
2764        pub const _1: Self = Self::new(1);
2765    }
2766    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2767    pub struct Nackf_SPEC;
2768    pub type Nackf = crate::EnumBitfieldStruct<u8, Nackf_SPEC>;
2769    impl Nackf {
2770        #[doc = "NACK not detected"]
2771        pub const _0: Self = Self::new(0);
2772
2773        #[doc = "NACK detected"]
2774        pub const _1: Self = Self::new(1);
2775    }
2776    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2777    pub struct Rdrf_SPEC;
2778    pub type Rdrf = crate::EnumBitfieldStruct<u8, Rdrf_SPEC>;
2779    impl Rdrf {
2780        #[doc = "ICDRR contains no receive data"]
2781        pub const _0: Self = Self::new(0);
2782
2783        #[doc = "ICDRR contains receive data"]
2784        pub const _1: Self = Self::new(1);
2785    }
2786    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2787    pub struct Tend_SPEC;
2788    pub type Tend = crate::EnumBitfieldStruct<u8, Tend_SPEC>;
2789    impl Tend {
2790        #[doc = "Data being transmitted"]
2791        pub const _0: Self = Self::new(0);
2792
2793        #[doc = "Data transmit complete"]
2794        pub const _1: Self = Self::new(1);
2795    }
2796    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2797    pub struct Tdre_SPEC;
2798    pub type Tdre = crate::EnumBitfieldStruct<u8, Tdre_SPEC>;
2799    impl Tdre {
2800        #[doc = "ICDRT contains transmit data"]
2801        pub const _0: Self = Self::new(0);
2802
2803        #[doc = "ICDRT contains no transmit data"]
2804        pub const _1: Self = Self::new(1);
2805    }
2806}
2807#[doc(hidden)]
2808#[derive(Copy, Clone, Eq, PartialEq)]
2809pub struct Sarl_SPEC;
2810impl crate::sealed::RegSpec for Sarl_SPEC {
2811    type DataType = u8;
2812}
2813
2814#[doc = "Slave Address Register Ly"]
2815pub type Sarl = crate::RegValueT<Sarl_SPEC>;
2816
2817impl Sarl {
2818    #[doc = "10-bit Address LSB"]
2819    #[inline(always)]
2820    pub fn sva0(self) -> crate::common::RegisterFieldBool<0, 1, 0, Sarl_SPEC, crate::common::RW> {
2821        crate::common::RegisterFieldBool::<0, 1, 0, Sarl_SPEC, crate::common::RW>::from_register(
2822            self, 0,
2823        )
2824    }
2825
2826    #[doc = "7-bit Address/10-bit Address Lower Bits"]
2827    #[inline(always)]
2828    pub fn sva(
2829        self,
2830    ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Sarl_SPEC, crate::common::RW> {
2831        crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Sarl_SPEC,crate::common::RW>::from_register(self,0)
2832    }
2833}
2834impl ::core::default::Default for Sarl {
2835    #[inline(always)]
2836    fn default() -> Sarl {
2837        <crate::RegValueT<Sarl_SPEC> as RegisterValue<_>>::new(0)
2838    }
2839}
2840
2841#[doc(hidden)]
2842#[derive(Copy, Clone, Eq, PartialEq)]
2843pub struct Saru_SPEC;
2844impl crate::sealed::RegSpec for Saru_SPEC {
2845    type DataType = u8;
2846}
2847
2848#[doc = "Slave Address Register Uy"]
2849pub type Saru = crate::RegValueT<Saru_SPEC>;
2850
2851impl Saru {
2852    #[doc = "7-bit/10-bit Address Format Select"]
2853    #[inline(always)]
2854    pub fn fs(
2855        self,
2856    ) -> crate::common::RegisterField<0, 0x1, 1, 0, saru::Fs, saru::Fs, Saru_SPEC, crate::common::RW>
2857    {
2858        crate::common::RegisterField::<0,0x1,1,0,saru::Fs,saru::Fs,Saru_SPEC,crate::common::RW>::from_register(self,0)
2859    }
2860
2861    #[doc = "10-bit Address Upper Bits"]
2862    #[inline(always)]
2863    pub fn sva(
2864        self,
2865    ) -> crate::common::RegisterField<1, 0x3, 1, 0, u8, u8, Saru_SPEC, crate::common::RW> {
2866        crate::common::RegisterField::<1,0x3,1,0,u8,u8,Saru_SPEC,crate::common::RW>::from_register(self,0)
2867    }
2868}
2869impl ::core::default::Default for Saru {
2870    #[inline(always)]
2871    fn default() -> Saru {
2872        <crate::RegValueT<Saru_SPEC> as RegisterValue<_>>::new(0)
2873    }
2874}
2875pub mod saru {
2876
2877    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2878    pub struct Fs_SPEC;
2879    pub type Fs = crate::EnumBitfieldStruct<u8, Fs_SPEC>;
2880    impl Fs {
2881        #[doc = "Select 7-bit address format"]
2882        pub const _0: Self = Self::new(0);
2883
2884        #[doc = "Select 10-bit address format"]
2885        pub const _1: Self = Self::new(1);
2886    }
2887}
2888#[doc(hidden)]
2889#[derive(Copy, Clone, Eq, PartialEq)]
2890pub struct Icbrl_SPEC;
2891impl crate::sealed::RegSpec for Icbrl_SPEC {
2892    type DataType = u8;
2893}
2894
2895#[doc = "I2C Bus Bit Rate Low-Level Register"]
2896pub type Icbrl = crate::RegValueT<Icbrl_SPEC>;
2897
2898impl Icbrl {
2899    #[doc = "Bit Rate Low-Level Period"]
2900    #[inline(always)]
2901    pub fn brl(
2902        self,
2903    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Icbrl_SPEC, crate::common::RW> {
2904        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Icbrl_SPEC,crate::common::RW>::from_register(self,0)
2905    }
2906}
2907impl ::core::default::Default for Icbrl {
2908    #[inline(always)]
2909    fn default() -> Icbrl {
2910        <crate::RegValueT<Icbrl_SPEC> as RegisterValue<_>>::new(255)
2911    }
2912}
2913
2914#[doc(hidden)]
2915#[derive(Copy, Clone, Eq, PartialEq)]
2916pub struct Icbrh_SPEC;
2917impl crate::sealed::RegSpec for Icbrh_SPEC {
2918    type DataType = u8;
2919}
2920
2921#[doc = "I2C Bus Bit Rate High-Level Register"]
2922pub type Icbrh = crate::RegValueT<Icbrh_SPEC>;
2923
2924impl Icbrh {
2925    #[doc = "Bit Rate High-Level Period"]
2926    #[inline(always)]
2927    pub fn brh(
2928        self,
2929    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Icbrh_SPEC, crate::common::RW> {
2930        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Icbrh_SPEC,crate::common::RW>::from_register(self,0)
2931    }
2932}
2933impl ::core::default::Default for Icbrh {
2934    #[inline(always)]
2935    fn default() -> Icbrh {
2936        <crate::RegValueT<Icbrh_SPEC> as RegisterValue<_>>::new(255)
2937    }
2938}
2939
2940#[doc(hidden)]
2941#[derive(Copy, Clone, Eq, PartialEq)]
2942pub struct Icdrt_SPEC;
2943impl crate::sealed::RegSpec for Icdrt_SPEC {
2944    type DataType = u8;
2945}
2946
2947#[doc = "I2C Bus Transmit Data Register"]
2948pub type Icdrt = crate::RegValueT<Icdrt_SPEC>;
2949
2950impl NoBitfieldReg<Icdrt_SPEC> for Icdrt {}
2951impl ::core::default::Default for Icdrt {
2952    #[inline(always)]
2953    fn default() -> Icdrt {
2954        <crate::RegValueT<Icdrt_SPEC> as RegisterValue<_>>::new(255)
2955    }
2956}
2957
2958#[doc(hidden)]
2959#[derive(Copy, Clone, Eq, PartialEq)]
2960pub struct Icdrr_SPEC;
2961impl crate::sealed::RegSpec for Icdrr_SPEC {
2962    type DataType = u8;
2963}
2964
2965#[doc = "I2C Bus Receive Data Register"]
2966pub type Icdrr = crate::RegValueT<Icdrr_SPEC>;
2967
2968impl NoBitfieldReg<Icdrr_SPEC> for Icdrr {}
2969impl ::core::default::Default for Icdrr {
2970    #[inline(always)]
2971    fn default() -> Icdrr {
2972        <crate::RegValueT<Icdrr_SPEC> as RegisterValue<_>>::new(0)
2973    }
2974}