1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Flash I/O Registers"]
28unsafe impl ::core::marker::Send for super::Flcn {}
29unsafe impl ::core::marker::Sync for super::Flcn {}
30impl super::Flcn {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Data Flash Control Register"]
38 #[inline(always)]
39 pub const fn dflctl(
40 &self,
41 ) -> &'static crate::common::Reg<self::Dflctl_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Dflctl_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(144usize),
45 )
46 }
47 }
48
49 #[doc = "Flash P/E Mode Control Register"]
50 #[inline(always)]
51 pub const fn fpmcr(&self) -> &'static crate::common::Reg<self::Fpmcr_SPEC, crate::common::RW> {
52 unsafe {
53 crate::common::Reg::<self::Fpmcr_SPEC, crate::common::RW>::from_ptr(
54 self._svd2pac_as_ptr().add(256usize),
55 )
56 }
57 }
58
59 #[doc = "Flash Area Select Register"]
60 #[inline(always)]
61 pub const fn fasr(&self) -> &'static crate::common::Reg<self::Fasr_SPEC, crate::common::RW> {
62 unsafe {
63 crate::common::Reg::<self::Fasr_SPEC, crate::common::RW>::from_ptr(
64 self._svd2pac_as_ptr().add(260usize),
65 )
66 }
67 }
68
69 #[doc = "Flash Processing Start Address Register L"]
70 #[inline(always)]
71 pub const fn fsarl(&self) -> &'static crate::common::Reg<self::Fsarl_SPEC, crate::common::RW> {
72 unsafe {
73 crate::common::Reg::<self::Fsarl_SPEC, crate::common::RW>::from_ptr(
74 self._svd2pac_as_ptr().add(264usize),
75 )
76 }
77 }
78
79 #[doc = "Flash Processing Start Address Register H"]
80 #[inline(always)]
81 pub const fn fsarh(&self) -> &'static crate::common::Reg<self::Fsarh_SPEC, crate::common::RW> {
82 unsafe {
83 crate::common::Reg::<self::Fsarh_SPEC, crate::common::RW>::from_ptr(
84 self._svd2pac_as_ptr().add(272usize),
85 )
86 }
87 }
88
89 #[doc = "Flash Control Register"]
90 #[inline(always)]
91 pub const fn fcr(&self) -> &'static crate::common::Reg<self::Fcr_SPEC, crate::common::RW> {
92 unsafe {
93 crate::common::Reg::<self::Fcr_SPEC, crate::common::RW>::from_ptr(
94 self._svd2pac_as_ptr().add(276usize),
95 )
96 }
97 }
98
99 #[doc = "Flash Processing End Address Register L"]
100 #[inline(always)]
101 pub const fn fearl(&self) -> &'static crate::common::Reg<self::Fearl_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::Fearl_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(280usize),
105 )
106 }
107 }
108
109 #[doc = "Flash Processing End Address Register H"]
110 #[inline(always)]
111 pub const fn fearh(&self) -> &'static crate::common::Reg<self::Fearh_SPEC, crate::common::RW> {
112 unsafe {
113 crate::common::Reg::<self::Fearh_SPEC, crate::common::RW>::from_ptr(
114 self._svd2pac_as_ptr().add(288usize),
115 )
116 }
117 }
118
119 #[doc = "Flash Reset Register"]
120 #[inline(always)]
121 pub const fn fresetr(
122 &self,
123 ) -> &'static crate::common::Reg<self::Fresetr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Fresetr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(292usize),
127 )
128 }
129 }
130
131 #[doc = "Flash Status Register 1"]
132 #[inline(always)]
133 pub const fn fstatr1(
134 &self,
135 ) -> &'static crate::common::Reg<self::Fstatr1_SPEC, crate::common::R> {
136 unsafe {
137 crate::common::Reg::<self::Fstatr1_SPEC, crate::common::R>::from_ptr(
138 self._svd2pac_as_ptr().add(300usize),
139 )
140 }
141 }
142
143 #[doc = "Flash Write Buffer Register L0"]
144 #[inline(always)]
145 pub const fn fwbl0(&self) -> &'static crate::common::Reg<self::Fwbl0_SPEC, crate::common::RW> {
146 unsafe {
147 crate::common::Reg::<self::Fwbl0_SPEC, crate::common::RW>::from_ptr(
148 self._svd2pac_as_ptr().add(304usize),
149 )
150 }
151 }
152
153 #[doc = "Flash Write Buffer Register H0"]
154 #[inline(always)]
155 pub const fn fwbh0(&self) -> &'static crate::common::Reg<self::Fwbh0_SPEC, crate::common::RW> {
156 unsafe {
157 crate::common::Reg::<self::Fwbh0_SPEC, crate::common::RW>::from_ptr(
158 self._svd2pac_as_ptr().add(312usize),
159 )
160 }
161 }
162
163 #[doc = "Protection Unlock Register"]
164 #[inline(always)]
165 pub const fn fpr(&self) -> &'static crate::common::Reg<self::Fpr_SPEC, crate::common::RW> {
166 unsafe {
167 crate::common::Reg::<self::Fpr_SPEC, crate::common::RW>::from_ptr(
168 self._svd2pac_as_ptr().add(384usize),
169 )
170 }
171 }
172
173 #[doc = "Protection Unlock Status Register"]
174 #[inline(always)]
175 pub const fn fpsr(&self) -> &'static crate::common::Reg<self::Fpsr_SPEC, crate::common::R> {
176 unsafe {
177 crate::common::Reg::<self::Fpsr_SPEC, crate::common::R>::from_ptr(
178 self._svd2pac_as_ptr().add(388usize),
179 )
180 }
181 }
182
183 #[doc = "Flash Read Buffer Register L0"]
184 #[inline(always)]
185 pub const fn frbl0(&self) -> &'static crate::common::Reg<self::Frbl0_SPEC, crate::common::R> {
186 unsafe {
187 crate::common::Reg::<self::Frbl0_SPEC, crate::common::R>::from_ptr(
188 self._svd2pac_as_ptr().add(392usize),
189 )
190 }
191 }
192
193 #[doc = "Flash Read Buffer Register H0"]
194 #[inline(always)]
195 pub const fn frbh0(&self) -> &'static crate::common::Reg<self::Frbh0_SPEC, crate::common::R> {
196 unsafe {
197 crate::common::Reg::<self::Frbh0_SPEC, crate::common::R>::from_ptr(
198 self._svd2pac_as_ptr().add(400usize),
199 )
200 }
201 }
202
203 #[doc = "Flash Startup Setting Monitor Register"]
204 #[inline(always)]
205 pub const fn fscmr(&self) -> &'static crate::common::Reg<self::Fscmr_SPEC, crate::common::R> {
206 unsafe {
207 crate::common::Reg::<self::Fscmr_SPEC, crate::common::R>::from_ptr(
208 self._svd2pac_as_ptr().add(448usize),
209 )
210 }
211 }
212
213 #[doc = "Flash Access Window Start Address Monitor Register"]
214 #[inline(always)]
215 pub const fn fawsmr(&self) -> &'static crate::common::Reg<self::Fawsmr_SPEC, crate::common::R> {
216 unsafe {
217 crate::common::Reg::<self::Fawsmr_SPEC, crate::common::R>::from_ptr(
218 self._svd2pac_as_ptr().add(456usize),
219 )
220 }
221 }
222
223 #[doc = "Flash Access Window End Address Monitor Register"]
224 #[inline(always)]
225 pub const fn fawemr(&self) -> &'static crate::common::Reg<self::Fawemr_SPEC, crate::common::R> {
226 unsafe {
227 crate::common::Reg::<self::Fawemr_SPEC, crate::common::R>::from_ptr(
228 self._svd2pac_as_ptr().add(464usize),
229 )
230 }
231 }
232
233 #[doc = "Flash Initial Setting Register"]
234 #[inline(always)]
235 pub const fn fisr(&self) -> &'static crate::common::Reg<self::Fisr_SPEC, crate::common::RW> {
236 unsafe {
237 crate::common::Reg::<self::Fisr_SPEC, crate::common::RW>::from_ptr(
238 self._svd2pac_as_ptr().add(472usize),
239 )
240 }
241 }
242
243 #[doc = "Flash Extra Area Control Register"]
244 #[inline(always)]
245 pub const fn fexcr(&self) -> &'static crate::common::Reg<self::Fexcr_SPEC, crate::common::RW> {
246 unsafe {
247 crate::common::Reg::<self::Fexcr_SPEC, crate::common::RW>::from_ptr(
248 self._svd2pac_as_ptr().add(476usize),
249 )
250 }
251 }
252
253 #[doc = "Flash Error Address Monitor Register L"]
254 #[inline(always)]
255 pub const fn feaml(&self) -> &'static crate::common::Reg<self::Feaml_SPEC, crate::common::RW> {
256 unsafe {
257 crate::common::Reg::<self::Feaml_SPEC, crate::common::RW>::from_ptr(
258 self._svd2pac_as_ptr().add(480usize),
259 )
260 }
261 }
262
263 #[doc = "Flash Error Address Monitor Register H"]
264 #[inline(always)]
265 pub const fn feamh(&self) -> &'static crate::common::Reg<self::Feamh_SPEC, crate::common::RW> {
266 unsafe {
267 crate::common::Reg::<self::Feamh_SPEC, crate::common::RW>::from_ptr(
268 self._svd2pac_as_ptr().add(488usize),
269 )
270 }
271 }
272
273 #[doc = "Flash Status Register 2"]
274 #[inline(always)]
275 pub const fn fstatr2(
276 &self,
277 ) -> &'static crate::common::Reg<self::Fstatr2_SPEC, crate::common::R> {
278 unsafe {
279 crate::common::Reg::<self::Fstatr2_SPEC, crate::common::R>::from_ptr(
280 self._svd2pac_as_ptr().add(496usize),
281 )
282 }
283 }
284
285 #[doc = "Temperature Sensor Calibration Data Register"]
286 #[inline(always)]
287 pub const fn tscdr(&self) -> &'static crate::common::Reg<self::Tscdr_SPEC, crate::common::R> {
288 unsafe {
289 crate::common::Reg::<self::Tscdr_SPEC, crate::common::R>::from_ptr(
290 self._svd2pac_as_ptr().add(552usize),
291 )
292 }
293 }
294
295 #[doc = "Flash Control Flag Register"]
296 #[inline(always)]
297 pub const fn fctlfr(
298 &self,
299 ) -> &'static crate::common::Reg<self::Fctlfr_SPEC, crate::common::RW> {
300 unsafe {
301 crate::common::Reg::<self::Fctlfr_SPEC, crate::common::RW>::from_ptr(
302 self._svd2pac_as_ptr().add(880usize),
303 )
304 }
305 }
306
307 #[doc = "Flash P/E Mode Entry Register"]
308 #[inline(always)]
309 pub const fn fentryr(
310 &self,
311 ) -> &'static crate::common::Reg<self::Fentryr_SPEC, crate::common::RW> {
312 unsafe {
313 crate::common::Reg::<self::Fentryr_SPEC, crate::common::RW>::from_ptr(
314 self._svd2pac_as_ptr().add(16304usize),
315 )
316 }
317 }
318
319 #[doc = "Memory Wait Cycle Control Register for Data Flash"]
320 #[inline(always)]
321 pub const fn fldwaitr(
322 &self,
323 ) -> &'static crate::common::Reg<self::Fldwaitr_SPEC, crate::common::RW> {
324 unsafe {
325 crate::common::Reg::<self::Fldwaitr_SPEC, crate::common::RW>::from_ptr(
326 self._svd2pac_as_ptr().add(16324usize),
327 )
328 }
329 }
330
331 #[doc = "Prefetch Buffer Enable Register"]
332 #[inline(always)]
333 pub const fn pfber(&self) -> &'static crate::common::Reg<self::Pfber_SPEC, crate::common::RW> {
334 unsafe {
335 crate::common::Reg::<self::Pfber_SPEC, crate::common::RW>::from_ptr(
336 self._svd2pac_as_ptr().add(16328usize),
337 )
338 }
339 }
340
341 #[doc = "Flash Bank Program Control Register"]
342 #[inline(always)]
343 pub const fn fbkpgcr(
344 &self,
345 ) -> &'static crate::common::Reg<self::Fbkpgcr_SPEC, crate::common::RW> {
346 unsafe {
347 crate::common::Reg::<self::Fbkpgcr_SPEC, crate::common::RW>::from_ptr(
348 self._svd2pac_as_ptr().add(16336usize),
349 )
350 }
351 }
352
353 #[doc = "Flash Bank Swap Control Register"]
354 #[inline(always)]
355 pub const fn fbkswcr(
356 &self,
357 ) -> &'static crate::common::Reg<self::Fbkswcr_SPEC, crate::common::RW> {
358 unsafe {
359 crate::common::Reg::<self::Fbkswcr_SPEC, crate::common::RW>::from_ptr(
360 self._svd2pac_as_ptr().add(16340usize),
361 )
362 }
363 }
364}
365#[doc(hidden)]
366#[derive(Copy, Clone, Eq, PartialEq)]
367pub struct Dflctl_SPEC;
368impl crate::sealed::RegSpec for Dflctl_SPEC {
369 type DataType = u8;
370}
371
372#[doc = "Data Flash Control Register"]
373pub type Dflctl = crate::RegValueT<Dflctl_SPEC>;
374
375impl Dflctl {
376 #[doc = "Data Flash Access Enable"]
377 #[inline(always)]
378 pub fn dflen(
379 self,
380 ) -> crate::common::RegisterField<
381 0,
382 0x1,
383 1,
384 0,
385 dflctl::Dflen,
386 dflctl::Dflen,
387 Dflctl_SPEC,
388 crate::common::RW,
389 > {
390 crate::common::RegisterField::<
391 0,
392 0x1,
393 1,
394 0,
395 dflctl::Dflen,
396 dflctl::Dflen,
397 Dflctl_SPEC,
398 crate::common::RW,
399 >::from_register(self, 0)
400 }
401}
402impl ::core::default::Default for Dflctl {
403 #[inline(always)]
404 fn default() -> Dflctl {
405 <crate::RegValueT<Dflctl_SPEC> as RegisterValue<_>>::new(0)
406 }
407}
408pub mod dflctl {
409
410 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
411 pub struct Dflen_SPEC;
412 pub type Dflen = crate::EnumBitfieldStruct<u8, Dflen_SPEC>;
413 impl Dflen {
414 #[doc = "Access to the data flash is disabled"]
415 pub const _0: Self = Self::new(0);
416
417 #[doc = "Access to the data flash is enabled"]
418 pub const _1: Self = Self::new(1);
419 }
420}
421#[doc(hidden)]
422#[derive(Copy, Clone, Eq, PartialEq)]
423pub struct Fpmcr_SPEC;
424impl crate::sealed::RegSpec for Fpmcr_SPEC {
425 type DataType = u8;
426}
427
428#[doc = "Flash P/E Mode Control Register"]
429pub type Fpmcr = crate::RegValueT<Fpmcr_SPEC>;
430
431impl Fpmcr {
432 #[doc = "Flash Operating Mode Select 0"]
433 #[inline(always)]
434 pub fn fms0(
435 self,
436 ) -> crate::common::RegisterField<
437 1,
438 0x1,
439 1,
440 0,
441 fpmcr::Fms0,
442 fpmcr::Fms0,
443 Fpmcr_SPEC,
444 crate::common::RW,
445 > {
446 crate::common::RegisterField::<
447 1,
448 0x1,
449 1,
450 0,
451 fpmcr::Fms0,
452 fpmcr::Fms0,
453 Fpmcr_SPEC,
454 crate::common::RW,
455 >::from_register(self, 0)
456 }
457
458 #[doc = "Code Flash P/E Disable"]
459 #[inline(always)]
460 pub fn rpdis(
461 self,
462 ) -> crate::common::RegisterField<
463 3,
464 0x1,
465 1,
466 0,
467 fpmcr::Rpdis,
468 fpmcr::Rpdis,
469 Fpmcr_SPEC,
470 crate::common::RW,
471 > {
472 crate::common::RegisterField::<
473 3,
474 0x1,
475 1,
476 0,
477 fpmcr::Rpdis,
478 fpmcr::Rpdis,
479 Fpmcr_SPEC,
480 crate::common::RW,
481 >::from_register(self, 0)
482 }
483
484 #[doc = "Flash Operating Mode Select 1"]
485 #[inline(always)]
486 pub fn fms1(self) -> crate::common::RegisterFieldBool<4, 1, 0, Fpmcr_SPEC, crate::common::RW> {
487 crate::common::RegisterFieldBool::<4, 1, 0, Fpmcr_SPEC, crate::common::RW>::from_register(
488 self, 0,
489 )
490 }
491}
492impl ::core::default::Default for Fpmcr {
493 #[inline(always)]
494 fn default() -> Fpmcr {
495 <crate::RegValueT<Fpmcr_SPEC> as RegisterValue<_>>::new(8)
496 }
497}
498pub mod fpmcr {
499
500 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
501 pub struct Fms0_SPEC;
502 pub type Fms0 = crate::EnumBitfieldStruct<u8, Fms0_SPEC>;
503 impl Fms0 {
504 #[doc = "FMS1 = 0: Read mode FMS1 = 1: Data flash P/E mode"]
505 pub const _0: Self = Self::new(0);
506
507 #[doc = "FMS1 = 0: Code flash P/E mode FMS1 = 1: Setting prohibited"]
508 pub const _1: Self = Self::new(1);
509 }
510 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
511 pub struct Rpdis_SPEC;
512 pub type Rpdis = crate::EnumBitfieldStruct<u8, Rpdis_SPEC>;
513 impl Rpdis {
514 #[doc = "Programming of the code flash is enabled"]
515 pub const _0: Self = Self::new(0);
516
517 #[doc = "Programming of the code flash is disabled"]
518 pub const _1: Self = Self::new(1);
519 }
520}
521#[doc(hidden)]
522#[derive(Copy, Clone, Eq, PartialEq)]
523pub struct Fasr_SPEC;
524impl crate::sealed::RegSpec for Fasr_SPEC {
525 type DataType = u8;
526}
527
528#[doc = "Flash Area Select Register"]
529pub type Fasr = crate::RegValueT<Fasr_SPEC>;
530
531impl Fasr {
532 #[doc = "Extra Area Select"]
533 #[inline(always)]
534 pub fn exs(
535 self,
536 ) -> crate::common::RegisterField<
537 0,
538 0x1,
539 1,
540 0,
541 fasr::Exs,
542 fasr::Exs,
543 Fasr_SPEC,
544 crate::common::RW,
545 > {
546 crate::common::RegisterField::<
547 0,
548 0x1,
549 1,
550 0,
551 fasr::Exs,
552 fasr::Exs,
553 Fasr_SPEC,
554 crate::common::RW,
555 >::from_register(self, 0)
556 }
557}
558impl ::core::default::Default for Fasr {
559 #[inline(always)]
560 fn default() -> Fasr {
561 <crate::RegValueT<Fasr_SPEC> as RegisterValue<_>>::new(0)
562 }
563}
564pub mod fasr {
565
566 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
567 pub struct Exs_SPEC;
568 pub type Exs = crate::EnumBitfieldStruct<u8, Exs_SPEC>;
569 impl Exs {
570 #[doc = "User area or data area"]
571 pub const _0: Self = Self::new(0);
572
573 #[doc = "Extra area"]
574 pub const _1: Self = Self::new(1);
575 }
576}
577#[doc(hidden)]
578#[derive(Copy, Clone, Eq, PartialEq)]
579pub struct Fsarl_SPEC;
580impl crate::sealed::RegSpec for Fsarl_SPEC {
581 type DataType = u16;
582}
583
584#[doc = "Flash Processing Start Address Register L"]
585pub type Fsarl = crate::RegValueT<Fsarl_SPEC>;
586
587impl Fsarl {
588 #[doc = "Flash Processing Start Address L"]
589 #[inline(always)]
590 pub fn fsarl(
591 self,
592 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fsarl_SPEC, crate::common::RW>
593 {
594 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fsarl_SPEC,crate::common::RW>::from_register(self,0)
595 }
596}
597impl ::core::default::Default for Fsarl {
598 #[inline(always)]
599 fn default() -> Fsarl {
600 <crate::RegValueT<Fsarl_SPEC> as RegisterValue<_>>::new(0)
601 }
602}
603
604#[doc(hidden)]
605#[derive(Copy, Clone, Eq, PartialEq)]
606pub struct Fsarh_SPEC;
607impl crate::sealed::RegSpec for Fsarh_SPEC {
608 type DataType = u16;
609}
610
611#[doc = "Flash Processing Start Address Register H"]
612pub type Fsarh = crate::RegValueT<Fsarh_SPEC>;
613
614impl Fsarh {
615 #[doc = "Flash Processing Start Address H"]
616 #[inline(always)]
617 pub fn fsarh(
618 self,
619 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fsarh_SPEC, crate::common::RW>
620 {
621 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fsarh_SPEC,crate::common::RW>::from_register(self,0)
622 }
623}
624impl ::core::default::Default for Fsarh {
625 #[inline(always)]
626 fn default() -> Fsarh {
627 <crate::RegValueT<Fsarh_SPEC> as RegisterValue<_>>::new(0)
628 }
629}
630
631#[doc(hidden)]
632#[derive(Copy, Clone, Eq, PartialEq)]
633pub struct Fcr_SPEC;
634impl crate::sealed::RegSpec for Fcr_SPEC {
635 type DataType = u8;
636}
637
638#[doc = "Flash Control Register"]
639pub type Fcr = crate::RegValueT<Fcr_SPEC>;
640
641impl Fcr {
642 #[doc = "Software Command Setting"]
643 #[inline(always)]
644 pub fn cmd(
645 self,
646 ) -> crate::common::RegisterField<0, 0xf, 1, 0, fcr::Cmd, fcr::Cmd, Fcr_SPEC, crate::common::RW>
647 {
648 crate::common::RegisterField::<0,0xf,1,0,fcr::Cmd,fcr::Cmd,Fcr_SPEC,crate::common::RW>::from_register(self,0)
649 }
650
651 #[doc = "Data Read Completion"]
652 #[inline(always)]
653 pub fn drc(
654 self,
655 ) -> crate::common::RegisterField<4, 0x1, 1, 0, fcr::Drc, fcr::Drc, Fcr_SPEC, crate::common::RW>
656 {
657 crate::common::RegisterField::<4,0x1,1,0,fcr::Drc,fcr::Drc,Fcr_SPEC,crate::common::RW>::from_register(self,0)
658 }
659
660 #[doc = "Forced Processing Stop"]
661 #[inline(always)]
662 pub fn stop(self) -> crate::common::RegisterFieldBool<6, 1, 0, Fcr_SPEC, crate::common::RW> {
663 crate::common::RegisterFieldBool::<6, 1, 0, Fcr_SPEC, crate::common::RW>::from_register(
664 self, 0,
665 )
666 }
667
668 #[doc = "Processing Start"]
669 #[inline(always)]
670 pub fn opst(
671 self,
672 ) -> crate::common::RegisterField<7, 0x1, 1, 0, fcr::Opst, fcr::Opst, Fcr_SPEC, crate::common::RW>
673 {
674 crate::common::RegisterField::<
675 7,
676 0x1,
677 1,
678 0,
679 fcr::Opst,
680 fcr::Opst,
681 Fcr_SPEC,
682 crate::common::RW,
683 >::from_register(self, 0)
684 }
685}
686impl ::core::default::Default for Fcr {
687 #[inline(always)]
688 fn default() -> Fcr {
689 <crate::RegValueT<Fcr_SPEC> as RegisterValue<_>>::new(0)
690 }
691}
692pub mod fcr {
693
694 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
695 pub struct Cmd_SPEC;
696 pub type Cmd = crate::EnumBitfieldStruct<u8, Cmd_SPEC>;
697 impl Cmd {
698 #[doc = "Program"]
699 pub const _0_X_1: Self = Self::new(1);
700
701 #[doc = "Blank check (code flash)"]
702 pub const _0_X_3: Self = Self::new(3);
703
704 #[doc = "Block erase"]
705 pub const _0_X_4: Self = Self::new(4);
706
707 #[doc = "Consecutive read"]
708 pub const _0_X_5: Self = Self::new(5);
709
710 #[doc = "Chip erase"]
711 pub const _0_X_6: Self = Self::new(6);
712
713 #[doc = "Blank check (data flash)"]
714 pub const _0_X_B: Self = Self::new(11);
715 }
716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
717 pub struct Drc_SPEC;
718 pub type Drc = crate::EnumBitfieldStruct<u8, Drc_SPEC>;
719 impl Drc {
720 #[doc = "Data is not read or next data is requested"]
721 pub const _0: Self = Self::new(0);
722
723 #[doc = "Data reading is complete"]
724 pub const _1: Self = Self::new(1);
725 }
726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
727 pub struct Opst_SPEC;
728 pub type Opst = crate::EnumBitfieldStruct<u8, Opst_SPEC>;
729 impl Opst {
730 #[doc = "Processing stops"]
731 pub const _0: Self = Self::new(0);
732
733 #[doc = "Processing starts"]
734 pub const _1: Self = Self::new(1);
735 }
736}
737#[doc(hidden)]
738#[derive(Copy, Clone, Eq, PartialEq)]
739pub struct Fearl_SPEC;
740impl crate::sealed::RegSpec for Fearl_SPEC {
741 type DataType = u16;
742}
743
744#[doc = "Flash Processing End Address Register L"]
745pub type Fearl = crate::RegValueT<Fearl_SPEC>;
746
747impl Fearl {
748 #[doc = "Flash Processing End Address L"]
749 #[inline(always)]
750 pub fn fearl(
751 self,
752 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fearl_SPEC, crate::common::RW>
753 {
754 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fearl_SPEC,crate::common::RW>::from_register(self,0)
755 }
756}
757impl ::core::default::Default for Fearl {
758 #[inline(always)]
759 fn default() -> Fearl {
760 <crate::RegValueT<Fearl_SPEC> as RegisterValue<_>>::new(0)
761 }
762}
763
764#[doc(hidden)]
765#[derive(Copy, Clone, Eq, PartialEq)]
766pub struct Fearh_SPEC;
767impl crate::sealed::RegSpec for Fearh_SPEC {
768 type DataType = u16;
769}
770
771#[doc = "Flash Processing End Address Register H"]
772pub type Fearh = crate::RegValueT<Fearh_SPEC>;
773
774impl Fearh {
775 #[doc = "Flash Processing End Address H"]
776 #[inline(always)]
777 pub fn fearh(
778 self,
779 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fearh_SPEC, crate::common::RW>
780 {
781 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fearh_SPEC,crate::common::RW>::from_register(self,0)
782 }
783}
784impl ::core::default::Default for Fearh {
785 #[inline(always)]
786 fn default() -> Fearh {
787 <crate::RegValueT<Fearh_SPEC> as RegisterValue<_>>::new(0)
788 }
789}
790
791#[doc(hidden)]
792#[derive(Copy, Clone, Eq, PartialEq)]
793pub struct Fresetr_SPEC;
794impl crate::sealed::RegSpec for Fresetr_SPEC {
795 type DataType = u8;
796}
797
798#[doc = "Flash Reset Register"]
799pub type Fresetr = crate::RegValueT<Fresetr_SPEC>;
800
801impl Fresetr {
802 #[doc = "Software reset of the registers"]
803 #[inline(always)]
804 pub fn freset(
805 self,
806 ) -> crate::common::RegisterField<
807 0,
808 0x1,
809 1,
810 0,
811 fresetr::Freset,
812 fresetr::Freset,
813 Fresetr_SPEC,
814 crate::common::RW,
815 > {
816 crate::common::RegisterField::<
817 0,
818 0x1,
819 1,
820 0,
821 fresetr::Freset,
822 fresetr::Freset,
823 Fresetr_SPEC,
824 crate::common::RW,
825 >::from_register(self, 0)
826 }
827}
828impl ::core::default::Default for Fresetr {
829 #[inline(always)]
830 fn default() -> Fresetr {
831 <crate::RegValueT<Fresetr_SPEC> as RegisterValue<_>>::new(0)
832 }
833}
834pub mod fresetr {
835
836 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
837 pub struct Freset_SPEC;
838 pub type Freset = crate::EnumBitfieldStruct<u8, Freset_SPEC>;
839 impl Freset {
840 #[doc = "The registers related to the flash programming are not reset"]
841 pub const _0: Self = Self::new(0);
842
843 #[doc = "The registers related to the flash programming are reset"]
844 pub const _1: Self = Self::new(1);
845 }
846}
847#[doc(hidden)]
848#[derive(Copy, Clone, Eq, PartialEq)]
849pub struct Fstatr1_SPEC;
850impl crate::sealed::RegSpec for Fstatr1_SPEC {
851 type DataType = u8;
852}
853
854#[doc = "Flash Status Register 1"]
855pub type Fstatr1 = crate::RegValueT<Fstatr1_SPEC>;
856
857impl Fstatr1 {
858 #[doc = "Data Read Ready Flag"]
859 #[inline(always)]
860 pub fn drrdy(
861 self,
862 ) -> crate::common::RegisterField<
863 1,
864 0x1,
865 1,
866 0,
867 fstatr1::Drrdy,
868 fstatr1::Drrdy,
869 Fstatr1_SPEC,
870 crate::common::R,
871 > {
872 crate::common::RegisterField::<
873 1,
874 0x1,
875 1,
876 0,
877 fstatr1::Drrdy,
878 fstatr1::Drrdy,
879 Fstatr1_SPEC,
880 crate::common::R,
881 >::from_register(self, 0)
882 }
883
884 #[doc = "Flash Ready Flag"]
885 #[inline(always)]
886 pub fn frdy(
887 self,
888 ) -> crate::common::RegisterField<
889 6,
890 0x1,
891 1,
892 0,
893 fstatr1::Frdy,
894 fstatr1::Frdy,
895 Fstatr1_SPEC,
896 crate::common::R,
897 > {
898 crate::common::RegisterField::<
899 6,
900 0x1,
901 1,
902 0,
903 fstatr1::Frdy,
904 fstatr1::Frdy,
905 Fstatr1_SPEC,
906 crate::common::R,
907 >::from_register(self, 0)
908 }
909
910 #[doc = "Extra Area Ready Flag"]
911 #[inline(always)]
912 pub fn exrdy(
913 self,
914 ) -> crate::common::RegisterField<
915 7,
916 0x1,
917 1,
918 0,
919 fstatr1::Exrdy,
920 fstatr1::Exrdy,
921 Fstatr1_SPEC,
922 crate::common::R,
923 > {
924 crate::common::RegisterField::<
925 7,
926 0x1,
927 1,
928 0,
929 fstatr1::Exrdy,
930 fstatr1::Exrdy,
931 Fstatr1_SPEC,
932 crate::common::R,
933 >::from_register(self, 0)
934 }
935}
936impl ::core::default::Default for Fstatr1 {
937 #[inline(always)]
938 fn default() -> Fstatr1 {
939 <crate::RegValueT<Fstatr1_SPEC> as RegisterValue<_>>::new(4)
940 }
941}
942pub mod fstatr1 {
943
944 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
945 pub struct Drrdy_SPEC;
946 pub type Drrdy = crate::EnumBitfieldStruct<u8, Drrdy_SPEC>;
947 impl Drrdy {
948 #[doc = "The read processing of the consecutive read command at each address is not terminated"]
949 pub const _0: Self = Self::new(0);
950
951 #[doc = "The read processing of the consecutive read command at each address is terminated and read data is stored to the FRBH and FRBL registers"]
952 pub const _1: Self = Self::new(1);
953 }
954 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
955 pub struct Frdy_SPEC;
956 pub type Frdy = crate::EnumBitfieldStruct<u8, Frdy_SPEC>;
957 impl Frdy {
958 #[doc = "The software command of the FCR register is not terminated"]
959 pub const _0: Self = Self::new(0);
960
961 #[doc = "The software command of the FCR register is terminated"]
962 pub const _1: Self = Self::new(1);
963 }
964 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
965 pub struct Exrdy_SPEC;
966 pub type Exrdy = crate::EnumBitfieldStruct<u8, Exrdy_SPEC>;
967 impl Exrdy {
968 #[doc = "The software command of the FEXCR register is not terminated"]
969 pub const _0: Self = Self::new(0);
970
971 #[doc = "The software command of the FEXCR register is terminated"]
972 pub const _1: Self = Self::new(1);
973 }
974}
975#[doc(hidden)]
976#[derive(Copy, Clone, Eq, PartialEq)]
977pub struct Fwbl0_SPEC;
978impl crate::sealed::RegSpec for Fwbl0_SPEC {
979 type DataType = u16;
980}
981
982#[doc = "Flash Write Buffer Register L0"]
983pub type Fwbl0 = crate::RegValueT<Fwbl0_SPEC>;
984
985impl Fwbl0 {
986 #[doc = "Flash Write Buffer L0"]
987 #[inline(always)]
988 pub fn wdata(
989 self,
990 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fwbl0_SPEC, crate::common::RW>
991 {
992 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fwbl0_SPEC,crate::common::RW>::from_register(self,0)
993 }
994}
995impl ::core::default::Default for Fwbl0 {
996 #[inline(always)]
997 fn default() -> Fwbl0 {
998 <crate::RegValueT<Fwbl0_SPEC> as RegisterValue<_>>::new(0)
999 }
1000}
1001
1002#[doc(hidden)]
1003#[derive(Copy, Clone, Eq, PartialEq)]
1004pub struct Fwbh0_SPEC;
1005impl crate::sealed::RegSpec for Fwbh0_SPEC {
1006 type DataType = u16;
1007}
1008
1009#[doc = "Flash Write Buffer Register H0"]
1010pub type Fwbh0 = crate::RegValueT<Fwbh0_SPEC>;
1011
1012impl Fwbh0 {
1013 #[doc = "Flash Write Buffer H0"]
1014 #[inline(always)]
1015 pub fn wdata(
1016 self,
1017 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Fwbh0_SPEC, crate::common::RW>
1018 {
1019 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Fwbh0_SPEC,crate::common::RW>::from_register(self,0)
1020 }
1021}
1022impl ::core::default::Default for Fwbh0 {
1023 #[inline(always)]
1024 fn default() -> Fwbh0 {
1025 <crate::RegValueT<Fwbh0_SPEC> as RegisterValue<_>>::new(0)
1026 }
1027}
1028
1029#[doc(hidden)]
1030#[derive(Copy, Clone, Eq, PartialEq)]
1031pub struct Fpr_SPEC;
1032impl crate::sealed::RegSpec for Fpr_SPEC {
1033 type DataType = u8;
1034}
1035
1036#[doc = "Protection Unlock Register"]
1037pub type Fpr = crate::RegValueT<Fpr_SPEC>;
1038
1039impl Fpr {
1040 #[doc = "Protection Unlock"]
1041 #[inline(always)]
1042 pub fn fpr(
1043 self,
1044 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Fpr_SPEC, crate::common::RW> {
1045 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Fpr_SPEC,crate::common::RW>::from_register(self,0)
1046 }
1047}
1048impl ::core::default::Default for Fpr {
1049 #[inline(always)]
1050 fn default() -> Fpr {
1051 <crate::RegValueT<Fpr_SPEC> as RegisterValue<_>>::new(0)
1052 }
1053}
1054
1055#[doc(hidden)]
1056#[derive(Copy, Clone, Eq, PartialEq)]
1057pub struct Fpsr_SPEC;
1058impl crate::sealed::RegSpec for Fpsr_SPEC {
1059 type DataType = u8;
1060}
1061
1062#[doc = "Protection Unlock Status Register"]
1063pub type Fpsr = crate::RegValueT<Fpsr_SPEC>;
1064
1065impl Fpsr {
1066 #[doc = "Protect Error Flag"]
1067 #[inline(always)]
1068 pub fn perr(
1069 self,
1070 ) -> crate::common::RegisterField<
1071 0,
1072 0x1,
1073 1,
1074 0,
1075 fpsr::Perr,
1076 fpsr::Perr,
1077 Fpsr_SPEC,
1078 crate::common::R,
1079 > {
1080 crate::common::RegisterField::<
1081 0,
1082 0x1,
1083 1,
1084 0,
1085 fpsr::Perr,
1086 fpsr::Perr,
1087 Fpsr_SPEC,
1088 crate::common::R,
1089 >::from_register(self, 0)
1090 }
1091}
1092impl ::core::default::Default for Fpsr {
1093 #[inline(always)]
1094 fn default() -> Fpsr {
1095 <crate::RegValueT<Fpsr_SPEC> as RegisterValue<_>>::new(0)
1096 }
1097}
1098pub mod fpsr {
1099
1100 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1101 pub struct Perr_SPEC;
1102 pub type Perr = crate::EnumBitfieldStruct<u8, Perr_SPEC>;
1103 impl Perr {
1104 #[doc = "No error"]
1105 pub const _0: Self = Self::new(0);
1106
1107 #[doc = "An error occurs"]
1108 pub const _1: Self = Self::new(1);
1109 }
1110}
1111#[doc(hidden)]
1112#[derive(Copy, Clone, Eq, PartialEq)]
1113pub struct Frbl0_SPEC;
1114impl crate::sealed::RegSpec for Frbl0_SPEC {
1115 type DataType = u16;
1116}
1117
1118#[doc = "Flash Read Buffer Register L0"]
1119pub type Frbl0 = crate::RegValueT<Frbl0_SPEC>;
1120
1121impl Frbl0 {
1122 #[doc = "Flash Read Buffer L0"]
1123 #[inline(always)]
1124 pub fn rdata(
1125 self,
1126 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Frbl0_SPEC, crate::common::R> {
1127 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Frbl0_SPEC,crate::common::R>::from_register(self,0)
1128 }
1129}
1130impl ::core::default::Default for Frbl0 {
1131 #[inline(always)]
1132 fn default() -> Frbl0 {
1133 <crate::RegValueT<Frbl0_SPEC> as RegisterValue<_>>::new(0)
1134 }
1135}
1136
1137#[doc(hidden)]
1138#[derive(Copy, Clone, Eq, PartialEq)]
1139pub struct Frbh0_SPEC;
1140impl crate::sealed::RegSpec for Frbh0_SPEC {
1141 type DataType = u16;
1142}
1143
1144#[doc = "Flash Read Buffer Register H0"]
1145pub type Frbh0 = crate::RegValueT<Frbh0_SPEC>;
1146
1147impl Frbh0 {
1148 #[doc = "Flash Read Buffer H0"]
1149 #[inline(always)]
1150 pub fn rdata(
1151 self,
1152 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Frbh0_SPEC, crate::common::R> {
1153 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Frbh0_SPEC,crate::common::R>::from_register(self,0)
1154 }
1155}
1156impl ::core::default::Default for Frbh0 {
1157 #[inline(always)]
1158 fn default() -> Frbh0 {
1159 <crate::RegValueT<Frbh0_SPEC> as RegisterValue<_>>::new(0)
1160 }
1161}
1162
1163#[doc(hidden)]
1164#[derive(Copy, Clone, Eq, PartialEq)]
1165pub struct Fscmr_SPEC;
1166impl crate::sealed::RegSpec for Fscmr_SPEC {
1167 type DataType = u16;
1168}
1169
1170#[doc = "Flash Startup Setting Monitor Register"]
1171pub type Fscmr = crate::RegValueT<Fscmr_SPEC>;
1172
1173impl Fscmr {
1174 #[doc = "Startup Area Setting Monitor Flag"]
1175 #[inline(always)]
1176 pub fn sasmf(
1177 self,
1178 ) -> crate::common::RegisterField<
1179 8,
1180 0x1,
1181 1,
1182 0,
1183 fscmr::Sasmf,
1184 fscmr::Sasmf,
1185 Fscmr_SPEC,
1186 crate::common::R,
1187 > {
1188 crate::common::RegisterField::<
1189 8,
1190 0x1,
1191 1,
1192 0,
1193 fscmr::Sasmf,
1194 fscmr::Sasmf,
1195 Fscmr_SPEC,
1196 crate::common::R,
1197 >::from_register(self, 0)
1198 }
1199
1200 #[doc = "Access Window Protection Flag"]
1201 #[inline(always)]
1202 pub fn fspr(
1203 self,
1204 ) -> crate::common::RegisterField<
1205 14,
1206 0x1,
1207 1,
1208 0,
1209 fscmr::Fspr,
1210 fscmr::Fspr,
1211 Fscmr_SPEC,
1212 crate::common::R,
1213 > {
1214 crate::common::RegisterField::<
1215 14,
1216 0x1,
1217 1,
1218 0,
1219 fscmr::Fspr,
1220 fscmr::Fspr,
1221 Fscmr_SPEC,
1222 crate::common::R,
1223 >::from_register(self, 0)
1224 }
1225}
1226impl ::core::default::Default for Fscmr {
1227 #[inline(always)]
1228 fn default() -> Fscmr {
1229 <crate::RegValueT<Fscmr_SPEC> as RegisterValue<_>>::new(0)
1230 }
1231}
1232pub mod fscmr {
1233
1234 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1235 pub struct Sasmf_SPEC;
1236 pub type Sasmf = crate::EnumBitfieldStruct<u8, Sasmf_SPEC>;
1237 impl Sasmf {
1238 #[doc = "Setting to start up using the alternative area"]
1239 pub const _0: Self = Self::new(0);
1240
1241 #[doc = "Setting to start up using the default area"]
1242 pub const _1: Self = Self::new(1);
1243 }
1244 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1245 pub struct Fspr_SPEC;
1246 pub type Fspr = crate::EnumBitfieldStruct<u8, Fspr_SPEC>;
1247 impl Fspr {
1248 #[doc = "Access window setting disabled"]
1249 pub const _0: Self = Self::new(0);
1250
1251 #[doc = "Access window setting enabled"]
1252 pub const _1: Self = Self::new(1);
1253 }
1254}
1255#[doc(hidden)]
1256#[derive(Copy, Clone, Eq, PartialEq)]
1257pub struct Fawsmr_SPEC;
1258impl crate::sealed::RegSpec for Fawsmr_SPEC {
1259 type DataType = u16;
1260}
1261
1262#[doc = "Flash Access Window Start Address Monitor Register"]
1263pub type Fawsmr = crate::RegValueT<Fawsmr_SPEC>;
1264
1265impl Fawsmr {
1266 #[doc = "Access Window Start Address"]
1267 #[inline(always)]
1268 pub fn faws(
1269 self,
1270 ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fawsmr_SPEC, crate::common::R> {
1271 crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fawsmr_SPEC,crate::common::R>::from_register(self,0)
1272 }
1273
1274 #[doc = "Access Window Protection Flag"]
1275 #[inline(always)]
1276 pub fn fspr(self) -> crate::common::RegisterFieldBool<15, 1, 0, Fawsmr_SPEC, crate::common::R> {
1277 crate::common::RegisterFieldBool::<15, 1, 0, Fawsmr_SPEC, crate::common::R>::from_register(
1278 self, 0,
1279 )
1280 }
1281}
1282impl ::core::default::Default for Fawsmr {
1283 #[inline(always)]
1284 fn default() -> Fawsmr {
1285 <crate::RegValueT<Fawsmr_SPEC> as RegisterValue<_>>::new(0)
1286 }
1287}
1288
1289#[doc(hidden)]
1290#[derive(Copy, Clone, Eq, PartialEq)]
1291pub struct Fawemr_SPEC;
1292impl crate::sealed::RegSpec for Fawemr_SPEC {
1293 type DataType = u16;
1294}
1295
1296#[doc = "Flash Access Window End Address Monitor Register"]
1297pub type Fawemr = crate::RegValueT<Fawemr_SPEC>;
1298
1299impl Fawemr {
1300 #[doc = "Access Window End Address"]
1301 #[inline(always)]
1302 pub fn fawe(
1303 self,
1304 ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fawemr_SPEC, crate::common::R> {
1305 crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fawemr_SPEC,crate::common::R>::from_register(self,0)
1306 }
1307
1308 #[doc = "Startup Area Setting Monitor Flag"]
1309 #[inline(always)]
1310 pub fn sasmf(
1311 self,
1312 ) -> crate::common::RegisterFieldBool<15, 1, 0, Fawemr_SPEC, crate::common::R> {
1313 crate::common::RegisterFieldBool::<15, 1, 0, Fawemr_SPEC, crate::common::R>::from_register(
1314 self, 0,
1315 )
1316 }
1317}
1318impl ::core::default::Default for Fawemr {
1319 #[inline(always)]
1320 fn default() -> Fawemr {
1321 <crate::RegValueT<Fawemr_SPEC> as RegisterValue<_>>::new(0)
1322 }
1323}
1324
1325#[doc(hidden)]
1326#[derive(Copy, Clone, Eq, PartialEq)]
1327pub struct Fisr_SPEC;
1328impl crate::sealed::RegSpec for Fisr_SPEC {
1329 type DataType = u8;
1330}
1331
1332#[doc = "Flash Initial Setting Register"]
1333pub type Fisr = crate::RegValueT<Fisr_SPEC>;
1334
1335impl Fisr {
1336 #[doc = "Flash-IF Clock Notification"]
1337 #[inline(always)]
1338 pub fn pcka(
1339 self,
1340 ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Fisr_SPEC, crate::common::RW> {
1341 crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Fisr_SPEC,crate::common::RW>::from_register(self,0)
1342 }
1343
1344 #[doc = "Startup Area Select"]
1345 #[inline(always)]
1346 pub fn sas(
1347 self,
1348 ) -> crate::common::RegisterField<
1349 6,
1350 0x3,
1351 1,
1352 0,
1353 fisr::Sas,
1354 fisr::Sas,
1355 Fisr_SPEC,
1356 crate::common::RW,
1357 > {
1358 crate::common::RegisterField::<
1359 6,
1360 0x3,
1361 1,
1362 0,
1363 fisr::Sas,
1364 fisr::Sas,
1365 Fisr_SPEC,
1366 crate::common::RW,
1367 >::from_register(self, 0)
1368 }
1369}
1370impl ::core::default::Default for Fisr {
1371 #[inline(always)]
1372 fn default() -> Fisr {
1373 <crate::RegValueT<Fisr_SPEC> as RegisterValue<_>>::new(0)
1374 }
1375}
1376pub mod fisr {
1377
1378 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1379 pub struct Sas_SPEC;
1380 pub type Sas = crate::EnumBitfieldStruct<u8, Sas_SPEC>;
1381 impl Sas {
1382 #[doc = "The startup area is switched to the default area temporarily"]
1383 pub const _10: Self = Self::new(2);
1384
1385 #[doc = "The startup area is switched to the alternate area temporarily"]
1386 pub const _11: Self = Self::new(3);
1387 }
1388}
1389#[doc(hidden)]
1390#[derive(Copy, Clone, Eq, PartialEq)]
1391pub struct Fexcr_SPEC;
1392impl crate::sealed::RegSpec for Fexcr_SPEC {
1393 type DataType = u8;
1394}
1395
1396#[doc = "Flash Extra Area Control Register"]
1397pub type Fexcr = crate::RegValueT<Fexcr_SPEC>;
1398
1399impl Fexcr {
1400 #[doc = "Software Command Setting"]
1401 #[inline(always)]
1402 pub fn cmd(
1403 self,
1404 ) -> crate::common::RegisterField<
1405 0,
1406 0x7,
1407 1,
1408 0,
1409 fexcr::Cmd,
1410 fexcr::Cmd,
1411 Fexcr_SPEC,
1412 crate::common::RW,
1413 > {
1414 crate::common::RegisterField::<
1415 0,
1416 0x7,
1417 1,
1418 0,
1419 fexcr::Cmd,
1420 fexcr::Cmd,
1421 Fexcr_SPEC,
1422 crate::common::RW,
1423 >::from_register(self, 0)
1424 }
1425
1426 #[doc = "Processing Start"]
1427 #[inline(always)]
1428 pub fn opst(
1429 self,
1430 ) -> crate::common::RegisterField<
1431 7,
1432 0x1,
1433 1,
1434 0,
1435 fexcr::Opst,
1436 fexcr::Opst,
1437 Fexcr_SPEC,
1438 crate::common::RW,
1439 > {
1440 crate::common::RegisterField::<
1441 7,
1442 0x1,
1443 1,
1444 0,
1445 fexcr::Opst,
1446 fexcr::Opst,
1447 Fexcr_SPEC,
1448 crate::common::RW,
1449 >::from_register(self, 0)
1450 }
1451}
1452impl ::core::default::Default for Fexcr {
1453 #[inline(always)]
1454 fn default() -> Fexcr {
1455 <crate::RegValueT<Fexcr_SPEC> as RegisterValue<_>>::new(0)
1456 }
1457}
1458pub mod fexcr {
1459
1460 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1461 pub struct Cmd_SPEC;
1462 pub type Cmd = crate::EnumBitfieldStruct<u8, Cmd_SPEC>;
1463 impl Cmd {
1464 #[doc = "Flash control flag setting"]
1465 pub const _001: Self = Self::new(1);
1466
1467 #[doc = "Access window information program Startup area selection and security setting"]
1468 pub const _010: Self = Self::new(2);
1469
1470 #[doc = "OCDID1 program"]
1471 pub const _011: Self = Self::new(3);
1472
1473 #[doc = "OCDID2 program"]
1474 pub const _100: Self = Self::new(4);
1475
1476 #[doc = "OCDID3 program"]
1477 pub const _101: Self = Self::new(5);
1478
1479 #[doc = "OCDID4 program"]
1480 pub const _110: Self = Self::new(6);
1481 }
1482 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1483 pub struct Opst_SPEC;
1484 pub type Opst = crate::EnumBitfieldStruct<u8, Opst_SPEC>;
1485 impl Opst {
1486 #[doc = "Processing stops"]
1487 pub const _0: Self = Self::new(0);
1488
1489 #[doc = "Processing starts"]
1490 pub const _1: Self = Self::new(1);
1491 }
1492}
1493#[doc(hidden)]
1494#[derive(Copy, Clone, Eq, PartialEq)]
1495pub struct Feaml_SPEC;
1496impl crate::sealed::RegSpec for Feaml_SPEC {
1497 type DataType = u16;
1498}
1499
1500#[doc = "Flash Error Address Monitor Register L"]
1501pub type Feaml = crate::RegValueT<Feaml_SPEC>;
1502
1503impl Feaml {
1504 #[doc = "Flash Error Address Monitor Register L"]
1505 #[inline(always)]
1506 pub fn feaml(
1507 self,
1508 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Feaml_SPEC, crate::common::RW>
1509 {
1510 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Feaml_SPEC,crate::common::RW>::from_register(self,0)
1511 }
1512}
1513impl ::core::default::Default for Feaml {
1514 #[inline(always)]
1515 fn default() -> Feaml {
1516 <crate::RegValueT<Feaml_SPEC> as RegisterValue<_>>::new(0)
1517 }
1518}
1519
1520#[doc(hidden)]
1521#[derive(Copy, Clone, Eq, PartialEq)]
1522pub struct Feamh_SPEC;
1523impl crate::sealed::RegSpec for Feamh_SPEC {
1524 type DataType = u16;
1525}
1526
1527#[doc = "Flash Error Address Monitor Register H"]
1528pub type Feamh = crate::RegValueT<Feamh_SPEC>;
1529
1530impl Feamh {
1531 #[doc = "Flash Error Address Monitor Register H"]
1532 #[inline(always)]
1533 pub fn feamh(
1534 self,
1535 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Feamh_SPEC, crate::common::RW>
1536 {
1537 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Feamh_SPEC,crate::common::RW>::from_register(self,0)
1538 }
1539}
1540impl ::core::default::Default for Feamh {
1541 #[inline(always)]
1542 fn default() -> Feamh {
1543 <crate::RegValueT<Feamh_SPEC> as RegisterValue<_>>::new(0)
1544 }
1545}
1546
1547#[doc(hidden)]
1548#[derive(Copy, Clone, Eq, PartialEq)]
1549pub struct Fstatr2_SPEC;
1550impl crate::sealed::RegSpec for Fstatr2_SPEC {
1551 type DataType = u16;
1552}
1553
1554#[doc = "Flash Status Register 2"]
1555pub type Fstatr2 = crate::RegValueT<Fstatr2_SPEC>;
1556
1557impl Fstatr2 {
1558 #[doc = "Erase Error Flag"]
1559 #[inline(always)]
1560 pub fn ererr(
1561 self,
1562 ) -> crate::common::RegisterField<
1563 0,
1564 0x1,
1565 1,
1566 0,
1567 fstatr2::Ererr,
1568 fstatr2::Ererr,
1569 Fstatr2_SPEC,
1570 crate::common::R,
1571 > {
1572 crate::common::RegisterField::<
1573 0,
1574 0x1,
1575 1,
1576 0,
1577 fstatr2::Ererr,
1578 fstatr2::Ererr,
1579 Fstatr2_SPEC,
1580 crate::common::R,
1581 >::from_register(self, 0)
1582 }
1583
1584 #[doc = "Program Error Flag"]
1585 #[inline(always)]
1586 pub fn prgerr(
1587 self,
1588 ) -> crate::common::RegisterField<
1589 1,
1590 0x1,
1591 1,
1592 0,
1593 fstatr2::Prgerr,
1594 fstatr2::Prgerr,
1595 Fstatr2_SPEC,
1596 crate::common::R,
1597 > {
1598 crate::common::RegisterField::<
1599 1,
1600 0x1,
1601 1,
1602 0,
1603 fstatr2::Prgerr,
1604 fstatr2::Prgerr,
1605 Fstatr2_SPEC,
1606 crate::common::R,
1607 >::from_register(self, 0)
1608 }
1609
1610 #[doc = "Program Error Flag 01"]
1611 #[inline(always)]
1612 pub fn prgerr01(
1613 self,
1614 ) -> crate::common::RegisterField<
1615 2,
1616 0x1,
1617 1,
1618 0,
1619 fstatr2::Prgerr01,
1620 fstatr2::Prgerr01,
1621 Fstatr2_SPEC,
1622 crate::common::R,
1623 > {
1624 crate::common::RegisterField::<
1625 2,
1626 0x1,
1627 1,
1628 0,
1629 fstatr2::Prgerr01,
1630 fstatr2::Prgerr01,
1631 Fstatr2_SPEC,
1632 crate::common::R,
1633 >::from_register(self, 0)
1634 }
1635
1636 #[doc = "Blank Check Error Flag"]
1637 #[inline(always)]
1638 pub fn bcerr(
1639 self,
1640 ) -> crate::common::RegisterField<
1641 3,
1642 0x1,
1643 1,
1644 0,
1645 fstatr2::Bcerr,
1646 fstatr2::Bcerr,
1647 Fstatr2_SPEC,
1648 crate::common::R,
1649 > {
1650 crate::common::RegisterField::<
1651 3,
1652 0x1,
1653 1,
1654 0,
1655 fstatr2::Bcerr,
1656 fstatr2::Bcerr,
1657 Fstatr2_SPEC,
1658 crate::common::R,
1659 >::from_register(self, 0)
1660 }
1661
1662 #[doc = "Illegal Command Error Flag"]
1663 #[inline(always)]
1664 pub fn ilglerr(
1665 self,
1666 ) -> crate::common::RegisterField<
1667 4,
1668 0x1,
1669 1,
1670 0,
1671 fstatr2::Ilglerr,
1672 fstatr2::Ilglerr,
1673 Fstatr2_SPEC,
1674 crate::common::R,
1675 > {
1676 crate::common::RegisterField::<
1677 4,
1678 0x1,
1679 1,
1680 0,
1681 fstatr2::Ilglerr,
1682 fstatr2::Ilglerr,
1683 Fstatr2_SPEC,
1684 crate::common::R,
1685 >::from_register(self, 0)
1686 }
1687
1688 #[doc = "Extra Area Illegal Command Error Flag"]
1689 #[inline(always)]
1690 pub fn eilglerr(
1691 self,
1692 ) -> crate::common::RegisterField<
1693 5,
1694 0x1,
1695 1,
1696 0,
1697 fstatr2::Eilglerr,
1698 fstatr2::Eilglerr,
1699 Fstatr2_SPEC,
1700 crate::common::R,
1701 > {
1702 crate::common::RegisterField::<
1703 5,
1704 0x1,
1705 1,
1706 0,
1707 fstatr2::Eilglerr,
1708 fstatr2::Eilglerr,
1709 Fstatr2_SPEC,
1710 crate::common::R,
1711 >::from_register(self, 0)
1712 }
1713}
1714impl ::core::default::Default for Fstatr2 {
1715 #[inline(always)]
1716 fn default() -> Fstatr2 {
1717 <crate::RegValueT<Fstatr2_SPEC> as RegisterValue<_>>::new(0)
1718 }
1719}
1720pub mod fstatr2 {
1721
1722 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1723 pub struct Ererr_SPEC;
1724 pub type Ererr = crate::EnumBitfieldStruct<u8, Ererr_SPEC>;
1725 impl Ererr {
1726 #[doc = "Erasure terminates normally"]
1727 pub const _0: Self = Self::new(0);
1728
1729 #[doc = "An error occurs during erasure"]
1730 pub const _1: Self = Self::new(1);
1731 }
1732 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1733 pub struct Prgerr_SPEC;
1734 pub type Prgerr = crate::EnumBitfieldStruct<u8, Prgerr_SPEC>;
1735 impl Prgerr {
1736 #[doc = "Programming terminates normally"]
1737 pub const _0: Self = Self::new(0);
1738
1739 #[doc = "An error occurs during programming"]
1740 pub const _1: Self = Self::new(1);
1741 }
1742 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1743 pub struct Prgerr01_SPEC;
1744 pub type Prgerr01 = crate::EnumBitfieldStruct<u8, Prgerr01_SPEC>;
1745 impl Prgerr01 {
1746 #[doc = "Programming by the FEXCR register terminates normally"]
1747 pub const _0: Self = Self::new(0);
1748
1749 #[doc = "An error occurs during programming"]
1750 pub const _1: Self = Self::new(1);
1751 }
1752 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1753 pub struct Bcerr_SPEC;
1754 pub type Bcerr = crate::EnumBitfieldStruct<u8, Bcerr_SPEC>;
1755 impl Bcerr {
1756 #[doc = "Blank checking terminates normally"]
1757 pub const _0: Self = Self::new(0);
1758
1759 #[doc = "An error occurs during blank checking"]
1760 pub const _1: Self = Self::new(1);
1761 }
1762 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1763 pub struct Ilglerr_SPEC;
1764 pub type Ilglerr = crate::EnumBitfieldStruct<u8, Ilglerr_SPEC>;
1765 impl Ilglerr {
1766 #[doc = "No illegal software command or illegal access is detected"]
1767 pub const _0: Self = Self::new(0);
1768
1769 #[doc = "An illegal command or illegal access is detected"]
1770 pub const _1: Self = Self::new(1);
1771 }
1772 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1773 pub struct Eilglerr_SPEC;
1774 pub type Eilglerr = crate::EnumBitfieldStruct<u8, Eilglerr_SPEC>;
1775 impl Eilglerr {
1776 #[doc = "No illegal command or illegal access to the extra area is detected"]
1777 pub const _0: Self = Self::new(0);
1778
1779 #[doc = "An illegal command or illegal access to the extra area is detected"]
1780 pub const _1: Self = Self::new(1);
1781 }
1782}
1783#[doc(hidden)]
1784#[derive(Copy, Clone, Eq, PartialEq)]
1785pub struct Tscdr_SPEC;
1786impl crate::sealed::RegSpec for Tscdr_SPEC {
1787 type DataType = u32;
1788}
1789
1790#[doc = "Temperature Sensor Calibration Data Register"]
1791pub type Tscdr = crate::RegValueT<Tscdr_SPEC>;
1792
1793impl Tscdr {
1794 #[doc = "Temperature Sensor Calibration Data"]
1795 #[inline(always)]
1796 pub fn tscdr(
1797 self,
1798 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Tscdr_SPEC, crate::common::R> {
1799 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Tscdr_SPEC,crate::common::R>::from_register(self,0)
1800 }
1801}
1802impl ::core::default::Default for Tscdr {
1803 #[inline(always)]
1804 fn default() -> Tscdr {
1805 <crate::RegValueT<Tscdr_SPEC> as RegisterValue<_>>::new(0)
1806 }
1807}
1808
1809#[doc(hidden)]
1810#[derive(Copy, Clone, Eq, PartialEq)]
1811pub struct Fctlfr_SPEC;
1812impl crate::sealed::RegSpec for Fctlfr_SPEC {
1813 type DataType = u32;
1814}
1815
1816#[doc = "Flash Control Flag Register"]
1817pub type Fctlfr = crate::RegValueT<Fctlfr_SPEC>;
1818
1819impl Fctlfr {
1820 #[doc = "Bank Swap Setting"]
1821 #[inline(always)]
1822 pub fn bankswp(
1823 self,
1824 ) -> crate::common::RegisterField<
1825 0,
1826 0x7,
1827 1,
1828 0,
1829 fctlfr::Bankswp,
1830 fctlfr::Bankswp,
1831 Fctlfr_SPEC,
1832 crate::common::RW,
1833 > {
1834 crate::common::RegisterField::<
1835 0,
1836 0x7,
1837 1,
1838 0,
1839 fctlfr::Bankswp,
1840 fctlfr::Bankswp,
1841 Fctlfr_SPEC,
1842 crate::common::RW,
1843 >::from_register(self, 0)
1844 }
1845}
1846impl ::core::default::Default for Fctlfr {
1847 #[inline(always)]
1848 fn default() -> Fctlfr {
1849 <crate::RegValueT<Fctlfr_SPEC> as RegisterValue<_>>::new(0)
1850 }
1851}
1852pub mod fctlfr {
1853
1854 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1855 pub struct Bankswp_SPEC;
1856 pub type Bankswp = crate::EnumBitfieldStruct<u8, Bankswp_SPEC>;
1857 impl Bankswp {
1858 #[doc = "Bank 1 is the startup bank"]
1859 pub const _0: Self = Self::new(0);
1860
1861 #[doc = "Bank 0 is the startup bank"]
1862 pub const _1: Self = Self::new(1);
1863 }
1864}
1865#[doc(hidden)]
1866#[derive(Copy, Clone, Eq, PartialEq)]
1867pub struct Fentryr_SPEC;
1868impl crate::sealed::RegSpec for Fentryr_SPEC {
1869 type DataType = u16;
1870}
1871
1872#[doc = "Flash P/E Mode Entry Register"]
1873pub type Fentryr = crate::RegValueT<Fentryr_SPEC>;
1874
1875impl Fentryr {
1876 #[doc = "Code Flash P/E Mode Entry 0"]
1877 #[inline(always)]
1878 pub fn fentry0(
1879 self,
1880 ) -> crate::common::RegisterField<
1881 0,
1882 0x1,
1883 1,
1884 0,
1885 fentryr::Fentry0,
1886 fentryr::Fentry0,
1887 Fentryr_SPEC,
1888 crate::common::RW,
1889 > {
1890 crate::common::RegisterField::<
1891 0,
1892 0x1,
1893 1,
1894 0,
1895 fentryr::Fentry0,
1896 fentryr::Fentry0,
1897 Fentryr_SPEC,
1898 crate::common::RW,
1899 >::from_register(self, 0)
1900 }
1901
1902 #[doc = "Data Flash P/E Mode Entry"]
1903 #[inline(always)]
1904 pub fn fentryd(
1905 self,
1906 ) -> crate::common::RegisterField<
1907 7,
1908 0x1,
1909 1,
1910 0,
1911 fentryr::Fentryd,
1912 fentryr::Fentryd,
1913 Fentryr_SPEC,
1914 crate::common::RW,
1915 > {
1916 crate::common::RegisterField::<
1917 7,
1918 0x1,
1919 1,
1920 0,
1921 fentryr::Fentryd,
1922 fentryr::Fentryd,
1923 Fentryr_SPEC,
1924 crate::common::RW,
1925 >::from_register(self, 0)
1926 }
1927
1928 #[doc = "Key Code"]
1929 #[inline(always)]
1930 pub fn fekey(
1931 self,
1932 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fentryr_SPEC, crate::common::W> {
1933 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fentryr_SPEC,crate::common::W>::from_register(self,0)
1934 }
1935}
1936impl ::core::default::Default for Fentryr {
1937 #[inline(always)]
1938 fn default() -> Fentryr {
1939 <crate::RegValueT<Fentryr_SPEC> as RegisterValue<_>>::new(0)
1940 }
1941}
1942pub mod fentryr {
1943
1944 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1945 pub struct Fentry0_SPEC;
1946 pub type Fentry0 = crate::EnumBitfieldStruct<u8, Fentry0_SPEC>;
1947 impl Fentry0 {
1948 #[doc = "The code flash is the read mode"]
1949 pub const _0: Self = Self::new(0);
1950
1951 #[doc = "The code flash is the P/E mode"]
1952 pub const _1: Self = Self::new(1);
1953 }
1954 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1955 pub struct Fentryd_SPEC;
1956 pub type Fentryd = crate::EnumBitfieldStruct<u8, Fentryd_SPEC>;
1957 impl Fentryd {
1958 #[doc = "The data flash is the read mode"]
1959 pub const _0: Self = Self::new(0);
1960
1961 #[doc = "The data flash is the P/E mode"]
1962 pub const _1: Self = Self::new(1);
1963 }
1964}
1965#[doc(hidden)]
1966#[derive(Copy, Clone, Eq, PartialEq)]
1967pub struct Fldwaitr_SPEC;
1968impl crate::sealed::RegSpec for Fldwaitr_SPEC {
1969 type DataType = u8;
1970}
1971
1972#[doc = "Memory Wait Cycle Control Register for Data Flash"]
1973pub type Fldwaitr = crate::RegValueT<Fldwaitr_SPEC>;
1974
1975impl Fldwaitr {
1976 #[doc = "Memory Wait Cycle Select for Data Flash"]
1977 #[inline(always)]
1978 pub fn fldwait1(
1979 self,
1980 ) -> crate::common::RegisterField<
1981 0,
1982 0x1,
1983 1,
1984 0,
1985 fldwaitr::Fldwait1,
1986 fldwaitr::Fldwait1,
1987 Fldwaitr_SPEC,
1988 crate::common::RW,
1989 > {
1990 crate::common::RegisterField::<
1991 0,
1992 0x1,
1993 1,
1994 0,
1995 fldwaitr::Fldwait1,
1996 fldwaitr::Fldwait1,
1997 Fldwaitr_SPEC,
1998 crate::common::RW,
1999 >::from_register(self, 0)
2000 }
2001}
2002impl ::core::default::Default for Fldwaitr {
2003 #[inline(always)]
2004 fn default() -> Fldwaitr {
2005 <crate::RegValueT<Fldwaitr_SPEC> as RegisterValue<_>>::new(0)
2006 }
2007}
2008pub mod fldwaitr {
2009
2010 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2011 pub struct Fldwait1_SPEC;
2012 pub type Fldwait1 = crate::EnumBitfieldStruct<u8, Fldwait1_SPEC>;
2013 impl Fldwait1 {
2014 #[doc = "1 wait access (Default)"]
2015 pub const _0: Self = Self::new(0);
2016
2017 #[doc = "2 wait access"]
2018 pub const _1: Self = Self::new(1);
2019 }
2020}
2021#[doc(hidden)]
2022#[derive(Copy, Clone, Eq, PartialEq)]
2023pub struct Pfber_SPEC;
2024impl crate::sealed::RegSpec for Pfber_SPEC {
2025 type DataType = u8;
2026}
2027
2028#[doc = "Prefetch Buffer Enable Register"]
2029pub type Pfber = crate::RegValueT<Pfber_SPEC>;
2030
2031impl Pfber {
2032 #[doc = "Prefetch Buffer Enable bit"]
2033 #[inline(always)]
2034 pub fn pfbe(
2035 self,
2036 ) -> crate::common::RegisterField<
2037 0,
2038 0x1,
2039 1,
2040 0,
2041 pfber::Pfbe,
2042 pfber::Pfbe,
2043 Pfber_SPEC,
2044 crate::common::RW,
2045 > {
2046 crate::common::RegisterField::<
2047 0,
2048 0x1,
2049 1,
2050 0,
2051 pfber::Pfbe,
2052 pfber::Pfbe,
2053 Pfber_SPEC,
2054 crate::common::RW,
2055 >::from_register(self, 0)
2056 }
2057}
2058impl ::core::default::Default for Pfber {
2059 #[inline(always)]
2060 fn default() -> Pfber {
2061 <crate::RegValueT<Pfber_SPEC> as RegisterValue<_>>::new(0)
2062 }
2063}
2064pub mod pfber {
2065
2066 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2067 pub struct Pfbe_SPEC;
2068 pub type Pfbe = crate::EnumBitfieldStruct<u8, Pfbe_SPEC>;
2069 impl Pfbe {
2070 #[doc = "Prefetch buffer is disabled"]
2071 pub const _0: Self = Self::new(0);
2072
2073 #[doc = "Prefetch buffer is enabled"]
2074 pub const _1: Self = Self::new(1);
2075 }
2076}
2077#[doc(hidden)]
2078#[derive(Copy, Clone, Eq, PartialEq)]
2079pub struct Fbkpgcr_SPEC;
2080impl crate::sealed::RegSpec for Fbkpgcr_SPEC {
2081 type DataType = u16;
2082}
2083
2084#[doc = "Flash Bank Program Control Register"]
2085pub type Fbkpgcr = crate::RegValueT<Fbkpgcr_SPEC>;
2086
2087impl Fbkpgcr {
2088 #[doc = "Bank Programming Setting Enable"]
2089 #[inline(always)]
2090 pub fn bkpgen(
2091 self,
2092 ) -> crate::common::RegisterField<
2093 0,
2094 0x1,
2095 1,
2096 0,
2097 fbkpgcr::Bkpgen,
2098 fbkpgcr::Bkpgen,
2099 Fbkpgcr_SPEC,
2100 crate::common::RW,
2101 > {
2102 crate::common::RegisterField::<
2103 0,
2104 0x1,
2105 1,
2106 0,
2107 fbkpgcr::Bkpgen,
2108 fbkpgcr::Bkpgen,
2109 Fbkpgcr_SPEC,
2110 crate::common::RW,
2111 >::from_register(self, 0)
2112 }
2113
2114 #[doc = "Key Code"]
2115 #[inline(always)]
2116 pub fn fekey(
2117 self,
2118 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fbkpgcr_SPEC, crate::common::W> {
2119 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fbkpgcr_SPEC,crate::common::W>::from_register(self,0)
2120 }
2121}
2122impl ::core::default::Default for Fbkpgcr {
2123 #[inline(always)]
2124 fn default() -> Fbkpgcr {
2125 <crate::RegValueT<Fbkpgcr_SPEC> as RegisterValue<_>>::new(0)
2126 }
2127}
2128pub mod fbkpgcr {
2129
2130 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2131 pub struct Bkpgen_SPEC;
2132 pub type Bkpgen = crate::EnumBitfieldStruct<u8, Bkpgen_SPEC>;
2133 impl Bkpgen {
2134 #[doc = "Bank programming is disabled (User mode)"]
2135 pub const _0: Self = Self::new(0);
2136
2137 #[doc = "Bank programming is enabled (Bank programming mode)"]
2138 pub const _1: Self = Self::new(1);
2139 }
2140}
2141#[doc(hidden)]
2142#[derive(Copy, Clone, Eq, PartialEq)]
2143pub struct Fbkswcr_SPEC;
2144impl crate::sealed::RegSpec for Fbkswcr_SPEC {
2145 type DataType = u16;
2146}
2147
2148#[doc = "Flash Bank Swap Control Register"]
2149pub type Fbkswcr = crate::RegValueT<Fbkswcr_SPEC>;
2150
2151impl Fbkswcr {
2152 #[doc = "Bank Swap Update Enable"]
2153 #[inline(always)]
2154 pub fn bkswupen(
2155 self,
2156 ) -> crate::common::RegisterField<
2157 0,
2158 0x1,
2159 1,
2160 0,
2161 fbkswcr::Bkswupen,
2162 fbkswcr::Bkswupen,
2163 Fbkswcr_SPEC,
2164 crate::common::RW,
2165 > {
2166 crate::common::RegisterField::<
2167 0,
2168 0x1,
2169 1,
2170 0,
2171 fbkswcr::Bkswupen,
2172 fbkswcr::Bkswupen,
2173 Fbkswcr_SPEC,
2174 crate::common::RW,
2175 >::from_register(self, 0)
2176 }
2177
2178 #[doc = "Key Code"]
2179 #[inline(always)]
2180 pub fn fekey(
2181 self,
2182 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fbkswcr_SPEC, crate::common::W> {
2183 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fbkswcr_SPEC,crate::common::W>::from_register(self,0)
2184 }
2185}
2186impl ::core::default::Default for Fbkswcr {
2187 #[inline(always)]
2188 fn default() -> Fbkswcr {
2189 <crate::RegValueT<Fbkswcr_SPEC> as RegisterValue<_>>::new(0)
2190 }
2191}
2192pub mod fbkswcr {
2193
2194 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2195 pub struct Bkswupen_SPEC;
2196 pub type Bkswupen = crate::EnumBitfieldStruct<u8, Bkswupen_SPEC>;
2197 impl Bkswupen {
2198 #[doc = "Writing FCTLFR.BANKSWP\\[2:0\\] is disabled"]
2199 pub const _0: Self = Self::new(0);
2200
2201 #[doc = "Writing FCTLFR.BANKSWP\\[2:0\\] is enabled"]
2202 pub const _1: Self = Self::new(1);
2203 }
2204}