ra2a2_pac/
agtw0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.02, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:01:00 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Low Power Asynchronous General Purpose Timer 0"]
28unsafe impl ::core::marker::Send for super::Agtw0 {}
29unsafe impl ::core::marker::Sync for super::Agtw0 {}
30impl super::Agtw0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "AGT Counter Register"]
38    #[inline(always)]
39    pub const fn agt(&self) -> &'static crate::common::Reg<self::Agt_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Agt_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "AGT Compare Match A Register"]
48    #[inline(always)]
49    pub const fn agtcma(
50        &self,
51    ) -> &'static crate::common::Reg<self::Agtcma_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Agtcma_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(4usize),
55            )
56        }
57    }
58
59    #[doc = "AGT Compare Match B Register"]
60    #[inline(always)]
61    pub const fn agtcmb(
62        &self,
63    ) -> &'static crate::common::Reg<self::Agtcmb_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Agtcmb_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(8usize),
67            )
68        }
69    }
70
71    #[doc = "AGT Control Register"]
72    #[inline(always)]
73    pub const fn agtcr(&self) -> &'static crate::common::Reg<self::Agtcr_SPEC, crate::common::RW> {
74        unsafe {
75            crate::common::Reg::<self::Agtcr_SPEC, crate::common::RW>::from_ptr(
76                self._svd2pac_as_ptr().add(12usize),
77            )
78        }
79    }
80
81    #[doc = "AGT Mode Register 1"]
82    #[inline(always)]
83    pub const fn agtmr1(
84        &self,
85    ) -> &'static crate::common::Reg<self::Agtmr1_SPEC, crate::common::RW> {
86        unsafe {
87            crate::common::Reg::<self::Agtmr1_SPEC, crate::common::RW>::from_ptr(
88                self._svd2pac_as_ptr().add(13usize),
89            )
90        }
91    }
92
93    #[doc = "AGT Mode Register 2"]
94    #[inline(always)]
95    pub const fn agtmr2(
96        &self,
97    ) -> &'static crate::common::Reg<self::Agtmr2_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Agtmr2_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(14usize),
101            )
102        }
103    }
104
105    #[doc = "AGT Pin Select Register"]
106    #[inline(always)]
107    pub const fn agtiosel(
108        &self,
109    ) -> &'static crate::common::Reg<self::Agtiosel_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Agtiosel_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(15usize),
113            )
114        }
115    }
116
117    #[doc = "AGT I/O Control Register"]
118    #[inline(always)]
119    pub const fn agtioc(
120        &self,
121    ) -> &'static crate::common::Reg<self::Agtioc_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Agtioc_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(16usize),
125            )
126        }
127    }
128
129    #[doc = "AGT Event Pin Select Register"]
130    #[inline(always)]
131    pub const fn agtisr(
132        &self,
133    ) -> &'static crate::common::Reg<self::Agtisr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Agtisr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(17usize),
137            )
138        }
139    }
140
141    #[doc = "AGT Compare Match Function Select Register"]
142    #[inline(always)]
143    pub const fn agtcmsr(
144        &self,
145    ) -> &'static crate::common::Reg<self::Agtcmsr_SPEC, crate::common::RW> {
146        unsafe {
147            crate::common::Reg::<self::Agtcmsr_SPEC, crate::common::RW>::from_ptr(
148                self._svd2pac_as_ptr().add(18usize),
149            )
150        }
151    }
152}
153#[doc(hidden)]
154#[derive(Copy, Clone, Eq, PartialEq)]
155pub struct Agt_SPEC;
156impl crate::sealed::RegSpec for Agt_SPEC {
157    type DataType = u32;
158}
159
160#[doc = "AGT Counter Register"]
161pub type Agt = crate::RegValueT<Agt_SPEC>;
162
163impl NoBitfieldReg<Agt_SPEC> for Agt {}
164impl ::core::default::Default for Agt {
165    #[inline(always)]
166    fn default() -> Agt {
167        <crate::RegValueT<Agt_SPEC> as RegisterValue<_>>::new(4294967295)
168    }
169}
170
171#[doc(hidden)]
172#[derive(Copy, Clone, Eq, PartialEq)]
173pub struct Agtcma_SPEC;
174impl crate::sealed::RegSpec for Agtcma_SPEC {
175    type DataType = u32;
176}
177
178#[doc = "AGT Compare Match A Register"]
179pub type Agtcma = crate::RegValueT<Agtcma_SPEC>;
180
181impl NoBitfieldReg<Agtcma_SPEC> for Agtcma {}
182impl ::core::default::Default for Agtcma {
183    #[inline(always)]
184    fn default() -> Agtcma {
185        <crate::RegValueT<Agtcma_SPEC> as RegisterValue<_>>::new(4294967295)
186    }
187}
188
189#[doc(hidden)]
190#[derive(Copy, Clone, Eq, PartialEq)]
191pub struct Agtcmb_SPEC;
192impl crate::sealed::RegSpec for Agtcmb_SPEC {
193    type DataType = u32;
194}
195
196#[doc = "AGT Compare Match B Register"]
197pub type Agtcmb = crate::RegValueT<Agtcmb_SPEC>;
198
199impl NoBitfieldReg<Agtcmb_SPEC> for Agtcmb {}
200impl ::core::default::Default for Agtcmb {
201    #[inline(always)]
202    fn default() -> Agtcmb {
203        <crate::RegValueT<Agtcmb_SPEC> as RegisterValue<_>>::new(4294967295)
204    }
205}
206
207#[doc(hidden)]
208#[derive(Copy, Clone, Eq, PartialEq)]
209pub struct Agtcr_SPEC;
210impl crate::sealed::RegSpec for Agtcr_SPEC {
211    type DataType = u8;
212}
213
214#[doc = "AGT Control Register"]
215pub type Agtcr = crate::RegValueT<Agtcr_SPEC>;
216
217impl Agtcr {
218    #[doc = "AGT Count Start"]
219    #[inline(always)]
220    pub fn tstart(
221        self,
222    ) -> crate::common::RegisterField<
223        0,
224        0x1,
225        1,
226        0,
227        agtcr::Tstart,
228        agtcr::Tstart,
229        Agtcr_SPEC,
230        crate::common::RW,
231    > {
232        crate::common::RegisterField::<
233            0,
234            0x1,
235            1,
236            0,
237            agtcr::Tstart,
238            agtcr::Tstart,
239            Agtcr_SPEC,
240            crate::common::RW,
241        >::from_register(self, 0)
242    }
243
244    #[doc = "AGT Count Status Flag"]
245    #[inline(always)]
246    pub fn tcstf(
247        self,
248    ) -> crate::common::RegisterField<
249        1,
250        0x1,
251        1,
252        0,
253        agtcr::Tcstf,
254        agtcr::Tcstf,
255        Agtcr_SPEC,
256        crate::common::R,
257    > {
258        crate::common::RegisterField::<
259            1,
260            0x1,
261            1,
262            0,
263            agtcr::Tcstf,
264            agtcr::Tcstf,
265            Agtcr_SPEC,
266            crate::common::R,
267        >::from_register(self, 0)
268    }
269
270    #[doc = "AGT Count Forced Stop"]
271    #[inline(always)]
272    pub fn tstop(
273        self,
274    ) -> crate::common::RegisterField<
275        2,
276        0x1,
277        1,
278        0,
279        agtcr::Tstop,
280        agtcr::Tstop,
281        Agtcr_SPEC,
282        crate::common::W,
283    > {
284        crate::common::RegisterField::<
285            2,
286            0x1,
287            1,
288            0,
289            agtcr::Tstop,
290            agtcr::Tstop,
291            Agtcr_SPEC,
292            crate::common::W,
293        >::from_register(self, 0)
294    }
295
296    #[doc = "Active Edge Judgment Flag"]
297    #[inline(always)]
298    pub fn tedgf(
299        self,
300    ) -> crate::common::RegisterField<
301        4,
302        0x1,
303        1,
304        0,
305        agtcr::Tedgf,
306        agtcr::Tedgf,
307        Agtcr_SPEC,
308        crate::common::RW,
309    > {
310        crate::common::RegisterField::<
311            4,
312            0x1,
313            1,
314            0,
315            agtcr::Tedgf,
316            agtcr::Tedgf,
317            Agtcr_SPEC,
318            crate::common::RW,
319        >::from_register(self, 0)
320    }
321
322    #[doc = "Underflow Flag"]
323    #[inline(always)]
324    pub fn tundf(
325        self,
326    ) -> crate::common::RegisterField<
327        5,
328        0x1,
329        1,
330        0,
331        agtcr::Tundf,
332        agtcr::Tundf,
333        Agtcr_SPEC,
334        crate::common::RW,
335    > {
336        crate::common::RegisterField::<
337            5,
338            0x1,
339            1,
340            0,
341            agtcr::Tundf,
342            agtcr::Tundf,
343            Agtcr_SPEC,
344            crate::common::RW,
345        >::from_register(self, 0)
346    }
347
348    #[doc = "Compare Match A Flag"]
349    #[inline(always)]
350    pub fn tcmaf(
351        self,
352    ) -> crate::common::RegisterField<
353        6,
354        0x1,
355        1,
356        0,
357        agtcr::Tcmaf,
358        agtcr::Tcmaf,
359        Agtcr_SPEC,
360        crate::common::RW,
361    > {
362        crate::common::RegisterField::<
363            6,
364            0x1,
365            1,
366            0,
367            agtcr::Tcmaf,
368            agtcr::Tcmaf,
369            Agtcr_SPEC,
370            crate::common::RW,
371        >::from_register(self, 0)
372    }
373
374    #[doc = "Compare Match B Flag"]
375    #[inline(always)]
376    pub fn tcmbf(
377        self,
378    ) -> crate::common::RegisterField<
379        7,
380        0x1,
381        1,
382        0,
383        agtcr::Tcmbf,
384        agtcr::Tcmbf,
385        Agtcr_SPEC,
386        crate::common::RW,
387    > {
388        crate::common::RegisterField::<
389            7,
390            0x1,
391            1,
392            0,
393            agtcr::Tcmbf,
394            agtcr::Tcmbf,
395            Agtcr_SPEC,
396            crate::common::RW,
397        >::from_register(self, 0)
398    }
399}
400impl ::core::default::Default for Agtcr {
401    #[inline(always)]
402    fn default() -> Agtcr {
403        <crate::RegValueT<Agtcr_SPEC> as RegisterValue<_>>::new(0)
404    }
405}
406pub mod agtcr {
407
408    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
409    pub struct Tstart_SPEC;
410    pub type Tstart = crate::EnumBitfieldStruct<u8, Tstart_SPEC>;
411    impl Tstart {
412        #[doc = "Count stops"]
413        pub const _0: Self = Self::new(0);
414
415        #[doc = "Count starts"]
416        pub const _1: Self = Self::new(1);
417    }
418    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
419    pub struct Tcstf_SPEC;
420    pub type Tcstf = crate::EnumBitfieldStruct<u8, Tcstf_SPEC>;
421    impl Tcstf {
422        #[doc = "Count stopped"]
423        pub const _0: Self = Self::new(0);
424
425        #[doc = "Count in progress"]
426        pub const _1: Self = Self::new(1);
427    }
428    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
429    pub struct Tstop_SPEC;
430    pub type Tstop = crate::EnumBitfieldStruct<u8, Tstop_SPEC>;
431    impl Tstop {
432        #[doc = "Writing is invalid"]
433        pub const _0: Self = Self::new(0);
434
435        #[doc = "Count is forcibly stopped"]
436        pub const _1: Self = Self::new(1);
437    }
438    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
439    pub struct Tedgf_SPEC;
440    pub type Tedgf = crate::EnumBitfieldStruct<u8, Tedgf_SPEC>;
441    impl Tedgf {
442        #[doc = "No active edge received"]
443        pub const _0: Self = Self::new(0);
444
445        #[doc = "Active edge received"]
446        pub const _1: Self = Self::new(1);
447    }
448    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
449    pub struct Tundf_SPEC;
450    pub type Tundf = crate::EnumBitfieldStruct<u8, Tundf_SPEC>;
451    impl Tundf {
452        #[doc = "No underflow"]
453        pub const _0: Self = Self::new(0);
454
455        #[doc = "Underflow"]
456        pub const _1: Self = Self::new(1);
457    }
458    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
459    pub struct Tcmaf_SPEC;
460    pub type Tcmaf = crate::EnumBitfieldStruct<u8, Tcmaf_SPEC>;
461    impl Tcmaf {
462        #[doc = "No match"]
463        pub const _0: Self = Self::new(0);
464
465        #[doc = "Match"]
466        pub const _1: Self = Self::new(1);
467    }
468    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
469    pub struct Tcmbf_SPEC;
470    pub type Tcmbf = crate::EnumBitfieldStruct<u8, Tcmbf_SPEC>;
471    impl Tcmbf {
472        #[doc = "No match"]
473        pub const _0: Self = Self::new(0);
474
475        #[doc = "Match"]
476        pub const _1: Self = Self::new(1);
477    }
478}
479#[doc(hidden)]
480#[derive(Copy, Clone, Eq, PartialEq)]
481pub struct Agtmr1_SPEC;
482impl crate::sealed::RegSpec for Agtmr1_SPEC {
483    type DataType = u8;
484}
485
486#[doc = "AGT Mode Register 1"]
487pub type Agtmr1 = crate::RegValueT<Agtmr1_SPEC>;
488
489impl Agtmr1 {
490    #[doc = "Operating Mode"]
491    #[inline(always)]
492    pub fn tmod(
493        self,
494    ) -> crate::common::RegisterField<
495        0,
496        0x7,
497        1,
498        0,
499        agtmr1::Tmod,
500        agtmr1::Tmod,
501        Agtmr1_SPEC,
502        crate::common::RW,
503    > {
504        crate::common::RegisterField::<
505            0,
506            0x7,
507            1,
508            0,
509            agtmr1::Tmod,
510            agtmr1::Tmod,
511            Agtmr1_SPEC,
512            crate::common::RW,
513        >::from_register(self, 0)
514    }
515
516    #[doc = "Edge Polarity"]
517    #[inline(always)]
518    pub fn tedgpl(
519        self,
520    ) -> crate::common::RegisterField<
521        3,
522        0x1,
523        1,
524        0,
525        agtmr1::Tedgpl,
526        agtmr1::Tedgpl,
527        Agtmr1_SPEC,
528        crate::common::RW,
529    > {
530        crate::common::RegisterField::<
531            3,
532            0x1,
533            1,
534            0,
535            agtmr1::Tedgpl,
536            agtmr1::Tedgpl,
537            Agtmr1_SPEC,
538            crate::common::RW,
539        >::from_register(self, 0)
540    }
541
542    #[doc = "Count Source"]
543    #[inline(always)]
544    pub fn tck(
545        self,
546    ) -> crate::common::RegisterField<
547        4,
548        0x7,
549        1,
550        0,
551        agtmr1::Tck,
552        agtmr1::Tck,
553        Agtmr1_SPEC,
554        crate::common::RW,
555    > {
556        crate::common::RegisterField::<
557            4,
558            0x7,
559            1,
560            0,
561            agtmr1::Tck,
562            agtmr1::Tck,
563            Agtmr1_SPEC,
564            crate::common::RW,
565        >::from_register(self, 0)
566    }
567}
568impl ::core::default::Default for Agtmr1 {
569    #[inline(always)]
570    fn default() -> Agtmr1 {
571        <crate::RegValueT<Agtmr1_SPEC> as RegisterValue<_>>::new(64)
572    }
573}
574pub mod agtmr1 {
575
576    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
577    pub struct Tmod_SPEC;
578    pub type Tmod = crate::EnumBitfieldStruct<u8, Tmod_SPEC>;
579    impl Tmod {
580        #[doc = "Timer mode"]
581        pub const _000: Self = Self::new(0);
582
583        #[doc = "Pulse output mode"]
584        pub const _001: Self = Self::new(1);
585
586        #[doc = "Event counter mode"]
587        pub const _010: Self = Self::new(2);
588
589        #[doc = "Pulse width measurement mode"]
590        pub const _011: Self = Self::new(3);
591
592        #[doc = "Pulse period measurement mode"]
593        pub const _101: Self = Self::new(5);
594    }
595    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
596    pub struct Tedgpl_SPEC;
597    pub type Tedgpl = crate::EnumBitfieldStruct<u8, Tedgpl_SPEC>;
598    impl Tedgpl {
599        #[doc = "Single-edge"]
600        pub const _0: Self = Self::new(0);
601
602        #[doc = "Both-edge"]
603        pub const _1: Self = Self::new(1);
604    }
605    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
606    pub struct Tck_SPEC;
607    pub type Tck = crate::EnumBitfieldStruct<u8, Tck_SPEC>;
608    impl Tck {
609        #[doc = "PCLKB"]
610        pub const _000: Self = Self::new(0);
611
612        #[doc = "PCLKB/8"]
613        pub const _001: Self = Self::new(1);
614
615        #[doc = "PCLKB/2"]
616        pub const _011: Self = Self::new(3);
617
618        #[doc = "Divided clock AGTLCLK specified by CKS\\[2:0\\] bits in the AGTMR2 register"]
619        pub const _100: Self = Self::new(4);
620
621        #[doc = "Underflow event signal from AGTW0"]
622        pub const _101: Self = Self::new(5);
623
624        #[doc = "Divided clock AGTSCLK specified by CKS\\[2:0\\] bits in the AGTMR2 register"]
625        pub const _110: Self = Self::new(6);
626    }
627}
628#[doc(hidden)]
629#[derive(Copy, Clone, Eq, PartialEq)]
630pub struct Agtmr2_SPEC;
631impl crate::sealed::RegSpec for Agtmr2_SPEC {
632    type DataType = u8;
633}
634
635#[doc = "AGT Mode Register 2"]
636pub type Agtmr2 = crate::RegValueT<Agtmr2_SPEC>;
637
638impl Agtmr2 {
639    #[doc = "AGTLCLK or AGTSCLK Count Source Clock Frequency Division Ratio"]
640    #[inline(always)]
641    pub fn cks(
642        self,
643    ) -> crate::common::RegisterField<
644        0,
645        0x7,
646        1,
647        0,
648        agtmr2::Cks,
649        agtmr2::Cks,
650        Agtmr2_SPEC,
651        crate::common::RW,
652    > {
653        crate::common::RegisterField::<
654            0,
655            0x7,
656            1,
657            0,
658            agtmr2::Cks,
659            agtmr2::Cks,
660            Agtmr2_SPEC,
661            crate::common::RW,
662        >::from_register(self, 0)
663    }
664
665    #[doc = "Low Power Mode"]
666    #[inline(always)]
667    pub fn lpm(
668        self,
669    ) -> crate::common::RegisterField<
670        7,
671        0x1,
672        1,
673        0,
674        agtmr2::Lpm,
675        agtmr2::Lpm,
676        Agtmr2_SPEC,
677        crate::common::RW,
678    > {
679        crate::common::RegisterField::<
680            7,
681            0x1,
682            1,
683            0,
684            agtmr2::Lpm,
685            agtmr2::Lpm,
686            Agtmr2_SPEC,
687            crate::common::RW,
688        >::from_register(self, 0)
689    }
690}
691impl ::core::default::Default for Agtmr2 {
692    #[inline(always)]
693    fn default() -> Agtmr2 {
694        <crate::RegValueT<Agtmr2_SPEC> as RegisterValue<_>>::new(0)
695    }
696}
697pub mod agtmr2 {
698
699    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
700    pub struct Cks_SPEC;
701    pub type Cks = crate::EnumBitfieldStruct<u8, Cks_SPEC>;
702    impl Cks {
703        #[doc = "1/1"]
704        pub const _000: Self = Self::new(0);
705
706        #[doc = "1/2"]
707        pub const _001: Self = Self::new(1);
708
709        #[doc = "1/4"]
710        pub const _010: Self = Self::new(2);
711
712        #[doc = "1/8"]
713        pub const _011: Self = Self::new(3);
714
715        #[doc = "1/16"]
716        pub const _100: Self = Self::new(4);
717
718        #[doc = "1/32"]
719        pub const _101: Self = Self::new(5);
720
721        #[doc = "1/64"]
722        pub const _110: Self = Self::new(6);
723
724        #[doc = "1/128"]
725        pub const _111: Self = Self::new(7);
726    }
727    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
728    pub struct Lpm_SPEC;
729    pub type Lpm = crate::EnumBitfieldStruct<u8, Lpm_SPEC>;
730    impl Lpm {
731        #[doc = "Normal mode"]
732        pub const _0: Self = Self::new(0);
733
734        #[doc = "Low power mode"]
735        pub const _1: Self = Self::new(1);
736    }
737}
738#[doc(hidden)]
739#[derive(Copy, Clone, Eq, PartialEq)]
740pub struct Agtiosel_SPEC;
741impl crate::sealed::RegSpec for Agtiosel_SPEC {
742    type DataType = u8;
743}
744
745#[doc = "AGT Pin Select Register"]
746pub type Agtiosel = crate::RegValueT<Agtiosel_SPEC>;
747
748impl Agtiosel {
749    #[doc = "AGTWIOn Pin Input Enable"]
750    #[inline(always)]
751    pub fn ties(
752        self,
753    ) -> crate::common::RegisterField<
754        4,
755        0x1,
756        1,
757        0,
758        agtiosel::Ties,
759        agtiosel::Ties,
760        Agtiosel_SPEC,
761        crate::common::RW,
762    > {
763        crate::common::RegisterField::<
764            4,
765            0x1,
766            1,
767            0,
768            agtiosel::Ties,
769            agtiosel::Ties,
770            Agtiosel_SPEC,
771            crate::common::RW,
772        >::from_register(self, 0)
773    }
774}
775impl ::core::default::Default for Agtiosel {
776    #[inline(always)]
777    fn default() -> Agtiosel {
778        <crate::RegValueT<Agtiosel_SPEC> as RegisterValue<_>>::new(0)
779    }
780}
781pub mod agtiosel {
782
783    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
784    pub struct Ties_SPEC;
785    pub type Ties = crate::EnumBitfieldStruct<u8, Ties_SPEC>;
786    impl Ties {
787        #[doc = "External event input is disabled during Software Standby mode"]
788        pub const _0: Self = Self::new(0);
789
790        #[doc = "External event input is enabled during Software Standby mode"]
791        pub const _1: Self = Self::new(1);
792    }
793}
794#[doc(hidden)]
795#[derive(Copy, Clone, Eq, PartialEq)]
796pub struct Agtioc_SPEC;
797impl crate::sealed::RegSpec for Agtioc_SPEC {
798    type DataType = u8;
799}
800
801#[doc = "AGT I/O Control Register"]
802pub type Agtioc = crate::RegValueT<Agtioc_SPEC>;
803
804impl Agtioc {
805    #[doc = "I/O Polarity Switch"]
806    #[inline(always)]
807    pub fn tedgsel(
808        self,
809    ) -> crate::common::RegisterFieldBool<0, 1, 0, Agtioc_SPEC, crate::common::RW> {
810        crate::common::RegisterFieldBool::<0, 1, 0, Agtioc_SPEC, crate::common::RW>::from_register(
811            self, 0,
812        )
813    }
814
815    #[doc = "AGTWOn pin Output Enable"]
816    #[inline(always)]
817    pub fn toe(
818        self,
819    ) -> crate::common::RegisterField<
820        2,
821        0x1,
822        1,
823        0,
824        agtioc::Toe,
825        agtioc::Toe,
826        Agtioc_SPEC,
827        crate::common::RW,
828    > {
829        crate::common::RegisterField::<
830            2,
831            0x1,
832            1,
833            0,
834            agtioc::Toe,
835            agtioc::Toe,
836            Agtioc_SPEC,
837            crate::common::RW,
838        >::from_register(self, 0)
839    }
840
841    #[doc = "Input Filter"]
842    #[inline(always)]
843    pub fn tipf(
844        self,
845    ) -> crate::common::RegisterField<
846        4,
847        0x3,
848        1,
849        0,
850        agtioc::Tipf,
851        agtioc::Tipf,
852        Agtioc_SPEC,
853        crate::common::RW,
854    > {
855        crate::common::RegisterField::<
856            4,
857            0x3,
858            1,
859            0,
860            agtioc::Tipf,
861            agtioc::Tipf,
862            Agtioc_SPEC,
863            crate::common::RW,
864        >::from_register(self, 0)
865    }
866
867    #[doc = "Count Control"]
868    #[inline(always)]
869    pub fn tiogt(
870        self,
871    ) -> crate::common::RegisterField<
872        6,
873        0x3,
874        1,
875        0,
876        agtioc::Tiogt,
877        agtioc::Tiogt,
878        Agtioc_SPEC,
879        crate::common::RW,
880    > {
881        crate::common::RegisterField::<
882            6,
883            0x3,
884            1,
885            0,
886            agtioc::Tiogt,
887            agtioc::Tiogt,
888            Agtioc_SPEC,
889            crate::common::RW,
890        >::from_register(self, 0)
891    }
892}
893impl ::core::default::Default for Agtioc {
894    #[inline(always)]
895    fn default() -> Agtioc {
896        <crate::RegValueT<Agtioc_SPEC> as RegisterValue<_>>::new(0)
897    }
898}
899pub mod agtioc {
900
901    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
902    pub struct Toe_SPEC;
903    pub type Toe = crate::EnumBitfieldStruct<u8, Toe_SPEC>;
904    impl Toe {
905        #[doc = "AGTWOn pin output disabled"]
906        pub const _0: Self = Self::new(0);
907
908        #[doc = "AGTWOn pin output enabled"]
909        pub const _1: Self = Self::new(1);
910    }
911    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
912    pub struct Tipf_SPEC;
913    pub type Tipf = crate::EnumBitfieldStruct<u8, Tipf_SPEC>;
914    impl Tipf {
915        #[doc = "No filter"]
916        pub const _00: Self = Self::new(0);
917
918        #[doc = "Filter sampled at PCLKB"]
919        pub const _01: Self = Self::new(1);
920
921        #[doc = "Filter sampled at PCLKB/8"]
922        pub const _10: Self = Self::new(2);
923
924        #[doc = "Filter sampled at PCLKB/32"]
925        pub const _11: Self = Self::new(3);
926    }
927    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
928    pub struct Tiogt_SPEC;
929    pub type Tiogt = crate::EnumBitfieldStruct<u8, Tiogt_SPEC>;
930    impl Tiogt {
931        #[doc = "Event is always counted"]
932        pub const _00: Self = Self::new(0);
933
934        #[doc = "Event is counted during polarity period specified for AGTWEEn pin"]
935        pub const _01: Self = Self::new(1);
936    }
937}
938#[doc(hidden)]
939#[derive(Copy, Clone, Eq, PartialEq)]
940pub struct Agtisr_SPEC;
941impl crate::sealed::RegSpec for Agtisr_SPEC {
942    type DataType = u8;
943}
944
945#[doc = "AGT Event Pin Select Register"]
946pub type Agtisr = crate::RegValueT<Agtisr_SPEC>;
947
948impl Agtisr {
949    #[doc = "AGTWEEn Polarity Selection"]
950    #[inline(always)]
951    pub fn eeps(
952        self,
953    ) -> crate::common::RegisterField<
954        2,
955        0x1,
956        1,
957        0,
958        agtisr::Eeps,
959        agtisr::Eeps,
960        Agtisr_SPEC,
961        crate::common::RW,
962    > {
963        crate::common::RegisterField::<
964            2,
965            0x1,
966            1,
967            0,
968            agtisr::Eeps,
969            agtisr::Eeps,
970            Agtisr_SPEC,
971            crate::common::RW,
972        >::from_register(self, 0)
973    }
974}
975impl ::core::default::Default for Agtisr {
976    #[inline(always)]
977    fn default() -> Agtisr {
978        <crate::RegValueT<Agtisr_SPEC> as RegisterValue<_>>::new(0)
979    }
980}
981pub mod agtisr {
982
983    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
984    pub struct Eeps_SPEC;
985    pub type Eeps = crate::EnumBitfieldStruct<u8, Eeps_SPEC>;
986    impl Eeps {
987        #[doc = "An event is counted during the low-level period"]
988        pub const _0: Self = Self::new(0);
989
990        #[doc = "An event is counted during the high-level period"]
991        pub const _1: Self = Self::new(1);
992    }
993}
994#[doc(hidden)]
995#[derive(Copy, Clone, Eq, PartialEq)]
996pub struct Agtcmsr_SPEC;
997impl crate::sealed::RegSpec for Agtcmsr_SPEC {
998    type DataType = u8;
999}
1000
1001#[doc = "AGT Compare Match Function Select Register"]
1002pub type Agtcmsr = crate::RegValueT<Agtcmsr_SPEC>;
1003
1004impl Agtcmsr {
1005    #[doc = "AGT Compare Match A Register Enable"]
1006    #[inline(always)]
1007    pub fn tcmea(
1008        self,
1009    ) -> crate::common::RegisterField<
1010        0,
1011        0x1,
1012        1,
1013        0,
1014        agtcmsr::Tcmea,
1015        agtcmsr::Tcmea,
1016        Agtcmsr_SPEC,
1017        crate::common::RW,
1018    > {
1019        crate::common::RegisterField::<
1020            0,
1021            0x1,
1022            1,
1023            0,
1024            agtcmsr::Tcmea,
1025            agtcmsr::Tcmea,
1026            Agtcmsr_SPEC,
1027            crate::common::RW,
1028        >::from_register(self, 0)
1029    }
1030
1031    #[doc = "AGTWOAn Pin Output Enable"]
1032    #[inline(always)]
1033    pub fn toea(
1034        self,
1035    ) -> crate::common::RegisterField<
1036        1,
1037        0x1,
1038        1,
1039        0,
1040        agtcmsr::Toea,
1041        agtcmsr::Toea,
1042        Agtcmsr_SPEC,
1043        crate::common::RW,
1044    > {
1045        crate::common::RegisterField::<
1046            1,
1047            0x1,
1048            1,
1049            0,
1050            agtcmsr::Toea,
1051            agtcmsr::Toea,
1052            Agtcmsr_SPEC,
1053            crate::common::RW,
1054        >::from_register(self, 0)
1055    }
1056
1057    #[doc = "AGTWOAn Pin Polarity Select"]
1058    #[inline(always)]
1059    pub fn topola(
1060        self,
1061    ) -> crate::common::RegisterField<
1062        2,
1063        0x1,
1064        1,
1065        0,
1066        agtcmsr::Topola,
1067        agtcmsr::Topola,
1068        Agtcmsr_SPEC,
1069        crate::common::RW,
1070    > {
1071        crate::common::RegisterField::<
1072            2,
1073            0x1,
1074            1,
1075            0,
1076            agtcmsr::Topola,
1077            agtcmsr::Topola,
1078            Agtcmsr_SPEC,
1079            crate::common::RW,
1080        >::from_register(self, 0)
1081    }
1082
1083    #[doc = "AGT Compare Match B Register Enable"]
1084    #[inline(always)]
1085    pub fn tcmeb(
1086        self,
1087    ) -> crate::common::RegisterField<
1088        4,
1089        0x1,
1090        1,
1091        0,
1092        agtcmsr::Tcmeb,
1093        agtcmsr::Tcmeb,
1094        Agtcmsr_SPEC,
1095        crate::common::RW,
1096    > {
1097        crate::common::RegisterField::<
1098            4,
1099            0x1,
1100            1,
1101            0,
1102            agtcmsr::Tcmeb,
1103            agtcmsr::Tcmeb,
1104            Agtcmsr_SPEC,
1105            crate::common::RW,
1106        >::from_register(self, 0)
1107    }
1108
1109    #[doc = "AGTWOBn Pin Output Enable"]
1110    #[inline(always)]
1111    pub fn toeb(
1112        self,
1113    ) -> crate::common::RegisterField<
1114        5,
1115        0x1,
1116        1,
1117        0,
1118        agtcmsr::Toeb,
1119        agtcmsr::Toeb,
1120        Agtcmsr_SPEC,
1121        crate::common::RW,
1122    > {
1123        crate::common::RegisterField::<
1124            5,
1125            0x1,
1126            1,
1127            0,
1128            agtcmsr::Toeb,
1129            agtcmsr::Toeb,
1130            Agtcmsr_SPEC,
1131            crate::common::RW,
1132        >::from_register(self, 0)
1133    }
1134
1135    #[doc = "AGTWOBn Pin Polarity Select"]
1136    #[inline(always)]
1137    pub fn topolb(
1138        self,
1139    ) -> crate::common::RegisterField<
1140        6,
1141        0x1,
1142        1,
1143        0,
1144        agtcmsr::Topolb,
1145        agtcmsr::Topolb,
1146        Agtcmsr_SPEC,
1147        crate::common::RW,
1148    > {
1149        crate::common::RegisterField::<
1150            6,
1151            0x1,
1152            1,
1153            0,
1154            agtcmsr::Topolb,
1155            agtcmsr::Topolb,
1156            Agtcmsr_SPEC,
1157            crate::common::RW,
1158        >::from_register(self, 0)
1159    }
1160}
1161impl ::core::default::Default for Agtcmsr {
1162    #[inline(always)]
1163    fn default() -> Agtcmsr {
1164        <crate::RegValueT<Agtcmsr_SPEC> as RegisterValue<_>>::new(0)
1165    }
1166}
1167pub mod agtcmsr {
1168
1169    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1170    pub struct Tcmea_SPEC;
1171    pub type Tcmea = crate::EnumBitfieldStruct<u8, Tcmea_SPEC>;
1172    impl Tcmea {
1173        #[doc = "AGT Compare match A register disabled"]
1174        pub const _0: Self = Self::new(0);
1175
1176        #[doc = "AGT Compare match A register enabled"]
1177        pub const _1: Self = Self::new(1);
1178    }
1179    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1180    pub struct Toea_SPEC;
1181    pub type Toea = crate::EnumBitfieldStruct<u8, Toea_SPEC>;
1182    impl Toea {
1183        #[doc = "AGTWOAn pin output disabled"]
1184        pub const _0: Self = Self::new(0);
1185
1186        #[doc = "AGTWOAn pin output enabled"]
1187        pub const _1: Self = Self::new(1);
1188    }
1189    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1190    pub struct Topola_SPEC;
1191    pub type Topola = crate::EnumBitfieldStruct<u8, Topola_SPEC>;
1192    impl Topola {
1193        #[doc = "AGTWOAn pin output is started on low (normal output)"]
1194        pub const _0: Self = Self::new(0);
1195
1196        #[doc = "AGTWOAn pin output is started on high (inverted output)"]
1197        pub const _1: Self = Self::new(1);
1198    }
1199    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1200    pub struct Tcmeb_SPEC;
1201    pub type Tcmeb = crate::EnumBitfieldStruct<u8, Tcmeb_SPEC>;
1202    impl Tcmeb {
1203        #[doc = "Compare match B register disabled"]
1204        pub const _0: Self = Self::new(0);
1205
1206        #[doc = "Compare match B register enabled"]
1207        pub const _1: Self = Self::new(1);
1208    }
1209    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1210    pub struct Toeb_SPEC;
1211    pub type Toeb = crate::EnumBitfieldStruct<u8, Toeb_SPEC>;
1212    impl Toeb {
1213        #[doc = "AGTWOBn pin output disabled"]
1214        pub const _0: Self = Self::new(0);
1215
1216        #[doc = "AGTWOBn pin output enabled"]
1217        pub const _1: Self = Self::new(1);
1218    }
1219    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1220    pub struct Topolb_SPEC;
1221    pub type Topolb = crate::EnumBitfieldStruct<u8, Topolb_SPEC>;
1222    impl Topolb {
1223        #[doc = "AGTWOBn pin output is started on low (normal output)"]
1224        pub const _0: Self = Self::new(0);
1225
1226        #[doc = "AGTWOBn pin output is started on high (inverted output)"]
1227        pub const _1: Self = Self::new(1);
1228    }
1229}
ra2a2_pac/agtw0.rs

ra2a2_pac/
agtw0.rs
