ra2a1/
sci1.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    _reserved_0_smr: [u8; 0x01],
5    #[doc = "0x01 - Bit Rate Register"]
6    pub brr: BRR,
7    _reserved_2_scr: [u8; 0x01],
8    #[doc = "0x03 - Transmit Data Register"]
9    pub tdr: TDR,
10    _reserved_4_ssr: [u8; 0x01],
11    #[doc = "0x05 - Receive Data Register"]
12    pub rdr: RDR,
13    #[doc = "0x06 - Smart Card Mode Register"]
14    pub scmr: SCMR,
15    #[doc = "0x07 - Serial Extended Mode Register"]
16    pub semr: SEMR,
17    #[doc = "0x08 - Noise Filter Setting Register"]
18    pub snfr: SNFR,
19    #[doc = "0x09 - I2C Mode Register 1"]
20    pub simr1: SIMR1,
21    #[doc = "0x0a - I2C Mode Register 2"]
22    pub simr2: SIMR2,
23    #[doc = "0x0b - IIC Mode Register 3"]
24    pub simr3: SIMR3,
25    #[doc = "0x0c - IIC Status Register"]
26    pub sisr: SISR,
27    #[doc = "0x0d - SPI Mode Register"]
28    pub spmr: SPMR,
29    #[doc = "0x0e - Transmit 9-bit Data Register"]
30    pub tdrhl: TDRHL,
31    #[doc = "0x10 - Receive 9-bit Data Register"]
32    pub rdrhl: RDRHL,
33    #[doc = "0x12 - Modulation Duty Register"]
34    pub mddr: MDDR,
35    #[doc = "0x13 - Data Compare Match Control Register"]
36    pub dccr: DCCR,
37    _reserved18: [u8; 0x06],
38    #[doc = "0x1a - Compare Match Data Register"]
39    pub cdr: CDR,
40    #[doc = "0x1c - Serial Port Register"]
41    pub sptr: SPTR,
42}
43impl RegisterBlock {
44    #[doc = "0x00 - Serial mode register (SCMR.SMIF = 1)"]
45    #[inline(always)]
46    pub const fn smr_smci(&self) -> &SMR_SMCI {
47        unsafe { &*(self as *const Self).cast::<u8>().add(0usize).cast() }
48    }
49    #[doc = "0x00 - Serial Mode Register (SCMR.SMIF = 0)"]
50    #[inline(always)]
51    pub const fn smr(&self) -> &SMR {
52        unsafe { &*(self as *const Self).cast::<u8>().add(0usize).cast() }
53    }
54    #[doc = "0x02 - Serial Control Register (SCMR.SMIF =1)"]
55    #[inline(always)]
56    pub const fn scr_smci(&self) -> &SCR_SMCI {
57        unsafe { &*(self as *const Self).cast::<u8>().add(2usize).cast() }
58    }
59    #[doc = "0x02 - Serial Control Register (SCMR.SMIF = 0)"]
60    #[inline(always)]
61    pub const fn scr(&self) -> &SCR {
62        unsafe { &*(self as *const Self).cast::<u8>().add(2usize).cast() }
63    }
64    #[doc = "0x04 - Serial Status Register(SCMR.SMIF = 1)"]
65    #[inline(always)]
66    pub const fn ssr_smci(&self) -> &SSR_SMCI {
67        unsafe { &*(self as *const Self).cast::<u8>().add(4usize).cast() }
68    }
69    #[doc = "0x04 - Serial Status Register(SCMR.SMIF = 0 and FCR.FM=0)"]
70    #[inline(always)]
71    pub const fn ssr(&self) -> &SSR {
72        unsafe { &*(self as *const Self).cast::<u8>().add(4usize).cast() }
73    }
74}
75#[doc = "SMR (rw) register accessor: an alias for `Reg<SMR_SPEC>`"]
76pub type SMR = crate::Reg<smr::SMR_SPEC>;
77#[doc = "Serial Mode Register (SCMR.SMIF = 0)"]
78pub mod smr;
79#[doc = "SMR_SMCI (rw) register accessor: an alias for `Reg<SMR_SMCI_SPEC>`"]
80pub type SMR_SMCI = crate::Reg<smr_smci::SMR_SMCI_SPEC>;
81#[doc = "Serial mode register (SCMR.SMIF = 1)"]
82pub mod smr_smci;
83#[doc = "BRR (rw) register accessor: an alias for `Reg<BRR_SPEC>`"]
84pub type BRR = crate::Reg<brr::BRR_SPEC>;
85#[doc = "Bit Rate Register"]
86pub mod brr;
87#[doc = "SCR (rw) register accessor: an alias for `Reg<SCR_SPEC>`"]
88pub type SCR = crate::Reg<scr::SCR_SPEC>;
89#[doc = "Serial Control Register (SCMR.SMIF = 0)"]
90pub mod scr;
91#[doc = "SCR_SMCI (rw) register accessor: an alias for `Reg<SCR_SMCI_SPEC>`"]
92pub type SCR_SMCI = crate::Reg<scr_smci::SCR_SMCI_SPEC>;
93#[doc = "Serial Control Register (SCMR.SMIF =1)"]
94pub mod scr_smci;
95#[doc = "TDR (rw) register accessor: an alias for `Reg<TDR_SPEC>`"]
96pub type TDR = crate::Reg<tdr::TDR_SPEC>;
97#[doc = "Transmit Data Register"]
98pub mod tdr;
99#[doc = "SSR (rw) register accessor: an alias for `Reg<SSR_SPEC>`"]
100pub type SSR = crate::Reg<ssr::SSR_SPEC>;
101#[doc = "Serial Status Register(SCMR.SMIF = 0 and FCR.FM=0)"]
102pub mod ssr;
103#[doc = "SSR_SMCI (rw) register accessor: an alias for `Reg<SSR_SMCI_SPEC>`"]
104pub type SSR_SMCI = crate::Reg<ssr_smci::SSR_SMCI_SPEC>;
105#[doc = "Serial Status Register(SCMR.SMIF = 1)"]
106pub mod ssr_smci;
107#[doc = "RDR (r) register accessor: an alias for `Reg<RDR_SPEC>`"]
108pub type RDR = crate::Reg<rdr::RDR_SPEC>;
109#[doc = "Receive Data Register"]
110pub mod rdr;
111#[doc = "SCMR (rw) register accessor: an alias for `Reg<SCMR_SPEC>`"]
112pub type SCMR = crate::Reg<scmr::SCMR_SPEC>;
113#[doc = "Smart Card Mode Register"]
114pub mod scmr;
115#[doc = "SEMR (rw) register accessor: an alias for `Reg<SEMR_SPEC>`"]
116pub type SEMR = crate::Reg<semr::SEMR_SPEC>;
117#[doc = "Serial Extended Mode Register"]
118pub mod semr;
119#[doc = "SNFR (rw) register accessor: an alias for `Reg<SNFR_SPEC>`"]
120pub type SNFR = crate::Reg<snfr::SNFR_SPEC>;
121#[doc = "Noise Filter Setting Register"]
122pub mod snfr;
123#[doc = "SIMR1 (rw) register accessor: an alias for `Reg<SIMR1_SPEC>`"]
124pub type SIMR1 = crate::Reg<simr1::SIMR1_SPEC>;
125#[doc = "I2C Mode Register 1"]
126pub mod simr1;
127#[doc = "SIMR2 (rw) register accessor: an alias for `Reg<SIMR2_SPEC>`"]
128pub type SIMR2 = crate::Reg<simr2::SIMR2_SPEC>;
129#[doc = "I2C Mode Register 2"]
130pub mod simr2;
131#[doc = "SIMR3 (rw) register accessor: an alias for `Reg<SIMR3_SPEC>`"]
132pub type SIMR3 = crate::Reg<simr3::SIMR3_SPEC>;
133#[doc = "IIC Mode Register 3"]
134pub mod simr3;
135#[doc = "SISR (r) register accessor: an alias for `Reg<SISR_SPEC>`"]
136pub type SISR = crate::Reg<sisr::SISR_SPEC>;
137#[doc = "IIC Status Register"]
138pub mod sisr;
139#[doc = "SPMR (rw) register accessor: an alias for `Reg<SPMR_SPEC>`"]
140pub type SPMR = crate::Reg<spmr::SPMR_SPEC>;
141#[doc = "SPI Mode Register"]
142pub mod spmr;
143#[doc = "TDRHL (rw) register accessor: an alias for `Reg<TDRHL_SPEC>`"]
144pub type TDRHL = crate::Reg<tdrhl::TDRHL_SPEC>;
145#[doc = "Transmit 9-bit Data Register"]
146pub mod tdrhl;
147#[doc = "RDRHL (r) register accessor: an alias for `Reg<RDRHL_SPEC>`"]
148pub type RDRHL = crate::Reg<rdrhl::RDRHL_SPEC>;
149#[doc = "Receive 9-bit Data Register"]
150pub mod rdrhl;
151#[doc = "MDDR (rw) register accessor: an alias for `Reg<MDDR_SPEC>`"]
152pub type MDDR = crate::Reg<mddr::MDDR_SPEC>;
153#[doc = "Modulation Duty Register"]
154pub mod mddr;
155#[doc = "DCCR (rw) register accessor: an alias for `Reg<DCCR_SPEC>`"]
156pub type DCCR = crate::Reg<dccr::DCCR_SPEC>;
157#[doc = "Data Compare Match Control Register"]
158pub mod dccr;
159#[doc = "CDR (rw) register accessor: an alias for `Reg<CDR_SPEC>`"]
160pub type CDR = crate::Reg<cdr::CDR_SPEC>;
161#[doc = "Compare Match Data Register"]
162pub mod cdr;
163#[doc = "SPTR (rw) register accessor: an alias for `Reg<SPTR_SPEC>`"]
164pub type SPTR = crate::Reg<sptr::SPTR_SPEC>;
165#[doc = "Serial Port Register"]
166pub mod sptr;