ra2a1_pac/
dbg.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.1, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:31 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Debug Function"]
28unsafe impl ::core::marker::Send for super::Dbg {}
29unsafe impl ::core::marker::Sync for super::Dbg {}
30impl super::Dbg {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Debug Status Register"]
38    #[inline(always)]
39    pub const fn dbgstr(&self) -> &'static crate::common::Reg<self::Dbgstr_SPEC, crate::common::R> {
40        unsafe {
41            crate::common::Reg::<self::Dbgstr_SPEC, crate::common::R>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "Debug Stop Control Register"]
48    #[inline(always)]
49    pub const fn dbgstopcr(
50        &self,
51    ) -> &'static crate::common::Reg<self::Dbgstopcr_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Dbgstopcr_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(16usize),
55            )
56        }
57    }
58}
59#[doc(hidden)]
60#[derive(Copy, Clone, Eq, PartialEq)]
61pub struct Dbgstr_SPEC;
62impl crate::sealed::RegSpec for Dbgstr_SPEC {
63    type DataType = u32;
64}
65
66#[doc = "Debug Status Register"]
67pub type Dbgstr = crate::RegValueT<Dbgstr_SPEC>;
68
69impl Dbgstr {
70    #[doc = "Debug power-up acknowledge"]
71    #[inline(always)]
72    pub fn cdbgpwrupack(
73        self,
74    ) -> crate::common::RegisterField<
75        29,
76        0x1,
77        1,
78        0,
79        dbgstr::Cdbgpwrupack,
80        dbgstr::Cdbgpwrupack,
81        Dbgstr_SPEC,
82        crate::common::R,
83    > {
84        crate::common::RegisterField::<
85            29,
86            0x1,
87            1,
88            0,
89            dbgstr::Cdbgpwrupack,
90            dbgstr::Cdbgpwrupack,
91            Dbgstr_SPEC,
92            crate::common::R,
93        >::from_register(self, 0)
94    }
95
96    #[doc = "Debug power-up request"]
97    #[inline(always)]
98    pub fn cdbgpwrupreq(
99        self,
100    ) -> crate::common::RegisterField<
101        28,
102        0x1,
103        1,
104        0,
105        dbgstr::Cdbgpwrupreq,
106        dbgstr::Cdbgpwrupreq,
107        Dbgstr_SPEC,
108        crate::common::R,
109    > {
110        crate::common::RegisterField::<
111            28,
112            0x1,
113            1,
114            0,
115            dbgstr::Cdbgpwrupreq,
116            dbgstr::Cdbgpwrupreq,
117            Dbgstr_SPEC,
118            crate::common::R,
119        >::from_register(self, 0)
120    }
121
122    #[doc = "These bits are read as 0000000000000000000000000000."]
123    #[inline(always)]
124    pub fn reserved(
125        self,
126    ) -> crate::common::RegisterField<0, 0xfffffff, 1, 0, u32, u32, Dbgstr_SPEC, crate::common::R>
127    {
128        crate::common::RegisterField::<0,0xfffffff,1,0,u32,u32,Dbgstr_SPEC,crate::common::R>::from_register(self,0)
129    }
130}
131impl ::core::default::Default for Dbgstr {
132    #[inline(always)]
133    fn default() -> Dbgstr {
134        <crate::RegValueT<Dbgstr_SPEC> as RegisterValue<_>>::new(0)
135    }
136}
137pub mod dbgstr {
138
139    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
140    pub struct Cdbgpwrupack_SPEC;
141    pub type Cdbgpwrupack = crate::EnumBitfieldStruct<u8, Cdbgpwrupack_SPEC>;
142    impl Cdbgpwrupack {
143        #[doc = "Debug power-up request is not acknowledged"]
144        pub const _0: Self = Self::new(0);
145
146        #[doc = "Debug power-up request is acknowledged"]
147        pub const _1: Self = Self::new(1);
148    }
149    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
150    pub struct Cdbgpwrupreq_SPEC;
151    pub type Cdbgpwrupreq = crate::EnumBitfieldStruct<u8, Cdbgpwrupreq_SPEC>;
152    impl Cdbgpwrupreq {
153        #[doc = "OCD is not requesting debug power-up"]
154        pub const _0: Self = Self::new(0);
155
156        #[doc = "OCD is requesting debug power-up"]
157        pub const _1: Self = Self::new(1);
158    }
159}
160#[doc(hidden)]
161#[derive(Copy, Clone, Eq, PartialEq)]
162pub struct Dbgstopcr_SPEC;
163impl crate::sealed::RegSpec for Dbgstopcr_SPEC {
164    type DataType = u32;
165}
166
167#[doc = "Debug Stop Control Register"]
168pub type Dbgstopcr = crate::RegValueT<Dbgstopcr_SPEC>;
169
170impl Dbgstopcr {
171    #[doc = "Mask bit for SRAM ECC error reset/interrupt"]
172    #[inline(always)]
173    pub fn dbgstop_reccr(
174        self,
175    ) -> crate::common::RegisterField<
176        25,
177        0x1,
178        1,
179        0,
180        dbgstopcr::DbgstopReccr,
181        dbgstopcr::DbgstopReccr,
182        Dbgstopcr_SPEC,
183        crate::common::RW,
184    > {
185        crate::common::RegisterField::<
186            25,
187            0x1,
188            1,
189            0,
190            dbgstopcr::DbgstopReccr,
191            dbgstopcr::DbgstopReccr,
192            Dbgstopcr_SPEC,
193            crate::common::RW,
194        >::from_register(self, 0)
195    }
196
197    #[doc = "Mask bit for RAM parity error reset/interrupt"]
198    #[inline(always)]
199    pub fn dbgstop_rper(
200        self,
201    ) -> crate::common::RegisterField<
202        24,
203        0x1,
204        1,
205        0,
206        dbgstopcr::DbgstopRper,
207        dbgstopcr::DbgstopRper,
208        Dbgstopcr_SPEC,
209        crate::common::RW,
210    > {
211        crate::common::RegisterField::<
212            24,
213            0x1,
214            1,
215            0,
216            dbgstopcr::DbgstopRper,
217            dbgstopcr::DbgstopRper,
218            Dbgstopcr_SPEC,
219            crate::common::RW,
220        >::from_register(self, 0)
221    }
222
223    #[doc = "b18:  Mask bit for LVD2 reset/interrupt (0:enable / 1:Mask)b17:  Mask bit for LVD1 reset/interrupt (0:enable / 1:Mask)b16:  Mask bit for LVD0 reset             (0:enable / 1:Mask)"]
224    #[inline(always)]
225    pub fn dbgstop_lvd(
226        self,
227    ) -> crate::common::RegisterField<16, 0x7, 1, 0, u8, u8, Dbgstopcr_SPEC, crate::common::RW>
228    {
229        crate::common::RegisterField::<16,0x7,1,0,u8,u8,Dbgstopcr_SPEC,crate::common::RW>::from_register(self,0)
230    }
231
232    #[doc = "These bits are read as 00000000000000. The write value should be 00000000000000."]
233    #[inline(always)]
234    pub fn reserved(
235        self,
236    ) -> crate::common::RegisterField<2, 0x3fff, 1, 0, u16, u16, Dbgstopcr_SPEC, crate::common::RW>
237    {
238        crate::common::RegisterField::<2,0x3fff,1,0,u16,u16,Dbgstopcr_SPEC,crate::common::RW>::from_register(self,0)
239    }
240
241    #[doc = "Mask bit for WDT reset/interrupt"]
242    #[inline(always)]
243    pub fn dbgstop_wdt(
244        self,
245    ) -> crate::common::RegisterField<
246        1,
247        0x1,
248        1,
249        0,
250        dbgstopcr::DbgstopWdt,
251        dbgstopcr::DbgstopWdt,
252        Dbgstopcr_SPEC,
253        crate::common::RW,
254    > {
255        crate::common::RegisterField::<
256            1,
257            0x1,
258            1,
259            0,
260            dbgstopcr::DbgstopWdt,
261            dbgstopcr::DbgstopWdt,
262            Dbgstopcr_SPEC,
263            crate::common::RW,
264        >::from_register(self, 0)
265    }
266
267    #[doc = "Mask bit for IWDT reset/interrupt"]
268    #[inline(always)]
269    pub fn dbgstop_iwdt(
270        self,
271    ) -> crate::common::RegisterField<
272        0,
273        0x1,
274        1,
275        0,
276        dbgstopcr::DbgstopIwdt,
277        dbgstopcr::DbgstopIwdt,
278        Dbgstopcr_SPEC,
279        crate::common::RW,
280    > {
281        crate::common::RegisterField::<
282            0,
283            0x1,
284            1,
285            0,
286            dbgstopcr::DbgstopIwdt,
287            dbgstopcr::DbgstopIwdt,
288            Dbgstopcr_SPEC,
289            crate::common::RW,
290        >::from_register(self, 0)
291    }
292}
293impl ::core::default::Default for Dbgstopcr {
294    #[inline(always)]
295    fn default() -> Dbgstopcr {
296        <crate::RegValueT<Dbgstopcr_SPEC> as RegisterValue<_>>::new(3)
297    }
298}
299pub mod dbgstopcr {
300
301    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
302    pub struct DbgstopReccr_SPEC;
303    pub type DbgstopReccr = crate::EnumBitfieldStruct<u8, DbgstopReccr_SPEC>;
304    impl DbgstopReccr {
305        #[doc = "Enable SRAM ECC error reset/interrupt"]
306        pub const _0: Self = Self::new(0);
307
308        #[doc = "Mask SRAM ECC error reset/interrupt."]
309        pub const _1: Self = Self::new(1);
310    }
311    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
312    pub struct DbgstopRper_SPEC;
313    pub type DbgstopRper = crate::EnumBitfieldStruct<u8, DbgstopRper_SPEC>;
314    impl DbgstopRper {
315        #[doc = "Enable RAM parity error reset/interrupt"]
316        pub const _0: Self = Self::new(0);
317
318        #[doc = "Mask RAM parity error reset/interrupt"]
319        pub const _1: Self = Self::new(1);
320    }
321    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
322    pub struct DbgstopWdt_SPEC;
323    pub type DbgstopWdt = crate::EnumBitfieldStruct<u8, DbgstopWdt_SPEC>;
324    impl DbgstopWdt {
325        #[doc = "Mask WDT reset/interrupt"]
326        pub const _0: Self = Self::new(0);
327
328        #[doc = "Enable WDT reset"]
329        pub const _1: Self = Self::new(1);
330    }
331    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
332    pub struct DbgstopIwdt_SPEC;
333    pub type DbgstopIwdt = crate::EnumBitfieldStruct<u8, DbgstopIwdt_SPEC>;
334    impl DbgstopIwdt {
335        #[doc = "Mask IWDT reset/interrupt"]
336        pub const _0: Self = Self::new(0);
337
338        #[doc = "Enable IWDT reset"]
339        pub const _1: Self = Self::new(1);
340    }
341}
ra2a1_pac/dbg.rs

ra2a1_pac/
dbg.rs
