ra2a1_pac/
acmplp.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.1, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:31 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Low-Power Analog Comparator"]
28unsafe impl ::core::marker::Send for super::Acmplp {}
29unsafe impl ::core::marker::Sync for super::Acmplp {}
30impl super::Acmplp {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "ACMPLP Mode Setting Register"]
38    #[inline(always)]
39    pub const fn compmdr(
40        &self,
41    ) -> &'static crate::common::Reg<self::Compmdr_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Compmdr_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "ACMPLP Filter Control Register"]
50    #[inline(always)]
51    pub const fn compfir(
52        &self,
53    ) -> &'static crate::common::Reg<self::Compfir_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Compfir_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(1usize),
57            )
58        }
59    }
60
61    #[doc = "ACMPLP Output Control Register"]
62    #[inline(always)]
63    pub const fn compocr(
64        &self,
65    ) -> &'static crate::common::Reg<self::Compocr_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Compocr_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(2usize),
69            )
70        }
71    }
72
73    #[doc = "Comparator Input Select Register"]
74    #[inline(always)]
75    pub const fn compsel0(
76        &self,
77    ) -> &'static crate::common::Reg<self::Compsel0_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Compsel0_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(4usize),
81            )
82        }
83    }
84
85    #[doc = "Comparator Reference voltage Select Register"]
86    #[inline(always)]
87    pub const fn compsel1(
88        &self,
89    ) -> &'static crate::common::Reg<self::Compsel1_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Compsel1_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(5usize),
93            )
94        }
95    }
96}
97#[doc(hidden)]
98#[derive(Copy, Clone, Eq, PartialEq)]
99pub struct Compmdr_SPEC;
100impl crate::sealed::RegSpec for Compmdr_SPEC {
101    type DataType = u8;
102}
103
104#[doc = "ACMPLP Mode Setting Register"]
105pub type Compmdr = crate::RegValueT<Compmdr_SPEC>;
106
107impl Compmdr {
108    #[doc = "ACMPLP1 Monitor Flag"]
109    #[inline(always)]
110    pub fn c1mon(
111        self,
112    ) -> crate::common::RegisterField<
113        7,
114        0x1,
115        1,
116        0,
117        compmdr::C1Mon,
118        compmdr::C1Mon,
119        Compmdr_SPEC,
120        crate::common::RW,
121    > {
122        crate::common::RegisterField::<
123            7,
124            0x1,
125            1,
126            0,
127            compmdr::C1Mon,
128            compmdr::C1Mon,
129            Compmdr_SPEC,
130            crate::common::RW,
131        >::from_register(self, 0)
132    }
133
134    #[doc = "ACMPLP1 Reference Voltage SelectionNote1:  It\'s effective only at the time of standard mode.IVREF0 and IVREF1 are chosen at window mode condition in spite of setting of this bit."]
135    #[inline(always)]
136    pub fn c1vrf(
137        self,
138    ) -> crate::common::RegisterField<
139        6,
140        0x1,
141        1,
142        0,
143        compmdr::C1Vrf,
144        compmdr::C1Vrf,
145        Compmdr_SPEC,
146        crate::common::RW,
147    > {
148        crate::common::RegisterField::<
149            6,
150            0x1,
151            1,
152            0,
153            compmdr::C1Vrf,
154            compmdr::C1Vrf,
155            Compmdr_SPEC,
156            crate::common::RW,
157        >::from_register(self, 0)
158    }
159
160    #[doc = "ACMPLP1 Window Function Mode Enable"]
161    #[inline(always)]
162    pub fn c1wde(
163        self,
164    ) -> crate::common::RegisterField<
165        5,
166        0x1,
167        1,
168        0,
169        compmdr::C1Wde,
170        compmdr::C1Wde,
171        Compmdr_SPEC,
172        crate::common::RW,
173    > {
174        crate::common::RegisterField::<
175            5,
176            0x1,
177            1,
178            0,
179            compmdr::C1Wde,
180            compmdr::C1Wde,
181            Compmdr_SPEC,
182            crate::common::RW,
183        >::from_register(self, 0)
184    }
185
186    #[doc = "ACMPLP1 Operation Enable"]
187    #[inline(always)]
188    pub fn c1enb(
189        self,
190    ) -> crate::common::RegisterField<
191        4,
192        0x1,
193        1,
194        0,
195        compmdr::C1Enb,
196        compmdr::C1Enb,
197        Compmdr_SPEC,
198        crate::common::RW,
199    > {
200        crate::common::RegisterField::<
201            4,
202            0x1,
203            1,
204            0,
205            compmdr::C1Enb,
206            compmdr::C1Enb,
207            Compmdr_SPEC,
208            crate::common::RW,
209        >::from_register(self, 0)
210    }
211
212    #[doc = "ACMPLP0 Monitor Flag"]
213    #[inline(always)]
214    pub fn c0mon(
215        self,
216    ) -> crate::common::RegisterField<
217        3,
218        0x1,
219        1,
220        0,
221        compmdr::C0Mon,
222        compmdr::C0Mon,
223        Compmdr_SPEC,
224        crate::common::RW,
225    > {
226        crate::common::RegisterField::<
227            3,
228            0x1,
229            1,
230            0,
231            compmdr::C0Mon,
232            compmdr::C0Mon,
233            Compmdr_SPEC,
234            crate::common::RW,
235        >::from_register(self, 0)
236    }
237
238    #[doc = "ACMPLP0 Reference Voltage SelectionNote1:  It\'s effective only at the time of standard mode.IVREF0 and IVREF1 are chosen at window mode condition in spite of setting of this bit."]
239    #[inline(always)]
240    pub fn c0vrf(
241        self,
242    ) -> crate::common::RegisterField<
243        2,
244        0x1,
245        1,
246        0,
247        compmdr::C0Vrf,
248        compmdr::C0Vrf,
249        Compmdr_SPEC,
250        crate::common::RW,
251    > {
252        crate::common::RegisterField::<
253            2,
254            0x1,
255            1,
256            0,
257            compmdr::C0Vrf,
258            compmdr::C0Vrf,
259            Compmdr_SPEC,
260            crate::common::RW,
261        >::from_register(self, 0)
262    }
263
264    #[doc = "ACMPLP0 Window Function Mode Enable"]
265    #[inline(always)]
266    pub fn c0wde(
267        self,
268    ) -> crate::common::RegisterField<
269        1,
270        0x1,
271        1,
272        0,
273        compmdr::C0Wde,
274        compmdr::C0Wde,
275        Compmdr_SPEC,
276        crate::common::RW,
277    > {
278        crate::common::RegisterField::<
279            1,
280            0x1,
281            1,
282            0,
283            compmdr::C0Wde,
284            compmdr::C0Wde,
285            Compmdr_SPEC,
286            crate::common::RW,
287        >::from_register(self, 0)
288    }
289
290    #[doc = "ACMPLP0 Operation Enable"]
291    #[inline(always)]
292    pub fn c0enb(
293        self,
294    ) -> crate::common::RegisterField<
295        0,
296        0x1,
297        1,
298        0,
299        compmdr::C0Enb,
300        compmdr::C0Enb,
301        Compmdr_SPEC,
302        crate::common::RW,
303    > {
304        crate::common::RegisterField::<
305            0,
306            0x1,
307            1,
308            0,
309            compmdr::C0Enb,
310            compmdr::C0Enb,
311            Compmdr_SPEC,
312            crate::common::RW,
313        >::from_register(self, 0)
314    }
315}
316impl ::core::default::Default for Compmdr {
317    #[inline(always)]
318    fn default() -> Compmdr {
319        <crate::RegValueT<Compmdr_SPEC> as RegisterValue<_>>::new(0)
320    }
321}
322pub mod compmdr {
323
324    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
325    pub struct C1Mon_SPEC;
326    pub type C1Mon = crate::EnumBitfieldStruct<u8, C1Mon_SPEC>;
327    impl C1Mon {
328        #[doc = "IVCMP1 < Comparator1 Reference level(When the window function is disabled)/IVCMP1 &lt; IVREF0 or IVCMP1 &gt; IVREF1(When the window function is enabled)"]
329        pub const _0: Self = Self::new(0);
330
331        #[doc = "IVCMP1 > Comparator1 Reference level(When the window function is disabled)/IVREF0 < IVCMP1 < IVREF1(When the window function is enabled)"]
332        pub const _1: Self = Self::new(1);
333    }
334    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
335    pub struct C1Vrf_SPEC;
336    pub type C1Vrf = crate::EnumBitfieldStruct<u8, C1Vrf_SPEC>;
337    impl C1Vrf {
338        #[doc = "CMPREF1 input"]
339        pub const _0: Self = Self::new(0);
340
341        #[doc = "internal reference voltage (Vref)"]
342        pub const _1: Self = Self::new(1);
343    }
344    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
345    pub struct C1Wde_SPEC;
346    pub type C1Wde = crate::EnumBitfieldStruct<u8, C1Wde_SPEC>;
347    impl C1Wde {
348        #[doc = "Disabled"]
349        pub const _0: Self = Self::new(0);
350
351        #[doc = "Enabled"]
352        pub const _1: Self = Self::new(1);
353    }
354    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
355    pub struct C1Enb_SPEC;
356    pub type C1Enb = crate::EnumBitfieldStruct<u8, C1Enb_SPEC>;
357    impl C1Enb {
358        #[doc = "Disabled"]
359        pub const _0: Self = Self::new(0);
360
361        #[doc = "Enabled"]
362        pub const _1: Self = Self::new(1);
363    }
364    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
365    pub struct C0Mon_SPEC;
366    pub type C0Mon = crate::EnumBitfieldStruct<u8, C0Mon_SPEC>;
367    impl C0Mon {
368        #[doc = "IVCMP0 < Comparator0 Reference level(When the window function is disabled)/IVCMP0 &lt; IVREF0 or IVCMP0 &gt; IVREF1(When the window function is enabled)"]
369        pub const _0: Self = Self::new(0);
370
371        #[doc = "IVCMP0 > Comparator0 Reference level(When the window function is disabled)/IVREF0 < IVCMP0 < IVREF1(When the window function is enabled)"]
372        pub const _1: Self = Self::new(1);
373    }
374    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
375    pub struct C0Vrf_SPEC;
376    pub type C0Vrf = crate::EnumBitfieldStruct<u8, C0Vrf_SPEC>;
377    impl C0Vrf {
378        #[doc = "CMPREF0 input"]
379        pub const _0: Self = Self::new(0);
380
381        #[doc = "internal reference voltage (Vref)"]
382        pub const _1: Self = Self::new(1);
383    }
384    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
385    pub struct C0Wde_SPEC;
386    pub type C0Wde = crate::EnumBitfieldStruct<u8, C0Wde_SPEC>;
387    impl C0Wde {
388        #[doc = "Disabled"]
389        pub const _0: Self = Self::new(0);
390
391        #[doc = "Enabled"]
392        pub const _1: Self = Self::new(1);
393    }
394    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
395    pub struct C0Enb_SPEC;
396    pub type C0Enb = crate::EnumBitfieldStruct<u8, C0Enb_SPEC>;
397    impl C0Enb {
398        #[doc = "Disabled"]
399        pub const _0: Self = Self::new(0);
400
401        #[doc = "Enabled"]
402        pub const _1: Self = Self::new(1);
403    }
404}
405#[doc(hidden)]
406#[derive(Copy, Clone, Eq, PartialEq)]
407pub struct Compfir_SPEC;
408impl crate::sealed::RegSpec for Compfir_SPEC {
409    type DataType = u8;
410}
411
412#[doc = "ACMPLP Filter Control Register"]
413pub type Compfir = crate::RegValueT<Compfir_SPEC>;
414
415impl Compfir {
416    #[doc = "ACMPLP1 Filter Select"]
417    #[inline(always)]
418    pub fn c1edg(
419        self,
420    ) -> crate::common::RegisterField<
421        7,
422        0x1,
423        1,
424        0,
425        compfir::C1Edg,
426        compfir::C1Edg,
427        Compfir_SPEC,
428        crate::common::RW,
429    > {
430        crate::common::RegisterField::<
431            7,
432            0x1,
433            1,
434            0,
435            compfir::C1Edg,
436            compfir::C1Edg,
437            Compfir_SPEC,
438            crate::common::RW,
439        >::from_register(self, 0)
440    }
441
442    #[doc = "ACMPLP1 Edge Polarity Switching"]
443    #[inline(always)]
444    pub fn c1epo(
445        self,
446    ) -> crate::common::RegisterField<
447        6,
448        0x1,
449        1,
450        0,
451        compfir::C1Epo,
452        compfir::C1Epo,
453        Compfir_SPEC,
454        crate::common::RW,
455    > {
456        crate::common::RegisterField::<
457            6,
458            0x1,
459            1,
460            0,
461            compfir::C1Epo,
462            compfir::C1Epo,
463            Compfir_SPEC,
464            crate::common::RW,
465        >::from_register(self, 0)
466    }
467
468    #[doc = "ACMPLP1 Edge Detection Selection"]
469    #[inline(always)]
470    pub fn c1fck(
471        self,
472    ) -> crate::common::RegisterField<
473        4,
474        0x3,
475        1,
476        0,
477        compfir::C1Fck,
478        compfir::C1Fck,
479        Compfir_SPEC,
480        crate::common::RW,
481    > {
482        crate::common::RegisterField::<
483            4,
484            0x3,
485            1,
486            0,
487            compfir::C1Fck,
488            compfir::C1Fck,
489            Compfir_SPEC,
490            crate::common::RW,
491        >::from_register(self, 0)
492    }
493
494    #[doc = "ACMPLP0 Filter Select"]
495    #[inline(always)]
496    pub fn c0edg(
497        self,
498    ) -> crate::common::RegisterField<
499        3,
500        0x1,
501        1,
502        0,
503        compfir::C0Edg,
504        compfir::C0Edg,
505        Compfir_SPEC,
506        crate::common::RW,
507    > {
508        crate::common::RegisterField::<
509            3,
510            0x1,
511            1,
512            0,
513            compfir::C0Edg,
514            compfir::C0Edg,
515            Compfir_SPEC,
516            crate::common::RW,
517        >::from_register(self, 0)
518    }
519
520    #[doc = "ACMPLP0 Edge Polarity Switching"]
521    #[inline(always)]
522    pub fn c0epo(
523        self,
524    ) -> crate::common::RegisterField<
525        2,
526        0x1,
527        1,
528        0,
529        compfir::C0Epo,
530        compfir::C0Epo,
531        Compfir_SPEC,
532        crate::common::RW,
533    > {
534        crate::common::RegisterField::<
535            2,
536            0x1,
537            1,
538            0,
539            compfir::C0Epo,
540            compfir::C0Epo,
541            Compfir_SPEC,
542            crate::common::RW,
543        >::from_register(self, 0)
544    }
545
546    #[doc = "ACMPLP0 Edge Detection Selection"]
547    #[inline(always)]
548    pub fn c0fck(
549        self,
550    ) -> crate::common::RegisterField<
551        0,
552        0x3,
553        1,
554        0,
555        compfir::C0Fck,
556        compfir::C0Fck,
557        Compfir_SPEC,
558        crate::common::RW,
559    > {
560        crate::common::RegisterField::<
561            0,
562            0x3,
563            1,
564            0,
565            compfir::C0Fck,
566            compfir::C0Fck,
567            Compfir_SPEC,
568            crate::common::RW,
569        >::from_register(self, 0)
570    }
571}
572impl ::core::default::Default for Compfir {
573    #[inline(always)]
574    fn default() -> Compfir {
575        <crate::RegValueT<Compfir_SPEC> as RegisterValue<_>>::new(0)
576    }
577}
578pub mod compfir {
579
580    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
581    pub struct C1Edg_SPEC;
582    pub type C1Edg = crate::EnumBitfieldStruct<u8, C1Edg_SPEC>;
583    impl C1Edg {
584        #[doc = "Interrupt and ELC event request by one-edge detection"]
585        pub const _0: Self = Self::new(0);
586
587        #[doc = "Interrupt and ELC event request by both-edge detection"]
588        pub const _1: Self = Self::new(1);
589    }
590    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
591    pub struct C1Epo_SPEC;
592    pub type C1Epo = crate::EnumBitfieldStruct<u8, C1Epo_SPEC>;
593    impl C1Epo {
594        #[doc = "Interrupt and ELC event request at rising edge"]
595        pub const _0: Self = Self::new(0);
596
597        #[doc = "Interrupt and ELC event request at falling edge"]
598        pub const _1: Self = Self::new(1);
599    }
600    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
601    pub struct C1Fck_SPEC;
602    pub type C1Fck = crate::EnumBitfieldStruct<u8, C1Fck_SPEC>;
603    impl C1Fck {
604        #[doc = "No Sampling (bypass)"]
605        pub const _00: Self = Self::new(0);
606
607        #[doc = "Sampling at PCLK"]
608        pub const _01: Self = Self::new(1);
609
610        #[doc = "Sampling at PCLK/8"]
611        pub const _10: Self = Self::new(2);
612
613        #[doc = "Sampling at PCLK/32"]
614        pub const _11: Self = Self::new(3);
615    }
616    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
617    pub struct C0Edg_SPEC;
618    pub type C0Edg = crate::EnumBitfieldStruct<u8, C0Edg_SPEC>;
619    impl C0Edg {
620        #[doc = "Interrupt and ELC event request by one-edge detection"]
621        pub const _0: Self = Self::new(0);
622
623        #[doc = "Interrupt and ELC event request by both-edge detection"]
624        pub const _1: Self = Self::new(1);
625    }
626    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
627    pub struct C0Epo_SPEC;
628    pub type C0Epo = crate::EnumBitfieldStruct<u8, C0Epo_SPEC>;
629    impl C0Epo {
630        #[doc = "Interrupt and ELC event request at rising edge"]
631        pub const _0: Self = Self::new(0);
632
633        #[doc = "Interrupt and ELC event request at falling edge"]
634        pub const _1: Self = Self::new(1);
635    }
636    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
637    pub struct C0Fck_SPEC;
638    pub type C0Fck = crate::EnumBitfieldStruct<u8, C0Fck_SPEC>;
639    impl C0Fck {
640        #[doc = "No Sampling (bypass)"]
641        pub const _00: Self = Self::new(0);
642
643        #[doc = "Sampling at PCLK"]
644        pub const _01: Self = Self::new(1);
645
646        #[doc = "Sampling at PCLK/8"]
647        pub const _10: Self = Self::new(2);
648
649        #[doc = "Sampling at PCLK/32"]
650        pub const _11: Self = Self::new(3);
651    }
652}
653#[doc(hidden)]
654#[derive(Copy, Clone, Eq, PartialEq)]
655pub struct Compocr_SPEC;
656impl crate::sealed::RegSpec for Compocr_SPEC {
657    type DataType = u8;
658}
659
660#[doc = "ACMPLP Output Control Register"]
661pub type Compocr = crate::RegValueT<Compocr_SPEC>;
662
663impl Compocr {
664    #[doc = "ACMPLP0/ACMPLP1 Speed Selection"]
665    #[inline(always)]
666    pub fn spdmd(
667        self,
668    ) -> crate::common::RegisterField<
669        7,
670        0x1,
671        1,
672        0,
673        compocr::Spdmd,
674        compocr::Spdmd,
675        Compocr_SPEC,
676        crate::common::RW,
677    > {
678        crate::common::RegisterField::<
679            7,
680            0x1,
681            1,
682            0,
683            compocr::Spdmd,
684            compocr::Spdmd,
685            Compocr_SPEC,
686            crate::common::RW,
687        >::from_register(self, 0)
688    }
689
690    #[doc = "ACMPLP1 VCOUT Output Polarity Selection"]
691    #[inline(always)]
692    pub fn c1op(
693        self,
694    ) -> crate::common::RegisterField<
695        6,
696        0x1,
697        1,
698        0,
699        compocr::C1Op,
700        compocr::C1Op,
701        Compocr_SPEC,
702        crate::common::RW,
703    > {
704        crate::common::RegisterField::<
705            6,
706            0x1,
707            1,
708            0,
709            compocr::C1Op,
710            compocr::C1Op,
711            Compocr_SPEC,
712            crate::common::RW,
713        >::from_register(self, 0)
714    }
715
716    #[doc = "ACMPLP1 VCOUT Pin Output Enable"]
717    #[inline(always)]
718    pub fn c1oe(
719        self,
720    ) -> crate::common::RegisterField<
721        5,
722        0x1,
723        1,
724        0,
725        compocr::C1Oe,
726        compocr::C1Oe,
727        Compocr_SPEC,
728        crate::common::RW,
729    > {
730        crate::common::RegisterField::<
731            5,
732            0x1,
733            1,
734            0,
735            compocr::C1Oe,
736            compocr::C1Oe,
737            Compocr_SPEC,
738            crate::common::RW,
739        >::from_register(self, 0)
740    }
741
742    #[doc = "ACMPLP0 VCOUT Output Polarity Selection"]
743    #[inline(always)]
744    pub fn c0op(
745        self,
746    ) -> crate::common::RegisterField<
747        2,
748        0x1,
749        1,
750        0,
751        compocr::C0Op,
752        compocr::C0Op,
753        Compocr_SPEC,
754        crate::common::RW,
755    > {
756        crate::common::RegisterField::<
757            2,
758            0x1,
759            1,
760            0,
761            compocr::C0Op,
762            compocr::C0Op,
763            Compocr_SPEC,
764            crate::common::RW,
765        >::from_register(self, 0)
766    }
767
768    #[doc = "ACMPLP0 VCOUT Pin Output Enable"]
769    #[inline(always)]
770    pub fn c0oe(
771        self,
772    ) -> crate::common::RegisterField<
773        1,
774        0x1,
775        1,
776        0,
777        compocr::C0Oe,
778        compocr::C0Oe,
779        Compocr_SPEC,
780        crate::common::RW,
781    > {
782        crate::common::RegisterField::<
783            1,
784            0x1,
785            1,
786            0,
787            compocr::C0Oe,
788            compocr::C0Oe,
789            Compocr_SPEC,
790            crate::common::RW,
791        >::from_register(self, 0)
792    }
793
794    #[doc = "This bit is read as 0. The write value should be 0."]
795    #[inline(always)]
796    pub fn reserved(
797        self,
798    ) -> crate::common::RegisterFieldBool<0, 1, 0, Compocr_SPEC, crate::common::RW> {
799        crate::common::RegisterFieldBool::<0, 1, 0, Compocr_SPEC, crate::common::RW>::from_register(
800            self, 0,
801        )
802    }
803}
804impl ::core::default::Default for Compocr {
805    #[inline(always)]
806    fn default() -> Compocr {
807        <crate::RegValueT<Compocr_SPEC> as RegisterValue<_>>::new(0)
808    }
809}
810pub mod compocr {
811
812    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
813    pub struct Spdmd_SPEC;
814    pub type Spdmd = crate::EnumBitfieldStruct<u8, Spdmd_SPEC>;
815    impl Spdmd {
816        #[doc = "Comparator low-speed mode"]
817        pub const _0: Self = Self::new(0);
818
819        #[doc = "Comparator high-speed mode"]
820        pub const _1: Self = Self::new(1);
821    }
822    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
823    pub struct C1Op_SPEC;
824    pub type C1Op = crate::EnumBitfieldStruct<u8, C1Op_SPEC>;
825    impl C1Op {
826        #[doc = "Non inverted"]
827        pub const _0: Self = Self::new(0);
828
829        #[doc = "Inverted"]
830        pub const _1: Self = Self::new(1);
831    }
832    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
833    pub struct C1Oe_SPEC;
834    pub type C1Oe = crate::EnumBitfieldStruct<u8, C1Oe_SPEC>;
835    impl C1Oe {
836        #[doc = "Disabled"]
837        pub const _0: Self = Self::new(0);
838
839        #[doc = "Enabled"]
840        pub const _1: Self = Self::new(1);
841    }
842    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
843    pub struct C0Op_SPEC;
844    pub type C0Op = crate::EnumBitfieldStruct<u8, C0Op_SPEC>;
845    impl C0Op {
846        #[doc = "Non inverted"]
847        pub const _0: Self = Self::new(0);
848
849        #[doc = "Inverted"]
850        pub const _1: Self = Self::new(1);
851    }
852    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
853    pub struct C0Oe_SPEC;
854    pub type C0Oe = crate::EnumBitfieldStruct<u8, C0Oe_SPEC>;
855    impl C0Oe {
856        #[doc = "Disabled"]
857        pub const _0: Self = Self::new(0);
858
859        #[doc = "Enabled"]
860        pub const _1: Self = Self::new(1);
861    }
862}
863#[doc(hidden)]
864#[derive(Copy, Clone, Eq, PartialEq)]
865pub struct Compsel0_SPEC;
866impl crate::sealed::RegSpec for Compsel0_SPEC {
867    type DataType = u8;
868}
869
870#[doc = "Comparator Input Select Register"]
871pub type Compsel0 = crate::RegValueT<Compsel0_SPEC>;
872
873impl Compsel0 {
874    #[doc = "ACMPLP1 Input (IVCMP1) Selection"]
875    #[inline(always)]
876    pub fn cmpsel54(
877        self,
878    ) -> crate::common::RegisterField<
879        4,
880        0x3,
881        1,
882        0,
883        compsel0::Cmpsel54,
884        compsel0::Cmpsel54,
885        Compsel0_SPEC,
886        crate::common::RW,
887    > {
888        crate::common::RegisterField::<
889            4,
890            0x3,
891            1,
892            0,
893            compsel0::Cmpsel54,
894            compsel0::Cmpsel54,
895            Compsel0_SPEC,
896            crate::common::RW,
897        >::from_register(self, 0)
898    }
899
900    #[doc = "These bits are read as 00. The write value should be 00."]
901    #[inline(always)]
902    pub fn reserved(
903        self,
904    ) -> crate::common::RegisterField<2, 0x3, 1, 0, u8, u8, Compsel0_SPEC, crate::common::RW> {
905        crate::common::RegisterField::<2,0x3,1,0,u8,u8,Compsel0_SPEC,crate::common::RW>::from_register(self,0)
906    }
907
908    #[doc = "ACMPLP0 Input (IVCMP0) Selection"]
909    #[inline(always)]
910    pub fn cmpsel10(
911        self,
912    ) -> crate::common::RegisterField<
913        0,
914        0x3,
915        1,
916        0,
917        compsel0::Cmpsel10,
918        compsel0::Cmpsel10,
919        Compsel0_SPEC,
920        crate::common::RW,
921    > {
922        crate::common::RegisterField::<
923            0,
924            0x3,
925            1,
926            0,
927            compsel0::Cmpsel10,
928            compsel0::Cmpsel10,
929            Compsel0_SPEC,
930            crate::common::RW,
931        >::from_register(self, 0)
932    }
933}
934impl ::core::default::Default for Compsel0 {
935    #[inline(always)]
936    fn default() -> Compsel0 {
937        <crate::RegValueT<Compsel0_SPEC> as RegisterValue<_>>::new(17)
938    }
939}
940pub mod compsel0 {
941
942    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
943    pub struct Cmpsel54_SPEC;
944    pub type Cmpsel54 = crate::EnumBitfieldStruct<u8, Cmpsel54_SPEC>;
945    impl Cmpsel54 {
946        #[doc = "No input"]
947        pub const _00: Self = Self::new(0);
948
949        #[doc = "CMPIN1 input selected"]
950        pub const _01: Self = Self::new(1);
951
952        #[doc = "AMP1O output selected"]
953        pub const _10: Self = Self::new(2);
954    }
955    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
956    pub struct Cmpsel10_SPEC;
957    pub type Cmpsel10 = crate::EnumBitfieldStruct<u8, Cmpsel10_SPEC>;
958    impl Cmpsel10 {
959        #[doc = "No input"]
960        pub const _00: Self = Self::new(0);
961
962        #[doc = "CMPIN0 input selected"]
963        pub const _01: Self = Self::new(1);
964
965        #[doc = "AMP0O output selected"]
966        pub const _10: Self = Self::new(2);
967    }
968}
969#[doc(hidden)]
970#[derive(Copy, Clone, Eq, PartialEq)]
971pub struct Compsel1_SPEC;
972impl crate::sealed::RegSpec for Compsel1_SPEC {
973    type DataType = u8;
974}
975
976#[doc = "Comparator Reference voltage Select Register"]
977pub type Compsel1 = crate::RegValueT<Compsel1_SPEC>;
978
979impl Compsel1 {
980    #[doc = "ACMPLP1 Reference Voltage Selection"]
981    #[inline(always)]
982    pub fn c1vrf2(
983        self,
984    ) -> crate::common::RegisterField<
985        7,
986        0x1,
987        1,
988        0,
989        compsel1::C1Vrf2,
990        compsel1::C1Vrf2,
991        Compsel1_SPEC,
992        crate::common::RW,
993    > {
994        crate::common::RegisterField::<
995            7,
996            0x1,
997            1,
998            0,
999            compsel1::C1Vrf2,
1000            compsel1::C1Vrf2,
1001            Compsel1_SPEC,
1002            crate::common::RW,
1003        >::from_register(self, 0)
1004    }
1005
1006    #[doc = "ACMPLP1 Reference Voltage(IVREF1) Selection"]
1007    #[inline(always)]
1008    pub fn crvs54(
1009        self,
1010    ) -> crate::common::RegisterField<
1011        4,
1012        0x3,
1013        1,
1014        0,
1015        compsel1::Crvs54,
1016        compsel1::Crvs54,
1017        Compsel1_SPEC,
1018        crate::common::RW,
1019    > {
1020        crate::common::RegisterField::<
1021            4,
1022            0x3,
1023            1,
1024            0,
1025            compsel1::Crvs54,
1026            compsel1::Crvs54,
1027            Compsel1_SPEC,
1028            crate::common::RW,
1029        >::from_register(self, 0)
1030    }
1031
1032    #[doc = "These bits are read as 00. The write value should be 00."]
1033    #[inline(always)]
1034    pub fn reserved(
1035        self,
1036    ) -> crate::common::RegisterField<2, 0x3, 1, 0, u8, u8, Compsel1_SPEC, crate::common::RW> {
1037        crate::common::RegisterField::<2,0x3,1,0,u8,u8,Compsel1_SPEC,crate::common::RW>::from_register(self,0)
1038    }
1039
1040    #[doc = "ACMPLP0 Reference Voltage (IVREF0) Selection"]
1041    #[inline(always)]
1042    pub fn crvs10(
1043        self,
1044    ) -> crate::common::RegisterField<
1045        0,
1046        0x3,
1047        1,
1048        0,
1049        compsel1::Crvs10,
1050        compsel1::Crvs10,
1051        Compsel1_SPEC,
1052        crate::common::RW,
1053    > {
1054        crate::common::RegisterField::<
1055            0,
1056            0x3,
1057            1,
1058            0,
1059            compsel1::Crvs10,
1060            compsel1::Crvs10,
1061            Compsel1_SPEC,
1062            crate::common::RW,
1063        >::from_register(self, 0)
1064    }
1065}
1066impl ::core::default::Default for Compsel1 {
1067    #[inline(always)]
1068    fn default() -> Compsel1 {
1069        <crate::RegValueT<Compsel1_SPEC> as RegisterValue<_>>::new(145)
1070    }
1071}
1072pub mod compsel1 {
1073
1074    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1075    pub struct C1Vrf2_SPEC;
1076    pub type C1Vrf2 = crate::EnumBitfieldStruct<u8, C1Vrf2_SPEC>;
1077    impl C1Vrf2 {
1078        #[doc = "IVREF0 selected"]
1079        pub const _0: Self = Self::new(0);
1080
1081        #[doc = "IVREF1 selected"]
1082        pub const _1: Self = Self::new(1);
1083    }
1084    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1085    pub struct Crvs54_SPEC;
1086    pub type Crvs54 = crate::EnumBitfieldStruct<u8, Crvs54_SPEC>;
1087    impl Crvs54 {
1088        #[doc = "No reference voltage"]
1089        pub const _00: Self = Self::new(0);
1090
1091        #[doc = "CMPREF1 selected"]
1092        pub const _01: Self = Self::new(1);
1093
1094        #[doc = "DA8_1 output selected"]
1095        pub const _10: Self = Self::new(2);
1096    }
1097    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1098    pub struct Crvs10_SPEC;
1099    pub type Crvs10 = crate::EnumBitfieldStruct<u8, Crvs10_SPEC>;
1100    impl Crvs10 {
1101        #[doc = "No reference voltage"]
1102        pub const _00: Self = Self::new(0);
1103
1104        #[doc = "CMPREF0 selected"]
1105        pub const _01: Self = Self::new(1);
1106
1107        #[doc = "DA8_0 output selected"]
1108        pub const _10: Self = Self::new(2);
1109    }
1110}
ra2a1_pac/acmplp.rs

ra2a1_pac/
acmplp.rs
