ra2a1_pac/
spi0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.1, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:31 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Peripheral Interface 0"]
28unsafe impl ::core::marker::Send for super::Spi0 {}
29unsafe impl ::core::marker::Sync for super::Spi0 {}
30impl super::Spi0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "SPI Control Register"]
38    #[inline(always)]
39    pub const fn spcr(&self) -> &'static crate::common::Reg<self::Spcr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Spcr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "SPI Slave Select Polarity Register"]
48    #[inline(always)]
49    pub const fn sslp(&self) -> &'static crate::common::Reg<self::Sslp_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Sslp_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(1usize),
53            )
54        }
55    }
56
57    #[doc = "SPI Pin Control Register"]
58    #[inline(always)]
59    pub const fn sppcr(&self) -> &'static crate::common::Reg<self::Sppcr_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Sppcr_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(2usize),
63            )
64        }
65    }
66
67    #[doc = "SPI Status Register"]
68    #[inline(always)]
69    pub const fn spsr(&self) -> &'static crate::common::Reg<self::Spsr_SPEC, crate::common::RW> {
70        unsafe {
71            crate::common::Reg::<self::Spsr_SPEC, crate::common::RW>::from_ptr(
72                self._svd2pac_as_ptr().add(3usize),
73            )
74        }
75    }
76
77    #[doc = "SPI Data Register"]
78    #[inline(always)]
79    pub const fn spdr(&self) -> &'static crate::common::Reg<self::Spdr_SPEC, crate::common::RW> {
80        unsafe {
81            crate::common::Reg::<self::Spdr_SPEC, crate::common::RW>::from_ptr(
82                self._svd2pac_as_ptr().add(4usize),
83            )
84        }
85    }
86
87    #[doc = "SPI Data Register ( halfword access )"]
88    #[inline(always)]
89    pub const fn spdr_ha(
90        &self,
91    ) -> &'static crate::common::Reg<self::SpdrHa_SPEC, crate::common::RW> {
92        unsafe {
93            crate::common::Reg::<self::SpdrHa_SPEC, crate::common::RW>::from_ptr(
94                self._svd2pac_as_ptr().add(4usize),
95            )
96        }
97    }
98
99    #[doc = "SPI Bit Rate Register"]
100    #[inline(always)]
101    pub const fn spbr(&self) -> &'static crate::common::Reg<self::Spbr_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Spbr_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(10usize),
105            )
106        }
107    }
108
109    #[doc = "SPI Data Control Register"]
110    #[inline(always)]
111    pub const fn spdcr(&self) -> &'static crate::common::Reg<self::Spdcr_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Spdcr_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(11usize),
115            )
116        }
117    }
118
119    #[doc = "SPI Clock Delay Register"]
120    #[inline(always)]
121    pub const fn spckd(&self) -> &'static crate::common::Reg<self::Spckd_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Spckd_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(12usize),
125            )
126        }
127    }
128
129    #[doc = "SPI Slave Select Negation Delay Register"]
130    #[inline(always)]
131    pub const fn sslnd(&self) -> &'static crate::common::Reg<self::Sslnd_SPEC, crate::common::RW> {
132        unsafe {
133            crate::common::Reg::<self::Sslnd_SPEC, crate::common::RW>::from_ptr(
134                self._svd2pac_as_ptr().add(13usize),
135            )
136        }
137    }
138
139    #[doc = "SPI Next-Access Delay Register"]
140    #[inline(always)]
141    pub const fn spnd(&self) -> &'static crate::common::Reg<self::Spnd_SPEC, crate::common::RW> {
142        unsafe {
143            crate::common::Reg::<self::Spnd_SPEC, crate::common::RW>::from_ptr(
144                self._svd2pac_as_ptr().add(14usize),
145            )
146        }
147    }
148
149    #[doc = "SPI Control Register 2"]
150    #[inline(always)]
151    pub const fn spcr2(&self) -> &'static crate::common::Reg<self::Spcr2_SPEC, crate::common::RW> {
152        unsafe {
153            crate::common::Reg::<self::Spcr2_SPEC, crate::common::RW>::from_ptr(
154                self._svd2pac_as_ptr().add(15usize),
155            )
156        }
157    }
158
159    #[doc = "SPI Command Register 0"]
160    #[inline(always)]
161    pub const fn spcmd0(
162        &self,
163    ) -> &'static crate::common::Reg<self::Spcmd0_SPEC, crate::common::RW> {
164        unsafe {
165            crate::common::Reg::<self::Spcmd0_SPEC, crate::common::RW>::from_ptr(
166                self._svd2pac_as_ptr().add(16usize),
167            )
168        }
169    }
170}
171#[doc(hidden)]
172#[derive(Copy, Clone, Eq, PartialEq)]
173pub struct Spcr_SPEC;
174impl crate::sealed::RegSpec for Spcr_SPEC {
175    type DataType = u8;
176}
177
178#[doc = "SPI Control Register"]
179pub type Spcr = crate::RegValueT<Spcr_SPEC>;
180
181impl Spcr {
182    #[doc = "SPI Receive Buffer Full Interrupt Enable"]
183    #[inline(always)]
184    pub fn sprie(
185        self,
186    ) -> crate::common::RegisterField<
187        7,
188        0x1,
189        1,
190        0,
191        spcr::Sprie,
192        spcr::Sprie,
193        Spcr_SPEC,
194        crate::common::RW,
195    > {
196        crate::common::RegisterField::<
197            7,
198            0x1,
199            1,
200            0,
201            spcr::Sprie,
202            spcr::Sprie,
203            Spcr_SPEC,
204            crate::common::RW,
205        >::from_register(self, 0)
206    }
207
208    #[doc = "SPI Function Enable"]
209    #[inline(always)]
210    pub fn spe(
211        self,
212    ) -> crate::common::RegisterField<
213        6,
214        0x1,
215        1,
216        0,
217        spcr::Spe,
218        spcr::Spe,
219        Spcr_SPEC,
220        crate::common::RW,
221    > {
222        crate::common::RegisterField::<
223            6,
224            0x1,
225            1,
226            0,
227            spcr::Spe,
228            spcr::Spe,
229            Spcr_SPEC,
230            crate::common::RW,
231        >::from_register(self, 0)
232    }
233
234    #[doc = "Transmit Buffer Empty Interrupt Enable"]
235    #[inline(always)]
236    pub fn sptie(
237        self,
238    ) -> crate::common::RegisterField<
239        5,
240        0x1,
241        1,
242        0,
243        spcr::Sptie,
244        spcr::Sptie,
245        Spcr_SPEC,
246        crate::common::RW,
247    > {
248        crate::common::RegisterField::<
249            5,
250            0x1,
251            1,
252            0,
253            spcr::Sptie,
254            spcr::Sptie,
255            Spcr_SPEC,
256            crate::common::RW,
257        >::from_register(self, 0)
258    }
259
260    #[doc = "SPI Error Interrupt Enable"]
261    #[inline(always)]
262    pub fn speie(
263        self,
264    ) -> crate::common::RegisterField<
265        4,
266        0x1,
267        1,
268        0,
269        spcr::Speie,
270        spcr::Speie,
271        Spcr_SPEC,
272        crate::common::RW,
273    > {
274        crate::common::RegisterField::<
275            4,
276            0x1,
277            1,
278            0,
279            spcr::Speie,
280            spcr::Speie,
281            Spcr_SPEC,
282            crate::common::RW,
283        >::from_register(self, 0)
284    }
285
286    #[doc = "SPI Master/Slave Mode Select"]
287    #[inline(always)]
288    pub fn mstr(
289        self,
290    ) -> crate::common::RegisterField<
291        3,
292        0x1,
293        1,
294        0,
295        spcr::Mstr,
296        spcr::Mstr,
297        Spcr_SPEC,
298        crate::common::RW,
299    > {
300        crate::common::RegisterField::<
301            3,
302            0x1,
303            1,
304            0,
305            spcr::Mstr,
306            spcr::Mstr,
307            Spcr_SPEC,
308            crate::common::RW,
309        >::from_register(self, 0)
310    }
311
312    #[doc = "Mode Fault Error Detection Enable"]
313    #[inline(always)]
314    pub fn modfen(
315        self,
316    ) -> crate::common::RegisterField<
317        2,
318        0x1,
319        1,
320        0,
321        spcr::Modfen,
322        spcr::Modfen,
323        Spcr_SPEC,
324        crate::common::RW,
325    > {
326        crate::common::RegisterField::<
327            2,
328            0x1,
329            1,
330            0,
331            spcr::Modfen,
332            spcr::Modfen,
333            Spcr_SPEC,
334            crate::common::RW,
335        >::from_register(self, 0)
336    }
337
338    #[doc = "Communications Operating Mode Select"]
339    #[inline(always)]
340    pub fn txmd(
341        self,
342    ) -> crate::common::RegisterField<
343        1,
344        0x1,
345        1,
346        0,
347        spcr::Txmd,
348        spcr::Txmd,
349        Spcr_SPEC,
350        crate::common::RW,
351    > {
352        crate::common::RegisterField::<
353            1,
354            0x1,
355            1,
356            0,
357            spcr::Txmd,
358            spcr::Txmd,
359            Spcr_SPEC,
360            crate::common::RW,
361        >::from_register(self, 0)
362    }
363
364    #[doc = "SPI Mode Select"]
365    #[inline(always)]
366    pub fn spms(
367        self,
368    ) -> crate::common::RegisterField<
369        0,
370        0x1,
371        1,
372        0,
373        spcr::Spms,
374        spcr::Spms,
375        Spcr_SPEC,
376        crate::common::RW,
377    > {
378        crate::common::RegisterField::<
379            0,
380            0x1,
381            1,
382            0,
383            spcr::Spms,
384            spcr::Spms,
385            Spcr_SPEC,
386            crate::common::RW,
387        >::from_register(self, 0)
388    }
389}
390impl ::core::default::Default for Spcr {
391    #[inline(always)]
392    fn default() -> Spcr {
393        <crate::RegValueT<Spcr_SPEC> as RegisterValue<_>>::new(0)
394    }
395}
396pub mod spcr {
397
398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
399    pub struct Sprie_SPEC;
400    pub type Sprie = crate::EnumBitfieldStruct<u8, Sprie_SPEC>;
401    impl Sprie {
402        #[doc = "Disables the generation of SPI receive buffer full interrupt requests"]
403        pub const _0: Self = Self::new(0);
404
405        #[doc = "Enables the generation of SPI receive buffer full interrupt requests"]
406        pub const _1: Self = Self::new(1);
407    }
408    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
409    pub struct Spe_SPEC;
410    pub type Spe = crate::EnumBitfieldStruct<u8, Spe_SPEC>;
411    impl Spe {
412        #[doc = "Disables the SPI function"]
413        pub const _0: Self = Self::new(0);
414
415        #[doc = "Enables the SPI function"]
416        pub const _1: Self = Self::new(1);
417    }
418    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
419    pub struct Sptie_SPEC;
420    pub type Sptie = crate::EnumBitfieldStruct<u8, Sptie_SPEC>;
421    impl Sptie {
422        #[doc = "Disables the generation of transmit buffer empty interrupt requests"]
423        pub const _0: Self = Self::new(0);
424
425        #[doc = "Enables the generation of transmit buffer empty interrupt requests"]
426        pub const _1: Self = Self::new(1);
427    }
428    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
429    pub struct Speie_SPEC;
430    pub type Speie = crate::EnumBitfieldStruct<u8, Speie_SPEC>;
431    impl Speie {
432        #[doc = "Disables the generation of SPI error interrupt requests"]
433        pub const _0: Self = Self::new(0);
434
435        #[doc = "Enables the generation of SPI error interrupt requests"]
436        pub const _1: Self = Self::new(1);
437    }
438    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
439    pub struct Mstr_SPEC;
440    pub type Mstr = crate::EnumBitfieldStruct<u8, Mstr_SPEC>;
441    impl Mstr {
442        #[doc = "Slave mode"]
443        pub const _0: Self = Self::new(0);
444
445        #[doc = "Master mode"]
446        pub const _1: Self = Self::new(1);
447    }
448    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
449    pub struct Modfen_SPEC;
450    pub type Modfen = crate::EnumBitfieldStruct<u8, Modfen_SPEC>;
451    impl Modfen {
452        #[doc = "Disables the detection of mode fault error"]
453        pub const _0: Self = Self::new(0);
454
455        #[doc = "Enables the detection of mode fault error"]
456        pub const _1: Self = Self::new(1);
457    }
458    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
459    pub struct Txmd_SPEC;
460    pub type Txmd = crate::EnumBitfieldStruct<u8, Txmd_SPEC>;
461    impl Txmd {
462        #[doc = "Full-duplex synchronous serial communications"]
463        pub const _0: Self = Self::new(0);
464
465        #[doc = "Serial communications consisting of only transmit operations"]
466        pub const _1: Self = Self::new(1);
467    }
468    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
469    pub struct Spms_SPEC;
470    pub type Spms = crate::EnumBitfieldStruct<u8, Spms_SPEC>;
471    impl Spms {
472        #[doc = "SPI operation (4-wire method)"]
473        pub const _0: Self = Self::new(0);
474
475        #[doc = "Clock synchronous operation (3-wire method)"]
476        pub const _1: Self = Self::new(1);
477    }
478}
479#[doc(hidden)]
480#[derive(Copy, Clone, Eq, PartialEq)]
481pub struct Sslp_SPEC;
482impl crate::sealed::RegSpec for Sslp_SPEC {
483    type DataType = u8;
484}
485
486#[doc = "SPI Slave Select Polarity Register"]
487pub type Sslp = crate::RegValueT<Sslp_SPEC>;
488
489impl Sslp {
490    #[doc = "These bits are read as 0000. The write value should be 0000."]
491    #[inline(always)]
492    pub fn reserved(
493        self,
494    ) -> crate::common::RegisterField<4, 0xf, 1, 0, u8, u8, Sslp_SPEC, crate::common::RW> {
495        crate::common::RegisterField::<4,0xf,1,0,u8,u8,Sslp_SPEC,crate::common::RW>::from_register(self,0)
496    }
497
498    #[doc = "SSL3 Signal Polarity Setting"]
499    #[inline(always)]
500    pub fn ssl3p(
501        self,
502    ) -> crate::common::RegisterField<
503        3,
504        0x1,
505        1,
506        0,
507        sslp::Ssl3P,
508        sslp::Ssl3P,
509        Sslp_SPEC,
510        crate::common::RW,
511    > {
512        crate::common::RegisterField::<
513            3,
514            0x1,
515            1,
516            0,
517            sslp::Ssl3P,
518            sslp::Ssl3P,
519            Sslp_SPEC,
520            crate::common::RW,
521        >::from_register(self, 0)
522    }
523
524    #[doc = "SSL2 Signal Polarity Setting"]
525    #[inline(always)]
526    pub fn ssl2p(
527        self,
528    ) -> crate::common::RegisterField<
529        2,
530        0x1,
531        1,
532        0,
533        sslp::Ssl2P,
534        sslp::Ssl2P,
535        Sslp_SPEC,
536        crate::common::RW,
537    > {
538        crate::common::RegisterField::<
539            2,
540            0x1,
541            1,
542            0,
543            sslp::Ssl2P,
544            sslp::Ssl2P,
545            Sslp_SPEC,
546            crate::common::RW,
547        >::from_register(self, 0)
548    }
549
550    #[doc = "SSL1 Signal Polarity Setting"]
551    #[inline(always)]
552    pub fn ssl1p(
553        self,
554    ) -> crate::common::RegisterField<
555        1,
556        0x1,
557        1,
558        0,
559        sslp::Ssl1P,
560        sslp::Ssl1P,
561        Sslp_SPEC,
562        crate::common::RW,
563    > {
564        crate::common::RegisterField::<
565            1,
566            0x1,
567            1,
568            0,
569            sslp::Ssl1P,
570            sslp::Ssl1P,
571            Sslp_SPEC,
572            crate::common::RW,
573        >::from_register(self, 0)
574    }
575
576    #[doc = "SSL0 Signal Polarity Setting"]
577    #[inline(always)]
578    pub fn ssl0p(
579        self,
580    ) -> crate::common::RegisterField<
581        0,
582        0x1,
583        1,
584        0,
585        sslp::Ssl0P,
586        sslp::Ssl0P,
587        Sslp_SPEC,
588        crate::common::RW,
589    > {
590        crate::common::RegisterField::<
591            0,
592            0x1,
593            1,
594            0,
595            sslp::Ssl0P,
596            sslp::Ssl0P,
597            Sslp_SPEC,
598            crate::common::RW,
599        >::from_register(self, 0)
600    }
601}
602impl ::core::default::Default for Sslp {
603    #[inline(always)]
604    fn default() -> Sslp {
605        <crate::RegValueT<Sslp_SPEC> as RegisterValue<_>>::new(0)
606    }
607}
608pub mod sslp {
609
610    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
611    pub struct Ssl3P_SPEC;
612    pub type Ssl3P = crate::EnumBitfieldStruct<u8, Ssl3P_SPEC>;
613    impl Ssl3P {
614        #[doc = "SSL3 signal is active low"]
615        pub const _0: Self = Self::new(0);
616
617        #[doc = "SSL3 signal is active high"]
618        pub const _1: Self = Self::new(1);
619    }
620    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
621    pub struct Ssl2P_SPEC;
622    pub type Ssl2P = crate::EnumBitfieldStruct<u8, Ssl2P_SPEC>;
623    impl Ssl2P {
624        #[doc = "SSL2 signal is active low"]
625        pub const _0: Self = Self::new(0);
626
627        #[doc = "SSL2 signal is active high"]
628        pub const _1: Self = Self::new(1);
629    }
630    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
631    pub struct Ssl1P_SPEC;
632    pub type Ssl1P = crate::EnumBitfieldStruct<u8, Ssl1P_SPEC>;
633    impl Ssl1P {
634        #[doc = "SSL1 signal is active low"]
635        pub const _0: Self = Self::new(0);
636
637        #[doc = "SSL1 signal is active high"]
638        pub const _1: Self = Self::new(1);
639    }
640    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
641    pub struct Ssl0P_SPEC;
642    pub type Ssl0P = crate::EnumBitfieldStruct<u8, Ssl0P_SPEC>;
643    impl Ssl0P {
644        #[doc = "SSL0 signal is active low"]
645        pub const _0: Self = Self::new(0);
646
647        #[doc = "SSL0 signal is active high"]
648        pub const _1: Self = Self::new(1);
649    }
650}
651#[doc(hidden)]
652#[derive(Copy, Clone, Eq, PartialEq)]
653pub struct Sppcr_SPEC;
654impl crate::sealed::RegSpec for Sppcr_SPEC {
655    type DataType = u8;
656}
657
658#[doc = "SPI Pin Control Register"]
659pub type Sppcr = crate::RegValueT<Sppcr_SPEC>;
660
661impl Sppcr {
662    #[doc = "MOSI Idle Value Fixing Enable"]
663    #[inline(always)]
664    pub fn moife(
665        self,
666    ) -> crate::common::RegisterField<
667        5,
668        0x1,
669        1,
670        0,
671        sppcr::Moife,
672        sppcr::Moife,
673        Sppcr_SPEC,
674        crate::common::RW,
675    > {
676        crate::common::RegisterField::<
677            5,
678            0x1,
679            1,
680            0,
681            sppcr::Moife,
682            sppcr::Moife,
683            Sppcr_SPEC,
684            crate::common::RW,
685        >::from_register(self, 0)
686    }
687
688    #[doc = "MOSI Idle Fixed Value"]
689    #[inline(always)]
690    pub fn moifv(
691        self,
692    ) -> crate::common::RegisterField<
693        4,
694        0x1,
695        1,
696        0,
697        sppcr::Moifv,
698        sppcr::Moifv,
699        Sppcr_SPEC,
700        crate::common::RW,
701    > {
702        crate::common::RegisterField::<
703            4,
704            0x1,
705            1,
706            0,
707            sppcr::Moifv,
708            sppcr::Moifv,
709            Sppcr_SPEC,
710            crate::common::RW,
711        >::from_register(self, 0)
712    }
713
714    #[doc = "These bits are read as 00. The write value should be 00."]
715    #[inline(always)]
716    pub fn reserved(
717        self,
718    ) -> crate::common::RegisterField<2, 0x3, 1, 0, u8, u8, Sppcr_SPEC, crate::common::RW> {
719        crate::common::RegisterField::<2,0x3,1,0,u8,u8,Sppcr_SPEC,crate::common::RW>::from_register(self,0)
720    }
721
722    #[doc = "SPI Loopback 2"]
723    #[inline(always)]
724    pub fn splp2(
725        self,
726    ) -> crate::common::RegisterField<
727        1,
728        0x1,
729        1,
730        0,
731        sppcr::Splp2,
732        sppcr::Splp2,
733        Sppcr_SPEC,
734        crate::common::RW,
735    > {
736        crate::common::RegisterField::<
737            1,
738            0x1,
739            1,
740            0,
741            sppcr::Splp2,
742            sppcr::Splp2,
743            Sppcr_SPEC,
744            crate::common::RW,
745        >::from_register(self, 0)
746    }
747
748    #[doc = "SPI Loopback"]
749    #[inline(always)]
750    pub fn splp(
751        self,
752    ) -> crate::common::RegisterField<
753        0,
754        0x1,
755        1,
756        0,
757        sppcr::Splp,
758        sppcr::Splp,
759        Sppcr_SPEC,
760        crate::common::RW,
761    > {
762        crate::common::RegisterField::<
763            0,
764            0x1,
765            1,
766            0,
767            sppcr::Splp,
768            sppcr::Splp,
769            Sppcr_SPEC,
770            crate::common::RW,
771        >::from_register(self, 0)
772    }
773}
774impl ::core::default::Default for Sppcr {
775    #[inline(always)]
776    fn default() -> Sppcr {
777        <crate::RegValueT<Sppcr_SPEC> as RegisterValue<_>>::new(0)
778    }
779}
780pub mod sppcr {
781
782    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
783    pub struct Moife_SPEC;
784    pub type Moife = crate::EnumBitfieldStruct<u8, Moife_SPEC>;
785    impl Moife {
786        #[doc = "MOSI output value equals final data from previous transfer"]
787        pub const _0: Self = Self::new(0);
788
789        #[doc = "MOSI output value equals the value set in the MOIFV bit"]
790        pub const _1: Self = Self::new(1);
791    }
792    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
793    pub struct Moifv_SPEC;
794    pub type Moifv = crate::EnumBitfieldStruct<u8, Moifv_SPEC>;
795    impl Moifv {
796        #[doc = "The level output on the MOSIn pin during MOSI idling corresponds to low."]
797        pub const _0: Self = Self::new(0);
798
799        #[doc = "The level output on the MOSIn pin during MOSI idling corresponds to high."]
800        pub const _1: Self = Self::new(1);
801    }
802    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
803    pub struct Splp2_SPEC;
804    pub type Splp2 = crate::EnumBitfieldStruct<u8, Splp2_SPEC>;
805    impl Splp2 {
806        #[doc = "Normal mode"]
807        pub const _0: Self = Self::new(0);
808
809        #[doc = "Loopback mode (data is not inverted for transmission)"]
810        pub const _1: Self = Self::new(1);
811    }
812    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
813    pub struct Splp_SPEC;
814    pub type Splp = crate::EnumBitfieldStruct<u8, Splp_SPEC>;
815    impl Splp {
816        #[doc = "Normal mode"]
817        pub const _0: Self = Self::new(0);
818
819        #[doc = "Loopback mode (data is inverted for transmission)"]
820        pub const _1: Self = Self::new(1);
821    }
822}
823#[doc(hidden)]
824#[derive(Copy, Clone, Eq, PartialEq)]
825pub struct Spsr_SPEC;
826impl crate::sealed::RegSpec for Spsr_SPEC {
827    type DataType = u8;
828}
829
830#[doc = "SPI Status Register"]
831pub type Spsr = crate::RegValueT<Spsr_SPEC>;
832
833impl Spsr {
834    #[doc = "SPI Receive Buffer Full Flag"]
835    #[inline(always)]
836    pub fn sprf(
837        self,
838    ) -> crate::common::RegisterField<
839        7,
840        0x1,
841        1,
842        0,
843        spsr::Sprf,
844        spsr::Sprf,
845        Spsr_SPEC,
846        crate::common::RW,
847    > {
848        crate::common::RegisterField::<
849            7,
850            0x1,
851            1,
852            0,
853            spsr::Sprf,
854            spsr::Sprf,
855            Spsr_SPEC,
856            crate::common::RW,
857        >::from_register(self, 0)
858    }
859
860    #[doc = "This bit is read as 0. The write value should be 0."]
861    #[inline(always)]
862    pub fn reserved(
863        self,
864    ) -> crate::common::RegisterFieldBool<6, 1, 0, Spsr_SPEC, crate::common::RW> {
865        crate::common::RegisterFieldBool::<6, 1, 0, Spsr_SPEC, crate::common::RW>::from_register(
866            self, 0,
867        )
868    }
869
870    #[doc = "SPI Transmit Buffer Empty Flag"]
871    #[inline(always)]
872    pub fn sptef(
873        self,
874    ) -> crate::common::RegisterField<
875        5,
876        0x1,
877        1,
878        0,
879        spsr::Sptef,
880        spsr::Sptef,
881        Spsr_SPEC,
882        crate::common::RW,
883    > {
884        crate::common::RegisterField::<
885            5,
886            0x1,
887            1,
888            0,
889            spsr::Sptef,
890            spsr::Sptef,
891            Spsr_SPEC,
892            crate::common::RW,
893        >::from_register(self, 0)
894    }
895
896    #[doc = "Underrun Error Flag(When MODF is 0,  This bit is invalid.)"]
897    #[inline(always)]
898    pub fn udrf(
899        self,
900    ) -> crate::common::RegisterField<
901        4,
902        0x1,
903        1,
904        0,
905        spsr::Udrf,
906        spsr::Udrf,
907        Spsr_SPEC,
908        crate::common::RW,
909    > {
910        crate::common::RegisterField::<
911            4,
912            0x1,
913            1,
914            0,
915            spsr::Udrf,
916            spsr::Udrf,
917            Spsr_SPEC,
918            crate::common::RW,
919        >::from_register(self, 0)
920    }
921
922    #[doc = "Parity Error Flag"]
923    #[inline(always)]
924    pub fn perf(
925        self,
926    ) -> crate::common::RegisterField<
927        3,
928        0x1,
929        1,
930        0,
931        spsr::Perf,
932        spsr::Perf,
933        Spsr_SPEC,
934        crate::common::RW,
935    > {
936        crate::common::RegisterField::<
937            3,
938            0x1,
939            1,
940            0,
941            spsr::Perf,
942            spsr::Perf,
943            Spsr_SPEC,
944            crate::common::RW,
945        >::from_register(self, 0)
946    }
947
948    #[doc = "Mode Fault Error Flag"]
949    #[inline(always)]
950    pub fn modf(
951        self,
952    ) -> crate::common::RegisterField<
953        2,
954        0x1,
955        1,
956        0,
957        spsr::Modf,
958        spsr::Modf,
959        Spsr_SPEC,
960        crate::common::RW,
961    > {
962        crate::common::RegisterField::<
963            2,
964            0x1,
965            1,
966            0,
967            spsr::Modf,
968            spsr::Modf,
969            Spsr_SPEC,
970            crate::common::RW,
971        >::from_register(self, 0)
972    }
973
974    #[doc = "SPI Idle Flag"]
975    #[inline(always)]
976    pub fn idlnf(
977        self,
978    ) -> crate::common::RegisterField<
979        1,
980        0x1,
981        1,
982        0,
983        spsr::Idlnf,
984        spsr::Idlnf,
985        Spsr_SPEC,
986        crate::common::R,
987    > {
988        crate::common::RegisterField::<
989            1,
990            0x1,
991            1,
992            0,
993            spsr::Idlnf,
994            spsr::Idlnf,
995            Spsr_SPEC,
996            crate::common::R,
997        >::from_register(self, 0)
998    }
999
1000    #[doc = "Overrun Error Flag"]
1001    #[inline(always)]
1002    pub fn ovrf(
1003        self,
1004    ) -> crate::common::RegisterField<
1005        0,
1006        0x1,
1007        1,
1008        0,
1009        spsr::Ovrf,
1010        spsr::Ovrf,
1011        Spsr_SPEC,
1012        crate::common::RW,
1013    > {
1014        crate::common::RegisterField::<
1015            0,
1016            0x1,
1017            1,
1018            0,
1019            spsr::Ovrf,
1020            spsr::Ovrf,
1021            Spsr_SPEC,
1022            crate::common::RW,
1023        >::from_register(self, 0)
1024    }
1025}
1026impl ::core::default::Default for Spsr {
1027    #[inline(always)]
1028    fn default() -> Spsr {
1029        <crate::RegValueT<Spsr_SPEC> as RegisterValue<_>>::new(32)
1030    }
1031}
1032pub mod spsr {
1033
1034    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1035    pub struct Sprf_SPEC;
1036    pub type Sprf = crate::EnumBitfieldStruct<u8, Sprf_SPEC>;
1037    impl Sprf {
1038        #[doc = "No valid data in SPDR"]
1039        pub const _0: Self = Self::new(0);
1040
1041        #[doc = "Valid data found in SPDR"]
1042        pub const _1: Self = Self::new(1);
1043    }
1044    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1045    pub struct Sptef_SPEC;
1046    pub type Sptef = crate::EnumBitfieldStruct<u8, Sptef_SPEC>;
1047    impl Sptef {
1048        #[doc = "Data found in the transmit buffer"]
1049        pub const _0: Self = Self::new(0);
1050
1051        #[doc = "No data in the transmit buffer"]
1052        pub const _1: Self = Self::new(1);
1053    }
1054    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1055    pub struct Udrf_SPEC;
1056    pub type Udrf = crate::EnumBitfieldStruct<u8, Udrf_SPEC>;
1057    impl Udrf {
1058        #[doc = "A mode fault error occurs (MODF=1)"]
1059        pub const _0: Self = Self::new(0);
1060
1061        #[doc = "An underrun error occurs (MODF=1)"]
1062        pub const _1: Self = Self::new(1);
1063    }
1064    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1065    pub struct Perf_SPEC;
1066    pub type Perf = crate::EnumBitfieldStruct<u8, Perf_SPEC>;
1067    impl Perf {
1068        #[doc = "No parity error occurs"]
1069        pub const _0: Self = Self::new(0);
1070
1071        #[doc = "A parity error occurs"]
1072        pub const _1: Self = Self::new(1);
1073    }
1074    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1075    pub struct Modf_SPEC;
1076    pub type Modf = crate::EnumBitfieldStruct<u8, Modf_SPEC>;
1077    impl Modf {
1078        #[doc = "Neither mode fault error nor underrun error occurs"]
1079        pub const _0: Self = Self::new(0);
1080
1081        #[doc = "A mode fault error or an underrun error occurs."]
1082        pub const _1: Self = Self::new(1);
1083    }
1084    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1085    pub struct Idlnf_SPEC;
1086    pub type Idlnf = crate::EnumBitfieldStruct<u8, Idlnf_SPEC>;
1087    impl Idlnf {
1088        #[doc = "SPI is in the idle state"]
1089        pub const _0: Self = Self::new(0);
1090
1091        #[doc = "SPI is in the transfer state"]
1092        pub const _1: Self = Self::new(1);
1093    }
1094    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1095    pub struct Ovrf_SPEC;
1096    pub type Ovrf = crate::EnumBitfieldStruct<u8, Ovrf_SPEC>;
1097    impl Ovrf {
1098        #[doc = "No overrun error occurs"]
1099        pub const _0: Self = Self::new(0);
1100
1101        #[doc = "An overrun error occurs"]
1102        pub const _1: Self = Self::new(1);
1103    }
1104}
1105#[doc(hidden)]
1106#[derive(Copy, Clone, Eq, PartialEq)]
1107pub struct Spdr_SPEC;
1108impl crate::sealed::RegSpec for Spdr_SPEC {
1109    type DataType = u32;
1110}
1111
1112#[doc = "SPI Data Register"]
1113pub type Spdr = crate::RegValueT<Spdr_SPEC>;
1114
1115impl Spdr {
1116    #[doc = "SPDR is the interface with the buffers that hold data for transmission and reception by the RSPI.When accessing in word (SPDCR.SPLW=1), access SPDR."]
1117    #[inline(always)]
1118    pub fn spdr(
1119        self,
1120    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Spdr_SPEC, crate::common::RW>
1121    {
1122        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Spdr_SPEC,crate::common::RW>::from_register(self,0)
1123    }
1124}
1125impl ::core::default::Default for Spdr {
1126    #[inline(always)]
1127    fn default() -> Spdr {
1128        <crate::RegValueT<Spdr_SPEC> as RegisterValue<_>>::new(0)
1129    }
1130}
1131
1132#[doc(hidden)]
1133#[derive(Copy, Clone, Eq, PartialEq)]
1134pub struct SpdrHa_SPEC;
1135impl crate::sealed::RegSpec for SpdrHa_SPEC {
1136    type DataType = u16;
1137}
1138
1139#[doc = "SPI Data Register ( halfword access )"]
1140pub type SpdrHa = crate::RegValueT<SpdrHa_SPEC>;
1141
1142impl SpdrHa {
1143    #[doc = "SPDR is the interface with the buffers that hold data for transmission and reception by the SPI.When accessing in halfword (SPDCR.SPLW=0), access SPDR_HA."]
1144    #[inline(always)]
1145    pub fn spdr_ha(
1146        self,
1147    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, SpdrHa_SPEC, crate::common::RW>
1148    {
1149        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,SpdrHa_SPEC,crate::common::RW>::from_register(self,0)
1150    }
1151}
1152impl ::core::default::Default for SpdrHa {
1153    #[inline(always)]
1154    fn default() -> SpdrHa {
1155        <crate::RegValueT<SpdrHa_SPEC> as RegisterValue<_>>::new(0)
1156    }
1157}
1158
1159#[doc(hidden)]
1160#[derive(Copy, Clone, Eq, PartialEq)]
1161pub struct Spbr_SPEC;
1162impl crate::sealed::RegSpec for Spbr_SPEC {
1163    type DataType = u8;
1164}
1165
1166#[doc = "SPI Bit Rate Register"]
1167pub type Spbr = crate::RegValueT<Spbr_SPEC>;
1168
1169impl Spbr {
1170    #[doc = "SPBR sets the bit rate in master mode."]
1171    #[inline(always)]
1172    pub fn spr(
1173        self,
1174    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Spbr_SPEC, crate::common::RW> {
1175        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Spbr_SPEC,crate::common::RW>::from_register(self,0)
1176    }
1177}
1178impl ::core::default::Default for Spbr {
1179    #[inline(always)]
1180    fn default() -> Spbr {
1181        <crate::RegValueT<Spbr_SPEC> as RegisterValue<_>>::new(255)
1182    }
1183}
1184
1185#[doc(hidden)]
1186#[derive(Copy, Clone, Eq, PartialEq)]
1187pub struct Spdcr_SPEC;
1188impl crate::sealed::RegSpec for Spdcr_SPEC {
1189    type DataType = u8;
1190}
1191
1192#[doc = "SPI Data Control Register"]
1193pub type Spdcr = crate::RegValueT<Spdcr_SPEC>;
1194
1195impl Spdcr {
1196    #[doc = "SPI Word Access/Halfword Access Specification"]
1197    #[inline(always)]
1198    pub fn splw(
1199        self,
1200    ) -> crate::common::RegisterField<
1201        5,
1202        0x1,
1203        1,
1204        0,
1205        spdcr::Splw,
1206        spdcr::Splw,
1207        Spdcr_SPEC,
1208        crate::common::RW,
1209    > {
1210        crate::common::RegisterField::<
1211            5,
1212            0x1,
1213            1,
1214            0,
1215            spdcr::Splw,
1216            spdcr::Splw,
1217            Spdcr_SPEC,
1218            crate::common::RW,
1219        >::from_register(self, 0)
1220    }
1221
1222    #[doc = "SPI Receive/Transmit Data Selection"]
1223    #[inline(always)]
1224    pub fn sprdtd(
1225        self,
1226    ) -> crate::common::RegisterField<
1227        4,
1228        0x1,
1229        1,
1230        0,
1231        spdcr::Sprdtd,
1232        spdcr::Sprdtd,
1233        Spdcr_SPEC,
1234        crate::common::RW,
1235    > {
1236        crate::common::RegisterField::<
1237            4,
1238            0x1,
1239            1,
1240            0,
1241            spdcr::Sprdtd,
1242            spdcr::Sprdtd,
1243            Spdcr_SPEC,
1244            crate::common::RW,
1245        >::from_register(self, 0)
1246    }
1247
1248    #[doc = "These bits are read as 0000. The write value should be 0000."]
1249    #[inline(always)]
1250    pub fn reserved(
1251        self,
1252    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Spdcr_SPEC, crate::common::RW> {
1253        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Spdcr_SPEC,crate::common::RW>::from_register(self,0)
1254    }
1255}
1256impl ::core::default::Default for Spdcr {
1257    #[inline(always)]
1258    fn default() -> Spdcr {
1259        <crate::RegValueT<Spdcr_SPEC> as RegisterValue<_>>::new(0)
1260    }
1261}
1262pub mod spdcr {
1263
1264    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1265    pub struct Splw_SPEC;
1266    pub type Splw = crate::EnumBitfieldStruct<u8, Splw_SPEC>;
1267    impl Splw {
1268        #[doc = "Set SPDR_HA to valid for halfword access"]
1269        pub const _0: Self = Self::new(0);
1270
1271        #[doc = "Set SPDR to valid for word access."]
1272        pub const _1: Self = Self::new(1);
1273    }
1274    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1275    pub struct Sprdtd_SPEC;
1276    pub type Sprdtd = crate::EnumBitfieldStruct<u8, Sprdtd_SPEC>;
1277    impl Sprdtd {
1278        #[doc = "SPDR values are read from the receive buffer"]
1279        pub const _0: Self = Self::new(0);
1280
1281        #[doc = "SPDR values are read from the transmit buffer (but only if the transmit buffer is empty)"]
1282        pub const _1: Self = Self::new(1);
1283    }
1284}
1285#[doc(hidden)]
1286#[derive(Copy, Clone, Eq, PartialEq)]
1287pub struct Spckd_SPEC;
1288impl crate::sealed::RegSpec for Spckd_SPEC {
1289    type DataType = u8;
1290}
1291
1292#[doc = "SPI Clock Delay Register"]
1293pub type Spckd = crate::RegValueT<Spckd_SPEC>;
1294
1295impl Spckd {
1296    #[doc = "These bits are read as 00000. The write value should be 00000."]
1297    #[inline(always)]
1298    pub fn reserved(
1299        self,
1300    ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Spckd_SPEC, crate::common::RW> {
1301        crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Spckd_SPEC,crate::common::RW>::from_register(self,0)
1302    }
1303
1304    #[doc = "RSPCK Delay Setting"]
1305    #[inline(always)]
1306    pub fn sckdl(
1307        self,
1308    ) -> crate::common::RegisterField<
1309        0,
1310        0x7,
1311        1,
1312        0,
1313        spckd::Sckdl,
1314        spckd::Sckdl,
1315        Spckd_SPEC,
1316        crate::common::RW,
1317    > {
1318        crate::common::RegisterField::<
1319            0,
1320            0x7,
1321            1,
1322            0,
1323            spckd::Sckdl,
1324            spckd::Sckdl,
1325            Spckd_SPEC,
1326            crate::common::RW,
1327        >::from_register(self, 0)
1328    }
1329}
1330impl ::core::default::Default for Spckd {
1331    #[inline(always)]
1332    fn default() -> Spckd {
1333        <crate::RegValueT<Spckd_SPEC> as RegisterValue<_>>::new(0)
1334    }
1335}
1336pub mod spckd {
1337
1338    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1339    pub struct Sckdl_SPEC;
1340    pub type Sckdl = crate::EnumBitfieldStruct<u8, Sckdl_SPEC>;
1341    impl Sckdl {
1342        #[doc = "1 RSPCK"]
1343        pub const _000: Self = Self::new(0);
1344
1345        #[doc = "2 RSPCK"]
1346        pub const _001: Self = Self::new(1);
1347
1348        #[doc = "3 RSPCK"]
1349        pub const _010: Self = Self::new(2);
1350
1351        #[doc = "4 RSPCK"]
1352        pub const _011: Self = Self::new(3);
1353
1354        #[doc = "5 RSPCK"]
1355        pub const _100: Self = Self::new(4);
1356
1357        #[doc = "6 RSPCK"]
1358        pub const _101: Self = Self::new(5);
1359
1360        #[doc = "7 RSPCK"]
1361        pub const _110: Self = Self::new(6);
1362
1363        #[doc = "8 RSPCK"]
1364        pub const _111: Self = Self::new(7);
1365    }
1366}
1367#[doc(hidden)]
1368#[derive(Copy, Clone, Eq, PartialEq)]
1369pub struct Sslnd_SPEC;
1370impl crate::sealed::RegSpec for Sslnd_SPEC {
1371    type DataType = u8;
1372}
1373
1374#[doc = "SPI Slave Select Negation Delay Register"]
1375pub type Sslnd = crate::RegValueT<Sslnd_SPEC>;
1376
1377impl Sslnd {
1378    #[doc = "These bits are read as 00000. The write value should be 00000."]
1379    #[inline(always)]
1380    pub fn reserved(
1381        self,
1382    ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Sslnd_SPEC, crate::common::RW> {
1383        crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Sslnd_SPEC,crate::common::RW>::from_register(self,0)
1384    }
1385
1386    #[doc = "SSL Negation Delay Setting"]
1387    #[inline(always)]
1388    pub fn slndl(
1389        self,
1390    ) -> crate::common::RegisterField<
1391        0,
1392        0x7,
1393        1,
1394        0,
1395        sslnd::Slndl,
1396        sslnd::Slndl,
1397        Sslnd_SPEC,
1398        crate::common::RW,
1399    > {
1400        crate::common::RegisterField::<
1401            0,
1402            0x7,
1403            1,
1404            0,
1405            sslnd::Slndl,
1406            sslnd::Slndl,
1407            Sslnd_SPEC,
1408            crate::common::RW,
1409        >::from_register(self, 0)
1410    }
1411}
1412impl ::core::default::Default for Sslnd {
1413    #[inline(always)]
1414    fn default() -> Sslnd {
1415        <crate::RegValueT<Sslnd_SPEC> as RegisterValue<_>>::new(0)
1416    }
1417}
1418pub mod sslnd {
1419
1420    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1421    pub struct Slndl_SPEC;
1422    pub type Slndl = crate::EnumBitfieldStruct<u8, Slndl_SPEC>;
1423    impl Slndl {
1424        #[doc = "1 RSPCK"]
1425        pub const _000: Self = Self::new(0);
1426
1427        #[doc = "2 RSPCK"]
1428        pub const _001: Self = Self::new(1);
1429
1430        #[doc = "3 RSPCK"]
1431        pub const _010: Self = Self::new(2);
1432
1433        #[doc = "4 RSPCK"]
1434        pub const _011: Self = Self::new(3);
1435
1436        #[doc = "5 RSPCK"]
1437        pub const _100: Self = Self::new(4);
1438
1439        #[doc = "6 RSPCK"]
1440        pub const _101: Self = Self::new(5);
1441
1442        #[doc = "7 RSPCK"]
1443        pub const _110: Self = Self::new(6);
1444
1445        #[doc = "8 RSPCK"]
1446        pub const _111: Self = Self::new(7);
1447    }
1448}
1449#[doc(hidden)]
1450#[derive(Copy, Clone, Eq, PartialEq)]
1451pub struct Spnd_SPEC;
1452impl crate::sealed::RegSpec for Spnd_SPEC {
1453    type DataType = u8;
1454}
1455
1456#[doc = "SPI Next-Access Delay Register"]
1457pub type Spnd = crate::RegValueT<Spnd_SPEC>;
1458
1459impl Spnd {
1460    #[doc = "These bits are read as 00000. The write value should be 00000."]
1461    #[inline(always)]
1462    pub fn reserved(
1463        self,
1464    ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Spnd_SPEC, crate::common::RW> {
1465        crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Spnd_SPEC,crate::common::RW>::from_register(self,0)
1466    }
1467
1468    #[doc = "SPI Next-Access Delay Setting"]
1469    #[inline(always)]
1470    pub fn spndl(
1471        self,
1472    ) -> crate::common::RegisterField<
1473        0,
1474        0x7,
1475        1,
1476        0,
1477        spnd::Spndl,
1478        spnd::Spndl,
1479        Spnd_SPEC,
1480        crate::common::RW,
1481    > {
1482        crate::common::RegisterField::<
1483            0,
1484            0x7,
1485            1,
1486            0,
1487            spnd::Spndl,
1488            spnd::Spndl,
1489            Spnd_SPEC,
1490            crate::common::RW,
1491        >::from_register(self, 0)
1492    }
1493}
1494impl ::core::default::Default for Spnd {
1495    #[inline(always)]
1496    fn default() -> Spnd {
1497        <crate::RegValueT<Spnd_SPEC> as RegisterValue<_>>::new(0)
1498    }
1499}
1500pub mod spnd {
1501
1502    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1503    pub struct Spndl_SPEC;
1504    pub type Spndl = crate::EnumBitfieldStruct<u8, Spndl_SPEC>;
1505    impl Spndl {
1506        #[doc = "1 RSPCK + 2 PCLK"]
1507        pub const _000: Self = Self::new(0);
1508
1509        #[doc = "2 RSPCK + 2 PCLK"]
1510        pub const _001: Self = Self::new(1);
1511
1512        #[doc = "3 RSPCK + 2 PCLK"]
1513        pub const _010: Self = Self::new(2);
1514
1515        #[doc = "4 RSPCK + 2 PCLK"]
1516        pub const _011: Self = Self::new(3);
1517
1518        #[doc = "5 RSPCK + 2 PCLK"]
1519        pub const _100: Self = Self::new(4);
1520
1521        #[doc = "6 RSPCK + 2 PCLK"]
1522        pub const _101: Self = Self::new(5);
1523
1524        #[doc = "7 RSPCK + 2 PCLK"]
1525        pub const _110: Self = Self::new(6);
1526
1527        #[doc = "8 RSPCK + 2 PCLK"]
1528        pub const _111: Self = Self::new(7);
1529    }
1530}
1531#[doc(hidden)]
1532#[derive(Copy, Clone, Eq, PartialEq)]
1533pub struct Spcr2_SPEC;
1534impl crate::sealed::RegSpec for Spcr2_SPEC {
1535    type DataType = u8;
1536}
1537
1538#[doc = "SPI Control Register 2"]
1539pub type Spcr2 = crate::RegValueT<Spcr2_SPEC>;
1540
1541impl Spcr2 {
1542    #[doc = "These bits are read as 000. The write value should be 000."]
1543    #[inline(always)]
1544    pub fn reserved(
1545        self,
1546    ) -> crate::common::RegisterField<5, 0x7, 1, 0, u8, u8, Spcr2_SPEC, crate::common::RW> {
1547        crate::common::RegisterField::<5,0x7,1,0,u8,u8,Spcr2_SPEC,crate::common::RW>::from_register(self,0)
1548    }
1549
1550    #[doc = "RSPCK Auto-Stop Function Enable"]
1551    #[inline(always)]
1552    pub fn sckase(
1553        self,
1554    ) -> crate::common::RegisterField<
1555        4,
1556        0x1,
1557        1,
1558        0,
1559        spcr2::Sckase,
1560        spcr2::Sckase,
1561        Spcr2_SPEC,
1562        crate::common::RW,
1563    > {
1564        crate::common::RegisterField::<
1565            4,
1566            0x1,
1567            1,
1568            0,
1569            spcr2::Sckase,
1570            spcr2::Sckase,
1571            Spcr2_SPEC,
1572            crate::common::RW,
1573        >::from_register(self, 0)
1574    }
1575
1576    #[doc = "Parity Self-Testing"]
1577    #[inline(always)]
1578    pub fn pte(
1579        self,
1580    ) -> crate::common::RegisterField<
1581        3,
1582        0x1,
1583        1,
1584        0,
1585        spcr2::Pte,
1586        spcr2::Pte,
1587        Spcr2_SPEC,
1588        crate::common::RW,
1589    > {
1590        crate::common::RegisterField::<
1591            3,
1592            0x1,
1593            1,
1594            0,
1595            spcr2::Pte,
1596            spcr2::Pte,
1597            Spcr2_SPEC,
1598            crate::common::RW,
1599        >::from_register(self, 0)
1600    }
1601
1602    #[doc = "SPI Idle Interrupt Enable"]
1603    #[inline(always)]
1604    pub fn spiie(
1605        self,
1606    ) -> crate::common::RegisterField<
1607        2,
1608        0x1,
1609        1,
1610        0,
1611        spcr2::Spiie,
1612        spcr2::Spiie,
1613        Spcr2_SPEC,
1614        crate::common::RW,
1615    > {
1616        crate::common::RegisterField::<
1617            2,
1618            0x1,
1619            1,
1620            0,
1621            spcr2::Spiie,
1622            spcr2::Spiie,
1623            Spcr2_SPEC,
1624            crate::common::RW,
1625        >::from_register(self, 0)
1626    }
1627
1628    #[doc = "Parity Mode"]
1629    #[inline(always)]
1630    pub fn spoe(
1631        self,
1632    ) -> crate::common::RegisterField<
1633        1,
1634        0x1,
1635        1,
1636        0,
1637        spcr2::Spoe,
1638        spcr2::Spoe,
1639        Spcr2_SPEC,
1640        crate::common::RW,
1641    > {
1642        crate::common::RegisterField::<
1643            1,
1644            0x1,
1645            1,
1646            0,
1647            spcr2::Spoe,
1648            spcr2::Spoe,
1649            Spcr2_SPEC,
1650            crate::common::RW,
1651        >::from_register(self, 0)
1652    }
1653
1654    #[doc = "Parity Enable"]
1655    #[inline(always)]
1656    pub fn sppe(
1657        self,
1658    ) -> crate::common::RegisterField<
1659        0,
1660        0x1,
1661        1,
1662        0,
1663        spcr2::Sppe,
1664        spcr2::Sppe,
1665        Spcr2_SPEC,
1666        crate::common::RW,
1667    > {
1668        crate::common::RegisterField::<
1669            0,
1670            0x1,
1671            1,
1672            0,
1673            spcr2::Sppe,
1674            spcr2::Sppe,
1675            Spcr2_SPEC,
1676            crate::common::RW,
1677        >::from_register(self, 0)
1678    }
1679}
1680impl ::core::default::Default for Spcr2 {
1681    #[inline(always)]
1682    fn default() -> Spcr2 {
1683        <crate::RegValueT<Spcr2_SPEC> as RegisterValue<_>>::new(0)
1684    }
1685}
1686pub mod spcr2 {
1687
1688    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1689    pub struct Sckase_SPEC;
1690    pub type Sckase = crate::EnumBitfieldStruct<u8, Sckase_SPEC>;
1691    impl Sckase {
1692        #[doc = "Disables the RSPCK auto-stop function"]
1693        pub const _0: Self = Self::new(0);
1694
1695        #[doc = "Enables the RSPCK auto-stop function"]
1696        pub const _1: Self = Self::new(1);
1697    }
1698    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1699    pub struct Pte_SPEC;
1700    pub type Pte = crate::EnumBitfieldStruct<u8, Pte_SPEC>;
1701    impl Pte {
1702        #[doc = "Disables the self-diagnosis function of the parity circuit"]
1703        pub const _0: Self = Self::new(0);
1704
1705        #[doc = "Enables the self-diagnosis function of the parity circuit"]
1706        pub const _1: Self = Self::new(1);
1707    }
1708    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1709    pub struct Spiie_SPEC;
1710    pub type Spiie = crate::EnumBitfieldStruct<u8, Spiie_SPEC>;
1711    impl Spiie {
1712        #[doc = "Disables the generation of idle interrupt requests"]
1713        pub const _0: Self = Self::new(0);
1714
1715        #[doc = "Enables the generation of idle interrupt requests"]
1716        pub const _1: Self = Self::new(1);
1717    }
1718    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1719    pub struct Spoe_SPEC;
1720    pub type Spoe = crate::EnumBitfieldStruct<u8, Spoe_SPEC>;
1721    impl Spoe {
1722        #[doc = "Selects even parity for use in transmission and reception"]
1723        pub const _0: Self = Self::new(0);
1724
1725        #[doc = "Selects odd parity for use in transmission and reception"]
1726        pub const _1: Self = Self::new(1);
1727    }
1728    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1729    pub struct Sppe_SPEC;
1730    pub type Sppe = crate::EnumBitfieldStruct<u8, Sppe_SPEC>;
1731    impl Sppe {
1732        #[doc = "Does not add the parity bit to transmit data and does not check the parity bit of receive data"]
1733        pub const _0: Self = Self::new(0);
1734
1735        #[doc = "Adds the parity bit to transmit data and checks the parity bit of receive data (when SPCR.TXMD = 0) / Adds the parity bit to transmit data but does not check the parity bit of receive data (when SPCR.TXMD = 1)"]
1736        pub const _1: Self = Self::new(1);
1737    }
1738}
1739#[doc(hidden)]
1740#[derive(Copy, Clone, Eq, PartialEq)]
1741pub struct Spcmd0_SPEC;
1742impl crate::sealed::RegSpec for Spcmd0_SPEC {
1743    type DataType = u16;
1744}
1745
1746#[doc = "SPI Command Register 0"]
1747pub type Spcmd0 = crate::RegValueT<Spcmd0_SPEC>;
1748
1749impl Spcmd0 {
1750    #[doc = "RSPCK Delay Setting Enable"]
1751    #[inline(always)]
1752    pub fn sckden(
1753        self,
1754    ) -> crate::common::RegisterField<
1755        15,
1756        0x1,
1757        1,
1758        0,
1759        spcmd0::Sckden,
1760        spcmd0::Sckden,
1761        Spcmd0_SPEC,
1762        crate::common::RW,
1763    > {
1764        crate::common::RegisterField::<
1765            15,
1766            0x1,
1767            1,
1768            0,
1769            spcmd0::Sckden,
1770            spcmd0::Sckden,
1771            Spcmd0_SPEC,
1772            crate::common::RW,
1773        >::from_register(self, 0)
1774    }
1775
1776    #[doc = "SSL Negation Delay Setting Enable"]
1777    #[inline(always)]
1778    pub fn slnden(
1779        self,
1780    ) -> crate::common::RegisterField<
1781        14,
1782        0x1,
1783        1,
1784        0,
1785        spcmd0::Slnden,
1786        spcmd0::Slnden,
1787        Spcmd0_SPEC,
1788        crate::common::RW,
1789    > {
1790        crate::common::RegisterField::<
1791            14,
1792            0x1,
1793            1,
1794            0,
1795            spcmd0::Slnden,
1796            spcmd0::Slnden,
1797            Spcmd0_SPEC,
1798            crate::common::RW,
1799        >::from_register(self, 0)
1800    }
1801
1802    #[doc = "SPI Next-Access Delay Enable"]
1803    #[inline(always)]
1804    pub fn spnden(
1805        self,
1806    ) -> crate::common::RegisterField<
1807        13,
1808        0x1,
1809        1,
1810        0,
1811        spcmd0::Spnden,
1812        spcmd0::Spnden,
1813        Spcmd0_SPEC,
1814        crate::common::RW,
1815    > {
1816        crate::common::RegisterField::<
1817            13,
1818            0x1,
1819            1,
1820            0,
1821            spcmd0::Spnden,
1822            spcmd0::Spnden,
1823            Spcmd0_SPEC,
1824            crate::common::RW,
1825        >::from_register(self, 0)
1826    }
1827
1828    #[doc = "SPI LSB First"]
1829    #[inline(always)]
1830    pub fn lsbf(
1831        self,
1832    ) -> crate::common::RegisterField<
1833        12,
1834        0x1,
1835        1,
1836        0,
1837        spcmd0::Lsbf,
1838        spcmd0::Lsbf,
1839        Spcmd0_SPEC,
1840        crate::common::RW,
1841    > {
1842        crate::common::RegisterField::<
1843            12,
1844            0x1,
1845            1,
1846            0,
1847            spcmd0::Lsbf,
1848            spcmd0::Lsbf,
1849            Spcmd0_SPEC,
1850            crate::common::RW,
1851        >::from_register(self, 0)
1852    }
1853
1854    #[doc = "SPI Data Length Setting"]
1855    #[inline(always)]
1856    pub fn spb(
1857        self,
1858    ) -> crate::common::RegisterField<
1859        8,
1860        0xf,
1861        1,
1862        0,
1863        spcmd0::Spb,
1864        spcmd0::Spb,
1865        Spcmd0_SPEC,
1866        crate::common::RW,
1867    > {
1868        crate::common::RegisterField::<
1869            8,
1870            0xf,
1871            1,
1872            0,
1873            spcmd0::Spb,
1874            spcmd0::Spb,
1875            Spcmd0_SPEC,
1876            crate::common::RW,
1877        >::from_register(self, 0)
1878    }
1879
1880    #[doc = "This bit is read as 0. The write value should be 0."]
1881    #[inline(always)]
1882    pub fn reserved(
1883        self,
1884    ) -> crate::common::RegisterFieldBool<7, 1, 0, Spcmd0_SPEC, crate::common::RW> {
1885        crate::common::RegisterFieldBool::<7, 1, 0, Spcmd0_SPEC, crate::common::RW>::from_register(
1886            self, 0,
1887        )
1888    }
1889
1890    #[doc = "SSL Signal Assertion Setting"]
1891    #[inline(always)]
1892    pub fn ssla(
1893        self,
1894    ) -> crate::common::RegisterField<
1895        4,
1896        0x7,
1897        1,
1898        0,
1899        spcmd0::Ssla,
1900        spcmd0::Ssla,
1901        Spcmd0_SPEC,
1902        crate::common::RW,
1903    > {
1904        crate::common::RegisterField::<
1905            4,
1906            0x7,
1907            1,
1908            0,
1909            spcmd0::Ssla,
1910            spcmd0::Ssla,
1911            Spcmd0_SPEC,
1912            crate::common::RW,
1913        >::from_register(self, 0)
1914    }
1915
1916    #[doc = "Bit Rate Division Setting"]
1917    #[inline(always)]
1918    pub fn brdv(
1919        self,
1920    ) -> crate::common::RegisterField<
1921        2,
1922        0x3,
1923        1,
1924        0,
1925        spcmd0::Brdv,
1926        spcmd0::Brdv,
1927        Spcmd0_SPEC,
1928        crate::common::RW,
1929    > {
1930        crate::common::RegisterField::<
1931            2,
1932            0x3,
1933            1,
1934            0,
1935            spcmd0::Brdv,
1936            spcmd0::Brdv,
1937            Spcmd0_SPEC,
1938            crate::common::RW,
1939        >::from_register(self, 0)
1940    }
1941
1942    #[doc = "RSPCK Polarity Setting"]
1943    #[inline(always)]
1944    pub fn cpol(
1945        self,
1946    ) -> crate::common::RegisterField<
1947        1,
1948        0x1,
1949        1,
1950        0,
1951        spcmd0::Cpol,
1952        spcmd0::Cpol,
1953        Spcmd0_SPEC,
1954        crate::common::RW,
1955    > {
1956        crate::common::RegisterField::<
1957            1,
1958            0x1,
1959            1,
1960            0,
1961            spcmd0::Cpol,
1962            spcmd0::Cpol,
1963            Spcmd0_SPEC,
1964            crate::common::RW,
1965        >::from_register(self, 0)
1966    }
1967
1968    #[doc = "RSPCK Phase Setting"]
1969    #[inline(always)]
1970    pub fn cpha(
1971        self,
1972    ) -> crate::common::RegisterField<
1973        0,
1974        0x1,
1975        1,
1976        0,
1977        spcmd0::Cpha,
1978        spcmd0::Cpha,
1979        Spcmd0_SPEC,
1980        crate::common::RW,
1981    > {
1982        crate::common::RegisterField::<
1983            0,
1984            0x1,
1985            1,
1986            0,
1987            spcmd0::Cpha,
1988            spcmd0::Cpha,
1989            Spcmd0_SPEC,
1990            crate::common::RW,
1991        >::from_register(self, 0)
1992    }
1993}
1994impl ::core::default::Default for Spcmd0 {
1995    #[inline(always)]
1996    fn default() -> Spcmd0 {
1997        <crate::RegValueT<Spcmd0_SPEC> as RegisterValue<_>>::new(1805)
1998    }
1999}
2000pub mod spcmd0 {
2001
2002    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2003    pub struct Sckden_SPEC;
2004    pub type Sckden = crate::EnumBitfieldStruct<u8, Sckden_SPEC>;
2005    impl Sckden {
2006        #[doc = "An RSPCK delay of 1 RSPCK"]
2007        pub const _0: Self = Self::new(0);
2008
2009        #[doc = "An RSPCK delay is equal to the setting of the SPI clock delay register (SPCKD)"]
2010        pub const _1: Self = Self::new(1);
2011    }
2012    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2013    pub struct Slnden_SPEC;
2014    pub type Slnden = crate::EnumBitfieldStruct<u8, Slnden_SPEC>;
2015    impl Slnden {
2016        #[doc = "An SSL negation delay of 1 RSPCK"]
2017        pub const _0: Self = Self::new(0);
2018
2019        #[doc = "An SSL negation delay is equal to the setting of the SPI slave select negation delay register (SSLND)"]
2020        pub const _1: Self = Self::new(1);
2021    }
2022    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2023    pub struct Spnden_SPEC;
2024    pub type Spnden = crate::EnumBitfieldStruct<u8, Spnden_SPEC>;
2025    impl Spnden {
2026        #[doc = "A next-access delay of 1 RSPCK + 2 PCLK"]
2027        pub const _0: Self = Self::new(0);
2028
2029        #[doc = "A next-access delay is equal to the setting of the SPI next-access delay register (SPND)"]
2030        pub const _1: Self = Self::new(1);
2031    }
2032    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2033    pub struct Lsbf_SPEC;
2034    pub type Lsbf = crate::EnumBitfieldStruct<u8, Lsbf_SPEC>;
2035    impl Lsbf {
2036        #[doc = "MSB first"]
2037        pub const _0: Self = Self::new(0);
2038
2039        #[doc = "LSB first"]
2040        pub const _1: Self = Self::new(1);
2041    }
2042    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2043    pub struct Spb_SPEC;
2044    pub type Spb = crate::EnumBitfieldStruct<u8, Spb_SPEC>;
2045    impl Spb {
2046        #[doc = "8 bits"]
2047        pub const _0100: Self = Self::new(4);
2048
2049        #[doc = "8 bits"]
2050        pub const _0101: Self = Self::new(5);
2051
2052        #[doc = "8 bits"]
2053        pub const _0110: Self = Self::new(6);
2054
2055        #[doc = "8 bits"]
2056        pub const _0111: Self = Self::new(7);
2057
2058        #[doc = "9 bits"]
2059        pub const _1000: Self = Self::new(8);
2060
2061        #[doc = "10 bits"]
2062        pub const _1001: Self = Self::new(9);
2063
2064        #[doc = "11 bits"]
2065        pub const _1010: Self = Self::new(10);
2066
2067        #[doc = "12 bits"]
2068        pub const _1011: Self = Self::new(11);
2069
2070        #[doc = "13 bits"]
2071        pub const _1100: Self = Self::new(12);
2072
2073        #[doc = "14 bits"]
2074        pub const _1101: Self = Self::new(13);
2075
2076        #[doc = "15 bits"]
2077        pub const _1110: Self = Self::new(14);
2078
2079        #[doc = "16 bits"]
2080        pub const _1111: Self = Self::new(15);
2081    }
2082    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2083    pub struct Ssla_SPEC;
2084    pub type Ssla = crate::EnumBitfieldStruct<u8, Ssla_SPEC>;
2085    impl Ssla {
2086        #[doc = "SSL0"]
2087        pub const _000: Self = Self::new(0);
2088
2089        #[doc = "SSL1"]
2090        pub const _001: Self = Self::new(1);
2091
2092        #[doc = "SSL2"]
2093        pub const _010: Self = Self::new(2);
2094
2095        #[doc = "SSL3"]
2096        pub const _011: Self = Self::new(3);
2097    }
2098    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2099    pub struct Brdv_SPEC;
2100    pub type Brdv = crate::EnumBitfieldStruct<u8, Brdv_SPEC>;
2101    impl Brdv {
2102        #[doc = "These bits select the base bit rate"]
2103        pub const _00: Self = Self::new(0);
2104
2105        #[doc = "These bits select the base bit rate divided by 2"]
2106        pub const _01: Self = Self::new(1);
2107
2108        #[doc = "These bits select the base bit rate divided by 4"]
2109        pub const _10: Self = Self::new(2);
2110
2111        #[doc = "These bits select the base bit rate divided by 8"]
2112        pub const _11: Self = Self::new(3);
2113    }
2114    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2115    pub struct Cpol_SPEC;
2116    pub type Cpol = crate::EnumBitfieldStruct<u8, Cpol_SPEC>;
2117    impl Cpol {
2118        #[doc = "RSPCK is low when idle"]
2119        pub const _0: Self = Self::new(0);
2120
2121        #[doc = "RSPCK is high when idle"]
2122        pub const _1: Self = Self::new(1);
2123    }
2124    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2125    pub struct Cpha_SPEC;
2126    pub type Cpha = crate::EnumBitfieldStruct<u8, Cpha_SPEC>;
2127    impl Cpha {
2128        #[doc = "Data sampling on odd edge, data variation on even edge"]
2129        pub const _0: Self = Self::new(0);
2130
2131        #[doc = "Data variation on odd edge, data sampling on even edge"]
2132        pub const _1: Self = Self::new(1);
2133    }
2134}
ra2a1_pac/spi0.rs

ra2a1_pac/
spi0.rs
