ra2a1_pac/
agt0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.1, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:31 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Asynchronous General purpose Timer 0"]
28unsafe impl ::core::marker::Send for super::Agt0 {}
29unsafe impl ::core::marker::Sync for super::Agt0 {}
30impl super::Agt0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "AGT Counter Register"]
38    #[inline(always)]
39    pub const fn agt(&self) -> &'static crate::common::Reg<self::Agt_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Agt_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "AGT Compare Match A Register"]
48    #[inline(always)]
49    pub const fn agtcma(
50        &self,
51    ) -> &'static crate::common::Reg<self::Agtcma_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Agtcma_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(2usize),
55            )
56        }
57    }
58
59    #[doc = "AGT Compare Match B Register"]
60    #[inline(always)]
61    pub const fn agtcmb(
62        &self,
63    ) -> &'static crate::common::Reg<self::Agtcmb_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Agtcmb_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(4usize),
67            )
68        }
69    }
70
71    #[doc = "AGT Control Register"]
72    #[inline(always)]
73    pub const fn agtcr(&self) -> &'static crate::common::Reg<self::Agtcr_SPEC, crate::common::RW> {
74        unsafe {
75            crate::common::Reg::<self::Agtcr_SPEC, crate::common::RW>::from_ptr(
76                self._svd2pac_as_ptr().add(8usize),
77            )
78        }
79    }
80
81    #[doc = "AGT Mode Register 1"]
82    #[inline(always)]
83    pub const fn agtmr1(
84        &self,
85    ) -> &'static crate::common::Reg<self::Agtmr1_SPEC, crate::common::RW> {
86        unsafe {
87            crate::common::Reg::<self::Agtmr1_SPEC, crate::common::RW>::from_ptr(
88                self._svd2pac_as_ptr().add(9usize),
89            )
90        }
91    }
92
93    #[doc = "AGT Mode Register 2"]
94    #[inline(always)]
95    pub const fn agtmr2(
96        &self,
97    ) -> &'static crate::common::Reg<self::Agtmr2_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Agtmr2_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(10usize),
101            )
102        }
103    }
104
105    #[doc = "AGT I/O Control Register"]
106    #[inline(always)]
107    pub const fn agtioc(
108        &self,
109    ) -> &'static crate::common::Reg<self::Agtioc_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Agtioc_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(12usize),
113            )
114        }
115    }
116
117    #[doc = "AGT Event Pin Select Register"]
118    #[inline(always)]
119    pub const fn agtisr(
120        &self,
121    ) -> &'static crate::common::Reg<self::Agtisr_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Agtisr_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(13usize),
125            )
126        }
127    }
128
129    #[doc = "AGT Compare Match Function Select Register"]
130    #[inline(always)]
131    pub const fn agtcmsr(
132        &self,
133    ) -> &'static crate::common::Reg<self::Agtcmsr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Agtcmsr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(14usize),
137            )
138        }
139    }
140
141    #[doc = "AGT Pin Select Register"]
142    #[inline(always)]
143    pub const fn agtiosel(
144        &self,
145    ) -> &'static crate::common::Reg<self::Agtiosel_SPEC, crate::common::RW> {
146        unsafe {
147            crate::common::Reg::<self::Agtiosel_SPEC, crate::common::RW>::from_ptr(
148                self._svd2pac_as_ptr().add(15usize),
149            )
150        }
151    }
152}
153#[doc(hidden)]
154#[derive(Copy, Clone, Eq, PartialEq)]
155pub struct Agt_SPEC;
156impl crate::sealed::RegSpec for Agt_SPEC {
157    type DataType = u16;
158}
159
160#[doc = "AGT Counter Register"]
161pub type Agt = crate::RegValueT<Agt_SPEC>;
162
163impl Agt {
164    #[doc = "16bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the AGTCRn register, the 16-bit counter is forcibly stopped and set to FFFFH."]
165    #[inline(always)]
166    pub fn agt(
167        self,
168    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Agt_SPEC, crate::common::RW> {
169        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Agt_SPEC,crate::common::RW>::from_register(self,0)
170    }
171}
172impl ::core::default::Default for Agt {
173    #[inline(always)]
174    fn default() -> Agt {
175        <crate::RegValueT<Agt_SPEC> as RegisterValue<_>>::new(65535)
176    }
177}
178
179#[doc(hidden)]
180#[derive(Copy, Clone, Eq, PartialEq)]
181pub struct Agtcma_SPEC;
182impl crate::sealed::RegSpec for Agtcma_SPEC {
183    type DataType = u16;
184}
185
186#[doc = "AGT Compare Match A Register"]
187pub type Agtcma = crate::RegValueT<Agtcma_SPEC>;
188
189impl Agtcma {
190    #[doc = "AGT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCRn register, set to FFFFH"]
191    #[inline(always)]
192    pub fn agtcma(
193        self,
194    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Agtcma_SPEC, crate::common::RW>
195    {
196        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Agtcma_SPEC,crate::common::RW>::from_register(self,0)
197    }
198}
199impl ::core::default::Default for Agtcma {
200    #[inline(always)]
201    fn default() -> Agtcma {
202        <crate::RegValueT<Agtcma_SPEC> as RegisterValue<_>>::new(65535)
203    }
204}
205
206#[doc(hidden)]
207#[derive(Copy, Clone, Eq, PartialEq)]
208pub struct Agtcmb_SPEC;
209impl crate::sealed::RegSpec for Agtcmb_SPEC {
210    type DataType = u16;
211}
212
213#[doc = "AGT Compare Match B Register"]
214pub type Agtcmb = crate::RegValueT<Agtcmb_SPEC>;
215
216impl Agtcmb {
217    #[doc = "AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCR register, set to FFFFH"]
218    #[inline(always)]
219    pub fn agtcmb(
220        self,
221    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Agtcmb_SPEC, crate::common::RW>
222    {
223        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Agtcmb_SPEC,crate::common::RW>::from_register(self,0)
224    }
225}
226impl ::core::default::Default for Agtcmb {
227    #[inline(always)]
228    fn default() -> Agtcmb {
229        <crate::RegValueT<Agtcmb_SPEC> as RegisterValue<_>>::new(65535)
230    }
231}
232
233#[doc(hidden)]
234#[derive(Copy, Clone, Eq, PartialEq)]
235pub struct Agtcr_SPEC;
236impl crate::sealed::RegSpec for Agtcr_SPEC {
237    type DataType = u8;
238}
239
240#[doc = "AGT Control Register"]
241pub type Agtcr = crate::RegValueT<Agtcr_SPEC>;
242
243impl Agtcr {
244    #[doc = "AGT compare match B flag"]
245    #[inline(always)]
246    pub fn tcmbf(
247        self,
248    ) -> crate::common::RegisterField<
249        7,
250        0x1,
251        1,
252        0,
253        agtcr::Tcmbf,
254        agtcr::Tcmbf,
255        Agtcr_SPEC,
256        crate::common::RW,
257    > {
258        crate::common::RegisterField::<
259            7,
260            0x1,
261            1,
262            0,
263            agtcr::Tcmbf,
264            agtcr::Tcmbf,
265            Agtcr_SPEC,
266            crate::common::RW,
267        >::from_register(self, 0)
268    }
269
270    #[doc = "AGT compare match A flag"]
271    #[inline(always)]
272    pub fn tcmaf(
273        self,
274    ) -> crate::common::RegisterField<
275        6,
276        0x1,
277        1,
278        0,
279        agtcr::Tcmaf,
280        agtcr::Tcmaf,
281        Agtcr_SPEC,
282        crate::common::RW,
283    > {
284        crate::common::RegisterField::<
285            6,
286            0x1,
287            1,
288            0,
289            agtcr::Tcmaf,
290            agtcr::Tcmaf,
291            Agtcr_SPEC,
292            crate::common::RW,
293        >::from_register(self, 0)
294    }
295
296    #[doc = "AGT underflow flag"]
297    #[inline(always)]
298    pub fn tundf(
299        self,
300    ) -> crate::common::RegisterField<
301        5,
302        0x1,
303        1,
304        0,
305        agtcr::Tundf,
306        agtcr::Tundf,
307        Agtcr_SPEC,
308        crate::common::RW,
309    > {
310        crate::common::RegisterField::<
311            5,
312            0x1,
313            1,
314            0,
315            agtcr::Tundf,
316            agtcr::Tundf,
317            Agtcr_SPEC,
318            crate::common::RW,
319        >::from_register(self, 0)
320    }
321
322    #[doc = "Active edge judgement flag"]
323    #[inline(always)]
324    pub fn tedgf(
325        self,
326    ) -> crate::common::RegisterField<
327        4,
328        0x1,
329        1,
330        0,
331        agtcr::Tedgf,
332        agtcr::Tedgf,
333        Agtcr_SPEC,
334        crate::common::RW,
335    > {
336        crate::common::RegisterField::<
337            4,
338            0x1,
339            1,
340            0,
341            agtcr::Tedgf,
342            agtcr::Tedgf,
343            Agtcr_SPEC,
344            crate::common::RW,
345        >::from_register(self, 0)
346    }
347
348    #[doc = "This bit is read as 0. The write value should be 0."]
349    #[inline(always)]
350    pub fn reserved(
351        self,
352    ) -> crate::common::RegisterFieldBool<3, 1, 0, Agtcr_SPEC, crate::common::RW> {
353        crate::common::RegisterFieldBool::<3, 1, 0, Agtcr_SPEC, crate::common::RW>::from_register(
354            self, 0,
355        )
356    }
357
358    #[doc = "AGT count forced stop"]
359    #[inline(always)]
360    pub fn tstop(
361        self,
362    ) -> crate::common::RegisterField<
363        2,
364        0x1,
365        1,
366        0,
367        agtcr::Tstop,
368        agtcr::Tstop,
369        Agtcr_SPEC,
370        crate::common::W,
371    > {
372        crate::common::RegisterField::<
373            2,
374            0x1,
375            1,
376            0,
377            agtcr::Tstop,
378            agtcr::Tstop,
379            Agtcr_SPEC,
380            crate::common::W,
381        >::from_register(self, 0)
382    }
383
384    #[doc = "AGT count status flag"]
385    #[inline(always)]
386    pub fn tcstf(
387        self,
388    ) -> crate::common::RegisterField<
389        1,
390        0x1,
391        1,
392        0,
393        agtcr::Tcstf,
394        agtcr::Tcstf,
395        Agtcr_SPEC,
396        crate::common::R,
397    > {
398        crate::common::RegisterField::<
399            1,
400            0x1,
401            1,
402            0,
403            agtcr::Tcstf,
404            agtcr::Tcstf,
405            Agtcr_SPEC,
406            crate::common::R,
407        >::from_register(self, 0)
408    }
409
410    #[doc = "AGT count start"]
411    #[inline(always)]
412    pub fn tstart(
413        self,
414    ) -> crate::common::RegisterField<
415        0,
416        0x1,
417        1,
418        0,
419        agtcr::Tstart,
420        agtcr::Tstart,
421        Agtcr_SPEC,
422        crate::common::RW,
423    > {
424        crate::common::RegisterField::<
425            0,
426            0x1,
427            1,
428            0,
429            agtcr::Tstart,
430            agtcr::Tstart,
431            Agtcr_SPEC,
432            crate::common::RW,
433        >::from_register(self, 0)
434    }
435}
436impl ::core::default::Default for Agtcr {
437    #[inline(always)]
438    fn default() -> Agtcr {
439        <crate::RegValueT<Agtcr_SPEC> as RegisterValue<_>>::new(0)
440    }
441}
442pub mod agtcr {
443
444    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
445    pub struct Tcmbf_SPEC;
446    pub type Tcmbf = crate::EnumBitfieldStruct<u8, Tcmbf_SPEC>;
447    impl Tcmbf {
448        #[doc = "No Match"]
449        pub const _0: Self = Self::new(0);
450
451        #[doc = "Match"]
452        pub const _1: Self = Self::new(1);
453    }
454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
455    pub struct Tcmaf_SPEC;
456    pub type Tcmaf = crate::EnumBitfieldStruct<u8, Tcmaf_SPEC>;
457    impl Tcmaf {
458        #[doc = "No Match"]
459        pub const _0: Self = Self::new(0);
460
461        #[doc = "Match"]
462        pub const _1: Self = Self::new(1);
463    }
464    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
465    pub struct Tundf_SPEC;
466    pub type Tundf = crate::EnumBitfieldStruct<u8, Tundf_SPEC>;
467    impl Tundf {
468        #[doc = "No underflow"]
469        pub const _0: Self = Self::new(0);
470
471        #[doc = "Underflow"]
472        pub const _1: Self = Self::new(1);
473    }
474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
475    pub struct Tedgf_SPEC;
476    pub type Tedgf = crate::EnumBitfieldStruct<u8, Tedgf_SPEC>;
477    impl Tedgf {
478        #[doc = "No active edge received"]
479        pub const _0: Self = Self::new(0);
480
481        #[doc = "Active edge received"]
482        pub const _1: Self = Self::new(1);
483    }
484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
485    pub struct Tstop_SPEC;
486    pub type Tstop = crate::EnumBitfieldStruct<u8, Tstop_SPEC>;
487    impl Tstop {
488        #[doc = "no effect"]
489        pub const _0: Self = Self::new(0);
490
491        #[doc = "The count is forcibly stopped."]
492        pub const _1: Self = Self::new(1);
493    }
494    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
495    pub struct Tcstf_SPEC;
496    pub type Tcstf = crate::EnumBitfieldStruct<u8, Tcstf_SPEC>;
497    impl Tcstf {
498        #[doc = "Count stops"]
499        pub const _0: Self = Self::new(0);
500
501        #[doc = "Count starts"]
502        pub const _1: Self = Self::new(1);
503    }
504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
505    pub struct Tstart_SPEC;
506    pub type Tstart = crate::EnumBitfieldStruct<u8, Tstart_SPEC>;
507    impl Tstart {
508        #[doc = "Count stops"]
509        pub const _0: Self = Self::new(0);
510
511        #[doc = "Count starts"]
512        pub const _1: Self = Self::new(1);
513    }
514}
515#[doc(hidden)]
516#[derive(Copy, Clone, Eq, PartialEq)]
517pub struct Agtmr1_SPEC;
518impl crate::sealed::RegSpec for Agtmr1_SPEC {
519    type DataType = u8;
520}
521
522#[doc = "AGT Mode Register 1"]
523pub type Agtmr1 = crate::RegValueT<Agtmr1_SPEC>;
524
525impl Agtmr1 {
526    #[doc = "This bit is read as 0. The write value should be 0."]
527    #[inline(always)]
528    pub fn reserved(
529        self,
530    ) -> crate::common::RegisterFieldBool<7, 1, 0, Agtmr1_SPEC, crate::common::RW> {
531        crate::common::RegisterFieldBool::<7, 1, 0, Agtmr1_SPEC, crate::common::RW>::from_register(
532            self, 0,
533        )
534    }
535
536    #[doc = "AGT count source select"]
537    #[inline(always)]
538    pub fn tck(
539        self,
540    ) -> crate::common::RegisterField<
541        4,
542        0x7,
543        1,
544        0,
545        agtmr1::Tck,
546        agtmr1::Tck,
547        Agtmr1_SPEC,
548        crate::common::RW,
549    > {
550        crate::common::RegisterField::<
551            4,
552            0x7,
553            1,
554            0,
555            agtmr1::Tck,
556            agtmr1::Tck,
557            Agtmr1_SPEC,
558            crate::common::RW,
559        >::from_register(self, 0)
560    }
561
562    #[doc = "AGTIO edge polarity select"]
563    #[inline(always)]
564    pub fn tedgpl(
565        self,
566    ) -> crate::common::RegisterField<
567        3,
568        0x1,
569        1,
570        0,
571        agtmr1::Tedgpl,
572        agtmr1::Tedgpl,
573        Agtmr1_SPEC,
574        crate::common::RW,
575    > {
576        crate::common::RegisterField::<
577            3,
578            0x1,
579            1,
580            0,
581            agtmr1::Tedgpl,
582            agtmr1::Tedgpl,
583            Agtmr1_SPEC,
584            crate::common::RW,
585        >::from_register(self, 0)
586    }
587
588    #[doc = "AGT operating mode select"]
589    #[inline(always)]
590    pub fn tmod(
591        self,
592    ) -> crate::common::RegisterField<
593        0,
594        0x7,
595        1,
596        0,
597        agtmr1::Tmod,
598        agtmr1::Tmod,
599        Agtmr1_SPEC,
600        crate::common::RW,
601    > {
602        crate::common::RegisterField::<
603            0,
604            0x7,
605            1,
606            0,
607            agtmr1::Tmod,
608            agtmr1::Tmod,
609            Agtmr1_SPEC,
610            crate::common::RW,
611        >::from_register(self, 0)
612    }
613}
614impl ::core::default::Default for Agtmr1 {
615    #[inline(always)]
616    fn default() -> Agtmr1 {
617        <crate::RegValueT<Agtmr1_SPEC> as RegisterValue<_>>::new(0)
618    }
619}
620pub mod agtmr1 {
621
622    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
623    pub struct Tck_SPEC;
624    pub type Tck = crate::EnumBitfieldStruct<u8, Tck_SPEC>;
625    impl Tck {
626        #[doc = "PCLKB"]
627        pub const _000: Self = Self::new(0);
628
629        #[doc = "PCLKB/8"]
630        pub const _001: Self = Self::new(1);
631
632        #[doc = "PCLKB/2"]
633        pub const _011: Self = Self::new(3);
634
635        #[doc = "Divided clock LOCO specified by bits CKS\\[2:0\\] in the AGTMR2 register"]
636        pub const _100: Self = Self::new(4);
637
638        #[doc = "Underflow event signal from AGT0"]
639        pub const _101: Self = Self::new(5);
640
641        #[doc = "Divided clock fSUB specified by bits CKS\\[2:0\\] in the AGTMR2 register"]
642        pub const _110: Self = Self::new(6);
643    }
644    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
645    pub struct Tedgpl_SPEC;
646    pub type Tedgpl = crate::EnumBitfieldStruct<u8, Tedgpl_SPEC>;
647    impl Tedgpl {
648        #[doc = "Single-edge"]
649        pub const _0: Self = Self::new(0);
650
651        #[doc = "Both-edge"]
652        pub const _1: Self = Self::new(1);
653    }
654    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
655    pub struct Tmod_SPEC;
656    pub type Tmod = crate::EnumBitfieldStruct<u8, Tmod_SPEC>;
657    impl Tmod {
658        #[doc = "Timer mode"]
659        pub const _000: Self = Self::new(0);
660
661        #[doc = "Pulse output mode"]
662        pub const _001: Self = Self::new(1);
663
664        #[doc = "Event counter mode"]
665        pub const _010: Self = Self::new(2);
666
667        #[doc = "Pulse width measurement mode"]
668        pub const _011: Self = Self::new(3);
669
670        #[doc = "Pulse period measurement mode"]
671        pub const _100: Self = Self::new(4);
672    }
673}
674#[doc(hidden)]
675#[derive(Copy, Clone, Eq, PartialEq)]
676pub struct Agtmr2_SPEC;
677impl crate::sealed::RegSpec for Agtmr2_SPEC {
678    type DataType = u8;
679}
680
681#[doc = "AGT Mode Register 2"]
682pub type Agtmr2 = crate::RegValueT<Agtmr2_SPEC>;
683
684impl Agtmr2 {
685    #[doc = "Low Power Mode"]
686    #[inline(always)]
687    pub fn lpm(
688        self,
689    ) -> crate::common::RegisterField<
690        7,
691        0x1,
692        1,
693        0,
694        agtmr2::Lpm,
695        agtmr2::Lpm,
696        Agtmr2_SPEC,
697        crate::common::RW,
698    > {
699        crate::common::RegisterField::<
700            7,
701            0x1,
702            1,
703            0,
704            agtmr2::Lpm,
705            agtmr2::Lpm,
706            Agtmr2_SPEC,
707            crate::common::RW,
708        >::from_register(self, 0)
709    }
710
711    #[doc = "These bits are read as 0000. The write value should be 0000."]
712    #[inline(always)]
713    pub fn reserved(
714        self,
715    ) -> crate::common::RegisterField<3, 0xf, 1, 0, u8, u8, Agtmr2_SPEC, crate::common::RW> {
716        crate::common::RegisterField::<3,0xf,1,0,u8,u8,Agtmr2_SPEC,crate::common::RW>::from_register(self,0)
717    }
718
719    #[doc = "fsub/LOCO count source clock frequency division ratio select"]
720    #[inline(always)]
721    pub fn cks(
722        self,
723    ) -> crate::common::RegisterField<
724        0,
725        0x7,
726        1,
727        0,
728        agtmr2::Cks,
729        agtmr2::Cks,
730        Agtmr2_SPEC,
731        crate::common::RW,
732    > {
733        crate::common::RegisterField::<
734            0,
735            0x7,
736            1,
737            0,
738            agtmr2::Cks,
739            agtmr2::Cks,
740            Agtmr2_SPEC,
741            crate::common::RW,
742        >::from_register(self, 0)
743    }
744}
745impl ::core::default::Default for Agtmr2 {
746    #[inline(always)]
747    fn default() -> Agtmr2 {
748        <crate::RegValueT<Agtmr2_SPEC> as RegisterValue<_>>::new(0)
749    }
750}
751pub mod agtmr2 {
752
753    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
754    pub struct Lpm_SPEC;
755    pub type Lpm = crate::EnumBitfieldStruct<u8, Lpm_SPEC>;
756    impl Lpm {
757        #[doc = "Normal mode"]
758        pub const _0: Self = Self::new(0);
759
760        #[doc = "Low Power mode"]
761        pub const _1: Self = Self::new(1);
762    }
763    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
764    pub struct Cks_SPEC;
765    pub type Cks = crate::EnumBitfieldStruct<u8, Cks_SPEC>;
766    impl Cks {
767        #[doc = "1/1"]
768        pub const _000: Self = Self::new(0);
769
770        #[doc = "1/2"]
771        pub const _001: Self = Self::new(1);
772
773        #[doc = "1/4"]
774        pub const _010: Self = Self::new(2);
775
776        #[doc = "1/8"]
777        pub const _011: Self = Self::new(3);
778
779        #[doc = "1/16"]
780        pub const _100: Self = Self::new(4);
781
782        #[doc = "1/32"]
783        pub const _101: Self = Self::new(5);
784
785        #[doc = "1/64"]
786        pub const _110: Self = Self::new(6);
787
788        #[doc = "1/128"]
789        pub const _111: Self = Self::new(7);
790    }
791}
792#[doc(hidden)]
793#[derive(Copy, Clone, Eq, PartialEq)]
794pub struct Agtioc_SPEC;
795impl crate::sealed::RegSpec for Agtioc_SPEC {
796    type DataType = u8;
797}
798
799#[doc = "AGT I/O Control Register"]
800pub type Agtioc = crate::RegValueT<Agtioc_SPEC>;
801
802impl Agtioc {
803    #[doc = "AGTIO count control"]
804    #[inline(always)]
805    pub fn tiogt(
806        self,
807    ) -> crate::common::RegisterField<
808        6,
809        0x3,
810        1,
811        0,
812        agtioc::Tiogt,
813        agtioc::Tiogt,
814        Agtioc_SPEC,
815        crate::common::RW,
816    > {
817        crate::common::RegisterField::<
818            6,
819            0x3,
820            1,
821            0,
822            agtioc::Tiogt,
823            agtioc::Tiogt,
824            Agtioc_SPEC,
825            crate::common::RW,
826        >::from_register(self, 0)
827    }
828
829    #[doc = "AGTIO input filter select"]
830    #[inline(always)]
831    pub fn tipf(
832        self,
833    ) -> crate::common::RegisterField<
834        4,
835        0x3,
836        1,
837        0,
838        agtioc::Tipf,
839        agtioc::Tipf,
840        Agtioc_SPEC,
841        crate::common::RW,
842    > {
843        crate::common::RegisterField::<
844            4,
845            0x3,
846            1,
847            0,
848            agtioc::Tipf,
849            agtioc::Tipf,
850            Agtioc_SPEC,
851            crate::common::RW,
852        >::from_register(self, 0)
853    }
854
855    #[doc = "AGTO output enable"]
856    #[inline(always)]
857    pub fn toe(
858        self,
859    ) -> crate::common::RegisterField<
860        2,
861        0x1,
862        1,
863        0,
864        agtioc::Toe,
865        agtioc::Toe,
866        Agtioc_SPEC,
867        crate::common::RW,
868    > {
869        crate::common::RegisterField::<
870            2,
871            0x1,
872            1,
873            0,
874            agtioc::Toe,
875            agtioc::Toe,
876            Agtioc_SPEC,
877            crate::common::RW,
878        >::from_register(self, 0)
879    }
880
881    #[doc = "This bit is read as 0. The write value should be 0."]
882    #[inline(always)]
883    pub fn reserved(
884        self,
885    ) -> crate::common::RegisterFieldBool<1, 1, 0, Agtioc_SPEC, crate::common::RW> {
886        crate::common::RegisterFieldBool::<1, 1, 0, Agtioc_SPEC, crate::common::RW>::from_register(
887            self, 0,
888        )
889    }
890
891    #[doc = "I/O polarity switchFunction varies depending on the operating mode."]
892    #[inline(always)]
893    pub fn tedgsel(
894        self,
895    ) -> crate::common::RegisterFieldBool<0, 1, 0, Agtioc_SPEC, crate::common::RW> {
896        crate::common::RegisterFieldBool::<0, 1, 0, Agtioc_SPEC, crate::common::RW>::from_register(
897            self, 0,
898        )
899    }
900}
901impl ::core::default::Default for Agtioc {
902    #[inline(always)]
903    fn default() -> Agtioc {
904        <crate::RegValueT<Agtioc_SPEC> as RegisterValue<_>>::new(0)
905    }
906}
907pub mod agtioc {
908
909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
910    pub struct Tiogt_SPEC;
911    pub type Tiogt = crate::EnumBitfieldStruct<u8, Tiogt_SPEC>;
912    impl Tiogt {
913        #[doc = "Event is always counted"]
914        pub const _00: Self = Self::new(0);
915
916        #[doc = "Event is counted during polarity period specified for AGTEE"]
917        pub const _01: Self = Self::new(1);
918    }
919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
920    pub struct Tipf_SPEC;
921    pub type Tipf = crate::EnumBitfieldStruct<u8, Tipf_SPEC>;
922    impl Tipf {
923        #[doc = "No filter"]
924        pub const _00: Self = Self::new(0);
925
926        #[doc = "Filter sampled at PCLKB"]
927        pub const _01: Self = Self::new(1);
928
929        #[doc = "Filter sampled at PCLKB/8"]
930        pub const _10: Self = Self::new(2);
931
932        #[doc = "Filter sampled at PCLKB/32"]
933        pub const _11: Self = Self::new(3);
934    }
935    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
936    pub struct Toe_SPEC;
937    pub type Toe = crate::EnumBitfieldStruct<u8, Toe_SPEC>;
938    impl Toe {
939        #[doc = "AGTO output disabled (port)"]
940        pub const _0: Self = Self::new(0);
941
942        #[doc = "AGTO output enabled"]
943        pub const _1: Self = Self::new(1);
944    }
945}
946#[doc(hidden)]
947#[derive(Copy, Clone, Eq, PartialEq)]
948pub struct Agtisr_SPEC;
949impl crate::sealed::RegSpec for Agtisr_SPEC {
950    type DataType = u8;
951}
952
953#[doc = "AGT Event Pin Select Register"]
954pub type Agtisr = crate::RegValueT<Agtisr_SPEC>;
955
956impl Agtisr {
957    #[doc = "AGTEE  polarty selection"]
958    #[inline(always)]
959    pub fn eeps(
960        self,
961    ) -> crate::common::RegisterField<
962        2,
963        0x1,
964        1,
965        0,
966        agtisr::Eeps,
967        agtisr::Eeps,
968        Agtisr_SPEC,
969        crate::common::RW,
970    > {
971        crate::common::RegisterField::<
972            2,
973            0x1,
974            1,
975            0,
976            agtisr::Eeps,
977            agtisr::Eeps,
978            Agtisr_SPEC,
979            crate::common::RW,
980        >::from_register(self, 0)
981    }
982
983    #[doc = "These bits are read as 00. The write value should be 00."]
984    #[inline(always)]
985    pub fn reserved(
986        self,
987    ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, Agtisr_SPEC, crate::common::RW> {
988        crate::common::RegisterField::<0,0x3,1,0,u8,u8,Agtisr_SPEC,crate::common::RW>::from_register(self,0)
989    }
990}
991impl ::core::default::Default for Agtisr {
992    #[inline(always)]
993    fn default() -> Agtisr {
994        <crate::RegValueT<Agtisr_SPEC> as RegisterValue<_>>::new(0)
995    }
996}
997pub mod agtisr {
998
999    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1000    pub struct Eeps_SPEC;
1001    pub type Eeps = crate::EnumBitfieldStruct<u8, Eeps_SPEC>;
1002    impl Eeps {
1003        #[doc = "An event is counted during the low-level period"]
1004        pub const _0: Self = Self::new(0);
1005
1006        #[doc = "An event is counted during the high-level period"]
1007        pub const _1: Self = Self::new(1);
1008    }
1009}
1010#[doc(hidden)]
1011#[derive(Copy, Clone, Eq, PartialEq)]
1012pub struct Agtcmsr_SPEC;
1013impl crate::sealed::RegSpec for Agtcmsr_SPEC {
1014    type DataType = u8;
1015}
1016
1017#[doc = "AGT Compare Match Function Select Register"]
1018pub type Agtcmsr = crate::RegValueT<Agtcmsr_SPEC>;
1019
1020impl Agtcmsr {
1021    #[doc = "AGTOB polarity select"]
1022    #[inline(always)]
1023    pub fn topolb(
1024        self,
1025    ) -> crate::common::RegisterField<
1026        6,
1027        0x1,
1028        1,
1029        0,
1030        agtcmsr::Topolb,
1031        agtcmsr::Topolb,
1032        Agtcmsr_SPEC,
1033        crate::common::RW,
1034    > {
1035        crate::common::RegisterField::<
1036            6,
1037            0x1,
1038            1,
1039            0,
1040            agtcmsr::Topolb,
1041            agtcmsr::Topolb,
1042            Agtcmsr_SPEC,
1043            crate::common::RW,
1044        >::from_register(self, 0)
1045    }
1046
1047    #[doc = "AGTOB output enable"]
1048    #[inline(always)]
1049    pub fn toeb(
1050        self,
1051    ) -> crate::common::RegisterField<
1052        5,
1053        0x1,
1054        1,
1055        0,
1056        agtcmsr::Toeb,
1057        agtcmsr::Toeb,
1058        Agtcmsr_SPEC,
1059        crate::common::RW,
1060    > {
1061        crate::common::RegisterField::<
1062            5,
1063            0x1,
1064            1,
1065            0,
1066            agtcmsr::Toeb,
1067            agtcmsr::Toeb,
1068            Agtcmsr_SPEC,
1069            crate::common::RW,
1070        >::from_register(self, 0)
1071    }
1072
1073    #[doc = "Compare match B register enable"]
1074    #[inline(always)]
1075    pub fn tcmeb(
1076        self,
1077    ) -> crate::common::RegisterField<
1078        4,
1079        0x1,
1080        1,
1081        0,
1082        agtcmsr::Tcmeb,
1083        agtcmsr::Tcmeb,
1084        Agtcmsr_SPEC,
1085        crate::common::RW,
1086    > {
1087        crate::common::RegisterField::<
1088            4,
1089            0x1,
1090            1,
1091            0,
1092            agtcmsr::Tcmeb,
1093            agtcmsr::Tcmeb,
1094            Agtcmsr_SPEC,
1095            crate::common::RW,
1096        >::from_register(self, 0)
1097    }
1098
1099    #[doc = "This bit is read as 0. The write value should be 0."]
1100    #[inline(always)]
1101    pub fn reserved(
1102        self,
1103    ) -> crate::common::RegisterFieldBool<3, 1, 0, Agtcmsr_SPEC, crate::common::RW> {
1104        crate::common::RegisterFieldBool::<3, 1, 0, Agtcmsr_SPEC, crate::common::RW>::from_register(
1105            self, 0,
1106        )
1107    }
1108
1109    #[doc = "AGTOA polarity select"]
1110    #[inline(always)]
1111    pub fn topola(
1112        self,
1113    ) -> crate::common::RegisterField<
1114        2,
1115        0x1,
1116        1,
1117        0,
1118        agtcmsr::Topola,
1119        agtcmsr::Topola,
1120        Agtcmsr_SPEC,
1121        crate::common::RW,
1122    > {
1123        crate::common::RegisterField::<
1124            2,
1125            0x1,
1126            1,
1127            0,
1128            agtcmsr::Topola,
1129            agtcmsr::Topola,
1130            Agtcmsr_SPEC,
1131            crate::common::RW,
1132        >::from_register(self, 0)
1133    }
1134
1135    #[doc = "AGTOA output enable"]
1136    #[inline(always)]
1137    pub fn toea(
1138        self,
1139    ) -> crate::common::RegisterField<
1140        1,
1141        0x1,
1142        1,
1143        0,
1144        agtcmsr::Toea,
1145        agtcmsr::Toea,
1146        Agtcmsr_SPEC,
1147        crate::common::RW,
1148    > {
1149        crate::common::RegisterField::<
1150            1,
1151            0x1,
1152            1,
1153            0,
1154            agtcmsr::Toea,
1155            agtcmsr::Toea,
1156            Agtcmsr_SPEC,
1157            crate::common::RW,
1158        >::from_register(self, 0)
1159    }
1160
1161    #[doc = "Compare match A register enable"]
1162    #[inline(always)]
1163    pub fn tcmea(
1164        self,
1165    ) -> crate::common::RegisterField<
1166        0,
1167        0x1,
1168        1,
1169        0,
1170        agtcmsr::Tcmea,
1171        agtcmsr::Tcmea,
1172        Agtcmsr_SPEC,
1173        crate::common::RW,
1174    > {
1175        crate::common::RegisterField::<
1176            0,
1177            0x1,
1178            1,
1179            0,
1180            agtcmsr::Tcmea,
1181            agtcmsr::Tcmea,
1182            Agtcmsr_SPEC,
1183            crate::common::RW,
1184        >::from_register(self, 0)
1185    }
1186}
1187impl ::core::default::Default for Agtcmsr {
1188    #[inline(always)]
1189    fn default() -> Agtcmsr {
1190        <crate::RegValueT<Agtcmsr_SPEC> as RegisterValue<_>>::new(0)
1191    }
1192}
1193pub mod agtcmsr {
1194
1195    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1196    pub struct Topolb_SPEC;
1197    pub type Topolb = crate::EnumBitfieldStruct<u8, Topolb_SPEC>;
1198    impl Topolb {
1199        #[doc = "AGTOB Output is started at low"]
1200        pub const _0: Self = Self::new(0);
1201
1202        #[doc = "AGTOB Output is started at high"]
1203        pub const _1: Self = Self::new(1);
1204    }
1205    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1206    pub struct Toeb_SPEC;
1207    pub type Toeb = crate::EnumBitfieldStruct<u8, Toeb_SPEC>;
1208    impl Toeb {
1209        #[doc = "AGTOB output disabled (port)"]
1210        pub const _0: Self = Self::new(0);
1211
1212        #[doc = "AGTOB output enabled"]
1213        pub const _1: Self = Self::new(1);
1214    }
1215    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1216    pub struct Tcmeb_SPEC;
1217    pub type Tcmeb = crate::EnumBitfieldStruct<u8, Tcmeb_SPEC>;
1218    impl Tcmeb {
1219        #[doc = "Disable compare match B register"]
1220        pub const _0: Self = Self::new(0);
1221
1222        #[doc = "Enable compare match B register"]
1223        pub const _1: Self = Self::new(1);
1224    }
1225    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1226    pub struct Topola_SPEC;
1227    pub type Topola = crate::EnumBitfieldStruct<u8, Topola_SPEC>;
1228    impl Topola {
1229        #[doc = "AGTOA Output is started at low"]
1230        pub const _0: Self = Self::new(0);
1231
1232        #[doc = "AGTOA Output is started at high"]
1233        pub const _1: Self = Self::new(1);
1234    }
1235    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1236    pub struct Toea_SPEC;
1237    pub type Toea = crate::EnumBitfieldStruct<u8, Toea_SPEC>;
1238    impl Toea {
1239        #[doc = "AGTOA output disabled (port)"]
1240        pub const _0: Self = Self::new(0);
1241
1242        #[doc = "AGTOA output enabled"]
1243        pub const _1: Self = Self::new(1);
1244    }
1245    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1246    pub struct Tcmea_SPEC;
1247    pub type Tcmea = crate::EnumBitfieldStruct<u8, Tcmea_SPEC>;
1248    impl Tcmea {
1249        #[doc = "Disable compare match A register"]
1250        pub const _0: Self = Self::new(0);
1251
1252        #[doc = "Enable compare match A register"]
1253        pub const _1: Self = Self::new(1);
1254    }
1255}
1256#[doc(hidden)]
1257#[derive(Copy, Clone, Eq, PartialEq)]
1258pub struct Agtiosel_SPEC;
1259impl crate::sealed::RegSpec for Agtiosel_SPEC {
1260    type DataType = u8;
1261}
1262
1263#[doc = "AGT Pin Select Register"]
1264pub type Agtiosel = crate::RegValueT<Agtiosel_SPEC>;
1265
1266impl Agtiosel {
1267    #[doc = "AGTIO input enable"]
1268    #[inline(always)]
1269    pub fn ties(
1270        self,
1271    ) -> crate::common::RegisterField<
1272        4,
1273        0x1,
1274        1,
1275        0,
1276        agtiosel::Ties,
1277        agtiosel::Ties,
1278        Agtiosel_SPEC,
1279        crate::common::RW,
1280    > {
1281        crate::common::RegisterField::<
1282            4,
1283            0x1,
1284            1,
1285            0,
1286            agtiosel::Ties,
1287            agtiosel::Ties,
1288            Agtiosel_SPEC,
1289            crate::common::RW,
1290        >::from_register(self, 0)
1291    }
1292
1293    #[doc = "These bits are read as 0000. The write value should be 0000."]
1294    #[inline(always)]
1295    pub fn reserved(
1296        self,
1297    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Agtiosel_SPEC, crate::common::RW> {
1298        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Agtiosel_SPEC,crate::common::RW>::from_register(self,0)
1299    }
1300}
1301impl ::core::default::Default for Agtiosel {
1302    #[inline(always)]
1303    fn default() -> Agtiosel {
1304        <crate::RegValueT<Agtiosel_SPEC> as RegisterValue<_>>::new(0)
1305    }
1306}
1307pub mod agtiosel {
1308
1309    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1310    pub struct Ties_SPEC;
1311    pub type Ties = crate::EnumBitfieldStruct<u8, Ties_SPEC>;
1312    impl Ties {
1313        #[doc = "external event input disable during software standby mode"]
1314        pub const _0: Self = Self::new(0);
1315
1316        #[doc = "external event input enable during software standby mode"]
1317        pub const _1: Self = Self::new(1);
1318    }
1319}
ra2a1_pac/agt0.rs

ra2a1_pac/
agt0.rs
