1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Product Organize"]
28unsafe impl ::core::marker::Send for super::Porga {}
29unsafe impl ::core::marker::Sync for super::Porga {}
30impl super::Porga {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "SAU Noise Filter Enable Register"]
38 #[inline(always)]
39 pub const fn snfen(&self) -> &'static crate::common::Reg<self::Snfen_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Snfen_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "TAU Noise Filter Enable Register"]
48 #[inline(always)]
49 pub const fn tnfen(&self) -> &'static crate::common::Reg<self::Tnfen_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Tnfen_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(1usize),
53 )
54 }
55 }
56
57 #[doc = "Input Switch Control Register"]
58 #[inline(always)]
59 pub const fn isc(&self) -> &'static crate::common::Reg<self::Isc_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Isc_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(3usize),
63 )
64 }
65 }
66
67 #[doc = "Timer Input Select Register 0"]
68 #[inline(always)]
69 pub const fn tis0(&self) -> &'static crate::common::Reg<self::Tis0_SPEC, crate::common::RW> {
70 unsafe {
71 crate::common::Reg::<self::Tis0_SPEC, crate::common::RW>::from_ptr(
72 self._svd2pac_as_ptr().add(4usize),
73 )
74 }
75 }
76
77 #[doc = "Timer Input Select Register 1"]
78 #[inline(always)]
79 pub const fn tis1(&self) -> &'static crate::common::Reg<self::Tis1_SPEC, crate::common::RW> {
80 unsafe {
81 crate::common::Reg::<self::Tis1_SPEC, crate::common::RW>::from_ptr(
82 self._svd2pac_as_ptr().add(5usize),
83 )
84 }
85 }
86
87 #[doc = "UART Loopback Select Register"]
88 #[inline(always)]
89 pub const fn ulbs(&self) -> &'static crate::common::Reg<self::Ulbs_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::Ulbs_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(9usize),
93 )
94 }
95 }
96}
97#[doc(hidden)]
98#[derive(Copy, Clone, Eq, PartialEq)]
99pub struct Snfen_SPEC;
100impl crate::sealed::RegSpec for Snfen_SPEC {
101 type DataType = u8;
102}
103
104#[doc = "SAU Noise Filter Enable Register"]
105pub type Snfen = crate::RegValueT<Snfen_SPEC>;
106
107impl Snfen {
108 #[doc = "Use of Noise Filter of RXD0 Pin"]
109 #[inline(always)]
110 pub fn snfen00(
111 self,
112 ) -> crate::common::RegisterField<
113 0,
114 0x1,
115 1,
116 0,
117 snfen::Snfen00,
118 snfen::Snfen00,
119 Snfen_SPEC,
120 crate::common::RW,
121 > {
122 crate::common::RegisterField::<
123 0,
124 0x1,
125 1,
126 0,
127 snfen::Snfen00,
128 snfen::Snfen00,
129 Snfen_SPEC,
130 crate::common::RW,
131 >::from_register(self, 0)
132 }
133
134 #[doc = "Use of Noise Filter of RXD1 Pin"]
135 #[inline(always)]
136 pub fn snfen10(
137 self,
138 ) -> crate::common::RegisterField<
139 2,
140 0x1,
141 1,
142 0,
143 snfen::Snfen10,
144 snfen::Snfen10,
145 Snfen_SPEC,
146 crate::common::RW,
147 > {
148 crate::common::RegisterField::<
149 2,
150 0x1,
151 1,
152 0,
153 snfen::Snfen10,
154 snfen::Snfen10,
155 Snfen_SPEC,
156 crate::common::RW,
157 >::from_register(self, 0)
158 }
159
160 #[doc = "Use of Noise Filter of RXD2 Pin"]
161 #[inline(always)]
162 pub fn snfen20(
163 self,
164 ) -> crate::common::RegisterField<
165 4,
166 0x1,
167 1,
168 0,
169 snfen::Snfen20,
170 snfen::Snfen20,
171 Snfen_SPEC,
172 crate::common::RW,
173 > {
174 crate::common::RegisterField::<
175 4,
176 0x1,
177 1,
178 0,
179 snfen::Snfen20,
180 snfen::Snfen20,
181 Snfen_SPEC,
182 crate::common::RW,
183 >::from_register(self, 0)
184 }
185}
186impl ::core::default::Default for Snfen {
187 #[inline(always)]
188 fn default() -> Snfen {
189 <crate::RegValueT<Snfen_SPEC> as RegisterValue<_>>::new(0)
190 }
191}
192pub mod snfen {
193
194 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
195 pub struct Snfen00_SPEC;
196 pub type Snfen00 = crate::EnumBitfieldStruct<u8, Snfen00_SPEC>;
197 impl Snfen00 {
198 #[doc = "Noise filter OFF"]
199 pub const _0: Self = Self::new(0);
200
201 #[doc = "Noise filter ON"]
202 pub const _1: Self = Self::new(1);
203 }
204 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
205 pub struct Snfen10_SPEC;
206 pub type Snfen10 = crate::EnumBitfieldStruct<u8, Snfen10_SPEC>;
207 impl Snfen10 {
208 #[doc = "Noise filter OFF"]
209 pub const _0: Self = Self::new(0);
210
211 #[doc = "Noise filter ON"]
212 pub const _1: Self = Self::new(1);
213 }
214 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
215 pub struct Snfen20_SPEC;
216 pub type Snfen20 = crate::EnumBitfieldStruct<u8, Snfen20_SPEC>;
217 impl Snfen20 {
218 #[doc = "Noise filter OFF"]
219 pub const _0: Self = Self::new(0);
220
221 #[doc = "Noise filter ON"]
222 pub const _1: Self = Self::new(1);
223 }
224}
225#[doc(hidden)]
226#[derive(Copy, Clone, Eq, PartialEq)]
227pub struct Tnfen_SPEC;
228impl crate::sealed::RegSpec for Tnfen_SPEC {
229 type DataType = u8;
230}
231
232#[doc = "TAU Noise Filter Enable Register"]
233pub type Tnfen = crate::RegValueT<Tnfen_SPEC>;
234
235impl Tnfen {
236 #[doc = "Enabling or Disabling Use of the Noise Filter for the TI00 Pin"]
237 #[inline(always)]
238 pub fn tnfen00(
239 self,
240 ) -> crate::common::RegisterField<
241 0,
242 0x1,
243 1,
244 0,
245 tnfen::Tnfen00,
246 tnfen::Tnfen00,
247 Tnfen_SPEC,
248 crate::common::RW,
249 > {
250 crate::common::RegisterField::<
251 0,
252 0x1,
253 1,
254 0,
255 tnfen::Tnfen00,
256 tnfen::Tnfen00,
257 Tnfen_SPEC,
258 crate::common::RW,
259 >::from_register(self, 0)
260 }
261
262 #[doc = "Enabling or Disabling Use of the Noise Filter for the TI01 Pin"]
263 #[inline(always)]
264 pub fn tnfen01(
265 self,
266 ) -> crate::common::RegisterField<
267 1,
268 0x1,
269 1,
270 0,
271 tnfen::Tnfen01,
272 tnfen::Tnfen01,
273 Tnfen_SPEC,
274 crate::common::RW,
275 > {
276 crate::common::RegisterField::<
277 1,
278 0x1,
279 1,
280 0,
281 tnfen::Tnfen01,
282 tnfen::Tnfen01,
283 Tnfen_SPEC,
284 crate::common::RW,
285 >::from_register(self, 0)
286 }
287
288 #[doc = "Enabling or Disabling Use of the Noise Filter for the TI02 Pin"]
289 #[inline(always)]
290 pub fn tnfen02(
291 self,
292 ) -> crate::common::RegisterField<
293 2,
294 0x1,
295 1,
296 0,
297 tnfen::Tnfen02,
298 tnfen::Tnfen02,
299 Tnfen_SPEC,
300 crate::common::RW,
301 > {
302 crate::common::RegisterField::<
303 2,
304 0x1,
305 1,
306 0,
307 tnfen::Tnfen02,
308 tnfen::Tnfen02,
309 Tnfen_SPEC,
310 crate::common::RW,
311 >::from_register(self, 0)
312 }
313
314 #[doc = "Enabling or Disabling Use of the Noise Filter for the TI03 Pin"]
315 #[inline(always)]
316 pub fn tnfen03(
317 self,
318 ) -> crate::common::RegisterField<
319 3,
320 0x1,
321 1,
322 0,
323 tnfen::Tnfen03,
324 tnfen::Tnfen03,
325 Tnfen_SPEC,
326 crate::common::RW,
327 > {
328 crate::common::RegisterField::<
329 3,
330 0x1,
331 1,
332 0,
333 tnfen::Tnfen03,
334 tnfen::Tnfen03,
335 Tnfen_SPEC,
336 crate::common::RW,
337 >::from_register(self, 0)
338 }
339
340 #[doc = "Enabling or Disabling Use of the Noise Filter for the TI04 Pin"]
341 #[inline(always)]
342 pub fn tnfen04(
343 self,
344 ) -> crate::common::RegisterField<
345 4,
346 0x1,
347 1,
348 0,
349 tnfen::Tnfen04,
350 tnfen::Tnfen04,
351 Tnfen_SPEC,
352 crate::common::RW,
353 > {
354 crate::common::RegisterField::<
355 4,
356 0x1,
357 1,
358 0,
359 tnfen::Tnfen04,
360 tnfen::Tnfen04,
361 Tnfen_SPEC,
362 crate::common::RW,
363 >::from_register(self, 0)
364 }
365
366 #[doc = "Enabling or Disabling Use of the Noise Filter for the TI05 Pin"]
367 #[inline(always)]
368 pub fn tnfen05(
369 self,
370 ) -> crate::common::RegisterField<
371 5,
372 0x1,
373 1,
374 0,
375 tnfen::Tnfen05,
376 tnfen::Tnfen05,
377 Tnfen_SPEC,
378 crate::common::RW,
379 > {
380 crate::common::RegisterField::<
381 5,
382 0x1,
383 1,
384 0,
385 tnfen::Tnfen05,
386 tnfen::Tnfen05,
387 Tnfen_SPEC,
388 crate::common::RW,
389 >::from_register(self, 0)
390 }
391
392 #[doc = "Enabling or Disabling Use of the Noise Filter for the TI06 Pin"]
393 #[inline(always)]
394 pub fn tnfen06(
395 self,
396 ) -> crate::common::RegisterField<
397 6,
398 0x1,
399 1,
400 0,
401 tnfen::Tnfen06,
402 tnfen::Tnfen06,
403 Tnfen_SPEC,
404 crate::common::RW,
405 > {
406 crate::common::RegisterField::<
407 6,
408 0x1,
409 1,
410 0,
411 tnfen::Tnfen06,
412 tnfen::Tnfen06,
413 Tnfen_SPEC,
414 crate::common::RW,
415 >::from_register(self, 0)
416 }
417
418 #[doc = "Enabling or Disabling Use of the Noise Filter for the TI07 Pin"]
419 #[inline(always)]
420 pub fn tnfen07(
421 self,
422 ) -> crate::common::RegisterField<
423 7,
424 0x1,
425 1,
426 0,
427 tnfen::Tnfen07,
428 tnfen::Tnfen07,
429 Tnfen_SPEC,
430 crate::common::RW,
431 > {
432 crate::common::RegisterField::<
433 7,
434 0x1,
435 1,
436 0,
437 tnfen::Tnfen07,
438 tnfen::Tnfen07,
439 Tnfen_SPEC,
440 crate::common::RW,
441 >::from_register(self, 0)
442 }
443}
444impl ::core::default::Default for Tnfen {
445 #[inline(always)]
446 fn default() -> Tnfen {
447 <crate::RegValueT<Tnfen_SPEC> as RegisterValue<_>>::new(0)
448 }
449}
450pub mod tnfen {
451
452 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
453 pub struct Tnfen00_SPEC;
454 pub type Tnfen00 = crate::EnumBitfieldStruct<u8, Tnfen00_SPEC>;
455 impl Tnfen00 {
456 #[doc = "Turns the noise filter off"]
457 pub const _0: Self = Self::new(0);
458
459 #[doc = "Turns the noise filter on"]
460 pub const _1: Self = Self::new(1);
461 }
462 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
463 pub struct Tnfen01_SPEC;
464 pub type Tnfen01 = crate::EnumBitfieldStruct<u8, Tnfen01_SPEC>;
465 impl Tnfen01 {
466 #[doc = "Turns the noise filter off"]
467 pub const _0: Self = Self::new(0);
468
469 #[doc = "Turns the noise filter on"]
470 pub const _1: Self = Self::new(1);
471 }
472 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
473 pub struct Tnfen02_SPEC;
474 pub type Tnfen02 = crate::EnumBitfieldStruct<u8, Tnfen02_SPEC>;
475 impl Tnfen02 {
476 #[doc = "Turns the noise filter off"]
477 pub const _0: Self = Self::new(0);
478
479 #[doc = "Turns the noise filter on"]
480 pub const _1: Self = Self::new(1);
481 }
482 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
483 pub struct Tnfen03_SPEC;
484 pub type Tnfen03 = crate::EnumBitfieldStruct<u8, Tnfen03_SPEC>;
485 impl Tnfen03 {
486 #[doc = "Turns the noise filter off"]
487 pub const _0: Self = Self::new(0);
488
489 #[doc = "Turns the noise filter on"]
490 pub const _1: Self = Self::new(1);
491 }
492 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
493 pub struct Tnfen04_SPEC;
494 pub type Tnfen04 = crate::EnumBitfieldStruct<u8, Tnfen04_SPEC>;
495 impl Tnfen04 {
496 #[doc = "Turns the noise filter off"]
497 pub const _0: Self = Self::new(0);
498
499 #[doc = "Turns the noise filter on"]
500 pub const _1: Self = Self::new(1);
501 }
502 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
503 pub struct Tnfen05_SPEC;
504 pub type Tnfen05 = crate::EnumBitfieldStruct<u8, Tnfen05_SPEC>;
505 impl Tnfen05 {
506 #[doc = "Turns the noise filter off"]
507 pub const _0: Self = Self::new(0);
508
509 #[doc = "Turns the noise filter on"]
510 pub const _1: Self = Self::new(1);
511 }
512 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
513 pub struct Tnfen06_SPEC;
514 pub type Tnfen06 = crate::EnumBitfieldStruct<u8, Tnfen06_SPEC>;
515 impl Tnfen06 {
516 #[doc = "Turns the noise filter off"]
517 pub const _0: Self = Self::new(0);
518
519 #[doc = "Turns the noise filter on"]
520 pub const _1: Self = Self::new(1);
521 }
522 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
523 pub struct Tnfen07_SPEC;
524 pub type Tnfen07 = crate::EnumBitfieldStruct<u8, Tnfen07_SPEC>;
525 impl Tnfen07 {
526 #[doc = "Turns the noise filter off"]
527 pub const _0: Self = Self::new(0);
528
529 #[doc = "Turns the noise filter on"]
530 pub const _1: Self = Self::new(1);
531 }
532}
533#[doc(hidden)]
534#[derive(Copy, Clone, Eq, PartialEq)]
535pub struct Isc_SPEC;
536impl crate::sealed::RegSpec for Isc_SPEC {
537 type DataType = u8;
538}
539
540#[doc = "Input Switch Control Register"]
541pub type Isc = crate::RegValueT<Isc_SPEC>;
542
543impl Isc {
544 #[doc = "Switching External Interrupt (IRQ0) Input"]
545 #[inline(always)]
546 pub fn isc0(
547 self,
548 ) -> crate::common::RegisterField<0, 0x1, 1, 0, isc::Isc0, isc::Isc0, Isc_SPEC, crate::common::RW>
549 {
550 crate::common::RegisterField::<
551 0,
552 0x1,
553 1,
554 0,
555 isc::Isc0,
556 isc::Isc0,
557 Isc_SPEC,
558 crate::common::RW,
559 >::from_register(self, 0)
560 }
561
562 #[doc = "Switching Channel 7 Input of Timer Array Unit"]
563 #[inline(always)]
564 pub fn isc1(
565 self,
566 ) -> crate::common::RegisterField<1, 0x1, 1, 0, isc::Isc1, isc::Isc1, Isc_SPEC, crate::common::RW>
567 {
568 crate::common::RegisterField::<
569 1,
570 0x1,
571 1,
572 0,
573 isc::Isc1,
574 isc::Isc1,
575 Isc_SPEC,
576 crate::common::RW,
577 >::from_register(self, 0)
578 }
579
580 #[doc = "Setting of the SSI00 Input of Channel 0 in the Communications Through SPI00 in the Slave Mode"]
581 #[inline(always)]
582 pub fn ssie00(
583 self,
584 ) -> crate::common::RegisterField<
585 2,
586 0x1,
587 1,
588 0,
589 isc::Ssie00,
590 isc::Ssie00,
591 Isc_SPEC,
592 crate::common::RW,
593 > {
594 crate::common::RegisterField::<
595 2,
596 0x1,
597 1,
598 0,
599 isc::Ssie00,
600 isc::Ssie00,
601 Isc_SPEC,
602 crate::common::RW,
603 >::from_register(self, 0)
604 }
605}
606impl ::core::default::Default for Isc {
607 #[inline(always)]
608 fn default() -> Isc {
609 <crate::RegValueT<Isc_SPEC> as RegisterValue<_>>::new(0)
610 }
611}
612pub mod isc {
613
614 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
615 pub struct Isc0_SPEC;
616 pub type Isc0 = crate::EnumBitfieldStruct<u8, Isc0_SPEC>;
617 impl Isc0 {
618 #[doc = "Uses the input signal of the IRQ0 pin as an external interrupt (normal operation)"]
619 pub const _0: Self = Self::new(0);
620
621 #[doc = "Uses the input signal of the RXD2 pin as an external interrupt (wakeup signal detection)"]
622 pub const _1: Self = Self::new(1);
623 }
624 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
625 pub struct Isc1_SPEC;
626 pub type Isc1 = crate::EnumBitfieldStruct<u8, Isc1_SPEC>;
627 impl Isc1 {
628 #[doc = "Uses the input signal of the TI07 pin as a timer input (normal operation)"]
629 pub const _0: Self = Self::new(0);
630
631 #[doc = "Input signal of the RXD2 pin is used as timer input (detects the wakeup signal and measures the low width of the break field and the pulse width of the sync field)."]
632 pub const _1: Self = Self::new(1);
633 }
634 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
635 pub struct Ssie00_SPEC;
636 pub type Ssie00 = crate::EnumBitfieldStruct<u8, Ssie00_SPEC>;
637 impl Ssie00 {
638 #[doc = "The SSI00 input is disabled."]
639 pub const _0: Self = Self::new(0);
640
641 #[doc = "The SSI00 input is enabled."]
642 pub const _1: Self = Self::new(1);
643 }
644}
645#[doc(hidden)]
646#[derive(Copy, Clone, Eq, PartialEq)]
647pub struct Tis0_SPEC;
648impl crate::sealed::RegSpec for Tis0_SPEC {
649 type DataType = u8;
650}
651
652#[doc = "Timer Input Select Register 0"]
653pub type Tis0 = crate::RegValueT<Tis0_SPEC>;
654
655impl Tis0 {
656 #[doc = "Selection of Timer Input Used with Channel 5"]
657 #[inline(always)]
658 pub fn tis(
659 self,
660 ) -> crate::common::RegisterField<
661 0,
662 0x7,
663 1,
664 0,
665 tis0::Tis,
666 tis0::Tis,
667 Tis0_SPEC,
668 crate::common::RW,
669 > {
670 crate::common::RegisterField::<
671 0,
672 0x7,
673 1,
674 0,
675 tis0::Tis,
676 tis0::Tis,
677 Tis0_SPEC,
678 crate::common::RW,
679 >::from_register(self, 0)
680 }
681}
682impl ::core::default::Default for Tis0 {
683 #[inline(always)]
684 fn default() -> Tis0 {
685 <crate::RegValueT<Tis0_SPEC> as RegisterValue<_>>::new(0)
686 }
687}
688pub mod tis0 {
689
690 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
691 pub struct Tis_SPEC;
692 pub type Tis = crate::EnumBitfieldStruct<u8, Tis_SPEC>;
693 impl Tis {
694 #[doc = "Input signal of timer input pin (TI05)"]
695 pub const _000: Self = Self::new(0);
696
697 #[doc = "Middle-speed on-chip oscillator (MOCO)"]
698 pub const _011: Self = Self::new(3);
699
700 #[doc = "Low-speed on-chip oscillator (LOCO)"]
701 pub const _100: Self = Self::new(4);
702
703 #[doc = "Sub System clock (FSUB)"]
704 pub const _101: Self = Self::new(5);
705 }
706}
707#[doc(hidden)]
708#[derive(Copy, Clone, Eq, PartialEq)]
709pub struct Tis1_SPEC;
710impl crate::sealed::RegSpec for Tis1_SPEC {
711 type DataType = u8;
712}
713
714#[doc = "Timer Input Select Register 1"]
715pub type Tis1 = crate::RegValueT<Tis1_SPEC>;
716
717impl Tis1 {
718 #[doc = "Selection of Timer Input Used with Channel 0"]
719 #[inline(always)]
720 pub fn tis0(
721 self,
722 ) -> crate::common::RegisterField<
723 0,
724 0x1,
725 1,
726 0,
727 tis1::Tis0,
728 tis1::Tis0,
729 Tis1_SPEC,
730 crate::common::RW,
731 > {
732 crate::common::RegisterField::<
733 0,
734 0x1,
735 1,
736 0,
737 tis1::Tis0,
738 tis1::Tis0,
739 Tis1_SPEC,
740 crate::common::RW,
741 >::from_register(self, 0)
742 }
743
744 #[doc = "Selection of Timer Input Used with Channel 1"]
745 #[inline(always)]
746 pub fn tis1(
747 self,
748 ) -> crate::common::RegisterField<
749 1,
750 0x1,
751 1,
752 0,
753 tis1::Tis1,
754 tis1::Tis1,
755 Tis1_SPEC,
756 crate::common::RW,
757 > {
758 crate::common::RegisterField::<
759 1,
760 0x1,
761 1,
762 0,
763 tis1::Tis1,
764 tis1::Tis1,
765 Tis1_SPEC,
766 crate::common::RW,
767 >::from_register(self, 0)
768 }
769}
770impl ::core::default::Default for Tis1 {
771 #[inline(always)]
772 fn default() -> Tis1 {
773 <crate::RegValueT<Tis1_SPEC> as RegisterValue<_>>::new(0)
774 }
775}
776pub mod tis1 {
777
778 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
779 pub struct Tis0_SPEC;
780 pub type Tis0 = crate::EnumBitfieldStruct<u8, Tis0_SPEC>;
781 impl Tis0 {
782 #[doc = "Input signal of timer input pin (TI00)"]
783 pub const _0: Self = Self::new(0);
784
785 #[doc = "Event input signal from ELC"]
786 pub const _1: Self = Self::new(1);
787 }
788 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
789 pub struct Tis1_SPEC;
790 pub type Tis1 = crate::EnumBitfieldStruct<u8, Tis1_SPEC>;
791 impl Tis1 {
792 #[doc = "Input signal of timer input pin (TI01)"]
793 pub const _0: Self = Self::new(0);
794
795 #[doc = "Event input signal from ELC"]
796 pub const _1: Self = Self::new(1);
797 }
798}
799#[doc(hidden)]
800#[derive(Copy, Clone, Eq, PartialEq)]
801pub struct Ulbs_SPEC;
802impl crate::sealed::RegSpec for Ulbs_SPEC {
803 type DataType = u8;
804}
805
806#[doc = "UART Loopback Select Register"]
807pub type Ulbs = crate::RegValueT<Ulbs_SPEC>;
808
809impl Ulbs {
810 #[doc = "Selection of the UART0 Loopback Function"]
811 #[inline(always)]
812 pub fn ulbs0(
813 self,
814 ) -> crate::common::RegisterField<
815 0,
816 0x1,
817 1,
818 0,
819 ulbs::Ulbs0,
820 ulbs::Ulbs0,
821 Ulbs_SPEC,
822 crate::common::RW,
823 > {
824 crate::common::RegisterField::<
825 0,
826 0x1,
827 1,
828 0,
829 ulbs::Ulbs0,
830 ulbs::Ulbs0,
831 Ulbs_SPEC,
832 crate::common::RW,
833 >::from_register(self, 0)
834 }
835
836 #[doc = "Selection of the UART1 Loopback Function"]
837 #[inline(always)]
838 pub fn ulbs1(
839 self,
840 ) -> crate::common::RegisterField<
841 1,
842 0x1,
843 1,
844 0,
845 ulbs::Ulbs1,
846 ulbs::Ulbs1,
847 Ulbs_SPEC,
848 crate::common::RW,
849 > {
850 crate::common::RegisterField::<
851 1,
852 0x1,
853 1,
854 0,
855 ulbs::Ulbs1,
856 ulbs::Ulbs1,
857 Ulbs_SPEC,
858 crate::common::RW,
859 >::from_register(self, 0)
860 }
861
862 #[doc = "Selection of the UART2 Loopback Function"]
863 #[inline(always)]
864 pub fn ulbs2(
865 self,
866 ) -> crate::common::RegisterField<
867 2,
868 0x1,
869 1,
870 0,
871 ulbs::Ulbs2,
872 ulbs::Ulbs2,
873 Ulbs_SPEC,
874 crate::common::RW,
875 > {
876 crate::common::RegisterField::<
877 2,
878 0x1,
879 1,
880 0,
881 ulbs::Ulbs2,
882 ulbs::Ulbs2,
883 Ulbs_SPEC,
884 crate::common::RW,
885 >::from_register(self, 0)
886 }
887
888 #[doc = "Selection of the UARTA Loopback Function"]
889 #[inline(always)]
890 pub fn ulbs4(
891 self,
892 ) -> crate::common::RegisterField<
893 4,
894 0x1,
895 1,
896 0,
897 ulbs::Ulbs4,
898 ulbs::Ulbs4,
899 Ulbs_SPEC,
900 crate::common::RW,
901 > {
902 crate::common::RegisterField::<
903 4,
904 0x1,
905 1,
906 0,
907 ulbs::Ulbs4,
908 ulbs::Ulbs4,
909 Ulbs_SPEC,
910 crate::common::RW,
911 >::from_register(self, 0)
912 }
913}
914impl ::core::default::Default for Ulbs {
915 #[inline(always)]
916 fn default() -> Ulbs {
917 <crate::RegValueT<Ulbs_SPEC> as RegisterValue<_>>::new(0)
918 }
919}
920pub mod ulbs {
921
922 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
923 pub struct Ulbs0_SPEC;
924 pub type Ulbs0 = crate::EnumBitfieldStruct<u8, Ulbs0_SPEC>;
925 impl Ulbs0 {
926 #[doc = "Inputs the states of the RXD0 pin of serial array unit UART0 to the reception shift register."]
927 pub const _0: Self = Self::new(0);
928
929 #[doc = "Loops back output from the transmission shift register to the reception shift register."]
930 pub const _1: Self = Self::new(1);
931 }
932 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
933 pub struct Ulbs1_SPEC;
934 pub type Ulbs1 = crate::EnumBitfieldStruct<u8, Ulbs1_SPEC>;
935 impl Ulbs1 {
936 #[doc = "Inputs the states of the RXD1 pin of serial array unit UART1 to the reception shift register."]
937 pub const _0: Self = Self::new(0);
938
939 #[doc = "Loops back output from the transmission shift register to the reception shift register."]
940 pub const _1: Self = Self::new(1);
941 }
942 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
943 pub struct Ulbs2_SPEC;
944 pub type Ulbs2 = crate::EnumBitfieldStruct<u8, Ulbs2_SPEC>;
945 impl Ulbs2 {
946 #[doc = "Inputs the states of the RXD2 pin of serial array unit UART2 to the reception shift register."]
947 pub const _0: Self = Self::new(0);
948
949 #[doc = "Loops back output from the transmission shift register to the reception shift register."]
950 pub const _1: Self = Self::new(1);
951 }
952 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
953 pub struct Ulbs4_SPEC;
954 pub type Ulbs4 = crate::EnumBitfieldStruct<u8, Ulbs4_SPEC>;
955 impl Ulbs4 {
956 #[doc = "Inputs the states of the RXDA0 pin of serial interface UARTA0 to the reception shift register."]
957 pub const _0: Self = Self::new(0);
958
959 #[doc = "Loops back output from the transmission shift register to the reception shift register."]
960 pub const _1: Self = Self::new(1);
961 }
962}