ra0e1_pac/
lib.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.10.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:13 +0000
19#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "Arm Cortex-M23 based Microcontroller RA0E1 device"]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "adc_d")]
31pub mod adc_d;
32#[cfg(feature = "bus")]
33pub mod bus;
34#[cfg(feature = "crc")]
35pub mod crc;
36#[cfg(feature = "dbg")]
37pub mod dbg;
38#[cfg(feature = "dtc")]
39pub mod dtc;
40#[cfg(feature = "elc")]
41pub mod elc;
42#[cfg(feature = "flcn")]
43pub mod flcn;
44#[cfg(feature = "icu")]
45pub mod icu;
46#[cfg(feature = "iica")]
47pub mod iica;
48#[cfg(feature = "iwdt")]
49pub mod iwdt;
50#[cfg(feature = "mstp")]
51pub mod mstp;
52#[cfg(feature = "pclbuz")]
53pub mod pclbuz;
54#[cfg(feature = "pfs_a")]
55pub mod pfs_a;
56#[cfg(feature = "porga")]
57pub mod porga;
58#[cfg(feature = "port0")]
59pub mod port0;
60#[cfg(feature = "port1")]
61pub mod port1;
62#[cfg(feature = "port2")]
63pub mod port2;
64#[cfg(feature = "port3")]
65pub mod port3;
66#[cfg(feature = "port4")]
67pub mod port4;
68#[cfg(feature = "port9")]
69pub mod port9;
70#[cfg(feature = "rtc_c")]
71pub mod rtc_c;
72#[cfg(feature = "sau0")]
73pub mod sau0;
74#[cfg(feature = "sau1")]
75pub mod sau1;
76#[cfg(feature = "sram")]
77pub mod sram;
78#[cfg(feature = "sysc")]
79pub mod sysc;
80#[cfg(feature = "tau")]
81pub mod tau;
82#[cfg(feature = "tml32")]
83pub mod tml32;
84#[cfg(feature = "trng")]
85pub mod trng;
86#[cfg(feature = "uarta")]
87pub mod uarta;
88
89#[cfg(feature = "sram")]
90#[derive(Copy, Clone, Eq, PartialEq)]
91pub struct Sram {
92    ptr: *mut u8,
93}
94#[cfg(feature = "sram")]
95pub const SRAM: self::Sram = self::Sram {
96    ptr: 0x40002000u32 as _,
97};
98#[cfg(feature = "bus")]
99#[derive(Copy, Clone, Eq, PartialEq)]
100pub struct Bus {
101    ptr: *mut u8,
102}
103#[cfg(feature = "bus")]
104pub const BUS: self::Bus = self::Bus {
105    ptr: 0x40003000u32 as _,
106};
107#[cfg(feature = "dtc")]
108#[derive(Copy, Clone, Eq, PartialEq)]
109pub struct Dtc {
110    ptr: *mut u8,
111}
112#[cfg(feature = "dtc")]
113pub const DTC: self::Dtc = self::Dtc {
114    ptr: 0x40005400u32 as _,
115};
116#[cfg(feature = "icu")]
117#[derive(Copy, Clone, Eq, PartialEq)]
118pub struct Icu {
119    ptr: *mut u8,
120}
121#[cfg(feature = "icu")]
122pub const ICU: self::Icu = self::Icu {
123    ptr: 0x40006000u32 as _,
124};
125#[cfg(feature = "dbg")]
126#[derive(Copy, Clone, Eq, PartialEq)]
127pub struct Dbg {
128    ptr: *mut u8,
129}
130#[cfg(feature = "dbg")]
131pub const DBG: self::Dbg = self::Dbg {
132    ptr: 0x4001b000u32 as _,
133};
134#[cfg(feature = "sysc")]
135#[derive(Copy, Clone, Eq, PartialEq)]
136pub struct Sysc {
137    ptr: *mut u8,
138}
139#[cfg(feature = "sysc")]
140pub const SYSC: self::Sysc = self::Sysc {
141    ptr: 0x4001e000u32 as _,
142};
143#[cfg(feature = "elc")]
144#[derive(Copy, Clone, Eq, PartialEq)]
145pub struct Elc {
146    ptr: *mut u8,
147}
148#[cfg(feature = "elc")]
149pub const ELC: self::Elc = self::Elc {
150    ptr: 0x40041000u32 as _,
151};
152#[cfg(feature = "iwdt")]
153#[derive(Copy, Clone, Eq, PartialEq)]
154pub struct Iwdt {
155    ptr: *mut u8,
156}
157#[cfg(feature = "iwdt")]
158pub const IWDT: self::Iwdt = self::Iwdt {
159    ptr: 0x40044400u32 as _,
160};
161#[cfg(feature = "mstp")]
162#[derive(Copy, Clone, Eq, PartialEq)]
163pub struct Mstp {
164    ptr: *mut u8,
165}
166#[cfg(feature = "mstp")]
167pub const MSTP: self::Mstp = self::Mstp {
168    ptr: 0x40047000u32 as _,
169};
170#[cfg(feature = "crc")]
171#[derive(Copy, Clone, Eq, PartialEq)]
172pub struct Crc {
173    ptr: *mut u8,
174}
175#[cfg(feature = "crc")]
176pub const CRC: self::Crc = self::Crc {
177    ptr: 0x40074000u32 as _,
178};
179#[cfg(feature = "port0")]
180#[derive(Copy, Clone, Eq, PartialEq)]
181pub struct Port0 {
182    ptr: *mut u8,
183}
184#[cfg(feature = "port0")]
185pub const PORT0: self::Port0 = self::Port0 {
186    ptr: 0x400a0000u32 as _,
187};
188#[cfg(feature = "port1")]
189#[derive(Copy, Clone, Eq, PartialEq)]
190pub struct Port1 {
191    ptr: *mut u8,
192}
193#[cfg(feature = "port1")]
194pub const PORT1: self::Port1 = self::Port1 {
195    ptr: 0x400a0020u32 as _,
196};
197#[cfg(feature = "port2")]
198#[derive(Copy, Clone, Eq, PartialEq)]
199pub struct Port2 {
200    ptr: *mut u8,
201}
202#[cfg(feature = "port2")]
203pub const PORT2: self::Port2 = self::Port2 {
204    ptr: 0x400a0040u32 as _,
205};
206#[cfg(feature = "port3")]
207#[derive(Copy, Clone, Eq, PartialEq)]
208pub struct Port3 {
209    ptr: *mut u8,
210}
211#[cfg(feature = "port3")]
212pub const PORT3: self::Port3 = self::Port3 {
213    ptr: 0x400a0060u32 as _,
214};
215#[cfg(feature = "port4")]
216#[derive(Copy, Clone, Eq, PartialEq)]
217pub struct Port4 {
218    ptr: *mut u8,
219}
220#[cfg(feature = "port4")]
221pub const PORT4: self::Port4 = self::Port4 {
222    ptr: 0x400a0080u32 as _,
223};
224#[cfg(feature = "port9")]
225#[derive(Copy, Clone, Eq, PartialEq)]
226pub struct Port9 {
227    ptr: *mut u8,
228}
229#[cfg(feature = "port9")]
230pub const PORT9: self::Port9 = self::Port9 {
231    ptr: 0x400a0120u32 as _,
232};
233#[cfg(feature = "pfs_a")]
234#[derive(Copy, Clone, Eq, PartialEq)]
235pub struct PfsA {
236    ptr: *mut u8,
237}
238#[cfg(feature = "pfs_a")]
239pub const PFS_A: self::PfsA = self::PfsA {
240    ptr: 0x400a0200u32 as _,
241};
242#[cfg(feature = "porga")]
243#[derive(Copy, Clone, Eq, PartialEq)]
244pub struct Porga {
245    ptr: *mut u8,
246}
247#[cfg(feature = "porga")]
248pub const PORGA: self::Porga = self::Porga {
249    ptr: 0x400a1000u32 as _,
250};
251#[cfg(feature = "adc_d")]
252#[derive(Copy, Clone, Eq, PartialEq)]
253pub struct AdcD {
254    ptr: *mut u8,
255}
256#[cfg(feature = "adc_d")]
257pub const ADC_D: self::AdcD = self::AdcD {
258    ptr: 0x400a1800u32 as _,
259};
260#[cfg(feature = "sau0")]
261#[derive(Copy, Clone, Eq, PartialEq)]
262pub struct Sau0 {
263    ptr: *mut u8,
264}
265#[cfg(feature = "sau0")]
266pub const SAU0: self::Sau0 = self::Sau0 {
267    ptr: 0x400a2000u32 as _,
268};
269#[cfg(feature = "sau1")]
270#[derive(Copy, Clone, Eq, PartialEq)]
271pub struct Sau1 {
272    ptr: *mut u8,
273}
274#[cfg(feature = "sau1")]
275pub const SAU1: self::Sau1 = self::Sau1 {
276    ptr: 0x400a2200u32 as _,
277};
278#[cfg(feature = "tau")]
279#[derive(Copy, Clone, Eq, PartialEq)]
280pub struct Tau {
281    ptr: *mut u8,
282}
283#[cfg(feature = "tau")]
284pub const TAU: self::Tau = self::Tau {
285    ptr: 0x400a2600u32 as _,
286};
287#[cfg(feature = "rtc_c")]
288#[derive(Copy, Clone, Eq, PartialEq)]
289pub struct RtcC {
290    ptr: *mut u8,
291}
292#[cfg(feature = "rtc_c")]
293pub const RTC_C: self::RtcC = self::RtcC {
294    ptr: 0x400a2c00u32 as _,
295};
296#[cfg(feature = "iica")]
297#[derive(Copy, Clone, Eq, PartialEq)]
298pub struct Iica {
299    ptr: *mut u8,
300}
301#[cfg(feature = "iica")]
302pub const IICA: self::Iica = self::Iica {
303    ptr: 0x400a3000u32 as _,
304};
305#[cfg(feature = "uarta")]
306#[derive(Copy, Clone, Eq, PartialEq)]
307pub struct Uarta {
308    ptr: *mut u8,
309}
310#[cfg(feature = "uarta")]
311pub const UARTA: self::Uarta = self::Uarta {
312    ptr: 0x400a3400u32 as _,
313};
314#[cfg(feature = "tml32")]
315#[derive(Copy, Clone, Eq, PartialEq)]
316pub struct Tml32 {
317    ptr: *mut u8,
318}
319#[cfg(feature = "tml32")]
320pub const TML32: self::Tml32 = self::Tml32 {
321    ptr: 0x400a3800u32 as _,
322};
323#[cfg(feature = "pclbuz")]
324#[derive(Copy, Clone, Eq, PartialEq)]
325pub struct Pclbuz {
326    ptr: *mut u8,
327}
328#[cfg(feature = "pclbuz")]
329pub const PCLBUZ: self::Pclbuz = self::Pclbuz {
330    ptr: 0x400a3b00u32 as _,
331};
332#[cfg(feature = "trng")]
333#[derive(Copy, Clone, Eq, PartialEq)]
334pub struct Trng {
335    ptr: *mut u8,
336}
337#[cfg(feature = "trng")]
338pub const TRNG: self::Trng = self::Trng {
339    ptr: 0x400d1000u32 as _,
340};
341#[cfg(feature = "flcn")]
342#[derive(Copy, Clone, Eq, PartialEq)]
343pub struct Flcn {
344    ptr: *mut u8,
345}
346#[cfg(feature = "flcn")]
347pub const FLCN: self::Flcn = self::Flcn {
348    ptr: 0x407ec000u32 as _,
349};
350
351pub use cortex_m::peripheral::Peripherals as CorePeripherals;
352pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, ITM, NVIC, SCB, SYST, TPIU};
353#[doc = "Number available in the NVIC for configuring priority"]
354pub const NVIC_PRIO_BITS: u8 = 2;
355#[doc(hidden)]
356pub union Vector {
357    _handler: unsafe extern "C" fn(),
358    _reserved: u32,
359}
360#[cfg(feature = "rt")]
361pub use self::Interrupt as interrupt;
362#[cfg(feature = "rt")]
363pub use cortex_m_rt::interrupt;
364#[cfg(feature = "rt")]
365pub mod interrupt_handlers {
366    unsafe extern "C" {
367        pub fn IEL0();
368        pub fn IEL1();
369        pub fn IEL2();
370        pub fn IEL3();
371        pub fn IEL4();
372        pub fn IEL5();
373        pub fn IEL6();
374        pub fn IEL7();
375        pub fn IEL8();
376        pub fn IEL9();
377        pub fn IEL10();
378        pub fn IEL11();
379        pub fn IEL12();
380        pub fn IEL13();
381        pub fn IEL14();
382        pub fn IEL15();
383        pub fn IEL16();
384        pub fn IEL17();
385        pub fn IEL18();
386        pub fn IEL19();
387        pub fn IEL20();
388        pub fn IEL21();
389        pub fn IEL22();
390        pub fn IEL23();
391        pub fn IEL24();
392        pub fn IEL25();
393        pub fn IEL26();
394        pub fn IEL27();
395        pub fn IEL28();
396        pub fn IEL29();
397        pub fn IEL30();
398        pub fn IEL31();
399        pub fn IEL32();
400        pub fn IEL33();
401        pub fn IEL34();
402        pub fn IEL35();
403        pub fn IEL36();
404        pub fn IEL37();
405        pub fn IEL38();
406        pub fn IEL39();
407        pub fn IEL40();
408        pub fn IEL41();
409        pub fn IEL42();
410        pub fn IEL43();
411        pub fn IEL44();
412        pub fn IEL45();
413        pub fn IEL46();
414        pub fn IEL47();
415        pub fn IEL48();
416        pub fn IEL49();
417        pub fn IEL50();
418        pub fn IEL51();
419        pub fn IEL52();
420        pub fn IEL53();
421        pub fn IEL54();
422        pub fn IEL55();
423        pub fn IEL56();
424        pub fn IEL57();
425        pub fn IEL58();
426        pub fn IEL59();
427        pub fn IEL60();
428        pub fn IEL61();
429        pub fn IEL62();
430        pub fn IEL63();
431    }
432}
433#[cfg(feature = "rt")]
434#[doc(hidden)]
435#[unsafe(link_section = ".vector_table.interrupts")]
436#[unsafe(no_mangle)]
437pub static __INTERRUPTS: [Vector; 64] = [
438    Vector {
439        _handler: interrupt_handlers::IEL0,
440    },
441    Vector {
442        _handler: interrupt_handlers::IEL1,
443    },
444    Vector {
445        _handler: interrupt_handlers::IEL2,
446    },
447    Vector {
448        _handler: interrupt_handlers::IEL3,
449    },
450    Vector {
451        _handler: interrupt_handlers::IEL4,
452    },
453    Vector {
454        _handler: interrupt_handlers::IEL5,
455    },
456    Vector {
457        _handler: interrupt_handlers::IEL6,
458    },
459    Vector {
460        _handler: interrupt_handlers::IEL7,
461    },
462    Vector {
463        _handler: interrupt_handlers::IEL8,
464    },
465    Vector {
466        _handler: interrupt_handlers::IEL9,
467    },
468    Vector {
469        _handler: interrupt_handlers::IEL10,
470    },
471    Vector {
472        _handler: interrupt_handlers::IEL11,
473    },
474    Vector {
475        _handler: interrupt_handlers::IEL12,
476    },
477    Vector {
478        _handler: interrupt_handlers::IEL13,
479    },
480    Vector {
481        _handler: interrupt_handlers::IEL14,
482    },
483    Vector {
484        _handler: interrupt_handlers::IEL15,
485    },
486    Vector {
487        _handler: interrupt_handlers::IEL16,
488    },
489    Vector {
490        _handler: interrupt_handlers::IEL17,
491    },
492    Vector {
493        _handler: interrupt_handlers::IEL18,
494    },
495    Vector {
496        _handler: interrupt_handlers::IEL19,
497    },
498    Vector {
499        _handler: interrupt_handlers::IEL20,
500    },
501    Vector {
502        _handler: interrupt_handlers::IEL21,
503    },
504    Vector {
505        _handler: interrupt_handlers::IEL22,
506    },
507    Vector {
508        _handler: interrupt_handlers::IEL23,
509    },
510    Vector {
511        _handler: interrupt_handlers::IEL24,
512    },
513    Vector {
514        _handler: interrupt_handlers::IEL25,
515    },
516    Vector {
517        _handler: interrupt_handlers::IEL26,
518    },
519    Vector {
520        _handler: interrupt_handlers::IEL27,
521    },
522    Vector {
523        _handler: interrupt_handlers::IEL28,
524    },
525    Vector {
526        _handler: interrupt_handlers::IEL29,
527    },
528    Vector {
529        _handler: interrupt_handlers::IEL30,
530    },
531    Vector {
532        _handler: interrupt_handlers::IEL31,
533    },
534    Vector {
535        _handler: interrupt_handlers::IEL32,
536    },
537    Vector {
538        _handler: interrupt_handlers::IEL33,
539    },
540    Vector {
541        _handler: interrupt_handlers::IEL34,
542    },
543    Vector {
544        _handler: interrupt_handlers::IEL35,
545    },
546    Vector {
547        _handler: interrupt_handlers::IEL36,
548    },
549    Vector {
550        _handler: interrupt_handlers::IEL37,
551    },
552    Vector {
553        _handler: interrupt_handlers::IEL38,
554    },
555    Vector {
556        _handler: interrupt_handlers::IEL39,
557    },
558    Vector {
559        _handler: interrupt_handlers::IEL40,
560    },
561    Vector {
562        _handler: interrupt_handlers::IEL41,
563    },
564    Vector {
565        _handler: interrupt_handlers::IEL42,
566    },
567    Vector {
568        _handler: interrupt_handlers::IEL43,
569    },
570    Vector {
571        _handler: interrupt_handlers::IEL44,
572    },
573    Vector {
574        _handler: interrupt_handlers::IEL45,
575    },
576    Vector {
577        _handler: interrupt_handlers::IEL46,
578    },
579    Vector {
580        _handler: interrupt_handlers::IEL47,
581    },
582    Vector {
583        _handler: interrupt_handlers::IEL48,
584    },
585    Vector {
586        _handler: interrupt_handlers::IEL49,
587    },
588    Vector {
589        _handler: interrupt_handlers::IEL50,
590    },
591    Vector {
592        _handler: interrupt_handlers::IEL51,
593    },
594    Vector {
595        _handler: interrupt_handlers::IEL52,
596    },
597    Vector {
598        _handler: interrupt_handlers::IEL53,
599    },
600    Vector {
601        _handler: interrupt_handlers::IEL54,
602    },
603    Vector {
604        _handler: interrupt_handlers::IEL55,
605    },
606    Vector {
607        _handler: interrupt_handlers::IEL56,
608    },
609    Vector {
610        _handler: interrupt_handlers::IEL57,
611    },
612    Vector {
613        _handler: interrupt_handlers::IEL58,
614    },
615    Vector {
616        _handler: interrupt_handlers::IEL59,
617    },
618    Vector {
619        _handler: interrupt_handlers::IEL60,
620    },
621    Vector {
622        _handler: interrupt_handlers::IEL61,
623    },
624    Vector {
625        _handler: interrupt_handlers::IEL62,
626    },
627    Vector {
628        _handler: interrupt_handlers::IEL63,
629    },
630];
631#[doc = "Enumeration of all the interrupts."]
632#[derive(Copy, Clone, Debug, PartialEq, Eq)]
633#[repr(u16)]
634pub enum Interrupt {
635    #[doc = "ICU Interrupt 0"]
636    IEL0 = 0,
637
638    #[doc = "ICU Interrupt 1"]
639    IEL1 = 1,
640
641    #[doc = "ICU Interrupt 2"]
642    IEL2 = 2,
643
644    #[doc = "ICU Interrupt 3"]
645    IEL3 = 3,
646
647    #[doc = "ICU Interrupt 4"]
648    IEL4 = 4,
649
650    #[doc = "ICU Interrupt 5"]
651    IEL5 = 5,
652
653    #[doc = "ICU Interrupt 6"]
654    IEL6 = 6,
655
656    #[doc = "ICU Interrupt 7"]
657    IEL7 = 7,
658
659    #[doc = "ICU Interrupt 8"]
660    IEL8 = 8,
661
662    #[doc = "ICU Interrupt 9"]
663    IEL9 = 9,
664
665    #[doc = "ICU Interrupt 10"]
666    IEL10 = 10,
667
668    #[doc = "ICU Interrupt 11"]
669    IEL11 = 11,
670
671    #[doc = "ICU Interrupt 12"]
672    IEL12 = 12,
673
674    #[doc = "ICU Interrupt 13"]
675    IEL13 = 13,
676
677    #[doc = "ICU Interrupt 14"]
678    IEL14 = 14,
679
680    #[doc = "ICU Interrupt 15"]
681    IEL15 = 15,
682
683    #[doc = "ICU Interrupt 16"]
684    IEL16 = 16,
685
686    #[doc = "ICU Interrupt 17"]
687    IEL17 = 17,
688
689    #[doc = "ICU Interrupt 18"]
690    IEL18 = 18,
691
692    #[doc = "ICU Interrupt 19"]
693    IEL19 = 19,
694
695    #[doc = "ICU Interrupt 20"]
696    IEL20 = 20,
697
698    #[doc = "ICU Interrupt 21"]
699    IEL21 = 21,
700
701    #[doc = "ICU Interrupt 22"]
702    IEL22 = 22,
703
704    #[doc = "ICU Interrupt 23"]
705    IEL23 = 23,
706
707    #[doc = "ICU Interrupt 24"]
708    IEL24 = 24,
709
710    #[doc = "ICU Interrupt 25"]
711    IEL25 = 25,
712
713    #[doc = "ICU Interrupt 26"]
714    IEL26 = 26,
715
716    #[doc = "ICU Interrupt 27"]
717    IEL27 = 27,
718
719    #[doc = "ICU Interrupt 28"]
720    IEL28 = 28,
721
722    #[doc = "ICU Interrupt 29"]
723    IEL29 = 29,
724
725    #[doc = "ICU Interrupt 30"]
726    IEL30 = 30,
727
728    #[doc = "ICU Interrupt 31"]
729    IEL31 = 31,
730
731    #[doc = "ICU Interrupt 32"]
732    IEL32 = 32,
733
734    #[doc = "ICU Interrupt 33"]
735    IEL33 = 33,
736
737    #[doc = "ICU Interrupt 34"]
738    IEL34 = 34,
739
740    #[doc = "ICU Interrupt 35"]
741    IEL35 = 35,
742
743    #[doc = "ICU Interrupt 36"]
744    IEL36 = 36,
745
746    #[doc = "ICU Interrupt 37"]
747    IEL37 = 37,
748
749    #[doc = "ICU Interrupt 38"]
750    IEL38 = 38,
751
752    #[doc = "ICU Interrupt 39"]
753    IEL39 = 39,
754
755    #[doc = "ICU Interrupt 40"]
756    IEL40 = 40,
757
758    #[doc = "ICU Interrupt 41"]
759    IEL41 = 41,
760
761    #[doc = "ICU Interrupt 42"]
762    IEL42 = 42,
763
764    #[doc = "ICU Interrupt 43"]
765    IEL43 = 43,
766
767    #[doc = "ICU Interrupt 44"]
768    IEL44 = 44,
769
770    #[doc = "ICU Interrupt 45"]
771    IEL45 = 45,
772
773    #[doc = "ICU Interrupt 46"]
774    IEL46 = 46,
775
776    #[doc = "ICU Interrupt 47"]
777    IEL47 = 47,
778
779    #[doc = "ICU Interrupt 48"]
780    IEL48 = 48,
781
782    #[doc = "ICU Interrupt 49"]
783    IEL49 = 49,
784
785    #[doc = "ICU Interrupt 50"]
786    IEL50 = 50,
787
788    #[doc = "ICU Interrupt 51"]
789    IEL51 = 51,
790
791    #[doc = "ICU Interrupt 52"]
792    IEL52 = 52,
793
794    #[doc = "ICU Interrupt 53"]
795    IEL53 = 53,
796
797    #[doc = "ICU Interrupt 54"]
798    IEL54 = 54,
799
800    #[doc = "ICU Interrupt 55"]
801    IEL55 = 55,
802
803    #[doc = "ICU Interrupt 56"]
804    IEL56 = 56,
805
806    #[doc = "ICU Interrupt 57"]
807    IEL57 = 57,
808
809    #[doc = "ICU Interrupt 58"]
810    IEL58 = 58,
811
812    #[doc = "ICU Interrupt 59"]
813    IEL59 = 59,
814
815    #[doc = "ICU Interrupt 60"]
816    IEL60 = 60,
817
818    #[doc = "ICU Interrupt 61"]
819    IEL61 = 61,
820
821    #[doc = "ICU Interrupt 62"]
822    IEL62 = 62,
823
824    #[doc = "ICU Interrupt 63"]
825    IEL63 = 63,
826}
827unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
828    #[inline(always)]
829    fn number(self) -> u16 {
830        self as u16
831    }
832}
833#[allow(non_snake_case)]
834/// Required for compatibility with RTIC and other frameworks
835pub struct Peripherals {
836    #[cfg(feature = "sram")]
837    pub SRAM: self::Sram,
838    #[cfg(feature = "bus")]
839    pub BUS: self::Bus,
840    #[cfg(feature = "dtc")]
841    pub DTC: self::Dtc,
842    #[cfg(feature = "icu")]
843    pub ICU: self::Icu,
844    #[cfg(feature = "dbg")]
845    pub DBG: self::Dbg,
846    #[cfg(feature = "sysc")]
847    pub SYSC: self::Sysc,
848    #[cfg(feature = "elc")]
849    pub ELC: self::Elc,
850    #[cfg(feature = "iwdt")]
851    pub IWDT: self::Iwdt,
852    #[cfg(feature = "mstp")]
853    pub MSTP: self::Mstp,
854    #[cfg(feature = "crc")]
855    pub CRC: self::Crc,
856    #[cfg(feature = "port0")]
857    pub PORT0: self::Port0,
858    #[cfg(feature = "port1")]
859    pub PORT1: self::Port1,
860    #[cfg(feature = "port2")]
861    pub PORT2: self::Port2,
862    #[cfg(feature = "port3")]
863    pub PORT3: self::Port3,
864    #[cfg(feature = "port4")]
865    pub PORT4: self::Port4,
866    #[cfg(feature = "port9")]
867    pub PORT9: self::Port9,
868    #[cfg(feature = "pfs_a")]
869    pub PFS_A: self::PfsA,
870    #[cfg(feature = "porga")]
871    pub PORGA: self::Porga,
872    #[cfg(feature = "adc_d")]
873    pub ADC_D: self::AdcD,
874    #[cfg(feature = "sau0")]
875    pub SAU0: self::Sau0,
876    #[cfg(feature = "sau1")]
877    pub SAU1: self::Sau1,
878    #[cfg(feature = "tau")]
879    pub TAU: self::Tau,
880    #[cfg(feature = "rtc_c")]
881    pub RTC_C: self::RtcC,
882    #[cfg(feature = "iica")]
883    pub IICA: self::Iica,
884    #[cfg(feature = "uarta")]
885    pub UARTA: self::Uarta,
886    #[cfg(feature = "tml32")]
887    pub TML32: self::Tml32,
888    #[cfg(feature = "pclbuz")]
889    pub PCLBUZ: self::Pclbuz,
890    #[cfg(feature = "trng")]
891    pub TRNG: self::Trng,
892    #[cfg(feature = "flcn")]
893    pub FLCN: self::Flcn,
894}
895
896impl Peripherals {
897    /// Returns Peripheral struct multiple times
898    /// Required for compatibility with RTIC and other frameworks
899    #[inline]
900    pub fn take() -> Option<Self> {
901        Some(Self::steal())
902    }
903
904    /// Returns Peripheral struct multiple times
905    /// Required for compatibility with RTIC and other frameworks
906    #[inline]
907    pub fn steal() -> Self {
908        Peripherals {
909            #[cfg(feature = "sram")]
910            SRAM: crate::SRAM,
911            #[cfg(feature = "bus")]
912            BUS: crate::BUS,
913            #[cfg(feature = "dtc")]
914            DTC: crate::DTC,
915            #[cfg(feature = "icu")]
916            ICU: crate::ICU,
917            #[cfg(feature = "dbg")]
918            DBG: crate::DBG,
919            #[cfg(feature = "sysc")]
920            SYSC: crate::SYSC,
921            #[cfg(feature = "elc")]
922            ELC: crate::ELC,
923            #[cfg(feature = "iwdt")]
924            IWDT: crate::IWDT,
925            #[cfg(feature = "mstp")]
926            MSTP: crate::MSTP,
927            #[cfg(feature = "crc")]
928            CRC: crate::CRC,
929            #[cfg(feature = "port0")]
930            PORT0: crate::PORT0,
931            #[cfg(feature = "port1")]
932            PORT1: crate::PORT1,
933            #[cfg(feature = "port2")]
934            PORT2: crate::PORT2,
935            #[cfg(feature = "port3")]
936            PORT3: crate::PORT3,
937            #[cfg(feature = "port4")]
938            PORT4: crate::PORT4,
939            #[cfg(feature = "port9")]
940            PORT9: crate::PORT9,
941            #[cfg(feature = "pfs_a")]
942            PFS_A: crate::PFS_A,
943            #[cfg(feature = "porga")]
944            PORGA: crate::PORGA,
945            #[cfg(feature = "adc_d")]
946            ADC_D: crate::ADC_D,
947            #[cfg(feature = "sau0")]
948            SAU0: crate::SAU0,
949            #[cfg(feature = "sau1")]
950            SAU1: crate::SAU1,
951            #[cfg(feature = "tau")]
952            TAU: crate::TAU,
953            #[cfg(feature = "rtc_c")]
954            RTC_C: crate::RTC_C,
955            #[cfg(feature = "iica")]
956            IICA: crate::IICA,
957            #[cfg(feature = "uarta")]
958            UARTA: crate::UARTA,
959            #[cfg(feature = "tml32")]
960            TML32: crate::TML32,
961            #[cfg(feature = "pclbuz")]
962            PCLBUZ: crate::PCLBUZ,
963            #[cfg(feature = "trng")]
964            TRNG: crate::TRNG,
965            #[cfg(feature = "flcn")]
966            FLCN: crate::FLCN,
967        }
968    }
969}
ra0e1_pac/lib.rs

ra0e1_pac/
lib.rs
