ra0e1_pac/
iica.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.10.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:13 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Interface IICA"]
28unsafe impl ::core::marker::Send for super::Iica {}
29unsafe impl ::core::marker::Sync for super::Iica {}
30impl super::Iica {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "IICA Shift Register 0"]
38    #[inline(always)]
39    pub const fn iica0(&self) -> &'static crate::common::Reg<self::Iica0_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Iica0_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "IICA Status Register 0"]
48    #[inline(always)]
49    pub const fn iics0(&self) -> &'static crate::common::Reg<self::Iics0_SPEC, crate::common::R> {
50        unsafe {
51            crate::common::Reg::<self::Iics0_SPEC, crate::common::R>::from_ptr(
52                self._svd2pac_as_ptr().add(1usize),
53            )
54        }
55    }
56
57    #[doc = "IICA Flag Register 0"]
58    #[inline(always)]
59    pub const fn iicf0(&self) -> &'static crate::common::Reg<self::Iicf0_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Iicf0_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(2usize),
63            )
64        }
65    }
66
67    #[doc = "IICA Control Register 00"]
68    #[inline(always)]
69    pub const fn iicctl00(
70        &self,
71    ) -> &'static crate::common::Reg<self::Iicctl00_SPEC, crate::common::RW> {
72        unsafe {
73            crate::common::Reg::<self::Iicctl00_SPEC, crate::common::RW>::from_ptr(
74                self._svd2pac_as_ptr().add(256usize),
75            )
76        }
77    }
78
79    #[doc = "IICA Control Register 01"]
80    #[inline(always)]
81    pub const fn iicctl01(
82        &self,
83    ) -> &'static crate::common::Reg<self::Iicctl01_SPEC, crate::common::RW> {
84        unsafe {
85            crate::common::Reg::<self::Iicctl01_SPEC, crate::common::RW>::from_ptr(
86                self._svd2pac_as_ptr().add(257usize),
87            )
88        }
89    }
90
91    #[doc = "IICA Low-level Width Setting Register 0"]
92    #[inline(always)]
93    pub const fn iicwl0(
94        &self,
95    ) -> &'static crate::common::Reg<self::Iicwl0_SPEC, crate::common::RW> {
96        unsafe {
97            crate::common::Reg::<self::Iicwl0_SPEC, crate::common::RW>::from_ptr(
98                self._svd2pac_as_ptr().add(258usize),
99            )
100        }
101    }
102
103    #[doc = "IICA High-level Width Setting Register 0"]
104    #[inline(always)]
105    pub const fn iicwh0(
106        &self,
107    ) -> &'static crate::common::Reg<self::Iicwh0_SPEC, crate::common::RW> {
108        unsafe {
109            crate::common::Reg::<self::Iicwh0_SPEC, crate::common::RW>::from_ptr(
110                self._svd2pac_as_ptr().add(259usize),
111            )
112        }
113    }
114
115    #[doc = "Slave Address Register 0"]
116    #[inline(always)]
117    pub const fn sva0(&self) -> &'static crate::common::Reg<self::Sva0_SPEC, crate::common::RW> {
118        unsafe {
119            crate::common::Reg::<self::Sva0_SPEC, crate::common::RW>::from_ptr(
120                self._svd2pac_as_ptr().add(260usize),
121            )
122        }
123    }
124}
125#[doc(hidden)]
126#[derive(Copy, Clone, Eq, PartialEq)]
127pub struct Iica0_SPEC;
128impl crate::sealed::RegSpec for Iica0_SPEC {
129    type DataType = u8;
130}
131
132#[doc = "IICA Shift Register 0"]
133pub type Iica0 = crate::RegValueT<Iica0_SPEC>;
134
135impl NoBitfieldReg<Iica0_SPEC> for Iica0 {}
136impl ::core::default::Default for Iica0 {
137    #[inline(always)]
138    fn default() -> Iica0 {
139        <crate::RegValueT<Iica0_SPEC> as RegisterValue<_>>::new(0)
140    }
141}
142
143#[doc(hidden)]
144#[derive(Copy, Clone, Eq, PartialEq)]
145pub struct Iics0_SPEC;
146impl crate::sealed::RegSpec for Iics0_SPEC {
147    type DataType = u8;
148}
149
150#[doc = "IICA Status Register 0"]
151pub type Iics0 = crate::RegValueT<Iics0_SPEC>;
152
153impl Iics0 {
154    #[doc = "Detection of Stop Condition"]
155    #[inline(always)]
156    pub fn spd(
157        self,
158    ) -> crate::common::RegisterField<
159        0,
160        0x1,
161        1,
162        0,
163        iics0::Spd,
164        iics0::Spd,
165        Iics0_SPEC,
166        crate::common::R,
167    > {
168        crate::common::RegisterField::<
169            0,
170            0x1,
171            1,
172            0,
173            iics0::Spd,
174            iics0::Spd,
175            Iics0_SPEC,
176            crate::common::R,
177        >::from_register(self, 0)
178    }
179
180    #[doc = "Detection of Start Condition"]
181    #[inline(always)]
182    pub fn std(
183        self,
184    ) -> crate::common::RegisterField<
185        1,
186        0x1,
187        1,
188        0,
189        iics0::Std,
190        iics0::Std,
191        Iics0_SPEC,
192        crate::common::R,
193    > {
194        crate::common::RegisterField::<
195            1,
196            0x1,
197            1,
198            0,
199            iics0::Std,
200            iics0::Std,
201            Iics0_SPEC,
202            crate::common::R,
203        >::from_register(self, 0)
204    }
205
206    #[doc = "Detection of Acknowledge (ACK)"]
207    #[inline(always)]
208    pub fn ackd(
209        self,
210    ) -> crate::common::RegisterField<
211        2,
212        0x1,
213        1,
214        0,
215        iics0::Ackd,
216        iics0::Ackd,
217        Iics0_SPEC,
218        crate::common::R,
219    > {
220        crate::common::RegisterField::<
221            2,
222            0x1,
223            1,
224            0,
225            iics0::Ackd,
226            iics0::Ackd,
227            Iics0_SPEC,
228            crate::common::R,
229        >::from_register(self, 0)
230    }
231
232    #[doc = "Detection of Transmit and Receive Status"]
233    #[inline(always)]
234    pub fn trc(
235        self,
236    ) -> crate::common::RegisterField<
237        3,
238        0x1,
239        1,
240        0,
241        iics0::Trc,
242        iics0::Trc,
243        Iics0_SPEC,
244        crate::common::R,
245    > {
246        crate::common::RegisterField::<
247            3,
248            0x1,
249            1,
250            0,
251            iics0::Trc,
252            iics0::Trc,
253            Iics0_SPEC,
254            crate::common::R,
255        >::from_register(self, 0)
256    }
257
258    #[doc = "Detection of Matching Addresses"]
259    #[inline(always)]
260    pub fn coi(
261        self,
262    ) -> crate::common::RegisterField<
263        4,
264        0x1,
265        1,
266        0,
267        iics0::Coi,
268        iics0::Coi,
269        Iics0_SPEC,
270        crate::common::R,
271    > {
272        crate::common::RegisterField::<
273            4,
274            0x1,
275            1,
276            0,
277            iics0::Coi,
278            iics0::Coi,
279            Iics0_SPEC,
280            crate::common::R,
281        >::from_register(self, 0)
282    }
283
284    #[doc = "Detection of Extension Code Reception"]
285    #[inline(always)]
286    pub fn exc(
287        self,
288    ) -> crate::common::RegisterField<
289        5,
290        0x1,
291        1,
292        0,
293        iics0::Exc,
294        iics0::Exc,
295        Iics0_SPEC,
296        crate::common::R,
297    > {
298        crate::common::RegisterField::<
299            5,
300            0x1,
301            1,
302            0,
303            iics0::Exc,
304            iics0::Exc,
305            Iics0_SPEC,
306            crate::common::R,
307        >::from_register(self, 0)
308    }
309
310    #[doc = "Detection of Arbitration Loss"]
311    #[inline(always)]
312    pub fn ald(
313        self,
314    ) -> crate::common::RegisterField<
315        6,
316        0x1,
317        1,
318        0,
319        iics0::Ald,
320        iics0::Ald,
321        Iics0_SPEC,
322        crate::common::R,
323    > {
324        crate::common::RegisterField::<
325            6,
326            0x1,
327            1,
328            0,
329            iics0::Ald,
330            iics0::Ald,
331            Iics0_SPEC,
332            crate::common::R,
333        >::from_register(self, 0)
334    }
335
336    #[doc = "Master Status Check Flag"]
337    #[inline(always)]
338    pub fn msts(
339        self,
340    ) -> crate::common::RegisterField<
341        7,
342        0x1,
343        1,
344        0,
345        iics0::Msts,
346        iics0::Msts,
347        Iics0_SPEC,
348        crate::common::R,
349    > {
350        crate::common::RegisterField::<
351            7,
352            0x1,
353            1,
354            0,
355            iics0::Msts,
356            iics0::Msts,
357            Iics0_SPEC,
358            crate::common::R,
359        >::from_register(self, 0)
360    }
361}
362impl ::core::default::Default for Iics0 {
363    #[inline(always)]
364    fn default() -> Iics0 {
365        <crate::RegValueT<Iics0_SPEC> as RegisterValue<_>>::new(0)
366    }
367}
368pub mod iics0 {
369
370    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
371    pub struct Spd_SPEC;
372    pub type Spd = crate::EnumBitfieldStruct<u8, Spd_SPEC>;
373    impl Spd {
374        #[doc = "Stop condition was not detected."]
375        pub const _0: Self = Self::new(0);
376
377        #[doc = "Stop condition was detected. Communication of the master device is terminated and the bus is released."]
378        pub const _1: Self = Self::new(1);
379    }
380    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
381    pub struct Std_SPEC;
382    pub type Std = crate::EnumBitfieldStruct<u8, Std_SPEC>;
383    impl Std {
384        #[doc = "Start condition was not detected."]
385        pub const _0: Self = Self::new(0);
386
387        #[doc = "Start condition was detected. This indicates that the address transfer period is in effect."]
388        pub const _1: Self = Self::new(1);
389    }
390    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
391    pub struct Ackd_SPEC;
392    pub type Ackd = crate::EnumBitfieldStruct<u8, Ackd_SPEC>;
393    impl Ackd {
394        #[doc = "Acknowledge was not detected."]
395        pub const _0: Self = Self::new(0);
396
397        #[doc = "Acknowledge was detected."]
398        pub const _1: Self = Self::new(1);
399    }
400    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
401    pub struct Trc_SPEC;
402    pub type Trc = crate::EnumBitfieldStruct<u8, Trc_SPEC>;
403    impl Trc {
404        #[doc = "Receive status (other than transmit status). The SDAA0 line is set for high impedance."]
405        pub const _0: Self = Self::new(0);
406
407        #[doc = "Transmit status. The value in the SOn latch is enabled for output to the SDAA0 line (valid starting at the falling edge of the first byte\'s ninth clock)."]
408        pub const _1: Self = Self::new(1);
409    }
410    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
411    pub struct Coi_SPEC;
412    pub type Coi = crate::EnumBitfieldStruct<u8, Coi_SPEC>;
413    impl Coi {
414        #[doc = "Addresses do not match."]
415        pub const _0: Self = Self::new(0);
416
417        #[doc = "Addresses match. Or, the all address match function is enabled."]
418        pub const _1: Self = Self::new(1);
419    }
420    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
421    pub struct Exc_SPEC;
422    pub type Exc = crate::EnumBitfieldStruct<u8, Exc_SPEC>;
423    impl Exc {
424        #[doc = "Extension code was not received."]
425        pub const _0: Self = Self::new(0);
426
427        #[doc = "Extension code was received. Or, the all address match function is enabled."]
428        pub const _1: Self = Self::new(1);
429    }
430    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
431    pub struct Ald_SPEC;
432    pub type Ald = crate::EnumBitfieldStruct<u8, Ald_SPEC>;
433    impl Ald {
434        #[doc = "This status means either that there was no arbitration, or that the arbitration result was a win."]
435        pub const _0: Self = Self::new(0);
436
437        #[doc = "This status indicates the arbitration result was a loss. The MSTS bit is cleared."]
438        pub const _1: Self = Self::new(1);
439    }
440    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
441    pub struct Msts_SPEC;
442    pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
443    impl Msts {
444        #[doc = "Slave mode status or communication standby status"]
445        pub const _0: Self = Self::new(0);
446
447        #[doc = "Master mode communication status"]
448        pub const _1: Self = Self::new(1);
449    }
450}
451#[doc(hidden)]
452#[derive(Copy, Clone, Eq, PartialEq)]
453pub struct Iicf0_SPEC;
454impl crate::sealed::RegSpec for Iicf0_SPEC {
455    type DataType = u8;
456}
457
458#[doc = "IICA Flag Register 0"]
459pub type Iicf0 = crate::RegValueT<Iicf0_SPEC>;
460
461impl Iicf0 {
462    #[doc = "Communication Reservation Function Disable Bit"]
463    #[inline(always)]
464    pub fn iicrsv(
465        self,
466    ) -> crate::common::RegisterField<
467        0,
468        0x1,
469        1,
470        0,
471        iicf0::Iicrsv,
472        iicf0::Iicrsv,
473        Iicf0_SPEC,
474        crate::common::RW,
475    > {
476        crate::common::RegisterField::<
477            0,
478            0x1,
479            1,
480            0,
481            iicf0::Iicrsv,
482            iicf0::Iicrsv,
483            Iicf0_SPEC,
484            crate::common::RW,
485        >::from_register(self, 0)
486    }
487
488    #[doc = "Initial Start Enable Trigger"]
489    #[inline(always)]
490    pub fn stcen(
491        self,
492    ) -> crate::common::RegisterField<
493        1,
494        0x1,
495        1,
496        0,
497        iicf0::Stcen,
498        iicf0::Stcen,
499        Iicf0_SPEC,
500        crate::common::RW,
501    > {
502        crate::common::RegisterField::<
503            1,
504            0x1,
505            1,
506            0,
507            iicf0::Stcen,
508            iicf0::Stcen,
509            Iicf0_SPEC,
510            crate::common::RW,
511        >::from_register(self, 0)
512    }
513
514    #[doc = "I2C Bus Status Flag"]
515    #[inline(always)]
516    pub fn iicbsy(
517        self,
518    ) -> crate::common::RegisterField<
519        6,
520        0x1,
521        1,
522        0,
523        iicf0::Iicbsy,
524        iicf0::Iicbsy,
525        Iicf0_SPEC,
526        crate::common::R,
527    > {
528        crate::common::RegisterField::<
529            6,
530            0x1,
531            1,
532            0,
533            iicf0::Iicbsy,
534            iicf0::Iicbsy,
535            Iicf0_SPEC,
536            crate::common::R,
537        >::from_register(self, 0)
538    }
539
540    #[doc = "IICCTL00.STT Clear Flag"]
541    #[inline(always)]
542    pub fn stcf(
543        self,
544    ) -> crate::common::RegisterField<
545        7,
546        0x1,
547        1,
548        0,
549        iicf0::Stcf,
550        iicf0::Stcf,
551        Iicf0_SPEC,
552        crate::common::R,
553    > {
554        crate::common::RegisterField::<
555            7,
556            0x1,
557            1,
558            0,
559            iicf0::Stcf,
560            iicf0::Stcf,
561            Iicf0_SPEC,
562            crate::common::R,
563        >::from_register(self, 0)
564    }
565}
566impl ::core::default::Default for Iicf0 {
567    #[inline(always)]
568    fn default() -> Iicf0 {
569        <crate::RegValueT<Iicf0_SPEC> as RegisterValue<_>>::new(0)
570    }
571}
572pub mod iicf0 {
573
574    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
575    pub struct Iicrsv_SPEC;
576    pub type Iicrsv = crate::EnumBitfieldStruct<u8, Iicrsv_SPEC>;
577    impl Iicrsv {
578        #[doc = "Enable communication reservation"]
579        pub const _0: Self = Self::new(0);
580
581        #[doc = "Disable communication reservation"]
582        pub const _1: Self = Self::new(1);
583    }
584    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
585    pub struct Stcen_SPEC;
586    pub type Stcen = crate::EnumBitfieldStruct<u8, Stcen_SPEC>;
587    impl Stcen {
588        #[doc = "After operation is enabled (IICCTL00.IICE = 1), enable generation of a start condition upon detection of a stop condition."]
589        pub const _0: Self = Self::new(0);
590
591        #[doc = "After operation is enabled (IICCTL00.IICE = 1), enable generation of a start condition without detecting a stop condition."]
592        pub const _1: Self = Self::new(1);
593    }
594    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
595    pub struct Iicbsy_SPEC;
596    pub type Iicbsy = crate::EnumBitfieldStruct<u8, Iicbsy_SPEC>;
597    impl Iicbsy {
598        #[doc = "Bus release status (communication initial status when STCEN = 1)"]
599        pub const _0: Self = Self::new(0);
600
601        #[doc = "Bus communication status (communication initial status when STCEN = 0)"]
602        pub const _1: Self = Self::new(1);
603    }
604    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
605    pub struct Stcf_SPEC;
606    pub type Stcf = crate::EnumBitfieldStruct<u8, Stcf_SPEC>;
607    impl Stcf {
608        #[doc = "Generate start condition"]
609        pub const _0: Self = Self::new(0);
610
611        #[doc = "Start condition generation unsuccessful: clear the IICCTL00.STT flag"]
612        pub const _1: Self = Self::new(1);
613    }
614}
615#[doc(hidden)]
616#[derive(Copy, Clone, Eq, PartialEq)]
617pub struct Iicctl00_SPEC;
618impl crate::sealed::RegSpec for Iicctl00_SPEC {
619    type DataType = u8;
620}
621
622#[doc = "IICA Control Register 00"]
623pub type Iicctl00 = crate::RegValueT<Iicctl00_SPEC>;
624
625impl Iicctl00 {
626    #[doc = "Stop Condition Trigger"]
627    #[inline(always)]
628    pub fn spt(
629        self,
630    ) -> crate::common::RegisterField<
631        0,
632        0x1,
633        1,
634        0,
635        iicctl00::Spt,
636        iicctl00::Spt,
637        Iicctl00_SPEC,
638        crate::common::RW,
639    > {
640        crate::common::RegisterField::<
641            0,
642            0x1,
643            1,
644            0,
645            iicctl00::Spt,
646            iicctl00::Spt,
647            Iicctl00_SPEC,
648            crate::common::RW,
649        >::from_register(self, 0)
650    }
651
652    #[doc = "Start Condition Trigger"]
653    #[inline(always)]
654    pub fn stt(
655        self,
656    ) -> crate::common::RegisterField<
657        1,
658        0x1,
659        1,
660        0,
661        iicctl00::Stt,
662        iicctl00::Stt,
663        Iicctl00_SPEC,
664        crate::common::RW,
665    > {
666        crate::common::RegisterField::<
667            1,
668            0x1,
669            1,
670            0,
671            iicctl00::Stt,
672            iicctl00::Stt,
673            Iicctl00_SPEC,
674            crate::common::RW,
675        >::from_register(self, 0)
676    }
677
678    #[doc = "Acknowledgment Control"]
679    #[inline(always)]
680    pub fn acke(
681        self,
682    ) -> crate::common::RegisterField<
683        2,
684        0x1,
685        1,
686        0,
687        iicctl00::Acke,
688        iicctl00::Acke,
689        Iicctl00_SPEC,
690        crate::common::RW,
691    > {
692        crate::common::RegisterField::<
693            2,
694            0x1,
695            1,
696            0,
697            iicctl00::Acke,
698            iicctl00::Acke,
699            Iicctl00_SPEC,
700            crate::common::RW,
701        >::from_register(self, 0)
702    }
703
704    #[doc = "Control of Clock Stretching and Interrupt Request Generation"]
705    #[inline(always)]
706    pub fn wtim(
707        self,
708    ) -> crate::common::RegisterField<
709        3,
710        0x1,
711        1,
712        0,
713        iicctl00::Wtim,
714        iicctl00::Wtim,
715        Iicctl00_SPEC,
716        crate::common::RW,
717    > {
718        crate::common::RegisterField::<
719            3,
720            0x1,
721            1,
722            0,
723            iicctl00::Wtim,
724            iicctl00::Wtim,
725            Iicctl00_SPEC,
726            crate::common::RW,
727        >::from_register(self, 0)
728    }
729
730    #[doc = "Enable and Disable Generation of Interrupt Request when Stop Condition is Detected"]
731    #[inline(always)]
732    pub fn spie(
733        self,
734    ) -> crate::common::RegisterField<
735        4,
736        0x1,
737        1,
738        0,
739        iicctl00::Spie,
740        iicctl00::Spie,
741        Iicctl00_SPEC,
742        crate::common::RW,
743    > {
744        crate::common::RegisterField::<
745            4,
746            0x1,
747            1,
748            0,
749            iicctl00::Spie,
750            iicctl00::Spie,
751            Iicctl00_SPEC,
752            crate::common::RW,
753        >::from_register(self, 0)
754    }
755
756    #[doc = "Release from the Clock Stretch State"]
757    #[inline(always)]
758    pub fn wrel(
759        self,
760    ) -> crate::common::RegisterField<
761        5,
762        0x1,
763        1,
764        0,
765        iicctl00::Wrel,
766        iicctl00::Wrel,
767        Iicctl00_SPEC,
768        crate::common::RW,
769    > {
770        crate::common::RegisterField::<
771            5,
772            0x1,
773            1,
774            0,
775            iicctl00::Wrel,
776            iicctl00::Wrel,
777            Iicctl00_SPEC,
778            crate::common::RW,
779        >::from_register(self, 0)
780    }
781
782    #[doc = "Exit from Communications"]
783    #[inline(always)]
784    pub fn lrel(
785        self,
786    ) -> crate::common::RegisterField<
787        6,
788        0x1,
789        1,
790        0,
791        iicctl00::Lrel,
792        iicctl00::Lrel,
793        Iicctl00_SPEC,
794        crate::common::RW,
795    > {
796        crate::common::RegisterField::<
797            6,
798            0x1,
799            1,
800            0,
801            iicctl00::Lrel,
802            iicctl00::Lrel,
803            Iicctl00_SPEC,
804            crate::common::RW,
805        >::from_register(self, 0)
806    }
807
808    #[doc = "I2C Operation Enable"]
809    #[inline(always)]
810    pub fn iice(
811        self,
812    ) -> crate::common::RegisterField<
813        7,
814        0x1,
815        1,
816        0,
817        iicctl00::Iice,
818        iicctl00::Iice,
819        Iicctl00_SPEC,
820        crate::common::RW,
821    > {
822        crate::common::RegisterField::<
823            7,
824            0x1,
825            1,
826            0,
827            iicctl00::Iice,
828            iicctl00::Iice,
829            Iicctl00_SPEC,
830            crate::common::RW,
831        >::from_register(self, 0)
832    }
833}
834impl ::core::default::Default for Iicctl00 {
835    #[inline(always)]
836    fn default() -> Iicctl00 {
837        <crate::RegValueT<Iicctl00_SPEC> as RegisterValue<_>>::new(0)
838    }
839}
840pub mod iicctl00 {
841
842    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
843    pub struct Spt_SPEC;
844    pub type Spt = crate::EnumBitfieldStruct<u8, Spt_SPEC>;
845    impl Spt {
846        #[doc = "Stop condition is not generated"]
847        pub const _0: Self = Self::new(0);
848
849        #[doc = "Stop condition is generated (End of transfer as master device)"]
850        pub const _1: Self = Self::new(1);
851    }
852    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
853    pub struct Stt_SPEC;
854    pub type Stt = crate::EnumBitfieldStruct<u8, Stt_SPEC>;
855    impl Stt {
856        #[doc = "Do not generate a start condition"]
857        pub const _0: Self = Self::new(0);
858
859        #[doc = "When bus is released (in communication standby status, when IICF0.IICBSY = 0): If this bit is set to 1, a start condition is generated (startup as the master mode). When a third party is communicating: When communication reservation function is enabled (IICF0.IICRSV = 0)Functions as the start condition reservation flag. When set to 1, automatically generates a start condition after the bus is released.When communication reservation function is disabled (IICF0.IICRSV = 1)Even if this bit is set to 1, the STT bit is cleared and the STT clear flag (IICF0.STCF) is set to 1. No start condition is generated.In the clock stretch state (for a master device): Generates a restart condition after release from the clock stretch state."]
860        pub const _1: Self = Self::new(1);
861    }
862    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
863    pub struct Acke_SPEC;
864    pub type Acke = crate::EnumBitfieldStruct<u8, Acke_SPEC>;
865    impl Acke {
866        #[doc = "Disable acknowledgment"]
867        pub const _0: Self = Self::new(0);
868
869        #[doc = "Enable acknowledgment. During the 9th clock period, the SDAA0 line is set to low level."]
870        pub const _1: Self = Self::new(1);
871    }
872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
873    pub struct Wtim_SPEC;
874    pub type Wtim = crate::EnumBitfieldStruct<u8, Wtim_SPEC>;
875    impl Wtim {
876        #[doc = "An interrupt request is generated on the falling edge of the 8th clock cycle. Master mode: After the output of eight clock pulses, the clock output is set to the low level and clock stretching is set. Slave mode: After the input of eight clock pulses, the clock is set to the low level and clock stretching is set for the master device."]
877        pub const _0: Self = Self::new(0);
878
879        #[doc = "An interrupt request is generated on the falling edge of the 9th clock cycle. Master mode: After the output of nine clock pulses, the clock output is set to the low level and clock stretching is set. Slave mode: After the input of 9 clock pulses, the clock is set to the low level and clock stretching is set for the master device."]
880        pub const _1: Self = Self::new(1);
881    }
882    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
883    pub struct Spie_SPEC;
884    pub type Spie = crate::EnumBitfieldStruct<u8, Spie_SPEC>;
885    impl Spie {
886        #[doc = "Disable"]
887        pub const _0: Self = Self::new(0);
888
889        #[doc = "Enable"]
890        pub const _1: Self = Self::new(1);
891    }
892    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
893    pub struct Wrel_SPEC;
894    pub type Wrel = crate::EnumBitfieldStruct<u8, Wrel_SPEC>;
895    impl Wrel {
896        #[doc = "The interface is not released from the clock stretch state."]
897        pub const _0: Self = Self::new(0);
898
899        #[doc = "The interface is released from the clock stretch state. After release from the clock stretch state, this bit is automatically cleared to 0."]
900        pub const _1: Self = Self::new(1);
901    }
902    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
903    pub struct Lrel_SPEC;
904    pub type Lrel = crate::EnumBitfieldStruct<u8, Lrel_SPEC>;
905    impl Lrel {
906        #[doc = "Normal operation"]
907        pub const _0: Self = Self::new(0);
908
909        #[doc = "IICA exits from the current communications and sets communication standby status. This setting is automatically cleared to 0 after being executed. Its uses include cases in which a locally irrelevant extension code has been received. The SCLA0 and SDAA0 lines are set to high impedance. The following flags of IICA control register 00 (IICCTL00) and the IICA status register 0 (IICS0) are cleared to 0. IICCTL00.STTIICCTL00.SPTIICS0.MSTSIICS0.EXCIICS0.COIIICS0.TRCIICS0.ACKDIICS0.STD"]
910        pub const _1: Self = Self::new(1);
911    }
912    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
913    pub struct Iice_SPEC;
914    pub type Iice = crate::EnumBitfieldStruct<u8, Iice_SPEC>;
915    impl Iice {
916        #[doc = "Stop operation. Reset the IICA status register 0 (IICS0). Stop internal operation."]
917        pub const _0: Self = Self::new(0);
918
919        #[doc = "Enable operation."]
920        pub const _1: Self = Self::new(1);
921    }
922}
923#[doc(hidden)]
924#[derive(Copy, Clone, Eq, PartialEq)]
925pub struct Iicctl01_SPEC;
926impl crate::sealed::RegSpec for Iicctl01_SPEC {
927    type DataType = u8;
928}
929
930#[doc = "IICA Control Register 01"]
931pub type Iicctl01 = crate::RegValueT<Iicctl01_SPEC>;
932
933impl Iicctl01 {
934    #[doc = "IICA Operation Clock (fMCK)"]
935    #[inline(always)]
936    pub fn prs(
937        self,
938    ) -> crate::common::RegisterField<
939        0,
940        0x1,
941        1,
942        0,
943        iicctl01::Prs,
944        iicctl01::Prs,
945        Iicctl01_SPEC,
946        crate::common::RW,
947    > {
948        crate::common::RegisterField::<
949            0,
950            0x1,
951            1,
952            0,
953            iicctl01::Prs,
954            iicctl01::Prs,
955            Iicctl01_SPEC,
956            crate::common::RW,
957        >::from_register(self, 0)
958    }
959
960    #[doc = "Digital Filter Operation Control"]
961    #[inline(always)]
962    pub fn dfc(
963        self,
964    ) -> crate::common::RegisterField<
965        2,
966        0x1,
967        1,
968        0,
969        iicctl01::Dfc,
970        iicctl01::Dfc,
971        Iicctl01_SPEC,
972        crate::common::RW,
973    > {
974        crate::common::RegisterField::<
975            2,
976            0x1,
977            1,
978            0,
979            iicctl01::Dfc,
980            iicctl01::Dfc,
981            Iicctl01_SPEC,
982            crate::common::RW,
983        >::from_register(self, 0)
984    }
985
986    #[doc = "Operation Mode Switching"]
987    #[inline(always)]
988    pub fn smc(
989        self,
990    ) -> crate::common::RegisterField<
991        3,
992        0x1,
993        1,
994        0,
995        iicctl01::Smc,
996        iicctl01::Smc,
997        Iicctl01_SPEC,
998        crate::common::RW,
999    > {
1000        crate::common::RegisterField::<
1001            3,
1002            0x1,
1003            1,
1004            0,
1005            iicctl01::Smc,
1006            iicctl01::Smc,
1007            Iicctl01_SPEC,
1008            crate::common::RW,
1009        >::from_register(self, 0)
1010    }
1011
1012    #[doc = "Detection of SDAA0 Pin Level (Valid Only when IICCTL00.IICE = 1)"]
1013    #[inline(always)]
1014    pub fn dad(
1015        self,
1016    ) -> crate::common::RegisterField<
1017        4,
1018        0x1,
1019        1,
1020        0,
1021        iicctl01::Dad,
1022        iicctl01::Dad,
1023        Iicctl01_SPEC,
1024        crate::common::R,
1025    > {
1026        crate::common::RegisterField::<
1027            4,
1028            0x1,
1029            1,
1030            0,
1031            iicctl01::Dad,
1032            iicctl01::Dad,
1033            Iicctl01_SPEC,
1034            crate::common::R,
1035        >::from_register(self, 0)
1036    }
1037
1038    #[doc = "Detection of SCLA0 Pin Level (Valid Only when IICCTL00.IICE = 1)"]
1039    #[inline(always)]
1040    pub fn cld(
1041        self,
1042    ) -> crate::common::RegisterField<
1043        5,
1044        0x1,
1045        1,
1046        0,
1047        iicctl01::Cld,
1048        iicctl01::Cld,
1049        Iicctl01_SPEC,
1050        crate::common::R,
1051    > {
1052        crate::common::RegisterField::<
1053            5,
1054            0x1,
1055            1,
1056            0,
1057            iicctl01::Cld,
1058            iicctl01::Cld,
1059            Iicctl01_SPEC,
1060            crate::common::R,
1061        >::from_register(self, 0)
1062    }
1063
1064    #[doc = "Address Match Disabling Flag"]
1065    #[inline(always)]
1066    pub fn svadis(
1067        self,
1068    ) -> crate::common::RegisterField<
1069        6,
1070        0x1,
1071        1,
1072        0,
1073        iicctl01::Svadis,
1074        iicctl01::Svadis,
1075        Iicctl01_SPEC,
1076        crate::common::RW,
1077    > {
1078        crate::common::RegisterField::<
1079            6,
1080            0x1,
1081            1,
1082            0,
1083            iicctl01::Svadis,
1084            iicctl01::Svadis,
1085            Iicctl01_SPEC,
1086            crate::common::RW,
1087        >::from_register(self, 0)
1088    }
1089
1090    #[doc = "Control of Address Match Wakeup"]
1091    #[inline(always)]
1092    pub fn wup(
1093        self,
1094    ) -> crate::common::RegisterField<
1095        7,
1096        0x1,
1097        1,
1098        0,
1099        iicctl01::Wup,
1100        iicctl01::Wup,
1101        Iicctl01_SPEC,
1102        crate::common::RW,
1103    > {
1104        crate::common::RegisterField::<
1105            7,
1106            0x1,
1107            1,
1108            0,
1109            iicctl01::Wup,
1110            iicctl01::Wup,
1111            Iicctl01_SPEC,
1112            crate::common::RW,
1113        >::from_register(self, 0)
1114    }
1115}
1116impl ::core::default::Default for Iicctl01 {
1117    #[inline(always)]
1118    fn default() -> Iicctl01 {
1119        <crate::RegValueT<Iicctl01_SPEC> as RegisterValue<_>>::new(0)
1120    }
1121}
1122pub mod iicctl01 {
1123
1124    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1125    pub struct Prs_SPEC;
1126    pub type Prs = crate::EnumBitfieldStruct<u8, Prs_SPEC>;
1127    impl Prs {
1128        #[doc = "Selects PCLKB (1 MHz ≤ PCLKB ≤ 20 MHz)"]
1129        pub const _0: Self = Self::new(0);
1130
1131        #[doc = "Selects PCLKB/2 (20 MHz < PCLKB)"]
1132        pub const _1: Self = Self::new(1);
1133    }
1134    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1135    pub struct Dfc_SPEC;
1136    pub type Dfc = crate::EnumBitfieldStruct<u8, Dfc_SPEC>;
1137    impl Dfc {
1138        #[doc = "Digital filter off"]
1139        pub const _0: Self = Self::new(0);
1140
1141        #[doc = "Digital filter on"]
1142        pub const _1: Self = Self::new(1);
1143    }
1144    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1145    pub struct Smc_SPEC;
1146    pub type Smc = crate::EnumBitfieldStruct<u8, Smc_SPEC>;
1147    impl Smc {
1148        #[doc = "Operates in standard mode (fastest transfer rate: 100 kbps)"]
1149        pub const _0: Self = Self::new(0);
1150
1151        #[doc = "Operates in fast mode (fastest transfer rate: 400 kbps) or fast mode plus (fastest transfer rate: 1 Mbps)"]
1152        pub const _1: Self = Self::new(1);
1153    }
1154    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1155    pub struct Dad_SPEC;
1156    pub type Dad = crate::EnumBitfieldStruct<u8, Dad_SPEC>;
1157    impl Dad {
1158        #[doc = "The SDAA0 pin was detected at low level"]
1159        pub const _0: Self = Self::new(0);
1160
1161        #[doc = "The SDAA0 pin was detected at high level"]
1162        pub const _1: Self = Self::new(1);
1163    }
1164    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1165    pub struct Cld_SPEC;
1166    pub type Cld = crate::EnumBitfieldStruct<u8, Cld_SPEC>;
1167    impl Cld {
1168        #[doc = "The SCLA0 pin was detected at low level"]
1169        pub const _0: Self = Self::new(0);
1170
1171        #[doc = "The SCLA0 pin was detected at high level"]
1172        pub const _1: Self = Self::new(1);
1173    }
1174    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1175    pub struct Svadis_SPEC;
1176    pub type Svadis = crate::EnumBitfieldStruct<u8, Svadis_SPEC>;
1177    impl Svadis {
1178        #[doc = "Disables the all address match function"]
1179        pub const _0: Self = Self::new(0);
1180
1181        #[doc = "Enables the all address match function"]
1182        pub const _1: Self = Self::new(1);
1183    }
1184    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1185    pub struct Wup_SPEC;
1186    pub type Wup = crate::EnumBitfieldStruct<u8, Wup_SPEC>;
1187    impl Wup {
1188        #[doc = "Stops operation of address match wakeup function in Software Standby mode"]
1189        pub const _0: Self = Self::new(0);
1190
1191        #[doc = "Enables operation of address match wakeup function in Software Standby mode"]
1192        pub const _1: Self = Self::new(1);
1193    }
1194}
1195#[doc(hidden)]
1196#[derive(Copy, Clone, Eq, PartialEq)]
1197pub struct Iicwl0_SPEC;
1198impl crate::sealed::RegSpec for Iicwl0_SPEC {
1199    type DataType = u8;
1200}
1201
1202#[doc = "IICA Low-level Width Setting Register 0"]
1203pub type Iicwl0 = crate::RegValueT<Iicwl0_SPEC>;
1204
1205impl NoBitfieldReg<Iicwl0_SPEC> for Iicwl0 {}
1206impl ::core::default::Default for Iicwl0 {
1207    #[inline(always)]
1208    fn default() -> Iicwl0 {
1209        <crate::RegValueT<Iicwl0_SPEC> as RegisterValue<_>>::new(255)
1210    }
1211}
1212
1213#[doc(hidden)]
1214#[derive(Copy, Clone, Eq, PartialEq)]
1215pub struct Iicwh0_SPEC;
1216impl crate::sealed::RegSpec for Iicwh0_SPEC {
1217    type DataType = u8;
1218}
1219
1220#[doc = "IICA High-level Width Setting Register 0"]
1221pub type Iicwh0 = crate::RegValueT<Iicwh0_SPEC>;
1222
1223impl NoBitfieldReg<Iicwh0_SPEC> for Iicwh0 {}
1224impl ::core::default::Default for Iicwh0 {
1225    #[inline(always)]
1226    fn default() -> Iicwh0 {
1227        <crate::RegValueT<Iicwh0_SPEC> as RegisterValue<_>>::new(255)
1228    }
1229}
1230
1231#[doc(hidden)]
1232#[derive(Copy, Clone, Eq, PartialEq)]
1233pub struct Sva0_SPEC;
1234impl crate::sealed::RegSpec for Sva0_SPEC {
1235    type DataType = u8;
1236}
1237
1238#[doc = "Slave Address Register 0"]
1239pub type Sva0 = crate::RegValueT<Sva0_SPEC>;
1240
1241impl Sva0 {
1242    #[doc = "7-bit Local Address when in Slave Mode of Unit 0"]
1243    #[inline(always)]
1244    pub fn a(
1245        self,
1246    ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Sva0_SPEC, crate::common::RW> {
1247        crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Sva0_SPEC,crate::common::RW>::from_register(self,0)
1248    }
1249}
1250impl ::core::default::Default for Sva0 {
1251    #[inline(always)]
1252    fn default() -> Sva0 {
1253        <crate::RegValueT<Sva0_SPEC> as RegisterValue<_>>::new(0)
1254    }
1255}
ra0e1_pac/iica.rs

ra0e1_pac/
iica.rs
