r528_pac/gpio/
pc_eint_deb.rs

1#[doc = "Register `pc_eint_deb` reader"]
2pub struct R(crate::R<PC_EINT_DEB_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PC_EINT_DEB_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PC_EINT_DEB_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PC_EINT_DEB_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `pc_eint_deb` writer"]
17pub struct W(crate::W<PC_EINT_DEB_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PC_EINT_DEB_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PC_EINT_DEB_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PC_EINT_DEB_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DEB_CLK_PRE_SCALE` reader - Debounce Clock Pre_scale n"]
38pub type DEB_CLK_PRE_SCALE_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `DEB_CLK_PRE_SCALE` writer - Debounce Clock Pre_scale n"]
40pub type DEB_CLK_PRE_SCALE_W<'a> = crate::FieldWriter<'a, u32, PC_EINT_DEB_SPEC, u8, u8, 3, 4>;
41#[doc = "PIO Interrupt Clock Select\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq)]
43pub enum PIO_INT_CLK_SELECT_A {
44    #[doc = "0: `0`"]
45    LOSC_32KHZ = 0,
46    #[doc = "1: `1`"]
47    HOSC_24MHZ = 1,
48}
49impl From<PIO_INT_CLK_SELECT_A> for bool {
50    #[inline(always)]
51    fn from(variant: PIO_INT_CLK_SELECT_A) -> Self {
52        variant as u8 != 0
53    }
54}
55#[doc = "Field `PIO_INT_CLK_SELECT` reader - PIO Interrupt Clock Select"]
56pub type PIO_INT_CLK_SELECT_R = crate::BitReader<PIO_INT_CLK_SELECT_A>;
57impl PIO_INT_CLK_SELECT_R {
58    #[doc = "Get enumerated values variant"]
59    #[inline(always)]
60    pub fn variant(&self) -> PIO_INT_CLK_SELECT_A {
61        match self.bits {
62            false => PIO_INT_CLK_SELECT_A::LOSC_32KHZ,
63            true => PIO_INT_CLK_SELECT_A::HOSC_24MHZ,
64        }
65    }
66    #[doc = "Checks if the value of the field is `LOSC_32KHZ`"]
67    #[inline(always)]
68    pub fn is_losc_32khz(&self) -> bool {
69        *self == PIO_INT_CLK_SELECT_A::LOSC_32KHZ
70    }
71    #[doc = "Checks if the value of the field is `HOSC_24MHZ`"]
72    #[inline(always)]
73    pub fn is_hosc_24mhz(&self) -> bool {
74        *self == PIO_INT_CLK_SELECT_A::HOSC_24MHZ
75    }
76}
77#[doc = "Field `PIO_INT_CLK_SELECT` writer - PIO Interrupt Clock Select"]
78pub type PIO_INT_CLK_SELECT_W<'a> =
79    crate::BitWriter<'a, u32, PC_EINT_DEB_SPEC, PIO_INT_CLK_SELECT_A, 0>;
80impl<'a> PIO_INT_CLK_SELECT_W<'a> {
81    #[doc = "`0`"]
82    #[inline(always)]
83    pub fn losc_32khz(self) -> &'a mut W {
84        self.variant(PIO_INT_CLK_SELECT_A::LOSC_32KHZ)
85    }
86    #[doc = "`1`"]
87    #[inline(always)]
88    pub fn hosc_24mhz(self) -> &'a mut W {
89        self.variant(PIO_INT_CLK_SELECT_A::HOSC_24MHZ)
90    }
91}
92impl R {
93    #[doc = "Bits 4:6 - Debounce Clock Pre_scale n"]
94    #[inline(always)]
95    pub fn deb_clk_pre_scale(&self) -> DEB_CLK_PRE_SCALE_R {
96        DEB_CLK_PRE_SCALE_R::new(((self.bits >> 4) & 7) as u8)
97    }
98    #[doc = "Bit 0 - PIO Interrupt Clock Select"]
99    #[inline(always)]
100    pub fn pio_int_clk_select(&self) -> PIO_INT_CLK_SELECT_R {
101        PIO_INT_CLK_SELECT_R::new((self.bits & 1) != 0)
102    }
103}
104impl W {
105    #[doc = "Bits 4:6 - Debounce Clock Pre_scale n"]
106    #[inline(always)]
107    pub fn deb_clk_pre_scale(&mut self) -> DEB_CLK_PRE_SCALE_W {
108        DEB_CLK_PRE_SCALE_W::new(self)
109    }
110    #[doc = "Bit 0 - PIO Interrupt Clock Select"]
111    #[inline(always)]
112    pub fn pio_int_clk_select(&mut self) -> PIO_INT_CLK_SELECT_W {
113        PIO_INT_CLK_SELECT_W::new(self)
114    }
115    #[doc = "Writes raw bits to the register."]
116    #[inline(always)]
117    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
118        self.0.bits(bits);
119        self
120    }
121}
122#[doc = "PC External Interrupt Debounce Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pc_eint_deb](index.html) module"]
123pub struct PC_EINT_DEB_SPEC;
124impl crate::RegisterSpec for PC_EINT_DEB_SPEC {
125    type Ux = u32;
126}
127#[doc = "`read()` method returns [pc_eint_deb::R](R) reader structure"]
128impl crate::Readable for PC_EINT_DEB_SPEC {
129    type Reader = R;
130}
131#[doc = "`write(|w| ..)` method takes [pc_eint_deb::W](W) writer structure"]
132impl crate::Writable for PC_EINT_DEB_SPEC {
133    type Writer = W;
134}
135#[doc = "`reset()` method sets pc_eint_deb to value 0"]
136impl crate::Resettable for PC_EINT_DEB_SPEC {
137    #[inline(always)]
138    fn reset_value() -> Self::Ux {
139        0
140    }
141}
r528_pac/gpio/pc_eint_deb.rs

r528_pac/gpio/
pc_eint_deb.rs
