r528_pac/ledc/
ledc_int_ctrl.rs1#[doc = "Register `LEDC_INT_CTRL` reader"]
2pub struct R(crate::R<LEDC_INT_CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<LEDC_INT_CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<LEDC_INT_CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<LEDC_INT_CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `LEDC_INT_CTRL` writer"]
17pub struct W(crate::W<LEDC_INT_CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<LEDC_INT_CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<LEDC_INT_CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<LEDC_INT_CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum GLOBAL_INT_EN_A {
40 #[doc = "0: `0`"]
41 DISABLE = 0,
42 #[doc = "1: `1`"]
43 ENABLE = 1,
44}
45impl From<GLOBAL_INT_EN_A> for bool {
46 #[inline(always)]
47 fn from(variant: GLOBAL_INT_EN_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `GLOBAL_INT_EN` reader - "]
52pub type GLOBAL_INT_EN_R = crate::BitReader<GLOBAL_INT_EN_A>;
53impl GLOBAL_INT_EN_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> GLOBAL_INT_EN_A {
57 match self.bits {
58 false => GLOBAL_INT_EN_A::DISABLE,
59 true => GLOBAL_INT_EN_A::ENABLE,
60 }
61 }
62 #[doc = "Checks if the value of the field is `DISABLE`"]
63 #[inline(always)]
64 pub fn is_disable(&self) -> bool {
65 *self == GLOBAL_INT_EN_A::DISABLE
66 }
67 #[doc = "Checks if the value of the field is `ENABLE`"]
68 #[inline(always)]
69 pub fn is_enable(&self) -> bool {
70 *self == GLOBAL_INT_EN_A::ENABLE
71 }
72}
73#[doc = "Field `GLOBAL_INT_EN` writer - "]
74pub type GLOBAL_INT_EN_W<'a> = crate::BitWriter<'a, u32, LEDC_INT_CTRL_SPEC, GLOBAL_INT_EN_A, 5>;
75impl<'a> GLOBAL_INT_EN_W<'a> {
76 #[doc = "`0`"]
77 #[inline(always)]
78 pub fn disable(self) -> &'a mut W {
79 self.variant(GLOBAL_INT_EN_A::DISABLE)
80 }
81 #[doc = "`1`"]
82 #[inline(always)]
83 pub fn enable(self) -> &'a mut W {
84 self.variant(GLOBAL_INT_EN_A::ENABLE)
85 }
86}
87#[doc = "\n\nValue on reset: 0"]
88#[derive(Clone, Copy, Debug, PartialEq)]
89pub enum FIFO_OVERFLOW_INT_EN_A {
90 #[doc = "0: `0`"]
91 DISABLE = 0,
92 #[doc = "1: `1`"]
93 ENABLE = 1,
94}
95impl From<FIFO_OVERFLOW_INT_EN_A> for bool {
96 #[inline(always)]
97 fn from(variant: FIFO_OVERFLOW_INT_EN_A) -> Self {
98 variant as u8 != 0
99 }
100}
101#[doc = "Field `FIFO_OVERFLOW_INT_EN` reader - "]
102pub type FIFO_OVERFLOW_INT_EN_R = crate::BitReader<FIFO_OVERFLOW_INT_EN_A>;
103impl FIFO_OVERFLOW_INT_EN_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> FIFO_OVERFLOW_INT_EN_A {
107 match self.bits {
108 false => FIFO_OVERFLOW_INT_EN_A::DISABLE,
109 true => FIFO_OVERFLOW_INT_EN_A::ENABLE,
110 }
111 }
112 #[doc = "Checks if the value of the field is `DISABLE`"]
113 #[inline(always)]
114 pub fn is_disable(&self) -> bool {
115 *self == FIFO_OVERFLOW_INT_EN_A::DISABLE
116 }
117 #[doc = "Checks if the value of the field is `ENABLE`"]
118 #[inline(always)]
119 pub fn is_enable(&self) -> bool {
120 *self == FIFO_OVERFLOW_INT_EN_A::ENABLE
121 }
122}
123#[doc = "Field `FIFO_OVERFLOW_INT_EN` writer - "]
124pub type FIFO_OVERFLOW_INT_EN_W<'a> =
125 crate::BitWriter<'a, u32, LEDC_INT_CTRL_SPEC, FIFO_OVERFLOW_INT_EN_A, 4>;
126impl<'a> FIFO_OVERFLOW_INT_EN_W<'a> {
127 #[doc = "`0`"]
128 #[inline(always)]
129 pub fn disable(self) -> &'a mut W {
130 self.variant(FIFO_OVERFLOW_INT_EN_A::DISABLE)
131 }
132 #[doc = "`1`"]
133 #[inline(always)]
134 pub fn enable(self) -> &'a mut W {
135 self.variant(FIFO_OVERFLOW_INT_EN_A::ENABLE)
136 }
137}
138#[doc = "\n\nValue on reset: 0"]
139#[derive(Clone, Copy, Debug, PartialEq)]
140pub enum WAITDATA_TIMEOUT_INT_EN_A {
141 #[doc = "0: `0`"]
142 DISABLE = 0,
143 #[doc = "1: `1`"]
144 ENABLE = 1,
145}
146impl From<WAITDATA_TIMEOUT_INT_EN_A> for bool {
147 #[inline(always)]
148 fn from(variant: WAITDATA_TIMEOUT_INT_EN_A) -> Self {
149 variant as u8 != 0
150 }
151}
152#[doc = "Field `WAITDATA_TIMEOUT_INT_EN` reader - "]
153pub type WAITDATA_TIMEOUT_INT_EN_R = crate::BitReader<WAITDATA_TIMEOUT_INT_EN_A>;
154impl WAITDATA_TIMEOUT_INT_EN_R {
155 #[doc = "Get enumerated values variant"]
156 #[inline(always)]
157 pub fn variant(&self) -> WAITDATA_TIMEOUT_INT_EN_A {
158 match self.bits {
159 false => WAITDATA_TIMEOUT_INT_EN_A::DISABLE,
160 true => WAITDATA_TIMEOUT_INT_EN_A::ENABLE,
161 }
162 }
163 #[doc = "Checks if the value of the field is `DISABLE`"]
164 #[inline(always)]
165 pub fn is_disable(&self) -> bool {
166 *self == WAITDATA_TIMEOUT_INT_EN_A::DISABLE
167 }
168 #[doc = "Checks if the value of the field is `ENABLE`"]
169 #[inline(always)]
170 pub fn is_enable(&self) -> bool {
171 *self == WAITDATA_TIMEOUT_INT_EN_A::ENABLE
172 }
173}
174#[doc = "Field `WAITDATA_TIMEOUT_INT_EN` writer - "]
175pub type WAITDATA_TIMEOUT_INT_EN_W<'a> =
176 crate::BitWriter<'a, u32, LEDC_INT_CTRL_SPEC, WAITDATA_TIMEOUT_INT_EN_A, 3>;
177impl<'a> WAITDATA_TIMEOUT_INT_EN_W<'a> {
178 #[doc = "`0`"]
179 #[inline(always)]
180 pub fn disable(self) -> &'a mut W {
181 self.variant(WAITDATA_TIMEOUT_INT_EN_A::DISABLE)
182 }
183 #[doc = "`1`"]
184 #[inline(always)]
185 pub fn enable(self) -> &'a mut W {
186 self.variant(WAITDATA_TIMEOUT_INT_EN_A::ENABLE)
187 }
188}
189#[doc = "\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq)]
191pub enum FIFO_CPUREQ_INT_EN_A {
192 #[doc = "0: `0`"]
193 DISABLE = 0,
194 #[doc = "1: `1`"]
195 ENABLE = 1,
196}
197impl From<FIFO_CPUREQ_INT_EN_A> for bool {
198 #[inline(always)]
199 fn from(variant: FIFO_CPUREQ_INT_EN_A) -> Self {
200 variant as u8 != 0
201 }
202}
203#[doc = "Field `FIFO_CPUREQ_INT_EN` reader - "]
204pub type FIFO_CPUREQ_INT_EN_R = crate::BitReader<FIFO_CPUREQ_INT_EN_A>;
205impl FIFO_CPUREQ_INT_EN_R {
206 #[doc = "Get enumerated values variant"]
207 #[inline(always)]
208 pub fn variant(&self) -> FIFO_CPUREQ_INT_EN_A {
209 match self.bits {
210 false => FIFO_CPUREQ_INT_EN_A::DISABLE,
211 true => FIFO_CPUREQ_INT_EN_A::ENABLE,
212 }
213 }
214 #[doc = "Checks if the value of the field is `DISABLE`"]
215 #[inline(always)]
216 pub fn is_disable(&self) -> bool {
217 *self == FIFO_CPUREQ_INT_EN_A::DISABLE
218 }
219 #[doc = "Checks if the value of the field is `ENABLE`"]
220 #[inline(always)]
221 pub fn is_enable(&self) -> bool {
222 *self == FIFO_CPUREQ_INT_EN_A::ENABLE
223 }
224}
225#[doc = "Field `FIFO_CPUREQ_INT_EN` writer - "]
226pub type FIFO_CPUREQ_INT_EN_W<'a> =
227 crate::BitWriter<'a, u32, LEDC_INT_CTRL_SPEC, FIFO_CPUREQ_INT_EN_A, 1>;
228impl<'a> FIFO_CPUREQ_INT_EN_W<'a> {
229 #[doc = "`0`"]
230 #[inline(always)]
231 pub fn disable(self) -> &'a mut W {
232 self.variant(FIFO_CPUREQ_INT_EN_A::DISABLE)
233 }
234 #[doc = "`1`"]
235 #[inline(always)]
236 pub fn enable(self) -> &'a mut W {
237 self.variant(FIFO_CPUREQ_INT_EN_A::ENABLE)
238 }
239}
240#[doc = "\n\nValue on reset: 0"]
241#[derive(Clone, Copy, Debug, PartialEq)]
242pub enum LED_TRANS_FINISH_INT_EN_A {
243 #[doc = "0: `0`"]
244 DISABLE = 0,
245 #[doc = "1: `1`"]
246 ENABLE = 1,
247}
248impl From<LED_TRANS_FINISH_INT_EN_A> for bool {
249 #[inline(always)]
250 fn from(variant: LED_TRANS_FINISH_INT_EN_A) -> Self {
251 variant as u8 != 0
252 }
253}
254#[doc = "Field `LED_TRANS_FINISH_INT_EN` reader - "]
255pub type LED_TRANS_FINISH_INT_EN_R = crate::BitReader<LED_TRANS_FINISH_INT_EN_A>;
256impl LED_TRANS_FINISH_INT_EN_R {
257 #[doc = "Get enumerated values variant"]
258 #[inline(always)]
259 pub fn variant(&self) -> LED_TRANS_FINISH_INT_EN_A {
260 match self.bits {
261 false => LED_TRANS_FINISH_INT_EN_A::DISABLE,
262 true => LED_TRANS_FINISH_INT_EN_A::ENABLE,
263 }
264 }
265 #[doc = "Checks if the value of the field is `DISABLE`"]
266 #[inline(always)]
267 pub fn is_disable(&self) -> bool {
268 *self == LED_TRANS_FINISH_INT_EN_A::DISABLE
269 }
270 #[doc = "Checks if the value of the field is `ENABLE`"]
271 #[inline(always)]
272 pub fn is_enable(&self) -> bool {
273 *self == LED_TRANS_FINISH_INT_EN_A::ENABLE
274 }
275}
276#[doc = "Field `LED_TRANS_FINISH_INT_EN` writer - "]
277pub type LED_TRANS_FINISH_INT_EN_W<'a> =
278 crate::BitWriter<'a, u32, LEDC_INT_CTRL_SPEC, LED_TRANS_FINISH_INT_EN_A, 0>;
279impl<'a> LED_TRANS_FINISH_INT_EN_W<'a> {
280 #[doc = "`0`"]
281 #[inline(always)]
282 pub fn disable(self) -> &'a mut W {
283 self.variant(LED_TRANS_FINISH_INT_EN_A::DISABLE)
284 }
285 #[doc = "`1`"]
286 #[inline(always)]
287 pub fn enable(self) -> &'a mut W {
288 self.variant(LED_TRANS_FINISH_INT_EN_A::ENABLE)
289 }
290}
291impl R {
292 #[doc = "Bit 5"]
293 #[inline(always)]
294 pub fn global_int_en(&self) -> GLOBAL_INT_EN_R {
295 GLOBAL_INT_EN_R::new(((self.bits >> 5) & 1) != 0)
296 }
297 #[doc = "Bit 4"]
298 #[inline(always)]
299 pub fn fifo_overflow_int_en(&self) -> FIFO_OVERFLOW_INT_EN_R {
300 FIFO_OVERFLOW_INT_EN_R::new(((self.bits >> 4) & 1) != 0)
301 }
302 #[doc = "Bit 3"]
303 #[inline(always)]
304 pub fn waitdata_timeout_int_en(&self) -> WAITDATA_TIMEOUT_INT_EN_R {
305 WAITDATA_TIMEOUT_INT_EN_R::new(((self.bits >> 3) & 1) != 0)
306 }
307 #[doc = "Bit 1"]
308 #[inline(always)]
309 pub fn fifo_cpureq_int_en(&self) -> FIFO_CPUREQ_INT_EN_R {
310 FIFO_CPUREQ_INT_EN_R::new(((self.bits >> 1) & 1) != 0)
311 }
312 #[doc = "Bit 0"]
313 #[inline(always)]
314 pub fn led_trans_finish_int_en(&self) -> LED_TRANS_FINISH_INT_EN_R {
315 LED_TRANS_FINISH_INT_EN_R::new((self.bits & 1) != 0)
316 }
317}
318impl W {
319 #[doc = "Bit 5"]
320 #[inline(always)]
321 pub fn global_int_en(&mut self) -> GLOBAL_INT_EN_W {
322 GLOBAL_INT_EN_W::new(self)
323 }
324 #[doc = "Bit 4"]
325 #[inline(always)]
326 pub fn fifo_overflow_int_en(&mut self) -> FIFO_OVERFLOW_INT_EN_W {
327 FIFO_OVERFLOW_INT_EN_W::new(self)
328 }
329 #[doc = "Bit 3"]
330 #[inline(always)]
331 pub fn waitdata_timeout_int_en(&mut self) -> WAITDATA_TIMEOUT_INT_EN_W {
332 WAITDATA_TIMEOUT_INT_EN_W::new(self)
333 }
334 #[doc = "Bit 1"]
335 #[inline(always)]
336 pub fn fifo_cpureq_int_en(&mut self) -> FIFO_CPUREQ_INT_EN_W {
337 FIFO_CPUREQ_INT_EN_W::new(self)
338 }
339 #[doc = "Bit 0"]
340 #[inline(always)]
341 pub fn led_trans_finish_int_en(&mut self) -> LED_TRANS_FINISH_INT_EN_W {
342 LED_TRANS_FINISH_INT_EN_W::new(self)
343 }
344 #[doc = "Writes raw bits to the register."]
345 #[inline(always)]
346 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
347 self.0.bits(bits);
348 self
349 }
350}
351#[doc = "LEDC Interrupt Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ledc_int_ctrl](index.html) module"]
352pub struct LEDC_INT_CTRL_SPEC;
353impl crate::RegisterSpec for LEDC_INT_CTRL_SPEC {
354 type Ux = u32;
355}
356#[doc = "`read()` method returns [ledc_int_ctrl::R](R) reader structure"]
357impl crate::Readable for LEDC_INT_CTRL_SPEC {
358 type Reader = R;
359}
360#[doc = "`write(|w| ..)` method takes [ledc_int_ctrl::W](W) writer structure"]
361impl crate::Writable for LEDC_INT_CTRL_SPEC {
362 type Writer = W;
363}
364#[doc = "`reset()` method sets LEDC_INT_CTRL to value 0"]
365impl crate::Resettable for LEDC_INT_CTRL_SPEC {
366 #[inline(always)]
367 fn reset_value() -> Self::Ux {
368 0
369 }
370}