r528_pac/
dmac.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "0x00 - DMAC IRQ Enable Register 0"]
5    pub dmac_irq_en_reg0: crate::Reg<dmac_irq_en_reg0::DMAC_IRQ_EN_REG0_SPEC>,
6    #[doc = "0x04 - DMAC IRQ Enable Register 1"]
7    pub dmac_irq_en_reg1: crate::Reg<dmac_irq_en_reg1::DMAC_IRQ_EN_REG1_SPEC>,
8    _reserved2: [u8; 0x08],
9    #[doc = "0x10 - DMAC IRQ Pending Register 0"]
10    pub dmac_irq_pend_reg0: crate::Reg<dmac_irq_pend_reg0::DMAC_IRQ_PEND_REG0_SPEC>,
11    #[doc = "0x14 - DMAC IRQ Pending Register 1"]
12    pub dmac_irq_pend_reg1: crate::Reg<dmac_irq_pend_reg1::DMAC_IRQ_PEND_REG1_SPEC>,
13    _reserved4: [u8; 0x10],
14    #[doc = "0x28 - DMAC Auto Gating Register"]
15    pub dmac_auto_gate_reg: crate::Reg<dmac_auto_gate_reg::DMAC_AUTO_GATE_REG_SPEC>,
16    _reserved5: [u8; 0x04],
17    #[doc = "0x30 - DMAC Status Register"]
18    pub dmac_sta_reg: crate::Reg<dmac_sta_reg::DMAC_STA_REG_SPEC>,
19    _reserved6: [u8; 0xcc],
20    #[doc = "0x100 - DMAC Channel Enable Register"]
21    pub dmac_en_reg0: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
22    #[doc = "0x104 - DMAC Channel Pause Register"]
23    pub dmac_pau_reg0: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
24    #[doc = "0x108 - DMAC Channel Start Address Register"]
25    pub dmac_desc_addr_reg0: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
26    #[doc = "0x10c - DMAC Channel Configuration Register"]
27    pub dmac_cfg_reg0: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
28    #[doc = "0x110 - DMAC Channel Current Source Register"]
29    pub dmac_cur_src_reg0: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
30    #[doc = "0x114 - DMAC Channel Current Destination Register"]
31    pub dmac_cur_dest_reg0: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
32    #[doc = "0x118 - DMAC Channel Byte Counter Left Register"]
33    pub dmac_bcnt_left_reg0: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
34    #[doc = "0x11c - DMAC Channel Parameter Register"]
35    pub dmac_para_reg0: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
36    _reserved14: [u8; 0x08],
37    #[doc = "0x128 - DMAC Mode Register"]
38    pub dmac_mode_reg0: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
39    #[doc = "0x12c - DMAC Former Descriptor Address Register"]
40    pub dmac_fdesc_addr_reg0: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
41    #[doc = "0x130 - DMAC Package Number Register"]
42    pub dmac_pkg_num_reg0: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
43    _reserved17: [u8; 0x0c],
44    #[doc = "0x140 - DMAC Channel Enable Register"]
45    pub dmac_en_reg1: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
46    #[doc = "0x144 - DMAC Channel Pause Register"]
47    pub dmac_pau_reg1: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
48    #[doc = "0x148 - DMAC Channel Start Address Register"]
49    pub dmac_desc_addr_reg1: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
50    #[doc = "0x14c - DMAC Channel Configuration Register"]
51    pub dmac_cfg_reg1: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
52    #[doc = "0x150 - DMAC Channel Current Source Register"]
53    pub dmac_cur_src_reg1: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
54    #[doc = "0x154 - DMAC Channel Current Destination Register"]
55    pub dmac_cur_dest_reg1: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
56    #[doc = "0x158 - DMAC Channel Byte Counter Left Register"]
57    pub dmac_bcnt_left_reg1: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
58    #[doc = "0x15c - DMAC Channel Parameter Register"]
59    pub dmac_para_reg1: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
60    _reserved25: [u8; 0x08],
61    #[doc = "0x168 - DMAC Mode Register"]
62    pub dmac_mode_reg1: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
63    #[doc = "0x16c - DMAC Former Descriptor Address Register"]
64    pub dmac_fdesc_addr_reg1: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
65    #[doc = "0x170 - DMAC Package Number Register"]
66    pub dmac_pkg_num_reg1: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
67    _reserved28: [u8; 0x0c],
68    #[doc = "0x180 - DMAC Channel Enable Register"]
69    pub dmac_en_reg2: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
70    #[doc = "0x184 - DMAC Channel Pause Register"]
71    pub dmac_pau_reg2: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
72    #[doc = "0x188 - DMAC Channel Start Address Register"]
73    pub dmac_desc_addr_reg2: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
74    #[doc = "0x18c - DMAC Channel Configuration Register"]
75    pub dmac_cfg_reg2: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
76    #[doc = "0x190 - DMAC Channel Current Source Register"]
77    pub dmac_cur_src_reg2: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
78    #[doc = "0x194 - DMAC Channel Current Destination Register"]
79    pub dmac_cur_dest_reg2: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
80    #[doc = "0x198 - DMAC Channel Byte Counter Left Register"]
81    pub dmac_bcnt_left_reg2: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
82    #[doc = "0x19c - DMAC Channel Parameter Register"]
83    pub dmac_para_reg2: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
84    _reserved36: [u8; 0x08],
85    #[doc = "0x1a8 - DMAC Mode Register"]
86    pub dmac_mode_reg2: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
87    #[doc = "0x1ac - DMAC Former Descriptor Address Register"]
88    pub dmac_fdesc_addr_reg2: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
89    #[doc = "0x1b0 - DMAC Package Number Register"]
90    pub dmac_pkg_num_reg2: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
91    _reserved39: [u8; 0x0c],
92    #[doc = "0x1c0 - DMAC Channel Enable Register"]
93    pub dmac_en_reg3: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
94    #[doc = "0x1c4 - DMAC Channel Pause Register"]
95    pub dmac_pau_reg3: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
96    #[doc = "0x1c8 - DMAC Channel Start Address Register"]
97    pub dmac_desc_addr_reg3: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
98    #[doc = "0x1cc - DMAC Channel Configuration Register"]
99    pub dmac_cfg_reg3: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
100    #[doc = "0x1d0 - DMAC Channel Current Source Register"]
101    pub dmac_cur_src_reg3: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
102    #[doc = "0x1d4 - DMAC Channel Current Destination Register"]
103    pub dmac_cur_dest_reg3: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
104    #[doc = "0x1d8 - DMAC Channel Byte Counter Left Register"]
105    pub dmac_bcnt_left_reg3: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
106    #[doc = "0x1dc - DMAC Channel Parameter Register"]
107    pub dmac_para_reg3: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
108    _reserved47: [u8; 0x08],
109    #[doc = "0x1e8 - DMAC Mode Register"]
110    pub dmac_mode_reg3: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
111    #[doc = "0x1ec - DMAC Former Descriptor Address Register"]
112    pub dmac_fdesc_addr_reg3: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
113    #[doc = "0x1f0 - DMAC Package Number Register"]
114    pub dmac_pkg_num_reg3: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
115    _reserved50: [u8; 0x0c],
116    #[doc = "0x200 - DMAC Channel Enable Register"]
117    pub dmac_en_reg4: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
118    #[doc = "0x204 - DMAC Channel Pause Register"]
119    pub dmac_pau_reg4: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
120    #[doc = "0x208 - DMAC Channel Start Address Register"]
121    pub dmac_desc_addr_reg4: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
122    #[doc = "0x20c - DMAC Channel Configuration Register"]
123    pub dmac_cfg_reg4: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
124    #[doc = "0x210 - DMAC Channel Current Source Register"]
125    pub dmac_cur_src_reg4: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
126    #[doc = "0x214 - DMAC Channel Current Destination Register"]
127    pub dmac_cur_dest_reg4: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
128    #[doc = "0x218 - DMAC Channel Byte Counter Left Register"]
129    pub dmac_bcnt_left_reg4: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
130    #[doc = "0x21c - DMAC Channel Parameter Register"]
131    pub dmac_para_reg4: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
132    _reserved58: [u8; 0x08],
133    #[doc = "0x228 - DMAC Mode Register"]
134    pub dmac_mode_reg4: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
135    #[doc = "0x22c - DMAC Former Descriptor Address Register"]
136    pub dmac_fdesc_addr_reg4: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
137    #[doc = "0x230 - DMAC Package Number Register"]
138    pub dmac_pkg_num_reg4: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
139    _reserved61: [u8; 0x0c],
140    #[doc = "0x240 - DMAC Channel Enable Register"]
141    pub dmac_en_reg5: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
142    #[doc = "0x244 - DMAC Channel Pause Register"]
143    pub dmac_pau_reg5: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
144    #[doc = "0x248 - DMAC Channel Start Address Register"]
145    pub dmac_desc_addr_reg5: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
146    #[doc = "0x24c - DMAC Channel Configuration Register"]
147    pub dmac_cfg_reg5: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
148    #[doc = "0x250 - DMAC Channel Current Source Register"]
149    pub dmac_cur_src_reg5: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
150    #[doc = "0x254 - DMAC Channel Current Destination Register"]
151    pub dmac_cur_dest_reg5: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
152    #[doc = "0x258 - DMAC Channel Byte Counter Left Register"]
153    pub dmac_bcnt_left_reg5: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
154    #[doc = "0x25c - DMAC Channel Parameter Register"]
155    pub dmac_para_reg5: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
156    _reserved69: [u8; 0x08],
157    #[doc = "0x268 - DMAC Mode Register"]
158    pub dmac_mode_reg5: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
159    #[doc = "0x26c - DMAC Former Descriptor Address Register"]
160    pub dmac_fdesc_addr_reg5: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
161    #[doc = "0x270 - DMAC Package Number Register"]
162    pub dmac_pkg_num_reg5: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
163    _reserved72: [u8; 0x0c],
164    #[doc = "0x280 - DMAC Channel Enable Register"]
165    pub dmac_en_reg6: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
166    #[doc = "0x284 - DMAC Channel Pause Register"]
167    pub dmac_pau_reg6: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
168    #[doc = "0x288 - DMAC Channel Start Address Register"]
169    pub dmac_desc_addr_reg6: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
170    #[doc = "0x28c - DMAC Channel Configuration Register"]
171    pub dmac_cfg_reg6: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
172    #[doc = "0x290 - DMAC Channel Current Source Register"]
173    pub dmac_cur_src_reg6: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
174    #[doc = "0x294 - DMAC Channel Current Destination Register"]
175    pub dmac_cur_dest_reg6: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
176    #[doc = "0x298 - DMAC Channel Byte Counter Left Register"]
177    pub dmac_bcnt_left_reg6: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
178    #[doc = "0x29c - DMAC Channel Parameter Register"]
179    pub dmac_para_reg6: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
180    _reserved80: [u8; 0x08],
181    #[doc = "0x2a8 - DMAC Mode Register"]
182    pub dmac_mode_reg6: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
183    #[doc = "0x2ac - DMAC Former Descriptor Address Register"]
184    pub dmac_fdesc_addr_reg6: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
185    #[doc = "0x2b0 - DMAC Package Number Register"]
186    pub dmac_pkg_num_reg6: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
187    _reserved83: [u8; 0x0c],
188    #[doc = "0x2c0 - DMAC Channel Enable Register"]
189    pub dmac_en_reg7: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
190    #[doc = "0x2c4 - DMAC Channel Pause Register"]
191    pub dmac_pau_reg7: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
192    #[doc = "0x2c8 - DMAC Channel Start Address Register"]
193    pub dmac_desc_addr_reg7: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
194    #[doc = "0x2cc - DMAC Channel Configuration Register"]
195    pub dmac_cfg_reg7: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
196    #[doc = "0x2d0 - DMAC Channel Current Source Register"]
197    pub dmac_cur_src_reg7: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
198    #[doc = "0x2d4 - DMAC Channel Current Destination Register"]
199    pub dmac_cur_dest_reg7: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
200    #[doc = "0x2d8 - DMAC Channel Byte Counter Left Register"]
201    pub dmac_bcnt_left_reg7: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
202    #[doc = "0x2dc - DMAC Channel Parameter Register"]
203    pub dmac_para_reg7: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
204    _reserved91: [u8; 0x08],
205    #[doc = "0x2e8 - DMAC Mode Register"]
206    pub dmac_mode_reg7: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
207    #[doc = "0x2ec - DMAC Former Descriptor Address Register"]
208    pub dmac_fdesc_addr_reg7: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
209    #[doc = "0x2f0 - DMAC Package Number Register"]
210    pub dmac_pkg_num_reg7: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
211    _reserved94: [u8; 0x0c],
212    #[doc = "0x300 - DMAC Channel Enable Register"]
213    pub dmac_en_reg8: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
214    #[doc = "0x304 - DMAC Channel Pause Register"]
215    pub dmac_pau_reg8: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
216    #[doc = "0x308 - DMAC Channel Start Address Register"]
217    pub dmac_desc_addr_reg8: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
218    #[doc = "0x30c - DMAC Channel Configuration Register"]
219    pub dmac_cfg_reg8: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
220    #[doc = "0x310 - DMAC Channel Current Source Register"]
221    pub dmac_cur_src_reg8: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
222    #[doc = "0x314 - DMAC Channel Current Destination Register"]
223    pub dmac_cur_dest_reg8: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
224    #[doc = "0x318 - DMAC Channel Byte Counter Left Register"]
225    pub dmac_bcnt_left_reg8: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
226    #[doc = "0x31c - DMAC Channel Parameter Register"]
227    pub dmac_para_reg8: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
228    _reserved102: [u8; 0x08],
229    #[doc = "0x328 - DMAC Mode Register"]
230    pub dmac_mode_reg8: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
231    #[doc = "0x32c - DMAC Former Descriptor Address Register"]
232    pub dmac_fdesc_addr_reg8: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
233    #[doc = "0x330 - DMAC Package Number Register"]
234    pub dmac_pkg_num_reg8: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
235    _reserved105: [u8; 0x0c],
236    #[doc = "0x340 - DMAC Channel Enable Register"]
237    pub dmac_en_reg9: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
238    #[doc = "0x344 - DMAC Channel Pause Register"]
239    pub dmac_pau_reg9: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
240    #[doc = "0x348 - DMAC Channel Start Address Register"]
241    pub dmac_desc_addr_reg9: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
242    #[doc = "0x34c - DMAC Channel Configuration Register"]
243    pub dmac_cfg_reg9: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
244    #[doc = "0x350 - DMAC Channel Current Source Register"]
245    pub dmac_cur_src_reg9: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
246    #[doc = "0x354 - DMAC Channel Current Destination Register"]
247    pub dmac_cur_dest_reg9: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
248    #[doc = "0x358 - DMAC Channel Byte Counter Left Register"]
249    pub dmac_bcnt_left_reg9: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
250    #[doc = "0x35c - DMAC Channel Parameter Register"]
251    pub dmac_para_reg9: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
252    _reserved113: [u8; 0x08],
253    #[doc = "0x368 - DMAC Mode Register"]
254    pub dmac_mode_reg9: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
255    #[doc = "0x36c - DMAC Former Descriptor Address Register"]
256    pub dmac_fdesc_addr_reg9: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
257    #[doc = "0x370 - DMAC Package Number Register"]
258    pub dmac_pkg_num_reg9: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
259    _reserved116: [u8; 0x0c],
260    #[doc = "0x380 - DMAC Channel Enable Register"]
261    pub dmac_en_reg10: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
262    #[doc = "0x384 - DMAC Channel Pause Register"]
263    pub dmac_pau_reg10: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
264    #[doc = "0x388 - DMAC Channel Start Address Register"]
265    pub dmac_desc_addr_reg10: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
266    #[doc = "0x38c - DMAC Channel Configuration Register"]
267    pub dmac_cfg_reg10: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
268    #[doc = "0x390 - DMAC Channel Current Source Register"]
269    pub dmac_cur_src_reg10: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
270    #[doc = "0x394 - DMAC Channel Current Destination Register"]
271    pub dmac_cur_dest_reg10: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
272    #[doc = "0x398 - DMAC Channel Byte Counter Left Register"]
273    pub dmac_bcnt_left_reg10: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
274    #[doc = "0x39c - DMAC Channel Parameter Register"]
275    pub dmac_para_reg10: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
276    _reserved124: [u8; 0x08],
277    #[doc = "0x3a8 - DMAC Mode Register"]
278    pub dmac_mode_reg10: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
279    #[doc = "0x3ac - DMAC Former Descriptor Address Register"]
280    pub dmac_fdesc_addr_reg10: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
281    #[doc = "0x3b0 - DMAC Package Number Register"]
282    pub dmac_pkg_num_reg10: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
283    _reserved127: [u8; 0x0c],
284    #[doc = "0x3c0 - DMAC Channel Enable Register"]
285    pub dmac_en_reg11: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
286    #[doc = "0x3c4 - DMAC Channel Pause Register"]
287    pub dmac_pau_reg11: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
288    #[doc = "0x3c8 - DMAC Channel Start Address Register"]
289    pub dmac_desc_addr_reg11: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
290    #[doc = "0x3cc - DMAC Channel Configuration Register"]
291    pub dmac_cfg_reg11: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
292    #[doc = "0x3d0 - DMAC Channel Current Source Register"]
293    pub dmac_cur_src_reg11: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
294    #[doc = "0x3d4 - DMAC Channel Current Destination Register"]
295    pub dmac_cur_dest_reg11: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
296    #[doc = "0x3d8 - DMAC Channel Byte Counter Left Register"]
297    pub dmac_bcnt_left_reg11: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
298    #[doc = "0x3dc - DMAC Channel Parameter Register"]
299    pub dmac_para_reg11: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
300    _reserved135: [u8; 0x08],
301    #[doc = "0x3e8 - DMAC Mode Register"]
302    pub dmac_mode_reg11: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
303    #[doc = "0x3ec - DMAC Former Descriptor Address Register"]
304    pub dmac_fdesc_addr_reg11: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
305    #[doc = "0x3f0 - DMAC Package Number Register"]
306    pub dmac_pkg_num_reg11: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
307    _reserved138: [u8; 0x0c],
308    #[doc = "0x400 - DMAC Channel Enable Register"]
309    pub dmac_en_reg12: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
310    #[doc = "0x404 - DMAC Channel Pause Register"]
311    pub dmac_pau_reg12: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
312    #[doc = "0x408 - DMAC Channel Start Address Register"]
313    pub dmac_desc_addr_reg12: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
314    #[doc = "0x40c - DMAC Channel Configuration Register"]
315    pub dmac_cfg_reg12: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
316    #[doc = "0x410 - DMAC Channel Current Source Register"]
317    pub dmac_cur_src_reg12: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
318    #[doc = "0x414 - DMAC Channel Current Destination Register"]
319    pub dmac_cur_dest_reg12: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
320    #[doc = "0x418 - DMAC Channel Byte Counter Left Register"]
321    pub dmac_bcnt_left_reg12: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
322    #[doc = "0x41c - DMAC Channel Parameter Register"]
323    pub dmac_para_reg12: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
324    _reserved146: [u8; 0x08],
325    #[doc = "0x428 - DMAC Mode Register"]
326    pub dmac_mode_reg12: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
327    #[doc = "0x42c - DMAC Former Descriptor Address Register"]
328    pub dmac_fdesc_addr_reg12: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
329    #[doc = "0x430 - DMAC Package Number Register"]
330    pub dmac_pkg_num_reg12: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
331    _reserved149: [u8; 0x0c],
332    #[doc = "0x440 - DMAC Channel Enable Register"]
333    pub dmac_en_reg13: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
334    #[doc = "0x444 - DMAC Channel Pause Register"]
335    pub dmac_pau_reg13: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
336    #[doc = "0x448 - DMAC Channel Start Address Register"]
337    pub dmac_desc_addr_reg13: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
338    #[doc = "0x44c - DMAC Channel Configuration Register"]
339    pub dmac_cfg_reg13: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
340    #[doc = "0x450 - DMAC Channel Current Source Register"]
341    pub dmac_cur_src_reg13: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
342    #[doc = "0x454 - DMAC Channel Current Destination Register"]
343    pub dmac_cur_dest_reg13: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
344    #[doc = "0x458 - DMAC Channel Byte Counter Left Register"]
345    pub dmac_bcnt_left_reg13: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
346    #[doc = "0x45c - DMAC Channel Parameter Register"]
347    pub dmac_para_reg13: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
348    _reserved157: [u8; 0x08],
349    #[doc = "0x468 - DMAC Mode Register"]
350    pub dmac_mode_reg13: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
351    #[doc = "0x46c - DMAC Former Descriptor Address Register"]
352    pub dmac_fdesc_addr_reg13: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
353    #[doc = "0x470 - DMAC Package Number Register"]
354    pub dmac_pkg_num_reg13: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
355    _reserved160: [u8; 0x0c],
356    #[doc = "0x480 - DMAC Channel Enable Register"]
357    pub dmac_en_reg14: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
358    #[doc = "0x484 - DMAC Channel Pause Register"]
359    pub dmac_pau_reg14: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
360    #[doc = "0x488 - DMAC Channel Start Address Register"]
361    pub dmac_desc_addr_reg14: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
362    #[doc = "0x48c - DMAC Channel Configuration Register"]
363    pub dmac_cfg_reg14: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
364    #[doc = "0x490 - DMAC Channel Current Source Register"]
365    pub dmac_cur_src_reg14: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
366    #[doc = "0x494 - DMAC Channel Current Destination Register"]
367    pub dmac_cur_dest_reg14: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
368    #[doc = "0x498 - DMAC Channel Byte Counter Left Register"]
369    pub dmac_bcnt_left_reg14: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
370    #[doc = "0x49c - DMAC Channel Parameter Register"]
371    pub dmac_para_reg14: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
372    _reserved168: [u8; 0x08],
373    #[doc = "0x4a8 - DMAC Mode Register"]
374    pub dmac_mode_reg14: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
375    #[doc = "0x4ac - DMAC Former Descriptor Address Register"]
376    pub dmac_fdesc_addr_reg14: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
377    #[doc = "0x4b0 - DMAC Package Number Register"]
378    pub dmac_pkg_num_reg14: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
379    _reserved171: [u8; 0x0c],
380    #[doc = "0x4c0 - DMAC Channel Enable Register"]
381    pub dmac_en_reg15: crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>,
382    #[doc = "0x4c4 - DMAC Channel Pause Register"]
383    pub dmac_pau_reg15: crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>,
384    #[doc = "0x4c8 - DMAC Channel Start Address Register"]
385    pub dmac_desc_addr_reg15: crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>,
386    #[doc = "0x4cc - DMAC Channel Configuration Register"]
387    pub dmac_cfg_reg15: crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>,
388    #[doc = "0x4d0 - DMAC Channel Current Source Register"]
389    pub dmac_cur_src_reg15: crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>,
390    #[doc = "0x4d4 - DMAC Channel Current Destination Register"]
391    pub dmac_cur_dest_reg15: crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>,
392    #[doc = "0x4d8 - DMAC Channel Byte Counter Left Register"]
393    pub dmac_bcnt_left_reg15: crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>,
394    #[doc = "0x4dc - DMAC Channel Parameter Register"]
395    pub dmac_para_reg15: crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>,
396    _reserved179: [u8; 0x08],
397    #[doc = "0x4e8 - DMAC Mode Register"]
398    pub dmac_mode_reg15: crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>,
399    #[doc = "0x4ec - DMAC Former Descriptor Address Register"]
400    pub dmac_fdesc_addr_reg15: crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>,
401    #[doc = "0x4f0 - DMAC Package Number Register"]
402    pub dmac_pkg_num_reg15: crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>,
403}
404#[doc = "DMAC_IRQ_EN_REG0 register accessor: an alias for `Reg<DMAC_IRQ_EN_REG0_SPEC>`"]
405pub type DMAC_IRQ_EN_REG0 = crate::Reg<dmac_irq_en_reg0::DMAC_IRQ_EN_REG0_SPEC>;
406#[doc = "DMAC IRQ Enable Register 0"]
407pub mod dmac_irq_en_reg0;
408#[doc = "DMAC_IRQ_EN_REG1 register accessor: an alias for `Reg<DMAC_IRQ_EN_REG1_SPEC>`"]
409pub type DMAC_IRQ_EN_REG1 = crate::Reg<dmac_irq_en_reg1::DMAC_IRQ_EN_REG1_SPEC>;
410#[doc = "DMAC IRQ Enable Register 1"]
411pub mod dmac_irq_en_reg1;
412#[doc = "DMAC_IRQ_PEND_REG0 register accessor: an alias for `Reg<DMAC_IRQ_PEND_REG0_SPEC>`"]
413pub type DMAC_IRQ_PEND_REG0 = crate::Reg<dmac_irq_pend_reg0::DMAC_IRQ_PEND_REG0_SPEC>;
414#[doc = "DMAC IRQ Pending Register 0"]
415pub mod dmac_irq_pend_reg0;
416#[doc = "DMAC_IRQ_PEND_REG1 register accessor: an alias for `Reg<DMAC_IRQ_PEND_REG1_SPEC>`"]
417pub type DMAC_IRQ_PEND_REG1 = crate::Reg<dmac_irq_pend_reg1::DMAC_IRQ_PEND_REG1_SPEC>;
418#[doc = "DMAC IRQ Pending Register 1"]
419pub mod dmac_irq_pend_reg1;
420#[doc = "DMAC_AUTO_GATE_REG register accessor: an alias for `Reg<DMAC_AUTO_GATE_REG_SPEC>`"]
421pub type DMAC_AUTO_GATE_REG = crate::Reg<dmac_auto_gate_reg::DMAC_AUTO_GATE_REG_SPEC>;
422#[doc = "DMAC Auto Gating Register"]
423pub mod dmac_auto_gate_reg;
424#[doc = "DMAC_STA_REG register accessor: an alias for `Reg<DMAC_STA_REG_SPEC>`"]
425pub type DMAC_STA_REG = crate::Reg<dmac_sta_reg::DMAC_STA_REG_SPEC>;
426#[doc = "DMAC Status Register"]
427pub mod dmac_sta_reg;
428#[doc = "DMAC_EN_REG register accessor: an alias for `Reg<DMAC_EN_REG_SPEC>`"]
429pub type DMAC_EN_REG = crate::Reg<dmac_en_reg::DMAC_EN_REG_SPEC>;
430#[doc = "DMAC Channel Enable Register"]
431pub mod dmac_en_reg;
432#[doc = "DMAC_PAU_REG register accessor: an alias for `Reg<DMAC_PAU_REG_SPEC>`"]
433pub type DMAC_PAU_REG = crate::Reg<dmac_pau_reg::DMAC_PAU_REG_SPEC>;
434#[doc = "DMAC Channel Pause Register"]
435pub mod dmac_pau_reg;
436#[doc = "DMAC_DESC_ADDR_REG register accessor: an alias for `Reg<DMAC_DESC_ADDR_REG_SPEC>`"]
437pub type DMAC_DESC_ADDR_REG = crate::Reg<dmac_desc_addr_reg::DMAC_DESC_ADDR_REG_SPEC>;
438#[doc = "DMAC Channel Start Address Register"]
439pub mod dmac_desc_addr_reg;
440#[doc = "DMAC_CFG_REG register accessor: an alias for `Reg<DMAC_CFG_REG_SPEC>`"]
441pub type DMAC_CFG_REG = crate::Reg<dmac_cfg_reg::DMAC_CFG_REG_SPEC>;
442#[doc = "DMAC Channel Configuration Register"]
443pub mod dmac_cfg_reg;
444#[doc = "DMAC_CUR_SRC_REG register accessor: an alias for `Reg<DMAC_CUR_SRC_REG_SPEC>`"]
445pub type DMAC_CUR_SRC_REG = crate::Reg<dmac_cur_src_reg::DMAC_CUR_SRC_REG_SPEC>;
446#[doc = "DMAC Channel Current Source Register"]
447pub mod dmac_cur_src_reg;
448#[doc = "DMAC_CUR_DEST_REG register accessor: an alias for `Reg<DMAC_CUR_DEST_REG_SPEC>`"]
449pub type DMAC_CUR_DEST_REG = crate::Reg<dmac_cur_dest_reg::DMAC_CUR_DEST_REG_SPEC>;
450#[doc = "DMAC Channel Current Destination Register"]
451pub mod dmac_cur_dest_reg;
452#[doc = "DMAC_BCNT_LEFT_REG register accessor: an alias for `Reg<DMAC_BCNT_LEFT_REG_SPEC>`"]
453pub type DMAC_BCNT_LEFT_REG = crate::Reg<dmac_bcnt_left_reg::DMAC_BCNT_LEFT_REG_SPEC>;
454#[doc = "DMAC Channel Byte Counter Left Register"]
455pub mod dmac_bcnt_left_reg;
456#[doc = "DMAC_PARA_REG register accessor: an alias for `Reg<DMAC_PARA_REG_SPEC>`"]
457pub type DMAC_PARA_REG = crate::Reg<dmac_para_reg::DMAC_PARA_REG_SPEC>;
458#[doc = "DMAC Channel Parameter Register"]
459pub mod dmac_para_reg;
460#[doc = "DMAC_MODE_REG register accessor: an alias for `Reg<DMAC_MODE_REG_SPEC>`"]
461pub type DMAC_MODE_REG = crate::Reg<dmac_mode_reg::DMAC_MODE_REG_SPEC>;
462#[doc = "DMAC Mode Register"]
463pub mod dmac_mode_reg;
464#[doc = "DMAC_FDESC_ADDR_REG register accessor: an alias for `Reg<DMAC_FDESC_ADDR_REG_SPEC>`"]
465pub type DMAC_FDESC_ADDR_REG = crate::Reg<dmac_fdesc_addr_reg::DMAC_FDESC_ADDR_REG_SPEC>;
466#[doc = "DMAC Former Descriptor Address Register"]
467pub mod dmac_fdesc_addr_reg;
468#[doc = "DMAC_PKG_NUM_REG register accessor: an alias for `Reg<DMAC_PKG_NUM_REG_SPEC>`"]
469pub type DMAC_PKG_NUM_REG = crate::Reg<dmac_pkg_num_reg::DMAC_PKG_NUM_REG_SPEC>;
470#[doc = "DMAC Package Number Register"]
471pub mod dmac_pkg_num_reg;