r_efi/protocols/
debug_support.rs

1//! Debug Support Protocol
2//!
3//! It provides the services to allow the debug agent to register callback functions that are
4//! called either periodically or when specific processor exceptions occur.
5
6pub const PROTOCOL_GUID: crate::base::Guid = crate::base::Guid::from_fields(
7    0x2755590c,
8    0x6f3c,
9    0x42fa,
10    0x9e,
11    0xa4,
12    &[0xa3, 0xba, 0x54, 0x3c, 0xda, 0x25],
13);
14
15pub type InstructionSetArchitecture = u32;
16
17pub const ISA_IA32: InstructionSetArchitecture = 0x014c;
18pub const ISA_X64: InstructionSetArchitecture = 0x8664;
19pub const ISA_IPF: InstructionSetArchitecture = 0x0200;
20pub const ISA_EBC: InstructionSetArchitecture = 0x0ebc;
21pub const ISA_ARM: InstructionSetArchitecture = 0x1c2;
22pub const ISA_AARCH64: InstructionSetArchitecture = 0xaa64;
23pub const ISA_RISCV32: InstructionSetArchitecture = 0x5032;
24pub const ISA_RISCV64: InstructionSetArchitecture = 0x5064;
25pub const ISA_RISCV128: InstructionSetArchitecture = 0x5128;
26
27#[repr(C)]
28#[derive(Clone, Copy)]
29pub union SystemContext {
30    pub system_context_ebc: *mut SystemContextEbc,
31    pub system_context_ia32: *mut SystemContextIa32,
32    pub system_context_x64: *mut SystemContextX64,
33    pub system_context_ipf: *mut SystemContextIpf,
34    pub system_context_arm: *mut SystemContextArm,
35    pub system_context_aarch64: *mut SystemContextAArch64,
36    pub system_context_riscv32: *mut SystemContextRiscV32,
37    pub system_context_riscv64: *mut SystemContextRiscV64,
38    pub system_context_riscv128: *mut SystemContextRiscV128,
39}
40
41#[repr(C)]
42#[derive(Clone, Copy, Debug)]
43pub struct SystemContextEbc {
44    pub r0: u64,
45    pub r1: u64,
46    pub r2: u64,
47    pub r3: u64,
48    pub r4: u64,
49    pub r5: u64,
50    pub r6: u64,
51    pub r7: u64,
52    pub flags: u64,
53    pub control_flags: u64,
54    pub ip: u64,
55}
56
57#[repr(C)]
58#[derive(Clone, Copy, Debug)]
59pub struct SystemContextRiscV32 {
60    // Integer registers
61    pub zero: u32,
62    pub ra: u32,
63    pub sp: u32,
64    pub gp: u32,
65    pub tp: u32,
66    pub t0: u32,
67    pub t1: u32,
68    pub t2: u32,
69    pub s0fp: u32,
70    pub s1: u32,
71    pub a0: u32,
72    pub a1: u32,
73    pub a2: u32,
74    pub a3: u32,
75    pub a4: u32,
76    pub a5: u32,
77    pub a6: u32,
78    pub a7: u32,
79    pub s2: u32,
80    pub s3: u32,
81    pub s4: u32,
82    pub s5: u32,
83    pub s6: u32,
84    pub s7: u32,
85    pub s8: u32,
86    pub s9: u32,
87    pub s10: u32,
88    pub s11: u32,
89    pub t3: u32,
90    pub t4: u32,
91    pub t5: u32,
92    pub t6: u32,
93    // Floating registers for F, D and Q Standard Extensions
94    pub ft0: u128,
95    pub ft1: u128,
96    pub ft2: u128,
97    pub ft3: u128,
98    pub ft4: u128,
99    pub ft5: u128,
100    pub ft6: u128,
101    pub ft7: u128,
102    pub fs0: u128,
103    pub fs1: u128,
104    pub fa0: u128,
105    pub fa1: u128,
106    pub fa2: u128,
107    pub fa3: u128,
108    pub fa4: u128,
109    pub fa5: u128,
110    pub fa6: u128,
111    pub fa7: u128,
112    pub fs2: u128,
113    pub fs3: u128,
114    pub fs4: u128,
115    pub fs5: u128,
116    pub fs6: u128,
117    pub fs7: u128,
118    pub fs8: u128,
119    pub fs9: u128,
120    pub fs10: u128,
121    pub fs11: u128,
122    pub ft8: u128,
123    pub ft9: u128,
124    pub ft10: u128,
125    pub ft11: u128,
126}
127
128#[repr(C)]
129#[derive(Clone, Copy, Debug)]
130pub struct SystemContextRiscV64 {
131    // Integer registers
132    pub zero: u64,
133    pub ra: u64,
134    pub sp: u64,
135    pub gp: u64,
136    pub tp: u64,
137    pub t0: u64,
138    pub t1: u64,
139    pub t2: u64,
140    pub s0fp: u64,
141    pub s1: u64,
142    pub a0: u64,
143    pub a1: u64,
144    pub a2: u64,
145    pub a3: u64,
146    pub a4: u64,
147    pub a5: u64,
148    pub a6: u64,
149    pub a7: u64,
150    pub s2: u64,
151    pub s3: u64,
152    pub s4: u64,
153    pub s5: u64,
154    pub s6: u64,
155    pub s7: u64,
156    pub s8: u64,
157    pub s9: u64,
158    pub s10: u64,
159    pub s11: u64,
160    pub t3: u64,
161    pub t4: u64,
162    pub t5: u64,
163    pub t6: u64,
164    // Floating registers for F, D and Q Standard Extensions
165    pub ft0: u128,
166    pub ft1: u128,
167    pub ft2: u128,
168    pub ft3: u128,
169    pub ft4: u128,
170    pub ft5: u128,
171    pub ft6: u128,
172    pub ft7: u128,
173    pub fs0: u128,
174    pub fs1: u128,
175    pub fa0: u128,
176    pub fa1: u128,
177    pub fa2: u128,
178    pub fa3: u128,
179    pub fa4: u128,
180    pub fa5: u128,
181    pub fa6: u128,
182    pub fa7: u128,
183    pub fs2: u128,
184    pub fs3: u128,
185    pub fs4: u128,
186    pub fs5: u128,
187    pub fs6: u128,
188    pub fs7: u128,
189    pub fs8: u128,
190    pub fs9: u128,
191    pub fs10: u128,
192    pub fs11: u128,
193    pub ft8: u128,
194    pub ft9: u128,
195    pub ft10: u128,
196    pub ft11: u128,
197}
198
199#[repr(C)]
200#[derive(Clone, Copy, Debug)]
201pub struct SystemContextRiscV128 {
202    // Integer registers
203    pub zero: u128,
204    pub ra: u128,
205    pub sp: u128,
206    pub gp: u128,
207    pub tp: u128,
208    pub t0: u128,
209    pub t1: u128,
210    pub t2: u128,
211    pub s0fp: u128,
212    pub s1: u128,
213    pub a0: u128,
214    pub a1: u128,
215    pub a2: u128,
216    pub a3: u128,
217    pub a4: u128,
218    pub a5: u128,
219    pub a6: u128,
220    pub a7: u128,
221    pub s2: u128,
222    pub s3: u128,
223    pub s4: u128,
224    pub s5: u128,
225    pub s6: u128,
226    pub s7: u128,
227    pub s8: u128,
228    pub s9: u128,
229    pub s10: u128,
230    pub s11: u128,
231    pub t3: u128,
232    pub t4: u128,
233    pub t5: u128,
234    pub t6: u128,
235    // Floating registers for F, D and Q Standard Extensions
236    pub ft0: u128,
237    pub ft1: u128,
238    pub ft2: u128,
239    pub ft3: u128,
240    pub ft4: u128,
241    pub ft5: u128,
242    pub ft6: u128,
243    pub ft7: u128,
244    pub fs0: u128,
245    pub fs1: u128,
246    pub fa0: u128,
247    pub fa1: u128,
248    pub fa2: u128,
249    pub fa3: u128,
250    pub fa4: u128,
251    pub fa5: u128,
252    pub fa6: u128,
253    pub fa7: u128,
254    pub fs2: u128,
255    pub fs3: u128,
256    pub fs4: u128,
257    pub fs5: u128,
258    pub fs6: u128,
259    pub fs7: u128,
260    pub fs8: u128,
261    pub fs9: u128,
262    pub fs10: u128,
263    pub fs11: u128,
264    pub ft8: u128,
265    pub ft9: u128,
266    pub ft10: u128,
267    pub ft11: u128,
268}
269
270#[repr(C)]
271#[derive(Clone, Copy, Debug)]
272pub struct SystemContextIa32 {
273    // ExceptionData is additional data pushed on the stack by some types of IA-32 exceptions
274    pub exception_data: u32,
275    pub fx_save_state: FxSaveStateIA32,
276    pub dr0: u32,
277    pub dr1: u32,
278    pub dr2: u32,
279    pub dr3: u32,
280    pub dr6: u32,
281    pub dr7: u32,
282    pub cr0: u32,
283    // Reserved
284    pub cr1: u32,
285    pub cr2: u32,
286    pub cr3: u32,
287    pub cr4: u32,
288    pub eflags: u32,
289    pub ldtr: u32,
290    pub tr: u32,
291    pub gdtr: [u32; 2],
292    pub idtr: [u32; 2],
293    pub eip: u32,
294    pub gs: u32,
295    pub fs: u32,
296    pub es: u32,
297    pub ds: u32,
298    pub cs: u32,
299    pub ss: u32,
300    pub edi: u32,
301    pub esi: u32,
302    pub ebp: u32,
303    pub esp: u32,
304    pub ebx: u32,
305    pub edx: u32,
306    pub ecx: u32,
307    pub eax: u32,
308}
309
310// FXSAVE_STATE - FP / MMX / XMM registers
311#[repr(C)]
312#[derive(Clone, Copy, Debug)]
313pub struct FxSaveStateIA32 {
314    pub fcw: u16,
315    pub fsw: u16,
316    pub ftw: u16,
317    pub opcode: u16,
318    pub eip: u32,
319    pub cs: u16,
320    pub reserved_1: u16,
321    pub data_offset: u32,
322    pub ds: u16,
323    pub reserved_2: [u8; 10],
324    pub st0mm0: [u8; 10],
325    pub reserved_3: [u8; 6],
326    pub st1mm1: [u8; 10],
327    pub reserved_4: [u8; 6],
328    pub st2mm2: [u8; 10],
329    pub reserved_5: [u8; 6],
330    pub st3mm3: [u8; 10],
331    pub reserved_6: [u8; 6],
332    pub st4mm4: [u8; 10],
333    pub reserved_7: [u8; 6],
334    pub st5mm5: [u8; 10],
335    pub reserved_8: [u8; 6],
336    pub st6mm6: [u8; 10],
337    pub reserved_9: [u8; 6],
338    pub st7mm7: [u8; 10],
339    pub reserved_10: [u8; 6],
340    pub xmm0: [u8; 16],
341    pub xmm1: [u8; 16],
342    pub xmm2: [u8; 16],
343    pub xmm3: [u8; 16],
344    pub xmm4: [u8; 16],
345    pub xmm5: [u8; 16],
346    pub xmm6: [u8; 16],
347    pub xmm7: [u8; 16],
348    pub reserved_11: [u8; 14 * 16],
349}
350
351#[repr(C)]
352#[derive(Clone, Copy, Debug)]
353pub struct SystemContextX64 {
354    // ExceptionData is additional data pushed on the stack by some types of x64 64-bit mode exceptions
355    pub exception_data: u64,
356    pub fx_save_state: FxSaveStateX64,
357    pub dr0: u64,
358    pub dr1: u64,
359    pub dr2: u64,
360    pub dr3: u64,
361    pub dr6: u64,
362    pub dr7: u64,
363    pub cr0: u64,
364    // Reserved
365    pub cr1: u64,
366    pub cr2: u64,
367    pub cr3: u64,
368    pub cr4: u64,
369    pub cr8: u64,
370    pub rflags: u64,
371    pub ldtr: u64,
372    pub tr: u64,
373    pub gdtr: [u64; 2],
374    pub idtr: [u64; 2],
375    pub rip: u64,
376    pub gs: u64,
377    pub fs: u64,
378    pub es: u64,
379    pub ds: u64,
380    pub cs: u64,
381    pub ss: u64,
382    pub rdi: u64,
383    pub rsi: u64,
384    pub rbp: u64,
385    pub rsp: u64,
386    pub rbx: u64,
387    pub rdx: u64,
388    pub rcx: u64,
389    pub rax: u64,
390    pub r8: u64,
391    pub r9: u64,
392    pub r10: u64,
393    pub r11: u64,
394    pub r12: u64,
395    pub r13: u64,
396    pub r14: u64,
397    pub r15: u64,
398}
399
400// FXSAVE_STATE – FP / MMX / XMM registers
401#[repr(C)]
402#[derive(Clone, Copy, Debug)]
403pub struct FxSaveStateX64 {
404    pub fcw: u16,
405    pub fsw: u16,
406    pub ftw: u16,
407    pub opcode: u16,
408    pub rip: u64,
409    pub data_offset: u64,
410    pub reserved_1: [u8; 8],
411    pub st0mm0: [u8; 10],
412    pub reserved_2: [u8; 6],
413    pub st1mm1: [u8; 10],
414    pub reserved_3: [u8; 6],
415    pub st2mm2: [u8; 10],
416    pub reserved_4: [u8; 6],
417    pub st3mm3: [u8; 10],
418    pub reserved_5: [u8; 6],
419    pub st4mm4: [u8; 10],
420    pub reserved_6: [u8; 6],
421    pub st5mm5: [u8; 10],
422    pub reserved_7: [u8; 6],
423    pub st6mm6: [u8; 10],
424    pub reserved_8: [u8; 6],
425    pub st7mm7: [u8; 10],
426    pub reserved_9: [u8; 6],
427    pub xmm0: [u8; 16],
428    pub xmm1: [u8; 16],
429    pub xmm2: [u8; 16],
430    pub xmm3: [u8; 16],
431    pub xmm4: [u8; 16],
432    pub xmm5: [u8; 16],
433    pub xmm6: [u8; 16],
434    pub xmm7: [u8; 16],
435    pub reserved_11: [u8; 14 * 16],
436}
437
438#[repr(C)]
439#[derive(Clone, Copy, Debug)]
440pub struct SystemContextIpf {
441    pub reserved: u64,
442    pub r1: u64,
443    pub r2: u64,
444    pub r3: u64,
445    pub r4: u64,
446    pub r5: u64,
447    pub r6: u64,
448    pub r7: u64,
449    pub r8: u64,
450    pub r9: u64,
451    pub r10: u64,
452    pub r11: u64,
453    pub r12: u64,
454    pub r13: u64,
455    pub r14: u64,
456    pub r15: u64,
457    pub r16: u64,
458    pub r17: u64,
459    pub r18: u64,
460    pub r19: u64,
461    pub r20: u64,
462    pub r21: u64,
463    pub r22: u64,
464    pub r23: u64,
465    pub r24: u64,
466    pub r25: u64,
467    pub r26: u64,
468    pub r27: u64,
469    pub r28: u64,
470    pub r29: u64,
471    pub r30: u64,
472    pub r31: u64,
473    pub f2: [u64; 2],
474    pub f3: [u64; 2],
475    pub f4: [u64; 2],
476    pub f5: [u64; 2],
477    pub f6: [u64; 2],
478    pub f7: [u64; 2],
479    pub f8: [u64; 2],
480    pub f9: [u64; 2],
481    pub f10: [u64; 2],
482    pub f11: [u64; 2],
483    pub f12: [u64; 2],
484    pub f13: [u64; 2],
485    pub f14: [u64; 2],
486    pub f15: [u64; 2],
487    pub f16: [u64; 2],
488    pub f17: [u64; 2],
489    pub f18: [u64; 2],
490    pub f19: [u64; 2],
491    pub f20: [u64; 2],
492    pub f21: [u64; 2],
493    pub f22: [u64; 2],
494    pub f23: [u64; 2],
495    pub f24: [u64; 2],
496    pub f25: [u64; 2],
497    pub f26: [u64; 2],
498    pub f27: [u64; 2],
499    pub f28: [u64; 2],
500    pub f29: [u64; 2],
501    pub f30: [u64; 2],
502    pub f31: [u64; 2],
503    pub pr: u64,
504    pub b0: u64,
505    pub b1: u64,
506    pub b2: u64,
507    pub b3: u64,
508    pub b4: u64,
509    pub b5: u64,
510    pub b6: u64,
511    pub b7: u64,
512    // application registers
513    pub ar_rsc: u64,
514    pub ar_bsp: u64,
515    pub ar_bspstore: u64,
516    pub ar_rnat: u64,
517    pub ar_fcr: u64,
518    pub ar_eflag: u64,
519    pub ar_csd: u64,
520    pub ar_ssd: u64,
521    pub ar_cflg: u64,
522    pub ar_fsr: u64,
523    pub ar_fir: u64,
524    pub ar_fdr: u64,
525    pub ar_ccv: u64,
526    pub ar_unat: u64,
527    pub ar_fpsr: u64,
528    pub ar_pfs: u64,
529    pub ar_lc: u64,
530    pub ar_ec: u64,
531    // control registers
532    pub cr_dcr: u64,
533    pub cr_itm: u64,
534    pub cr_iva: u64,
535    pub cr_pta: u64,
536    pub cr_ipsr: u64,
537    pub cr_isr: u64,
538    pub cr_iip: u64,
539    pub cr_ifa: u64,
540    pub cr_itir: u64,
541    pub cr_iipa: u64,
542    pub cr_ifs: u64,
543    pub cr_iim: u64,
544    pub cr_iha: u64,
545    // debug registers
546    pub dbr0: u64,
547    pub dbr1: u64,
548    pub dbr2: u64,
549    pub dbr3: u64,
550    pub dbr4: u64,
551    pub dbr5: u64,
552    pub dbr6: u64,
553    pub dbr7: u64,
554    pub ibr0: u64,
555    pub ibr1: u64,
556    pub ibr2: u64,
557    pub ibr3: u64,
558    pub ibr4: u64,
559    pub ibr5: u64,
560    pub ibr6: u64,
561    pub ibr7: u64,
562    // virtual Registers
563    pub int_nat: u64, // nat bits for r1-r31
564}
565
566#[repr(C)]
567#[derive(Clone, Copy, Debug)]
568pub struct SystemContextArm {
569    pub r0: u32,
570    pub r1: u32,
571    pub r2: u32,
572    pub r3: u32,
573    pub r4: u32,
574    pub r5: u32,
575    pub r6: u32,
576    pub r7: u32,
577    pub r8: u32,
578    pub r9: u32,
579    pub r10: u32,
580    pub r11: u32,
581    pub r12: u32,
582    pub sp: u32,
583    pub lr: u32,
584    pub pc: u32,
585    pub cpsr: u32,
586    pub dfsr: u32,
587    pub dfar: u32,
588    pub ifsr: u32,
589}
590
591#[repr(C)]
592#[derive(Clone, Copy, Debug)]
593pub struct SystemContextAArch64 {
594    // General Purpose Registers
595    pub x0: u64,
596    pub x1: u64,
597    pub x2: u64,
598    pub x3: u64,
599    pub x4: u64,
600    pub x5: u64,
601    pub x6: u64,
602    pub x7: u64,
603    pub x8: u64,
604    pub x9: u64,
605    pub x10: u64,
606    pub x11: u64,
607    pub x12: u64,
608    pub x13: u64,
609    pub x14: u64,
610    pub x15: u64,
611    pub x16: u64,
612    pub x17: u64,
613    pub x18: u64,
614    pub x19: u64,
615    pub x20: u64,
616    pub x21: u64,
617    pub x22: u64,
618    pub x23: u64,
619    pub x24: u64,
620    pub x25: u64,
621    pub x26: u64,
622    pub x27: u64,
623    pub x28: u64,
624    pub fp: u64, // x29 - Frame Pointer
625    pub lr: u64, // x30 - Link Register
626    pub sp: u64, // x31 - Stack Pointer
627    // FP/SIMD Registers
628    pub v0: [u64; 2],
629    pub v1: [u64; 2],
630    pub v2: [u64; 2],
631    pub v3: [u64; 2],
632    pub v4: [u64; 2],
633    pub v5: [u64; 2],
634    pub v6: [u64; 2],
635    pub v7: [u64; 2],
636    pub v8: [u64; 2],
637    pub v9: [u64; 2],
638    pub v10: [u64; 2],
639    pub v11: [u64; 2],
640    pub v12: [u64; 2],
641    pub v13: [u64; 2],
642    pub v14: [u64; 2],
643    pub v15: [u64; 2],
644    pub v16: [u64; 2],
645    pub v17: [u64; 2],
646    pub v18: [u64; 2],
647    pub v19: [u64; 2],
648    pub v20: [u64; 2],
649    pub v21: [u64; 2],
650    pub v22: [u64; 2],
651    pub v23: [u64; 2],
652    pub v24: [u64; 2],
653    pub v25: [u64; 2],
654    pub v26: [u64; 2],
655    pub v27: [u64; 2],
656    pub v28: [u64; 2],
657    pub v29: [u64; 2],
658    pub v30: [u64; 2],
659    pub v31: [u64; 2],
660    pub elr: u64,  // Exception Link Register
661    pub spsr: u64, // Saved Processor Status Register
662    pub fpsr: u64, // Floating Point Status Register
663    pub esr: u64,  // Exception Syndrome Register
664    pub far: u64,  // Fault Address Register
665}
666
667pub type ExceptionType = isize;
668
669// EBC Exception types
670pub const EXCEPT_EBC_UNDEFINED: ExceptionType = 0;
671pub const EXCEPT_EBC_DIVIDE_ERROR: ExceptionType = 1;
672pub const EXCEPT_EBC_DEBUG: ExceptionType = 2;
673pub const EXCEPT_EBC_BREAKPOINT: ExceptionType = 3;
674pub const EXCEPT_EBC_OVERFLOW: ExceptionType = 4;
675pub const EXCEPT_EBC_INVALID_OPCODE: ExceptionType = 5;
676pub const EXCEPT_EBC_STACK_FAULT: ExceptionType = 6;
677pub const EXCEPT_EBC_ALIGNMENT_CHECK: ExceptionType = 7;
678pub const EXCEPT_EBC_INSTRUCTION_ENCODING: ExceptionType = 8;
679pub const EXCEPT_EBC_BAD_BREAK: ExceptionType = 9;
680pub const EXCEPT_EBC_SINGLE_STEP: ExceptionType = 10;
681
682// IA-32 Exception types
683pub const EXCEPT_IA32_DIVIDE_ERROR: ExceptionType = 0;
684pub const EXCEPT_IA32_DEBUG: ExceptionType = 1;
685pub const EXCEPT_IA32_NMI: ExceptionType = 2;
686pub const EXCEPT_IA32_BREAKPOINT: ExceptionType = 3;
687pub const EXCEPT_IA32_OVERFLOW: ExceptionType = 4;
688pub const EXCEPT_IA32_BOUND: ExceptionType = 5;
689pub const EXCEPT_IA32_INVALID_OPCODE: ExceptionType = 6;
690pub const EXCEPT_IA32_DOUBLE_FAULT: ExceptionType = 8;
691pub const EXCEPT_IA32_INVALID_TSS: ExceptionType = 10;
692pub const EXCEPT_IA32_SEG_NOT_PRESENT: ExceptionType = 11;
693pub const EXCEPT_IA32_STACK_FAULT: ExceptionType = 12;
694pub const EXCEPT_IA32_GP_FAULT: ExceptionType = 13;
695pub const EXCEPT_IA32_PAGE_FAULT: ExceptionType = 14;
696pub const EXCEPT_IA32_FP_ERROR: ExceptionType = 16;
697pub const EXCEPT_IA32_ALIGNMENT_CHECK: ExceptionType = 17;
698pub const EXCEPT_IA32_MACHINE_CHECK: ExceptionType = 18;
699pub const EXCEPT_IA32_SIMD: ExceptionType = 19;
700
701// X64 Exception types
702pub const EXCEPT_X64_DIVIDE_ERROR: ExceptionType = 0;
703pub const EXCEPT_X64_DEBUG: ExceptionType = 1;
704pub const EXCEPT_X64_NMI: ExceptionType = 2;
705pub const EXCEPT_X64_BREAKPOINT: ExceptionType = 3;
706pub const EXCEPT_X64_OVERFLOW: ExceptionType = 4;
707pub const EXCEPT_X64_BOUND: ExceptionType = 5;
708pub const EXCEPT_X64_INVALID_OPCODE: ExceptionType = 6;
709pub const EXCEPT_X64_DOUBLE_FAULT: ExceptionType = 8;
710pub const EXCEPT_X64_INVALID_TSS: ExceptionType = 10;
711pub const EXCEPT_X64_SEG_NOT_PRESENT: ExceptionType = 11;
712pub const EXCEPT_X64_STACK_FAULT: ExceptionType = 12;
713pub const EXCEPT_X64_GP_FAULT: ExceptionType = 13;
714pub const EXCEPT_X64_PAGE_FAULT: ExceptionType = 14;
715pub const EXCEPT_X64_FP_ERROR: ExceptionType = 16;
716pub const EXCEPT_X64_ALIGNMENT_CHECK: ExceptionType = 17;
717pub const EXCEPT_X64_MACHINE_CHECK: ExceptionType = 18;
718pub const EXCEPT_X64_SIMD: ExceptionType = 19;
719
720// Itanium Processor Family Exception types
721pub const EXCEPT_IPF_VHTP_TRANSLATION: ExceptionType = 0;
722pub const EXCEPT_IPF_INSTRUCTION_TLB: ExceptionType = 1;
723pub const EXCEPT_IPF_DATA_TLB: ExceptionType = 2;
724pub const EXCEPT_IPF_ALT_INSTRUCTION_TLB: ExceptionType = 3;
725pub const EXCEPT_IPF_ALT_DATA_TLB: ExceptionType = 4;
726pub const EXCEPT_IPF_DATA_NESTED_TLB: ExceptionType = 5;
727pub const EXCEPT_IPF_INSTRUCTION_KEY_MISSED: ExceptionType = 6;
728pub const EXCEPT_IPF_DATA_KEY_MISSED: ExceptionType = 7;
729pub const EXCEPT_IPF_DIRTY_BIT: ExceptionType = 8;
730pub const EXCEPT_IPF_INSTRUCTION_ACCESS_BIT: ExceptionType = 9;
731pub const EXCEPT_IPF_DATA_ACCESS_BIT: ExceptionType = 10;
732pub const EXCEPT_IPF_BREAKPOINT: ExceptionType = 11;
733pub const EXCEPT_IPF_EXTERNAL_INTERRUPT: ExceptionType = 12;
734// 13 - 19 reserved
735pub const EXCEPT_IPF_PAGE_NOT_PRESENT: ExceptionType = 20;
736pub const EXCEPT_IPF_KEY_PERMISSION: ExceptionType = 21;
737pub const EXCEPT_IPF_INSTRUCTION_ACCESS_RIGHTS: ExceptionType = 22;
738pub const EXCEPT_IPF_DATA_ACCESS_RIGHTS: ExceptionType = 23;
739pub const EXCEPT_IPF_GENERAL_EXCEPTION: ExceptionType = 24;
740pub const EXCEPT_IPF_DISABLED_FP_REGISTER: ExceptionType = 25;
741pub const EXCEPT_IPF_NAT_CONSUMPTION: ExceptionType = 26;
742pub const EXCEPT_IPF_SPECULATION: ExceptionType = 27;
743// 28 reserved
744pub const EXCEPT_IPF_DEBUG: ExceptionType = 29;
745pub const EXCEPT_IPF_UNALIGNED_REFERENCE: ExceptionType = 30;
746pub const EXCEPT_IPF_UNSUPPORTED_DATA_REFERENCE: ExceptionType = 31;
747pub const EXCEPT_IPF_FP_FAULT: ExceptionType = 32;
748pub const EXCEPT_IPF_FP_TRAP: ExceptionType = 33;
749pub const EXCEPT_IPF_LOWER_PRIVILEGE_TRANSFER_TRAP: ExceptionType = 34;
750pub const EXCEPT_IPF_TAKEN_BRANCH: ExceptionType = 35;
751pub const EXCEPT_IPF_SINGLE_STEP: ExceptionType = 36;
752// 37 - 44 reserved
753pub const EXCEPT_IPF_IA32_EXCEPTION: ExceptionType = 45;
754pub const EXCEPT_IPF_IA32_INTERCEPT: ExceptionType = 46;
755pub const EXCEPT_IPF_IA32_INTERRUPT: ExceptionType = 47;
756
757// ARM processor exception types
758pub const EXCEPT_ARM_RESET: ExceptionType = 0;
759pub const EXCEPT_ARM_UNDEFINED_INSTRUCTION: ExceptionType = 1;
760pub const EXCEPT_ARM_SOFTWARE_INTERRUPT: ExceptionType = 2;
761pub const EXCEPT_ARM_PREFETCH_ABORT: ExceptionType = 3;
762pub const EXCEPT_ARM_DATA_ABORT: ExceptionType = 4;
763pub const EXCEPT_ARM_RESERVED: ExceptionType = 5;
764pub const EXCEPT_ARM_IRQ: ExceptionType = 6;
765pub const EXCEPT_ARM_FIQ: ExceptionType = 7;
766pub const MAX_ARM_EXCEPTION: ExceptionType = EXCEPT_ARM_FIQ;
767
768// AARCH64 processor exception types.
769pub const EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS: ExceptionType = 0;
770pub const EXCEPT_AARCH64_IRQ: ExceptionType = 1;
771pub const EXCEPT_AARCH64_FIQ: ExceptionType = 2;
772pub const EXCEPT_AARCH64_SERROR: ExceptionType = 3;
773pub const MAX_AARCH64_EXCEPTION: ExceptionType = EXCEPT_AARCH64_SERROR;
774
775// RISC-V processor exception types.
776pub const EXCEPT_RISCV_INST_MISALIGNED: ExceptionType = 0;
777pub const EXCEPT_RISCV_INST_ACCESS_FAULT: ExceptionType = 1;
778pub const EXCEPT_RISCV_ILLEGAL_INST: ExceptionType = 2;
779pub const EXCEPT_RISCV_BREAKPOINT: ExceptionType = 3;
780pub const EXCEPT_RISCV_LOAD_ADDRESS_MISALIGNED: ExceptionType = 4;
781pub const EXCEPT_RISCV_LOAD_ACCESS_FAULT: ExceptionType = 5;
782pub const EXCEPT_RISCV_STORE_AMO_ADDRESS_MISALIGNED: ExceptionType = 6;
783pub const EXCEPT_RISCV_STORE_AMO_ACCESS_FAULT: ExceptionType = 7;
784pub const EXCEPT_RISCV_ENV_CALL_FROM_UMODE: ExceptionType = 8;
785pub const EXCEPT_RISCV_ENV_CALL_FROM_SMODE: ExceptionType = 9;
786pub const EXCEPT_RISCV_ENV_CALL_FROM_MMODE: ExceptionType = 11;
787pub const EXCEPT_RISCV_INST_PAGE_FAULT: ExceptionType = 12;
788pub const EXCEPT_RISCV_LOAD_PAGE_FAULT: ExceptionType = 13;
789pub const EXCEPT_RISCV_STORE_AMO_PAGE_FAULT: ExceptionType = 15;
790
791// RISC-V processor interrupt types.
792pub const EXCEPT_RISCV_SUPERVISOR_SOFTWARE_INT: ExceptionType = 1;
793pub const EXCEPT_RISCV_MACHINE_SOFTWARE_INT: ExceptionType = 3;
794pub const EXCEPT_RISCV_SUPERVISOR_TIMER_INT: ExceptionType = 5;
795pub const EXCEPT_RISCV_MACHINE_TIMER_INT: ExceptionType = 7;
796pub const EXCEPT_RISCV_SUPERVISOR_EXTERNAL_INT: ExceptionType = 9;
797pub const EXCEPT_RISCV_MACHINE_EXTERNAL_INT: ExceptionType = 11;
798
799pub type GetMaximumProcessorIndex = eficall! {fn(
800    *mut Protocol,
801    *mut usize,
802) -> crate::base::Status};
803
804pub type PeriodicCallback = eficall! {fn(SystemContext)};
805
806pub type RegisterPeriodicCallback = eficall! {fn(
807    *mut Protocol,
808    usize,
809    Option<PeriodicCallback>,
810) -> crate::base::Status};
811
812pub type ExceptionCallback = eficall! {fn(ExceptionType, SystemContext)};
813
814pub type RegisterExceptionCallback = eficall! {fn(
815    *mut Protocol,
816    usize,
817    Option<ExceptionCallback>,
818    ExceptionType,
819) -> crate::base::Status};
820
821pub type InvalidateInstructionCache = eficall! {fn(
822    *mut Protocol,
823    usize,
824    *mut core::ffi::c_void,
825    u64,
826) -> crate::base::Status};
827
828#[repr(C)]
829pub struct Protocol {
830    pub isa: InstructionSetArchitecture,
831    pub get_maximum_processor_index: GetMaximumProcessorIndex,
832    pub register_periodic_callback: RegisterPeriodicCallback,
833    pub register_exception_callback: RegisterExceptionCallback,
834    pub invalidate_instruction_cache: InvalidateInstructionCache,
835}
r_efi/protocols/debug_support.rs

r_efi/protocols/
debug_support.rs
