Expand description
Auto-generated module
🤖 Generated with SplitRS
Structs§
- Bitstream
- FPGA bitstream
- Bitstream
Manager - Bitstream management
- External
Memory Interface - External memory interface
- FPGA
Config - FPGA configuration
- FPGA
Device Info - FPGA device information
- FPGA
Memory Manager - FPGA memory manager
- FPGA
Quantum Simulator - FPGA quantum simulator
- FPGA
Stats - FPGA performance statistics
- HDLModule
- HDL module representation
- Memory
Access Scheduler - Memory access scheduler
- Memory
Interface - Memory interface types
- Memory
Pool - Memory pool
- Pipeline
Stage - Pipeline stage
- Quantum
Processing Unit - FPGA quantum processing unit
- Resource
Utilization - Resource utilization
- Timing
Info - Timing information
Enums§
- Arithmetic
Precision - Arithmetic precision types
- FPGA
Platform - FPGA platform types
- HDLTarget
- Hardware description language targets
- Memory
Access Pattern - Memory access patterns
- Memory
Interface Type - Memory interface types
- Module
Type - Module types
- Pipeline
Operation - Pipeline operations
- Scheduling
Algorithm - Scheduling algorithms