quantrs2_device/compiler_passes/
mod.rs1pub mod compiler;
8pub mod config;
9pub mod optimization;
10pub mod passes;
11pub mod test_utils;
12pub mod types;
13
14pub use config::{
16 AnalysisDepth, CompilerConfig, HardwareConstraints, OptimizationObjective, ParallelConfig,
17 PassConfig, PassPriority, SciRS2Config, SciRS2OptimizationMethod,
18};
19
20pub use types::{
21 AdvancedMetrics, AllocationStrategy, AzureProvider, BraketProvider, CompilationResult,
22 CompilationTarget, ComplexityMetrics, ConnectivityPattern, GoogleGateSet, GridTopology,
23 HardwareAllocation, OptimizationStats, PassInfo, PerformancePrediction, PlatformConstraints,
24 PlatformSpecificResults, RigettiLattice, VerificationResults,
25};
26
27pub use optimization::{
28 AdvancedCrosstalkMitigation, CrosstalkAnalysisResult, CrosstalkModel, GraphOptimizationResult,
29 MitigationStrategyType, SciRS2OptimizationEngine, StatisticalAnalysisResult, TrendDirection,
30};
31
32pub use passes::{
33 CompilerPass, PassCoordinator, PassExecutionResult, PerformanceMetrics, PerformanceMonitor,
34 PerformanceSummary,
35};
36
37pub use compiler::HardwareCompiler;
38
39#[cfg(test)]
41pub use test_utils::*;
42
43pub fn create_standard_topology(
45 topology_type: &str,
46 num_qubits: usize,
47) -> crate::DeviceResult<crate::topology::HardwareTopology> {
48 match topology_type {
49 "linear" => Ok(crate::topology::HardwareTopology::linear_topology(
50 num_qubits,
51 )),
52 "grid" => {
53 let side = (num_qubits as f64).sqrt() as usize;
54 Ok(crate::topology::HardwareTopology::grid_topology(side, side))
55 }
56 "complete" => {
57 let mut topology = crate::topology::HardwareTopology::new(num_qubits);
58 for i in 0..num_qubits {
60 for j in i + 1..num_qubits {
61 topology.add_connection(
62 i as u32,
63 j as u32,
64 crate::topology::GateProperties {
65 error_rate: 0.01,
66 duration: 100.0,
67 gate_type: "CZ".to_string(),
68 },
69 );
70 }
71 }
72 Ok(topology)
73 }
74 _ => Err(crate::DeviceError::InvalidInput(format!(
75 "Unknown topology type: {}",
76 topology_type
77 ))),
78 }
79}
80
81pub fn create_ideal_calibration(
82 device_name: String,
83 _num_qubits: usize,
84) -> crate::calibration::DeviceCalibration {
85 use std::collections::HashMap;
86 use std::time::{Duration, SystemTime};
87
88 crate::calibration::DeviceCalibration {
90 device_id: device_name,
91 timestamp: SystemTime::now(),
92 valid_duration: Duration::from_secs(3600),
93 qubit_calibrations: HashMap::new(),
94 single_qubit_gates: HashMap::new(),
95 two_qubit_gates: HashMap::new(),
96 multi_qubit_gates: HashMap::new(),
97 readout_calibration: crate::calibration::ReadoutCalibration::default(),
98 crosstalk_matrix: crate::calibration::CrosstalkMatrix::default(),
99 topology: crate::calibration::DeviceTopology::default(),
100 metadata: HashMap::new(),
101 }
102}
103
104#[cfg(test)]
105mod tests {
106 use super::*;
107 use crate::backend_traits::BackendCapabilities;
108 use quantrs2_circuit::prelude::Circuit;
109 use quantrs2_core::qubit::QubitId;
110
111 #[test]
112 fn test_compiler_config_default() {
113 let config = CompilerConfig::default();
114 assert!(config.enable_gate_synthesis);
115 assert!(config.enable_error_optimization);
116 assert_eq!(config.max_iterations, 50);
117 assert_eq!(config.tolerance, 1e-6);
118 }
119
120 #[test]
121 fn test_compilation_targets() {
122 let ibm_target = CompilationTarget::IBMQuantum {
123 backend_name: "ibmq_qasm_simulator".to_string(),
124 coupling_map: vec![(0, 1), (1, 2)],
125 native_gates: ["rz", "sx", "cx"].iter().map(|s| s.to_string()).collect(),
126 basis_gates: vec!["rz".to_string(), "sx".to_string(), "cx".to_string()],
127 max_shots: 8192,
128 simulator: true,
129 };
130
131 match ibm_target {
132 CompilationTarget::IBMQuantum { backend_name, .. } => {
133 assert_eq!(backend_name, "ibmq_qasm_simulator");
134 }
135 _ => panic!("Expected IBM Quantum target"),
136 }
137 }
138
139 #[test]
140 fn test_parallel_config() {
141 let parallel_config = ParallelConfig {
142 enable_parallel_passes: true,
143 num_threads: 4,
144 chunk_size: 100,
145 enable_simd: true,
146 };
147
148 assert!(parallel_config.enable_parallel_passes);
149 assert_eq!(parallel_config.num_threads, 4);
150 assert!(parallel_config.enable_simd);
151 }
152
153 #[tokio::test]
154 async fn test_advanced_compilation() {
155 let topology = create_standard_topology("linear", 4).unwrap();
156 let calibration = create_ideal_calibration("test".to_string(), 4);
157 let config = CompilerConfig::default();
158 let backend_capabilities = BackendCapabilities::default();
159
160 let compiler =
161 HardwareCompiler::new(config, topology, calibration, None, backend_capabilities)
162 .unwrap();
163
164 let mut circuit = Circuit::<4>::new();
165 let _ = circuit.h(QubitId(0));
166 let _ = circuit.cnot(QubitId(0), QubitId(1));
167 let _ = circuit.cnot(QubitId(1), QubitId(2));
168
169 let result = compiler.compile_circuit(&circuit).await.unwrap();
170 assert!(!result.applied_passes.is_empty());
171 assert!(!result.optimization_history.is_empty());
172 assert!(result.verification_results.equivalence_verified);
173 }
174
175 #[test]
176 fn test_topology_creation() {
177 let linear_topology = create_standard_topology("linear", 4).unwrap();
178 assert!(linear_topology.num_qubits >= 4);
179
180 let grid_topology = create_standard_topology("grid", 4).unwrap();
181 assert!(grid_topology.num_qubits >= 4);
182 }
183
184 #[test]
185 fn test_calibration_creation() {
186 let calibration = create_ideal_calibration("test_device".to_string(), 3);
187 assert_eq!(calibration.device_id, "test_device");
188 assert_eq!(calibration.single_qubit_gates.len(), 0); }
190}