quantrs2_device/compiler_passes/
mod.rs

1//! Hardware-specific compiler passes for quantum circuit optimization
2//!
3//! This module provides advanced compiler passes that leverage hardware-specific
4//! information including topology, calibration data, noise models, and backend
5//! capabilities to optimize quantum circuits for specific hardware platforms.
6
7pub mod compiler;
8pub mod config;
9pub mod optimization;
10pub mod passes;
11pub mod test_utils;
12pub mod types;
13
14// Re-export commonly used types
15pub use config::{
16    AnalysisDepth, CompilerConfig, HardwareConstraints, OptimizationObjective, ParallelConfig,
17    PassConfig, PassPriority, SciRS2Config, SciRS2OptimizationMethod,
18};
19
20pub use types::{
21    AdvancedMetrics, AllocationStrategy, AzureProvider, BraketProvider, CompilationResult,
22    CompilationTarget, ComplexityMetrics, ConnectivityPattern, GoogleGateSet, GridTopology,
23    HardwareAllocation, OptimizationStats, PassInfo, PerformancePrediction, PlatformConstraints,
24    PlatformSpecificResults, RigettiLattice, VerificationResults,
25};
26
27pub use optimization::{
28    AdvancedCrosstalkMitigation, CrosstalkAnalysisResult, CrosstalkModel, GraphOptimizationResult,
29    MitigationStrategyType, SciRS2OptimizationEngine, StatisticalAnalysisResult, TrendDirection,
30};
31
32pub use passes::{
33    CompilerPass, PassCoordinator, PassExecutionResult, PerformanceMetrics, PerformanceMonitor,
34    PerformanceSummary,
35};
36
37pub use compiler::HardwareCompiler;
38
39// Re-export test utilities when testing
40#[cfg(test)]
41pub use test_utils::*;
42
43// Helper functions for creating common configurations
44pub fn create_standard_topology(
45    topology_type: &str,
46    num_qubits: usize,
47) -> crate::DeviceResult<crate::topology::HardwareTopology> {
48    match topology_type {
49        "linear" => Ok(crate::topology::HardwareTopology::linear_topology(
50            num_qubits,
51        )),
52        "grid" => {
53            let side = (num_qubits as f64).sqrt() as usize;
54            Ok(crate::topology::HardwareTopology::grid_topology(side, side))
55        }
56        "complete" => {
57            let mut topology = crate::topology::HardwareTopology::new(num_qubits);
58            // Add all possible connections for complete graph
59            for i in 0..num_qubits {
60                for j in i + 1..num_qubits {
61                    topology.add_connection(
62                        i as u32,
63                        j as u32,
64                        crate::topology::GateProperties {
65                            error_rate: 0.01,
66                            duration: 100.0,
67                            gate_type: "CZ".to_string(),
68                        },
69                    );
70                }
71            }
72            Ok(topology)
73        }
74        _ => Err(crate::DeviceError::InvalidInput(format!(
75            "Unknown topology type: {topology_type}"
76        ))),
77    }
78}
79
80pub fn create_ideal_calibration(
81    device_name: String,
82    _num_qubits: usize,
83) -> crate::calibration::DeviceCalibration {
84    use std::collections::HashMap;
85    use std::time::{Duration, SystemTime};
86
87    // Create default calibration with minimal required fields
88    crate::calibration::DeviceCalibration {
89        device_id: device_name,
90        timestamp: SystemTime::now(),
91        valid_duration: Duration::from_secs(3600),
92        qubit_calibrations: HashMap::new(),
93        single_qubit_gates: HashMap::new(),
94        two_qubit_gates: HashMap::new(),
95        multi_qubit_gates: HashMap::new(),
96        readout_calibration: crate::calibration::ReadoutCalibration::default(),
97        crosstalk_matrix: crate::calibration::CrosstalkMatrix::default(),
98        topology: crate::calibration::DeviceTopology::default(),
99        metadata: HashMap::new(),
100    }
101}
102
103#[cfg(test)]
104mod tests {
105    use super::*;
106    use crate::backend_traits::BackendCapabilities;
107    use quantrs2_circuit::prelude::Circuit;
108    use quantrs2_core::qubit::QubitId;
109
110    #[test]
111    fn test_compiler_config_default() {
112        let config = CompilerConfig::default();
113        assert!(config.enable_gate_synthesis);
114        assert!(config.enable_error_optimization);
115        assert_eq!(config.max_iterations, 50);
116        assert_eq!(config.tolerance, 1e-6);
117    }
118
119    #[test]
120    fn test_compilation_targets() {
121        let ibm_target = CompilationTarget::IBMQuantum {
122            backend_name: "ibmq_qasm_simulator".to_string(),
123            coupling_map: vec![(0, 1), (1, 2)],
124            native_gates: ["rz", "sx", "cx"].iter().map(|s| s.to_string()).collect(),
125            basis_gates: vec!["rz".to_string(), "sx".to_string(), "cx".to_string()],
126            max_shots: 8192,
127            simulator: true,
128        };
129
130        match ibm_target {
131            CompilationTarget::IBMQuantum { backend_name, .. } => {
132                assert_eq!(backend_name, "ibmq_qasm_simulator");
133            }
134            _ => panic!("Expected IBM Quantum target"),
135        }
136    }
137
138    #[test]
139    fn test_parallel_config() {
140        let parallel_config = ParallelConfig {
141            enable_parallel_passes: true,
142            num_threads: 4,
143            chunk_size: 100,
144            enable_simd: true,
145        };
146
147        assert!(parallel_config.enable_parallel_passes);
148        assert_eq!(parallel_config.num_threads, 4);
149        assert!(parallel_config.enable_simd);
150    }
151
152    #[tokio::test]
153    async fn test_advanced_compilation() {
154        let topology =
155            create_standard_topology("linear", 4).expect("should create linear topology");
156        let calibration = create_ideal_calibration("test".to_string(), 4);
157        let config = CompilerConfig::default();
158        let backend_capabilities = BackendCapabilities::default();
159
160        let compiler =
161            HardwareCompiler::new(config, topology, calibration, None, backend_capabilities)
162                .expect("should create compiler");
163
164        let mut circuit = Circuit::<4>::new();
165        let _ = circuit.h(QubitId(0));
166        let _ = circuit.cnot(QubitId(0), QubitId(1));
167        let _ = circuit.cnot(QubitId(1), QubitId(2));
168
169        let result = compiler
170            .compile_circuit(&circuit)
171            .await
172            .expect("should compile circuit");
173        assert!(!result.applied_passes.is_empty());
174        assert!(!result.optimization_history.is_empty());
175        assert!(result.verification_results.equivalence_verified);
176    }
177
178    #[test]
179    fn test_topology_creation() {
180        let linear_topology =
181            create_standard_topology("linear", 4).expect("should create linear topology");
182        assert!(linear_topology.num_qubits >= 4);
183
184        let grid_topology =
185            create_standard_topology("grid", 4).expect("should create grid topology");
186        assert!(grid_topology.num_qubits >= 4);
187    }
188
189    #[test]
190    fn test_calibration_creation() {
191        let calibration = create_ideal_calibration("test_device".to_string(), 3);
192        assert_eq!(calibration.device_id, "test_device");
193        assert_eq!(calibration.single_qubit_gates.len(), 0); // Empty for ideal calibration
194    }
195}
quantrs2_device/compiler_passes/mod.rs

quantrs2_device/compiler_passes/
mod.rs
