quantrs2_circuit/scirs2_transpiler_enhanced/
config.rs1use super::hardware::HardwareSpec;
4use super::passes::{ExportFormat, PerformanceConstraints, TranspilationPass};
5use serde::{Deserialize, Serialize};
6
7#[derive(Debug, Clone, Copy, PartialEq, Eq, Serialize, Deserialize)]
9pub enum OptimizationLevel {
10 None,
12 Light,
14 Medium,
16 Aggressive,
18 Custom,
20}
21
22#[derive(Debug, Clone, Serialize, Deserialize)]
24pub struct EnhancedTranspilerConfig {
25 pub hardware_spec: HardwareSpec,
27
28 pub enable_ml_routing: bool,
30
31 pub enable_hw_decomposition: bool,
33
34 pub enable_performance_prediction: bool,
36
37 pub enable_error_mitigation: bool,
39
40 pub enable_cross_platform: bool,
42
43 pub enable_visual_output: bool,
45
46 pub optimization_level: OptimizationLevel,
48
49 pub custom_passes: Vec<TranspilationPass>,
51
52 pub performance_constraints: PerformanceConstraints,
54
55 pub export_formats: Vec<ExportFormat>,
57}
58
59impl Default for EnhancedTranspilerConfig {
60 fn default() -> Self {
61 Self {
62 hardware_spec: HardwareSpec::default(),
63 enable_ml_routing: true,
64 enable_hw_decomposition: true,
65 enable_performance_prediction: true,
66 enable_error_mitigation: true,
67 enable_cross_platform: true,
68 enable_visual_output: true,
69 optimization_level: OptimizationLevel::Aggressive,
70 custom_passes: Vec::new(),
71 performance_constraints: PerformanceConstraints::default(),
72 export_formats: vec![
73 ExportFormat::QASM3,
74 ExportFormat::OpenQASM,
75 ExportFormat::Cirq,
76 ],
77 }
78 }
79}