Struct qn908x_rs::bledp::RegisterBlock [−] [src]

#[repr(C)]

pub struct RegisterBlock {
    pub dp_top_system_ctrl: DP_TOP_SYSTEM_CTRL,
    pub prop_mode_ctrl: PROP_MODE_CTRL,
    pub access_address: ACCESS_ADDRESS,
    pub ant_pdu_data0: ANT_PDU_DATA0,
    pub ant_pdu_data1: ANT_PDU_DATA1,
    pub ant_pdu_data2: ANT_PDU_DATA2,
    pub ant_pdu_data3: ANT_PDU_DATA3,
    pub ant_pdu_data4: ANT_PDU_DATA4,
    pub ant_pdu_data5: ANT_PDU_DATA5,
    pub ant_pdu_data6: ANT_PDU_DATA6,
    pub ant_pdu_data7: ANT_PDU_DATA7,
    pub crcseed: CRCSEED,
    pub dp_function_ctrl: DP_FUNCTION_CTRL,
    pub dp_test_ctrl: DP_TEST_CTRL,
    pub ble_dp_status1: BLE_DP_STATUS1,
    pub ble_dp_status2: BLE_DP_STATUS2,
    pub ble_dp_status3: BLE_DP_STATUS3,
    pub ble_dp_status4: BLE_DP_STATUS4,
    pub rx_front_end_ctrl1: RX_FRONT_END_CTRL1,
    pub rx_front_end_ctrl2: RX_FRONT_END_CTRL2,
    pub freq_domain_ctrl1: FREQ_DOMAIN_CTRL1,
    pub freq_domain_ctrl2: FREQ_DOMAIN_CTRL2,
    pub freq_domain_ctrl3: FREQ_DOMAIN_CTRL3,
    pub freq_domain_ctrl4: FREQ_DOMAIN_CTRL4,
    pub freq_domain_ctrl5: FREQ_DOMAIN_CTRL5,
    pub freq_domain_ctrl6: FREQ_DOMAIN_CTRL6,
    pub hp_mode_ctrl1: HP_MODE_CTRL1,
    pub hp_mode_ctrl2: HP_MODE_CTRL2,
    pub freq_domain_status1: FREQ_DOMAIN_STATUS1,
    pub freq_domain_status2: FREQ_DOMAIN_STATUS2,
    pub dp_aa_error_ctrl: DP_AA_ERROR_CTRL,
    pub dp_int: DP_INT,
    pub dp_aa_error_th: DP_AA_ERROR_TH,
    pub df_antenna_ctrl: DF_ANTENNA_CTRL,
    pub antenna_map01: ANTENNA_MAP01,
    pub antenna_map23: ANTENNA_MAP23,
    pub antenna_map45: ANTENNA_MAP45,
    pub antenna_map67: ANTENNA_MAP67,
    // some fields omitted
}

Register block

Fields

0x00 - datapath system control register

0x04 - properity mode control register

0x08 - access address register

0x0c - pdu data 0 to 1 byte, and preamble register

0x10 - pdu data 2 to 5 byte

0x14 - pdu data 6 to 9 byte

0x18 - pdu data 10 to 13 byte

0x1c - pdu data 14 to 17 byte

0x20 - pdu data 18 to 21 byte

0x24 - pdu data 22 to 25 byte

0x28 - pdu data 26 to 29 byte

0x2c - crc seed

0x30 - datapath function control register

0x34 - datapath test iinterface register

0x38 - datapath status register 1

0x3c - datapath status register 2

0x40 - datapath status register 3

0x44 - datapath status register 4

0x48 - rx front end control register 1

0x4c - rx front end control register 2

0x50 - frequency domain control register 1

0x54 - frequency domain control register 2

0x58 - frequency domain control register 3

0x5c - frequency domain control register 4

0x60 - frequency domain control register 5

0x64 - frequency domain control register 5

0x68 - when high hp mode training size same as cfo tracking.

0x6c - q paramter in training period of phase offset iir of bmc

0x70 - frequency domain status register 1

0x74 - frequency domain status register 2

0x84 - AA error control register

0x88 - data path interrupt register

0x8c - AA error threshold register

0x90 - antenna register

0x94 - antenna switch map register 0

0x98 - antenna switch map register 1

0x9c - antenna switch map register 2

0xa0 - antenna switch map register 3

Trait Implementations

Auto Trait Implementations

impl Send for RegisterBlock

impl !Sync for RegisterBlock