pub struct Spi<C, A> where
C: ValidConfig,
A: Capability, { /* fields omitted */ }Expand description
An enabled SPI peripheral that can perform transactions
See the impl_ehal documentation for details on the implementations of
the embedded HAL traits, which vary based on Size and Capability.
Implementations
Update the SPI configuration.
Calling this method will temporarily disable the SERCOM peripheral, as some registers are enable-protected. This may interrupt any ongoing transactions.
Enable interrupts for the specified flags
Disable interrupts for the specified flags
Read the interrupt flags
Clear the corresponding interrupt flags
Only the ERROR, SSL and TXC flags can be cleared.
Note: The implementation of of serial::Write::flush waits on and
clears the TXC flag. Manually clearing this flag could cause it to
hang indefinitely.
Read the error status flags
Clear the corresponding error status flags
Try to read the interrupt flags, but first check the error status flags.
Read from the DATA register
Reading from the data register directly is unsafe, because it will
clear the RXC flag, which could break assumptions made elsewhere in
this module.
Write to the DATA register
Writing to the data register directly is unsafe, because it will clear
the DRE flag, which could break assumptions made elsewhere in this
module.
impl<P, M, A> Spi<Config<P, M, UTerm>, A> where
P: ValidPads,
M: OpMode,
A: Capability,
Config<P, M, UTerm>: ValidConfig,
impl<P, M, A> Spi<Config<P, M, UTerm>, A> where
P: ValidPads,
M: OpMode,
A: Capability,
Config<P, M, UTerm>: ValidConfig,
Return the current transaction length
Read the LENGTH register to determine the current transaction length
Set the transaction length
Write the LENGTH register to set the transaction length. Panics if the length is zero.
Changing the transaction LENGTH while is enabled is permissible but
dangerous. If you have sent or received any bytes at the current
LENGTH, you must wait for a TXC flag before changing to a new
LENGTH.
Trait Implementations
Get a shared reference to the underlying Config struct
This can be used to call the various get_* functions on Config
impl<P, M, A> CheckBufLen for Spi<Config<P, M, UTerm>, A> where
P: ValidPads,
M: OpMode,
A: Capability,
Config<P, M, UTerm>: ValidConfig,
impl<P, M, A> CheckBufLen for Spi<Config<P, M, UTerm>, A> where
P: ValidPads,
M: OpMode,
A: Capability,
Config<P, M, UTerm>: ValidConfig,
impl<P, M, L, A> CheckBufLen for Spi<Config<P, M, L>, A> where
P: ValidPads,
M: OpMode,
L: StaticLength,
A: Capability,
Config<P, M, L>: ValidConfig,
impl<P, M, L, A> CheckBufLen for Spi<Config<P, M, L>, A> where
P: ValidPads,
M: OpMode,
L: StaticLength,
A: Capability,
Config<P, M, L>: ValidConfig,
impl<C> FullDuplex<<C as AnyConfig>::Word> for Spi<C, Duplex> where
C: ValidConfig,
<C as AnyConfig>::Size: AtomicSize,
<C as AnyConfig>::Word: PrimInt,
<C as AnyConfig>::Word: AsPrimitive<u32>,
u32: AsPrimitive<<C as AnyConfig>::Word>,
impl<C> FullDuplex<<C as AnyConfig>::Word> for Spi<C, Duplex> where
C: ValidConfig,
<C as AnyConfig>::Size: AtomicSize,
<C as AnyConfig>::Word: PrimInt,
<C as AnyConfig>::Word: AsPrimitive<u32>,
u32: AsPrimitive<<C as AnyConfig>::Word>,
Implement spi::FullDuplex for Spi structs with AtomicSize
spi::FullDuplex is only implemented when the Spi struct has Duplex
Capability and the transaction Length is <= 4 bytes. When the
Length is <= 4, the Word is a primitive integer, with a size that
depends on the Length (u8, u16 or u32).
Implement serial::Read for Rx Spi structs in Slave
OpMode
serial::Read is only implemented for Spi structs with Rx
Capability. In Slave OpMode, Read does not have to initiate
transactions, so it does not have to store any internal state. It only has
to wait on RXC.
Implement serial::Read for Rx Spi structs in a MasterMode
serial::Read is only implemented for Spi structs with Rx
Capability. In a MasterMode, Read has to initiate transactions, so
it keeps track of the transaction state. If a transaction is in progress,
it will wait on RXC. If not, it will wait on DRE, and then send 0.
Implement Transfer for Spi structs that can Receive
and have an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement Transfer for Spi structs that can Receive
and have an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement Transfer for Spi structs that can Receive
and have an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement Transfer for Spi structs that can Receive
and have an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement Transfer for Spi structs that can Receive and have
DynLength
The transfer accepts a slice of u8 with a length equal to the run-time
dynamic transaction length. If the slice length does not match the result
of Spi::get_dyn_length, it will panic.
Implement serial::Write for Tx Spi structs
serial::Write is only implemented for Spi structs with Tx
Capability. Because the Capability is Tx, this implementation never
reads the DATA register and ignores all buffer overflow errors.
Implement Write for Spi structs with Duplex
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement Write for Spi structs with Tx
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Because the Capability is Tx, this implementation never
reads the DATA register and ignores all buffer overflow errors.
Implement Write for Spi structs with Tx
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Because the Capability is Tx, this implementation never
reads the DATA register and ignores all buffer overflow errors.
Implement Write for Spi structs with Duplex
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement Write for Spi structs with Tx
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Because the Capability is Tx, this implementation never
reads the DATA register and ignores all buffer overflow errors.
Implement Write for Spi structs with Duplex
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement Write for Spi structs with Tx
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Because the Capability is Tx, this implementation never
reads the DATA register and ignores all buffer overflow errors.
Implement Write for Spi structs with Duplex
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement Write for Spi structs with Tx Capability and long
transaction Lengths
The transaction Length must be > 4. The transfer accepts a [u8] with
a length equal to the transfer Length. If the slice length is incorrect,
it will panic.
Because the Capability is Tx, this implementation never reads the DATA
register and ignores all buffer overflow errors.
Implement Write for Spi structs with Duplex Capability and
DynLength
The transfer accepts a [u8] with a length equal to the run-time dynamic
transaction length. If the slice length does not match the result of
Spi::get_dyn_length, it will panic.
Implement Write for Spi structs with Tx Capability and
DynLength
The transfer accepts a [u8] with a length equal to the run-time dynamic
transaction length. If the slice length does not match the result of
Spi::get_dyn_length], it will panic.
Because the Capability is Tx, this implementation never reads the DATA
register and ignores all buffer overflow errors.
Implement WriteIter for Spi structs with Duplex
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement WriteIter for Spi structs with Tx
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Because the Capability is Tx, this implementation never
reads the DATA register and ignores all buffer overflow errors.
Implement WriteIter for Spi structs with Duplex
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement WriteIter for Spi structs with Tx
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Because the Capability is Tx, this implementation never
reads the DATA register and ignores all buffer overflow errors.
Implement WriteIter for Spi structs with Tx
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Because the Capability is Tx, this implementation never
reads the DATA register and ignores all buffer overflow errors.
Implement WriteIter for Spi structs with Duplex
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Implement WriteIter for Spi structs with Tx
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Because the Capability is Tx, this implementation never
reads the DATA register and ignores all buffer overflow errors.
Implement WriteIter for Spi structs with Duplex
Capability and an AtomicSize
The transaction Length must be <= 4. The transfer accepts
a slice of primitive integers, depending on the Length
(u8, u16 or u32).
Auto Trait Implementations
impl<C, A> RefUnwindSafe for Spi<C, A> where
A: RefUnwindSafe,
C: RefUnwindSafe,
impl<C, A> UnwindSafe for Spi<C, A> where
A: UnwindSafe,
C: UnwindSafe,
Blanket Implementations
Mutably borrows from an owned value. Read more
Casts the value.
Casts the value.
Casts the value.
OverflowingCasts the value.
Casts the value.
Casts the value.
Casts the value.
UnwrappedCasts the value.
Casts the value.
WrappingCasts the value.
Writes a slice, blocking until everything has been written Read more