py32f0/py32f040/usart1/
cr2.rs

1///Register `CR2` reader
2pub struct R(crate::R<CR2_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CR2_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CR2_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CR2_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `CR2` writer
17pub struct W(crate::W<CR2_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CR2_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CR2_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CR2_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `ADD` reader - desc ADD
38pub type ADD_R = crate::FieldReader<u8, u8>;
39///Field `ADD` writer - desc ADD
40pub type ADD_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CR2_SPEC, u8, u8, 4, O>;
41///Field `LBDL` reader - desc LBDL
42pub type LBDL_R = crate::BitReader<bool>;
43///Field `LBDL` writer - desc LBDL
44pub type LBDL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, bool, O>;
45///Field `LBDIE` reader - desc LBDIE
46pub type LBDIE_R = crate::BitReader<bool>;
47///Field `LBDIE` writer - desc LBDIE
48pub type LBDIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, bool, O>;
49///Field `LBCL` reader - desc LBCL
50pub type LBCL_R = crate::BitReader<LBCL_A>;
51/**desc LBCL
52
53Value on reset: 0*/
54#[derive(Clone, Copy, Debug, PartialEq, Eq)]
55pub enum LBCL_A {
56    ///0: The clock pulse of the last data bit is not output to the CK pin
57    NotOutput = 0,
58    ///1: The clock pulse of the last data bit is output to the CK pin
59    Output = 1,
60}
61impl From<LBCL_A> for bool {
62    #[inline(always)]
63    fn from(variant: LBCL_A) -> Self {
64        variant as u8 != 0
65    }
66}
67impl LBCL_R {
68    ///Get enumerated values variant
69    #[inline(always)]
70    pub fn variant(&self) -> LBCL_A {
71        match self.bits {
72            false => LBCL_A::NotOutput,
73            true => LBCL_A::Output,
74        }
75    }
76    ///Checks if the value of the field is `NotOutput`
77    #[inline(always)]
78    pub fn is_not_output(&self) -> bool {
79        *self == LBCL_A::NotOutput
80    }
81    ///Checks if the value of the field is `Output`
82    #[inline(always)]
83    pub fn is_output(&self) -> bool {
84        *self == LBCL_A::Output
85    }
86}
87///Field `LBCL` writer - desc LBCL
88pub type LBCL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, LBCL_A, O>;
89impl<'a, const O: u8> LBCL_W<'a, O> {
90    ///The clock pulse of the last data bit is not output to the CK pin
91    #[inline(always)]
92    pub fn not_output(self) -> &'a mut W {
93        self.variant(LBCL_A::NotOutput)
94    }
95    ///The clock pulse of the last data bit is output to the CK pin
96    #[inline(always)]
97    pub fn output(self) -> &'a mut W {
98        self.variant(LBCL_A::Output)
99    }
100}
101///Field `CPHA` reader - desc CPHA
102pub type CPHA_R = crate::BitReader<CPHA_A>;
103/**desc CPHA
104
105Value on reset: 0*/
106#[derive(Clone, Copy, Debug, PartialEq, Eq)]
107pub enum CPHA_A {
108    ///0: The first clock transition is the first data capture edge
109    First = 0,
110    ///1: The second clock transition is the first data capture edge
111    Second = 1,
112}
113impl From<CPHA_A> for bool {
114    #[inline(always)]
115    fn from(variant: CPHA_A) -> Self {
116        variant as u8 != 0
117    }
118}
119impl CPHA_R {
120    ///Get enumerated values variant
121    #[inline(always)]
122    pub fn variant(&self) -> CPHA_A {
123        match self.bits {
124            false => CPHA_A::First,
125            true => CPHA_A::Second,
126        }
127    }
128    ///Checks if the value of the field is `First`
129    #[inline(always)]
130    pub fn is_first(&self) -> bool {
131        *self == CPHA_A::First
132    }
133    ///Checks if the value of the field is `Second`
134    #[inline(always)]
135    pub fn is_second(&self) -> bool {
136        *self == CPHA_A::Second
137    }
138}
139///Field `CPHA` writer - desc CPHA
140pub type CPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, CPHA_A, O>;
141impl<'a, const O: u8> CPHA_W<'a, O> {
142    ///The first clock transition is the first data capture edge
143    #[inline(always)]
144    pub fn first(self) -> &'a mut W {
145        self.variant(CPHA_A::First)
146    }
147    ///The second clock transition is the first data capture edge
148    #[inline(always)]
149    pub fn second(self) -> &'a mut W {
150        self.variant(CPHA_A::Second)
151    }
152}
153///Field `CPOL` reader - desc CPOL
154pub type CPOL_R = crate::BitReader<CPOL_A>;
155/**desc CPOL
156
157Value on reset: 0*/
158#[derive(Clone, Copy, Debug, PartialEq, Eq)]
159pub enum CPOL_A {
160    ///0: Steady low value on CK pin outside transmission window
161    Low = 0,
162    ///1: Steady high value on CK pin outside transmission window
163    High = 1,
164}
165impl From<CPOL_A> for bool {
166    #[inline(always)]
167    fn from(variant: CPOL_A) -> Self {
168        variant as u8 != 0
169    }
170}
171impl CPOL_R {
172    ///Get enumerated values variant
173    #[inline(always)]
174    pub fn variant(&self) -> CPOL_A {
175        match self.bits {
176            false => CPOL_A::Low,
177            true => CPOL_A::High,
178        }
179    }
180    ///Checks if the value of the field is `Low`
181    #[inline(always)]
182    pub fn is_low(&self) -> bool {
183        *self == CPOL_A::Low
184    }
185    ///Checks if the value of the field is `High`
186    #[inline(always)]
187    pub fn is_high(&self) -> bool {
188        *self == CPOL_A::High
189    }
190}
191///Field `CPOL` writer - desc CPOL
192pub type CPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, CPOL_A, O>;
193impl<'a, const O: u8> CPOL_W<'a, O> {
194    ///Steady low value on CK pin outside transmission window
195    #[inline(always)]
196    pub fn low(self) -> &'a mut W {
197        self.variant(CPOL_A::Low)
198    }
199    ///Steady high value on CK pin outside transmission window
200    #[inline(always)]
201    pub fn high(self) -> &'a mut W {
202        self.variant(CPOL_A::High)
203    }
204}
205///Field `CLKEN` reader - desc CLKEN
206pub type CLKEN_R = crate::BitReader<CLKEN_A>;
207/**desc CLKEN
208
209Value on reset: 0*/
210#[derive(Clone, Copy, Debug, PartialEq, Eq)]
211pub enum CLKEN_A {
212    ///0: CK pin disabled
213    Disabled = 0,
214    ///1: CK pin enabled
215    Enabled = 1,
216}
217impl From<CLKEN_A> for bool {
218    #[inline(always)]
219    fn from(variant: CLKEN_A) -> Self {
220        variant as u8 != 0
221    }
222}
223impl CLKEN_R {
224    ///Get enumerated values variant
225    #[inline(always)]
226    pub fn variant(&self) -> CLKEN_A {
227        match self.bits {
228            false => CLKEN_A::Disabled,
229            true => CLKEN_A::Enabled,
230        }
231    }
232    ///Checks if the value of the field is `Disabled`
233    #[inline(always)]
234    pub fn is_disabled(&self) -> bool {
235        *self == CLKEN_A::Disabled
236    }
237    ///Checks if the value of the field is `Enabled`
238    #[inline(always)]
239    pub fn is_enabled(&self) -> bool {
240        *self == CLKEN_A::Enabled
241    }
242}
243///Field `CLKEN` writer - desc CLKEN
244pub type CLKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, CLKEN_A, O>;
245impl<'a, const O: u8> CLKEN_W<'a, O> {
246    ///CK pin disabled
247    #[inline(always)]
248    pub fn disabled(self) -> &'a mut W {
249        self.variant(CLKEN_A::Disabled)
250    }
251    ///CK pin enabled
252    #[inline(always)]
253    pub fn enabled(self) -> &'a mut W {
254        self.variant(CLKEN_A::Enabled)
255    }
256}
257///Field `STOP` reader - desc STOP
258pub type STOP_R = crate::FieldReader<u8, STOP_A>;
259/**desc STOP
260
261Value on reset: 0*/
262#[derive(Clone, Copy, Debug, PartialEq, Eq)]
263#[repr(u8)]
264pub enum STOP_A {
265    ///0: 1 stop bit
266    Stop1 = 0,
267    ///1: 2 stop bits
268    Stop2 = 1,
269}
270impl From<STOP_A> for u8 {
271    #[inline(always)]
272    fn from(variant: STOP_A) -> Self {
273        variant as _
274    }
275}
276impl STOP_R {
277    ///Get enumerated values variant
278    #[inline(always)]
279    pub fn variant(&self) -> Option<STOP_A> {
280        match self.bits {
281            0 => Some(STOP_A::Stop1),
282            1 => Some(STOP_A::Stop2),
283            _ => None,
284        }
285    }
286    ///Checks if the value of the field is `Stop1`
287    #[inline(always)]
288    pub fn is_stop1(&self) -> bool {
289        *self == STOP_A::Stop1
290    }
291    ///Checks if the value of the field is `Stop2`
292    #[inline(always)]
293    pub fn is_stop2(&self) -> bool {
294        *self == STOP_A::Stop2
295    }
296}
297///Field `STOP` writer - desc STOP
298pub type STOP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CR2_SPEC, u8, STOP_A, 2, O>;
299impl<'a, const O: u8> STOP_W<'a, O> {
300    ///1 stop bit
301    #[inline(always)]
302    pub fn stop1(self) -> &'a mut W {
303        self.variant(STOP_A::Stop1)
304    }
305    ///2 stop bits
306    #[inline(always)]
307    pub fn stop2(self) -> &'a mut W {
308        self.variant(STOP_A::Stop2)
309    }
310}
311///Field `LINEN` reader - desc LINEN
312pub type LINEN_R = crate::BitReader<bool>;
313///Field `LINEN` writer - desc LINEN
314pub type LINEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, bool, O>;
315impl R {
316    ///Bits 0:3 - desc ADD
317    #[inline(always)]
318    pub fn add(&self) -> ADD_R {
319        ADD_R::new((self.bits & 0x0f) as u8)
320    }
321    ///Bit 5 - desc LBDL
322    #[inline(always)]
323    pub fn lbdl(&self) -> LBDL_R {
324        LBDL_R::new(((self.bits >> 5) & 1) != 0)
325    }
326    ///Bit 6 - desc LBDIE
327    #[inline(always)]
328    pub fn lbdie(&self) -> LBDIE_R {
329        LBDIE_R::new(((self.bits >> 6) & 1) != 0)
330    }
331    ///Bit 8 - desc LBCL
332    #[inline(always)]
333    pub fn lbcl(&self) -> LBCL_R {
334        LBCL_R::new(((self.bits >> 8) & 1) != 0)
335    }
336    ///Bit 9 - desc CPHA
337    #[inline(always)]
338    pub fn cpha(&self) -> CPHA_R {
339        CPHA_R::new(((self.bits >> 9) & 1) != 0)
340    }
341    ///Bit 10 - desc CPOL
342    #[inline(always)]
343    pub fn cpol(&self) -> CPOL_R {
344        CPOL_R::new(((self.bits >> 10) & 1) != 0)
345    }
346    ///Bit 11 - desc CLKEN
347    #[inline(always)]
348    pub fn clken(&self) -> CLKEN_R {
349        CLKEN_R::new(((self.bits >> 11) & 1) != 0)
350    }
351    ///Bits 12:13 - desc STOP
352    #[inline(always)]
353    pub fn stop(&self) -> STOP_R {
354        STOP_R::new(((self.bits >> 12) & 3) as u8)
355    }
356    ///Bit 14 - desc LINEN
357    #[inline(always)]
358    pub fn linen(&self) -> LINEN_R {
359        LINEN_R::new(((self.bits >> 14) & 1) != 0)
360    }
361}
362impl W {
363    ///Bits 0:3 - desc ADD
364    #[inline(always)]
365    #[must_use]
366    pub fn add(&mut self) -> ADD_W<0> {
367        ADD_W::new(self)
368    }
369    ///Bit 5 - desc LBDL
370    #[inline(always)]
371    #[must_use]
372    pub fn lbdl(&mut self) -> LBDL_W<5> {
373        LBDL_W::new(self)
374    }
375    ///Bit 6 - desc LBDIE
376    #[inline(always)]
377    #[must_use]
378    pub fn lbdie(&mut self) -> LBDIE_W<6> {
379        LBDIE_W::new(self)
380    }
381    ///Bit 8 - desc LBCL
382    #[inline(always)]
383    #[must_use]
384    pub fn lbcl(&mut self) -> LBCL_W<8> {
385        LBCL_W::new(self)
386    }
387    ///Bit 9 - desc CPHA
388    #[inline(always)]
389    #[must_use]
390    pub fn cpha(&mut self) -> CPHA_W<9> {
391        CPHA_W::new(self)
392    }
393    ///Bit 10 - desc CPOL
394    #[inline(always)]
395    #[must_use]
396    pub fn cpol(&mut self) -> CPOL_W<10> {
397        CPOL_W::new(self)
398    }
399    ///Bit 11 - desc CLKEN
400    #[inline(always)]
401    #[must_use]
402    pub fn clken(&mut self) -> CLKEN_W<11> {
403        CLKEN_W::new(self)
404    }
405    ///Bits 12:13 - desc STOP
406    #[inline(always)]
407    #[must_use]
408    pub fn stop(&mut self) -> STOP_W<12> {
409        STOP_W::new(self)
410    }
411    ///Bit 14 - desc LINEN
412    #[inline(always)]
413    #[must_use]
414    pub fn linen(&mut self) -> LINEN_W<14> {
415        LINEN_W::new(self)
416    }
417    ///Writes raw bits to the register.
418    #[inline(always)]
419    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
420        self.0.bits(bits);
421        self
422    }
423}
424/**desc CR2
425
426This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
427
428For information about available fields see [cr2](index.html) module*/
429pub struct CR2_SPEC;
430impl crate::RegisterSpec for CR2_SPEC {
431    type Ux = u32;
432}
433///`read()` method returns [cr2::R](R) reader structure
434impl crate::Readable for CR2_SPEC {
435    type Reader = R;
436}
437///`write(|w| ..)` method takes [cr2::W](W) writer structure
438impl crate::Writable for CR2_SPEC {
439    type Writer = W;
440    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
441    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
442}
443///`reset()` method sets CR2 to value 0
444impl crate::Resettable for CR2_SPEC {
445    const RESET_VALUE: Self::Ux = 0;
446}
py32f0/py32f040/usart1/cr2.rs

py32f0/py32f040/usart1/
cr2.rs
