py32f0/py32f040/tim3/
dier.rs

1///Register `DIER` reader
2pub struct R(crate::R<DIER_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DIER_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DIER_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DIER_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `DIER` writer
17pub struct W(crate::W<DIER_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DIER_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DIER_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DIER_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `UIE` reader - desc UIE
38pub type UIE_R = crate::BitReader<UIE_A>;
39/**desc UIE
40
41Value on reset: 0*/
42#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43pub enum UIE_A {
44    ///0: Update interrupt disabled
45    Disabled = 0,
46    ///1: Update interrupt enabled
47    Enabled = 1,
48}
49impl From<UIE_A> for bool {
50    #[inline(always)]
51    fn from(variant: UIE_A) -> Self {
52        variant as u8 != 0
53    }
54}
55impl UIE_R {
56    ///Get enumerated values variant
57    #[inline(always)]
58    pub fn variant(&self) -> UIE_A {
59        match self.bits {
60            false => UIE_A::Disabled,
61            true => UIE_A::Enabled,
62        }
63    }
64    ///Checks if the value of the field is `Disabled`
65    #[inline(always)]
66    pub fn is_disabled(&self) -> bool {
67        *self == UIE_A::Disabled
68    }
69    ///Checks if the value of the field is `Enabled`
70    #[inline(always)]
71    pub fn is_enabled(&self) -> bool {
72        *self == UIE_A::Enabled
73    }
74}
75///Field `UIE` writer - desc UIE
76pub type UIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, UIE_A, O>;
77impl<'a, const O: u8> UIE_W<'a, O> {
78    ///Update interrupt disabled
79    #[inline(always)]
80    pub fn disabled(self) -> &'a mut W {
81        self.variant(UIE_A::Disabled)
82    }
83    ///Update interrupt enabled
84    #[inline(always)]
85    pub fn enabled(self) -> &'a mut W {
86        self.variant(UIE_A::Enabled)
87    }
88}
89///Field `CC1IE` reader - desc CC1IE
90pub type CC1IE_R = crate::BitReader<CC1IE_A>;
91/**desc CC1IE
92
93Value on reset: 0*/
94#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95pub enum CC1IE_A {
96    ///0: CCx interrupt disabled
97    Disabled = 0,
98    ///1: CCx interrupt enabled
99    Enabled = 1,
100}
101impl From<CC1IE_A> for bool {
102    #[inline(always)]
103    fn from(variant: CC1IE_A) -> Self {
104        variant as u8 != 0
105    }
106}
107impl CC1IE_R {
108    ///Get enumerated values variant
109    #[inline(always)]
110    pub fn variant(&self) -> CC1IE_A {
111        match self.bits {
112            false => CC1IE_A::Disabled,
113            true => CC1IE_A::Enabled,
114        }
115    }
116    ///Checks if the value of the field is `Disabled`
117    #[inline(always)]
118    pub fn is_disabled(&self) -> bool {
119        *self == CC1IE_A::Disabled
120    }
121    ///Checks if the value of the field is `Enabled`
122    #[inline(always)]
123    pub fn is_enabled(&self) -> bool {
124        *self == CC1IE_A::Enabled
125    }
126}
127///Field `CC1IE` writer - desc CC1IE
128pub type CC1IE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, CC1IE_A, O>;
129impl<'a, const O: u8> CC1IE_W<'a, O> {
130    ///CCx interrupt disabled
131    #[inline(always)]
132    pub fn disabled(self) -> &'a mut W {
133        self.variant(CC1IE_A::Disabled)
134    }
135    ///CCx interrupt enabled
136    #[inline(always)]
137    pub fn enabled(self) -> &'a mut W {
138        self.variant(CC1IE_A::Enabled)
139    }
140}
141///Field `CC2IE` reader - desc CC2IE
142pub use CC1IE_R as CC2IE_R;
143///Field `CC3IE` reader - desc CC3IE
144pub use CC1IE_R as CC3IE_R;
145///Field `CC4IE` reader - desc CC4IE
146pub use CC1IE_R as CC4IE_R;
147///Field `CC2IE` writer - desc CC2IE
148pub use CC1IE_W as CC2IE_W;
149///Field `CC3IE` writer - desc CC3IE
150pub use CC1IE_W as CC3IE_W;
151///Field `CC4IE` writer - desc CC4IE
152pub use CC1IE_W as CC4IE_W;
153///Field `TIE` reader - desc TIE
154pub type TIE_R = crate::BitReader<TIE_A>;
155/**desc TIE
156
157Value on reset: 0*/
158#[derive(Clone, Copy, Debug, PartialEq, Eq)]
159pub enum TIE_A {
160    ///0: Trigger interrupt disabled
161    Disabled = 0,
162    ///1: Trigger interrupt enabled
163    Enabled = 1,
164}
165impl From<TIE_A> for bool {
166    #[inline(always)]
167    fn from(variant: TIE_A) -> Self {
168        variant as u8 != 0
169    }
170}
171impl TIE_R {
172    ///Get enumerated values variant
173    #[inline(always)]
174    pub fn variant(&self) -> TIE_A {
175        match self.bits {
176            false => TIE_A::Disabled,
177            true => TIE_A::Enabled,
178        }
179    }
180    ///Checks if the value of the field is `Disabled`
181    #[inline(always)]
182    pub fn is_disabled(&self) -> bool {
183        *self == TIE_A::Disabled
184    }
185    ///Checks if the value of the field is `Enabled`
186    #[inline(always)]
187    pub fn is_enabled(&self) -> bool {
188        *self == TIE_A::Enabled
189    }
190}
191///Field `TIE` writer - desc TIE
192pub type TIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, TIE_A, O>;
193impl<'a, const O: u8> TIE_W<'a, O> {
194    ///Trigger interrupt disabled
195    #[inline(always)]
196    pub fn disabled(self) -> &'a mut W {
197        self.variant(TIE_A::Disabled)
198    }
199    ///Trigger interrupt enabled
200    #[inline(always)]
201    pub fn enabled(self) -> &'a mut W {
202        self.variant(TIE_A::Enabled)
203    }
204}
205///Field `UDE` reader - desc UDE
206pub type UDE_R = crate::BitReader<UDE_A>;
207/**desc UDE
208
209Value on reset: 0*/
210#[derive(Clone, Copy, Debug, PartialEq, Eq)]
211pub enum UDE_A {
212    ///0: Update DMA request disabled
213    Disabled = 0,
214    ///1: Update DMA request enabled
215    Enabled = 1,
216}
217impl From<UDE_A> for bool {
218    #[inline(always)]
219    fn from(variant: UDE_A) -> Self {
220        variant as u8 != 0
221    }
222}
223impl UDE_R {
224    ///Get enumerated values variant
225    #[inline(always)]
226    pub fn variant(&self) -> UDE_A {
227        match self.bits {
228            false => UDE_A::Disabled,
229            true => UDE_A::Enabled,
230        }
231    }
232    ///Checks if the value of the field is `Disabled`
233    #[inline(always)]
234    pub fn is_disabled(&self) -> bool {
235        *self == UDE_A::Disabled
236    }
237    ///Checks if the value of the field is `Enabled`
238    #[inline(always)]
239    pub fn is_enabled(&self) -> bool {
240        *self == UDE_A::Enabled
241    }
242}
243///Field `UDE` writer - desc UDE
244pub type UDE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, UDE_A, O>;
245impl<'a, const O: u8> UDE_W<'a, O> {
246    ///Update DMA request disabled
247    #[inline(always)]
248    pub fn disabled(self) -> &'a mut W {
249        self.variant(UDE_A::Disabled)
250    }
251    ///Update DMA request enabled
252    #[inline(always)]
253    pub fn enabled(self) -> &'a mut W {
254        self.variant(UDE_A::Enabled)
255    }
256}
257///Field `CC1DE` reader - desc CC1DE
258pub type CC1DE_R = crate::BitReader<CC1DE_A>;
259/**desc CC1DE
260
261Value on reset: 0*/
262#[derive(Clone, Copy, Debug, PartialEq, Eq)]
263pub enum CC1DE_A {
264    ///0: CCx DMA request disabled
265    Disabled = 0,
266    ///1: CCx DMA request enabled
267    Enabled = 1,
268}
269impl From<CC1DE_A> for bool {
270    #[inline(always)]
271    fn from(variant: CC1DE_A) -> Self {
272        variant as u8 != 0
273    }
274}
275impl CC1DE_R {
276    ///Get enumerated values variant
277    #[inline(always)]
278    pub fn variant(&self) -> CC1DE_A {
279        match self.bits {
280            false => CC1DE_A::Disabled,
281            true => CC1DE_A::Enabled,
282        }
283    }
284    ///Checks if the value of the field is `Disabled`
285    #[inline(always)]
286    pub fn is_disabled(&self) -> bool {
287        *self == CC1DE_A::Disabled
288    }
289    ///Checks if the value of the field is `Enabled`
290    #[inline(always)]
291    pub fn is_enabled(&self) -> bool {
292        *self == CC1DE_A::Enabled
293    }
294}
295///Field `CC1DE` writer - desc CC1DE
296pub type CC1DE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, CC1DE_A, O>;
297impl<'a, const O: u8> CC1DE_W<'a, O> {
298    ///CCx DMA request disabled
299    #[inline(always)]
300    pub fn disabled(self) -> &'a mut W {
301        self.variant(CC1DE_A::Disabled)
302    }
303    ///CCx DMA request enabled
304    #[inline(always)]
305    pub fn enabled(self) -> &'a mut W {
306        self.variant(CC1DE_A::Enabled)
307    }
308}
309///Field `CC2DE` reader - desc CC2DE
310pub use CC1DE_R as CC2DE_R;
311///Field `CC3DE` reader - desc CC3DE
312pub use CC1DE_R as CC3DE_R;
313///Field `CC4DE` reader - desc CC4DE
314pub use CC1DE_R as CC4DE_R;
315///Field `CC2DE` writer - desc CC2DE
316pub use CC1DE_W as CC2DE_W;
317///Field `CC3DE` writer - desc CC3DE
318pub use CC1DE_W as CC3DE_W;
319///Field `CC4DE` writer - desc CC4DE
320pub use CC1DE_W as CC4DE_W;
321///Field `TDE` reader - desc TDE
322pub type TDE_R = crate::BitReader<TDE_A>;
323/**desc TDE
324
325Value on reset: 0*/
326#[derive(Clone, Copy, Debug, PartialEq, Eq)]
327pub enum TDE_A {
328    ///0: Trigger DMA request disabled
329    Disabled = 0,
330    ///1: Trigger DMA request enabled
331    Enabled = 1,
332}
333impl From<TDE_A> for bool {
334    #[inline(always)]
335    fn from(variant: TDE_A) -> Self {
336        variant as u8 != 0
337    }
338}
339impl TDE_R {
340    ///Get enumerated values variant
341    #[inline(always)]
342    pub fn variant(&self) -> TDE_A {
343        match self.bits {
344            false => TDE_A::Disabled,
345            true => TDE_A::Enabled,
346        }
347    }
348    ///Checks if the value of the field is `Disabled`
349    #[inline(always)]
350    pub fn is_disabled(&self) -> bool {
351        *self == TDE_A::Disabled
352    }
353    ///Checks if the value of the field is `Enabled`
354    #[inline(always)]
355    pub fn is_enabled(&self) -> bool {
356        *self == TDE_A::Enabled
357    }
358}
359///Field `TDE` writer - desc TDE
360pub type TDE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, TDE_A, O>;
361impl<'a, const O: u8> TDE_W<'a, O> {
362    ///Trigger DMA request disabled
363    #[inline(always)]
364    pub fn disabled(self) -> &'a mut W {
365        self.variant(TDE_A::Disabled)
366    }
367    ///Trigger DMA request enabled
368    #[inline(always)]
369    pub fn enabled(self) -> &'a mut W {
370        self.variant(TDE_A::Enabled)
371    }
372}
373impl R {
374    ///Bit 0 - desc UIE
375    #[inline(always)]
376    pub fn uie(&self) -> UIE_R {
377        UIE_R::new((self.bits & 1) != 0)
378    }
379    ///Bit 1 - desc CC1IE
380    #[inline(always)]
381    pub fn cc1ie(&self) -> CC1IE_R {
382        CC1IE_R::new(((self.bits >> 1) & 1) != 0)
383    }
384    ///Bit 2 - desc CC2IE
385    #[inline(always)]
386    pub fn cc2ie(&self) -> CC2IE_R {
387        CC2IE_R::new(((self.bits >> 2) & 1) != 0)
388    }
389    ///Bit 3 - desc CC3IE
390    #[inline(always)]
391    pub fn cc3ie(&self) -> CC3IE_R {
392        CC3IE_R::new(((self.bits >> 3) & 1) != 0)
393    }
394    ///Bit 4 - desc CC4IE
395    #[inline(always)]
396    pub fn cc4ie(&self) -> CC4IE_R {
397        CC4IE_R::new(((self.bits >> 4) & 1) != 0)
398    }
399    ///Bit 6 - desc TIE
400    #[inline(always)]
401    pub fn tie(&self) -> TIE_R {
402        TIE_R::new(((self.bits >> 6) & 1) != 0)
403    }
404    ///Bit 8 - desc UDE
405    #[inline(always)]
406    pub fn ude(&self) -> UDE_R {
407        UDE_R::new(((self.bits >> 8) & 1) != 0)
408    }
409    ///Bit 9 - desc CC1DE
410    #[inline(always)]
411    pub fn cc1de(&self) -> CC1DE_R {
412        CC1DE_R::new(((self.bits >> 9) & 1) != 0)
413    }
414    ///Bit 10 - desc CC2DE
415    #[inline(always)]
416    pub fn cc2de(&self) -> CC2DE_R {
417        CC2DE_R::new(((self.bits >> 10) & 1) != 0)
418    }
419    ///Bit 11 - desc CC3DE
420    #[inline(always)]
421    pub fn cc3de(&self) -> CC3DE_R {
422        CC3DE_R::new(((self.bits >> 11) & 1) != 0)
423    }
424    ///Bit 12 - desc CC4DE
425    #[inline(always)]
426    pub fn cc4de(&self) -> CC4DE_R {
427        CC4DE_R::new(((self.bits >> 12) & 1) != 0)
428    }
429    ///Bit 14 - desc TDE
430    #[inline(always)]
431    pub fn tde(&self) -> TDE_R {
432        TDE_R::new(((self.bits >> 14) & 1) != 0)
433    }
434}
435impl W {
436    ///Bit 0 - desc UIE
437    #[inline(always)]
438    #[must_use]
439    pub fn uie(&mut self) -> UIE_W<0> {
440        UIE_W::new(self)
441    }
442    ///Bit 1 - desc CC1IE
443    #[inline(always)]
444    #[must_use]
445    pub fn cc1ie(&mut self) -> CC1IE_W<1> {
446        CC1IE_W::new(self)
447    }
448    ///Bit 2 - desc CC2IE
449    #[inline(always)]
450    #[must_use]
451    pub fn cc2ie(&mut self) -> CC2IE_W<2> {
452        CC2IE_W::new(self)
453    }
454    ///Bit 3 - desc CC3IE
455    #[inline(always)]
456    #[must_use]
457    pub fn cc3ie(&mut self) -> CC3IE_W<3> {
458        CC3IE_W::new(self)
459    }
460    ///Bit 4 - desc CC4IE
461    #[inline(always)]
462    #[must_use]
463    pub fn cc4ie(&mut self) -> CC4IE_W<4> {
464        CC4IE_W::new(self)
465    }
466    ///Bit 6 - desc TIE
467    #[inline(always)]
468    #[must_use]
469    pub fn tie(&mut self) -> TIE_W<6> {
470        TIE_W::new(self)
471    }
472    ///Bit 8 - desc UDE
473    #[inline(always)]
474    #[must_use]
475    pub fn ude(&mut self) -> UDE_W<8> {
476        UDE_W::new(self)
477    }
478    ///Bit 9 - desc CC1DE
479    #[inline(always)]
480    #[must_use]
481    pub fn cc1de(&mut self) -> CC1DE_W<9> {
482        CC1DE_W::new(self)
483    }
484    ///Bit 10 - desc CC2DE
485    #[inline(always)]
486    #[must_use]
487    pub fn cc2de(&mut self) -> CC2DE_W<10> {
488        CC2DE_W::new(self)
489    }
490    ///Bit 11 - desc CC3DE
491    #[inline(always)]
492    #[must_use]
493    pub fn cc3de(&mut self) -> CC3DE_W<11> {
494        CC3DE_W::new(self)
495    }
496    ///Bit 12 - desc CC4DE
497    #[inline(always)]
498    #[must_use]
499    pub fn cc4de(&mut self) -> CC4DE_W<12> {
500        CC4DE_W::new(self)
501    }
502    ///Bit 14 - desc TDE
503    #[inline(always)]
504    #[must_use]
505    pub fn tde(&mut self) -> TDE_W<14> {
506        TDE_W::new(self)
507    }
508    ///Writes raw bits to the register.
509    #[inline(always)]
510    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
511        self.0.bits(bits);
512        self
513    }
514}
515/**desc DIER
516
517This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
518
519For information about available fields see [dier](index.html) module*/
520pub struct DIER_SPEC;
521impl crate::RegisterSpec for DIER_SPEC {
522    type Ux = u32;
523}
524///`read()` method returns [dier::R](R) reader structure
525impl crate::Readable for DIER_SPEC {
526    type Reader = R;
527}
528///`write(|w| ..)` method takes [dier::W](W) writer structure
529impl crate::Writable for DIER_SPEC {
530    type Writer = W;
531    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
532    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
533}
534///`reset()` method sets DIER to value 0
535impl crate::Resettable for DIER_SPEC {
536    const RESET_VALUE: Self::Ux = 0;
537}
py32f0/py32f040/tim3/dier.rs

py32f0/py32f040/tim3/
dier.rs
