py32f0/py32f040/tim15/
ccmr1_input.rs

1///Register `CCMR1_INPUT` reader
2pub struct R(crate::R<CCMR1_INPUT_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CCMR1_INPUT_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CCMR1_INPUT_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CCMR1_INPUT_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `CCMR1_INPUT` writer
17pub struct W(crate::W<CCMR1_INPUT_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CCMR1_INPUT_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CCMR1_INPUT_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CCMR1_INPUT_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `CC1S` reader - desc CC1S
38pub type CC1S_R = crate::FieldReader<u8, u8>;
39///Field `CC1S` writer - desc CC1S
40pub type CC1S_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CCMR1_INPUT_SPEC, u8, u8, 2, O>;
41///Field `IC1PSC` reader - desc IC1PSC
42pub type IC1PSC_R = crate::FieldReader<u8, u8>;
43///Field `IC1PSC` writer - desc IC1PSC
44pub type IC1PSC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CCMR1_INPUT_SPEC, u8, u8, 2, O>;
45///Field `IC1F` reader - desc IC1F
46pub type IC1F_R = crate::FieldReader<u8, u8>;
47///Field `IC1F` writer - desc IC1F
48pub type IC1F_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CCMR1_INPUT_SPEC, u8, u8, 4, O>;
49///Field `CC2S` reader - desc CC2S
50pub type CC2S_R = crate::FieldReader<u8, u8>;
51///Field `CC2S` writer - desc CC2S
52pub type CC2S_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CCMR1_INPUT_SPEC, u8, u8, 2, O>;
53///Field `IC2PSC` reader - desc IC2PSC
54pub type IC2PSC_R = crate::FieldReader<u8, u8>;
55///Field `IC2PSC` writer - desc IC2PSC
56pub type IC2PSC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CCMR1_INPUT_SPEC, u8, u8, 2, O>;
57///Field `IC2F` reader - desc IC2F
58pub type IC2F_R = crate::FieldReader<u8, u8>;
59///Field `IC2F` writer - desc IC2F
60pub type IC2F_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CCMR1_INPUT_SPEC, u8, u8, 4, O>;
61impl R {
62    ///Bits 0:1 - desc CC1S
63    #[inline(always)]
64    pub fn cc1s(&self) -> CC1S_R {
65        CC1S_R::new((self.bits & 3) as u8)
66    }
67    ///Bits 2:3 - desc IC1PSC
68    #[inline(always)]
69    pub fn ic1psc(&self) -> IC1PSC_R {
70        IC1PSC_R::new(((self.bits >> 2) & 3) as u8)
71    }
72    ///Bits 4:7 - desc IC1F
73    #[inline(always)]
74    pub fn ic1f(&self) -> IC1F_R {
75        IC1F_R::new(((self.bits >> 4) & 0x0f) as u8)
76    }
77    ///Bits 8:9 - desc CC2S
78    #[inline(always)]
79    pub fn cc2s(&self) -> CC2S_R {
80        CC2S_R::new(((self.bits >> 8) & 3) as u8)
81    }
82    ///Bits 10:11 - desc IC2PSC
83    #[inline(always)]
84    pub fn ic2psc(&self) -> IC2PSC_R {
85        IC2PSC_R::new(((self.bits >> 10) & 3) as u8)
86    }
87    ///Bits 12:15 - desc IC2F
88    #[inline(always)]
89    pub fn ic2f(&self) -> IC2F_R {
90        IC2F_R::new(((self.bits >> 12) & 0x0f) as u8)
91    }
92}
93impl W {
94    ///Bits 0:1 - desc CC1S
95    #[inline(always)]
96    #[must_use]
97    pub fn cc1s(&mut self) -> CC1S_W<0> {
98        CC1S_W::new(self)
99    }
100    ///Bits 2:3 - desc IC1PSC
101    #[inline(always)]
102    #[must_use]
103    pub fn ic1psc(&mut self) -> IC1PSC_W<2> {
104        IC1PSC_W::new(self)
105    }
106    ///Bits 4:7 - desc IC1F
107    #[inline(always)]
108    #[must_use]
109    pub fn ic1f(&mut self) -> IC1F_W<4> {
110        IC1F_W::new(self)
111    }
112    ///Bits 8:9 - desc CC2S
113    #[inline(always)]
114    #[must_use]
115    pub fn cc2s(&mut self) -> CC2S_W<8> {
116        CC2S_W::new(self)
117    }
118    ///Bits 10:11 - desc IC2PSC
119    #[inline(always)]
120    #[must_use]
121    pub fn ic2psc(&mut self) -> IC2PSC_W<10> {
122        IC2PSC_W::new(self)
123    }
124    ///Bits 12:15 - desc IC2F
125    #[inline(always)]
126    #[must_use]
127    pub fn ic2f(&mut self) -> IC2F_W<12> {
128        IC2F_W::new(self)
129    }
130    ///Writes raw bits to the register.
131    #[inline(always)]
132    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
133        self.0.bits(bits);
134        self
135    }
136}
137/**desc CCMR1:INPUT
138
139This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
140
141For information about available fields see [ccmr1_input](index.html) module*/
142pub struct CCMR1_INPUT_SPEC;
143impl crate::RegisterSpec for CCMR1_INPUT_SPEC {
144    type Ux = u32;
145}
146///`read()` method returns [ccmr1_input::R](R) reader structure
147impl crate::Readable for CCMR1_INPUT_SPEC {
148    type Reader = R;
149}
150///`write(|w| ..)` method takes [ccmr1_input::W](W) writer structure
151impl crate::Writable for CCMR1_INPUT_SPEC {
152    type Writer = W;
153    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
154    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
155}
156///`reset()` method sets CCMR1_INPUT to value 0
157impl crate::Resettable for CCMR1_INPUT_SPEC {
158    const RESET_VALUE: Self::Ux = 0;
159}
py32f0/py32f040/tim15/ccmr1_input.rs

py32f0/py32f040/tim15/
ccmr1_input.rs
