py32f0/py32f040/gpioa/
afrl.rs

1///Register `AFRL` reader
2pub struct R(crate::R<AFRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<AFRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<AFRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<AFRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `AFRL` writer
17pub struct W(crate::W<AFRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<AFRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<AFRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<AFRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `AFSEL0` reader - Alternate function selection for port x bit y (y=0-7)
38pub type AFSEL0_R = crate::FieldReader<u8, AFSEL0_A>;
39/**Alternate function selection for port x bit y (y=0-7)
40
41Value on reset: 0*/
42#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43#[repr(u8)]
44pub enum AFSEL0_A {
45    ///0: AF0
46    Af0 = 0,
47    ///1: AF1
48    Af1 = 1,
49    ///2: AF2
50    Af2 = 2,
51    ///3: AF3
52    Af3 = 3,
53    ///4: AF4
54    Af4 = 4,
55    ///5: AF5
56    Af5 = 5,
57    ///6: AF6
58    Af6 = 6,
59    ///7: AF7
60    Af7 = 7,
61    ///8: AF8
62    Af8 = 8,
63    ///9: AF9
64    Af9 = 9,
65    ///10: AF10
66    Af10 = 10,
67    ///11: AF11
68    Af11 = 11,
69    ///12: AF12
70    Af12 = 12,
71    ///13: AF13
72    Af13 = 13,
73    ///14: AF14
74    Af14 = 14,
75    ///15: AF15
76    Af15 = 15,
77}
78impl From<AFSEL0_A> for u8 {
79    #[inline(always)]
80    fn from(variant: AFSEL0_A) -> Self {
81        variant as _
82    }
83}
84impl AFSEL0_R {
85    ///Get enumerated values variant
86    #[inline(always)]
87    pub fn variant(&self) -> AFSEL0_A {
88        match self.bits {
89            0 => AFSEL0_A::Af0,
90            1 => AFSEL0_A::Af1,
91            2 => AFSEL0_A::Af2,
92            3 => AFSEL0_A::Af3,
93            4 => AFSEL0_A::Af4,
94            5 => AFSEL0_A::Af5,
95            6 => AFSEL0_A::Af6,
96            7 => AFSEL0_A::Af7,
97            8 => AFSEL0_A::Af8,
98            9 => AFSEL0_A::Af9,
99            10 => AFSEL0_A::Af10,
100            11 => AFSEL0_A::Af11,
101            12 => AFSEL0_A::Af12,
102            13 => AFSEL0_A::Af13,
103            14 => AFSEL0_A::Af14,
104            15 => AFSEL0_A::Af15,
105            _ => unreachable!(),
106        }
107    }
108    ///Checks if the value of the field is `Af0`
109    #[inline(always)]
110    pub fn is_af0(&self) -> bool {
111        *self == AFSEL0_A::Af0
112    }
113    ///Checks if the value of the field is `Af1`
114    #[inline(always)]
115    pub fn is_af1(&self) -> bool {
116        *self == AFSEL0_A::Af1
117    }
118    ///Checks if the value of the field is `Af2`
119    #[inline(always)]
120    pub fn is_af2(&self) -> bool {
121        *self == AFSEL0_A::Af2
122    }
123    ///Checks if the value of the field is `Af3`
124    #[inline(always)]
125    pub fn is_af3(&self) -> bool {
126        *self == AFSEL0_A::Af3
127    }
128    ///Checks if the value of the field is `Af4`
129    #[inline(always)]
130    pub fn is_af4(&self) -> bool {
131        *self == AFSEL0_A::Af4
132    }
133    ///Checks if the value of the field is `Af5`
134    #[inline(always)]
135    pub fn is_af5(&self) -> bool {
136        *self == AFSEL0_A::Af5
137    }
138    ///Checks if the value of the field is `Af6`
139    #[inline(always)]
140    pub fn is_af6(&self) -> bool {
141        *self == AFSEL0_A::Af6
142    }
143    ///Checks if the value of the field is `Af7`
144    #[inline(always)]
145    pub fn is_af7(&self) -> bool {
146        *self == AFSEL0_A::Af7
147    }
148    ///Checks if the value of the field is `Af8`
149    #[inline(always)]
150    pub fn is_af8(&self) -> bool {
151        *self == AFSEL0_A::Af8
152    }
153    ///Checks if the value of the field is `Af9`
154    #[inline(always)]
155    pub fn is_af9(&self) -> bool {
156        *self == AFSEL0_A::Af9
157    }
158    ///Checks if the value of the field is `Af10`
159    #[inline(always)]
160    pub fn is_af10(&self) -> bool {
161        *self == AFSEL0_A::Af10
162    }
163    ///Checks if the value of the field is `Af11`
164    #[inline(always)]
165    pub fn is_af11(&self) -> bool {
166        *self == AFSEL0_A::Af11
167    }
168    ///Checks if the value of the field is `Af12`
169    #[inline(always)]
170    pub fn is_af12(&self) -> bool {
171        *self == AFSEL0_A::Af12
172    }
173    ///Checks if the value of the field is `Af13`
174    #[inline(always)]
175    pub fn is_af13(&self) -> bool {
176        *self == AFSEL0_A::Af13
177    }
178    ///Checks if the value of the field is `Af14`
179    #[inline(always)]
180    pub fn is_af14(&self) -> bool {
181        *self == AFSEL0_A::Af14
182    }
183    ///Checks if the value of the field is `Af15`
184    #[inline(always)]
185    pub fn is_af15(&self) -> bool {
186        *self == AFSEL0_A::Af15
187    }
188}
189///Field `AFSEL0` writer - Alternate function selection for port x bit y (y=0-7)
190pub type AFSEL0_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, AFRL_SPEC, u8, AFSEL0_A, 4, O>;
191impl<'a, const O: u8> AFSEL0_W<'a, O> {
192    ///AF0
193    #[inline(always)]
194    pub fn af0(self) -> &'a mut W {
195        self.variant(AFSEL0_A::Af0)
196    }
197    ///AF1
198    #[inline(always)]
199    pub fn af1(self) -> &'a mut W {
200        self.variant(AFSEL0_A::Af1)
201    }
202    ///AF2
203    #[inline(always)]
204    pub fn af2(self) -> &'a mut W {
205        self.variant(AFSEL0_A::Af2)
206    }
207    ///AF3
208    #[inline(always)]
209    pub fn af3(self) -> &'a mut W {
210        self.variant(AFSEL0_A::Af3)
211    }
212    ///AF4
213    #[inline(always)]
214    pub fn af4(self) -> &'a mut W {
215        self.variant(AFSEL0_A::Af4)
216    }
217    ///AF5
218    #[inline(always)]
219    pub fn af5(self) -> &'a mut W {
220        self.variant(AFSEL0_A::Af5)
221    }
222    ///AF6
223    #[inline(always)]
224    pub fn af6(self) -> &'a mut W {
225        self.variant(AFSEL0_A::Af6)
226    }
227    ///AF7
228    #[inline(always)]
229    pub fn af7(self) -> &'a mut W {
230        self.variant(AFSEL0_A::Af7)
231    }
232    ///AF8
233    #[inline(always)]
234    pub fn af8(self) -> &'a mut W {
235        self.variant(AFSEL0_A::Af8)
236    }
237    ///AF9
238    #[inline(always)]
239    pub fn af9(self) -> &'a mut W {
240        self.variant(AFSEL0_A::Af9)
241    }
242    ///AF10
243    #[inline(always)]
244    pub fn af10(self) -> &'a mut W {
245        self.variant(AFSEL0_A::Af10)
246    }
247    ///AF11
248    #[inline(always)]
249    pub fn af11(self) -> &'a mut W {
250        self.variant(AFSEL0_A::Af11)
251    }
252    ///AF12
253    #[inline(always)]
254    pub fn af12(self) -> &'a mut W {
255        self.variant(AFSEL0_A::Af12)
256    }
257    ///AF13
258    #[inline(always)]
259    pub fn af13(self) -> &'a mut W {
260        self.variant(AFSEL0_A::Af13)
261    }
262    ///AF14
263    #[inline(always)]
264    pub fn af14(self) -> &'a mut W {
265        self.variant(AFSEL0_A::Af14)
266    }
267    ///AF15
268    #[inline(always)]
269    pub fn af15(self) -> &'a mut W {
270        self.variant(AFSEL0_A::Af15)
271    }
272}
273///Field `AFSEL1` reader - Alternate function selection for port x bit y (y=0-7)
274pub use AFSEL0_R as AFSEL1_R;
275///Field `AFSEL2` reader - Alternate function selection for port x bit y (y=0-7)
276pub use AFSEL0_R as AFSEL2_R;
277///Field `AFSEL3` reader - Alternate function selection for port x bit y (y=0-7)
278pub use AFSEL0_R as AFSEL3_R;
279///Field `AFSEL4` reader - Alternate function selection for port x bit y (y=0-7)
280pub use AFSEL0_R as AFSEL4_R;
281///Field `AFSEL5` reader - Alternate function selection for port x bit y (y=0-7)
282pub use AFSEL0_R as AFSEL5_R;
283///Field `AFSEL6` reader - Alternate function selection for port x bit y (y=0-7)
284pub use AFSEL0_R as AFSEL6_R;
285///Field `AFSEL7` reader - Alternate function selection for port x bit y (y=0-7)
286pub use AFSEL0_R as AFSEL7_R;
287///Field `AFSEL1` writer - Alternate function selection for port x bit y (y=0-7)
288pub use AFSEL0_W as AFSEL1_W;
289///Field `AFSEL2` writer - Alternate function selection for port x bit y (y=0-7)
290pub use AFSEL0_W as AFSEL2_W;
291///Field `AFSEL3` writer - Alternate function selection for port x bit y (y=0-7)
292pub use AFSEL0_W as AFSEL3_W;
293///Field `AFSEL4` writer - Alternate function selection for port x bit y (y=0-7)
294pub use AFSEL0_W as AFSEL4_W;
295///Field `AFSEL5` writer - Alternate function selection for port x bit y (y=0-7)
296pub use AFSEL0_W as AFSEL5_W;
297///Field `AFSEL6` writer - Alternate function selection for port x bit y (y=0-7)
298pub use AFSEL0_W as AFSEL6_W;
299///Field `AFSEL7` writer - Alternate function selection for port x bit y (y=0-7)
300pub use AFSEL0_W as AFSEL7_W;
301impl R {
302    ///Bits 0:3 - Alternate function selection for port x bit y (y=0-7)
303    #[inline(always)]
304    pub fn afsel0(&self) -> AFSEL0_R {
305        AFSEL0_R::new((self.bits & 0x0f) as u8)
306    }
307    ///Bits 4:7 - Alternate function selection for port x bit y (y=0-7)
308    #[inline(always)]
309    pub fn afsel1(&self) -> AFSEL1_R {
310        AFSEL1_R::new(((self.bits >> 4) & 0x0f) as u8)
311    }
312    ///Bits 8:11 - Alternate function selection for port x bit y (y=0-7)
313    #[inline(always)]
314    pub fn afsel2(&self) -> AFSEL2_R {
315        AFSEL2_R::new(((self.bits >> 8) & 0x0f) as u8)
316    }
317    ///Bits 12:15 - Alternate function selection for port x bit y (y=0-7)
318    #[inline(always)]
319    pub fn afsel3(&self) -> AFSEL3_R {
320        AFSEL3_R::new(((self.bits >> 12) & 0x0f) as u8)
321    }
322    ///Bits 16:19 - Alternate function selection for port x bit y (y=0-7)
323    #[inline(always)]
324    pub fn afsel4(&self) -> AFSEL4_R {
325        AFSEL4_R::new(((self.bits >> 16) & 0x0f) as u8)
326    }
327    ///Bits 20:23 - Alternate function selection for port x bit y (y=0-7)
328    #[inline(always)]
329    pub fn afsel5(&self) -> AFSEL5_R {
330        AFSEL5_R::new(((self.bits >> 20) & 0x0f) as u8)
331    }
332    ///Bits 24:27 - Alternate function selection for port x bit y (y=0-7)
333    #[inline(always)]
334    pub fn afsel6(&self) -> AFSEL6_R {
335        AFSEL6_R::new(((self.bits >> 24) & 0x0f) as u8)
336    }
337    ///Bits 28:31 - Alternate function selection for port x bit y (y=0-7)
338    #[inline(always)]
339    pub fn afsel7(&self) -> AFSEL7_R {
340        AFSEL7_R::new(((self.bits >> 28) & 0x0f) as u8)
341    }
342}
343impl W {
344    ///Bits 0:3 - Alternate function selection for port x bit y (y=0-7)
345    #[inline(always)]
346    #[must_use]
347    pub fn afsel0(&mut self) -> AFSEL0_W<0> {
348        AFSEL0_W::new(self)
349    }
350    ///Bits 4:7 - Alternate function selection for port x bit y (y=0-7)
351    #[inline(always)]
352    #[must_use]
353    pub fn afsel1(&mut self) -> AFSEL1_W<4> {
354        AFSEL1_W::new(self)
355    }
356    ///Bits 8:11 - Alternate function selection for port x bit y (y=0-7)
357    #[inline(always)]
358    #[must_use]
359    pub fn afsel2(&mut self) -> AFSEL2_W<8> {
360        AFSEL2_W::new(self)
361    }
362    ///Bits 12:15 - Alternate function selection for port x bit y (y=0-7)
363    #[inline(always)]
364    #[must_use]
365    pub fn afsel3(&mut self) -> AFSEL3_W<12> {
366        AFSEL3_W::new(self)
367    }
368    ///Bits 16:19 - Alternate function selection for port x bit y (y=0-7)
369    #[inline(always)]
370    #[must_use]
371    pub fn afsel4(&mut self) -> AFSEL4_W<16> {
372        AFSEL4_W::new(self)
373    }
374    ///Bits 20:23 - Alternate function selection for port x bit y (y=0-7)
375    #[inline(always)]
376    #[must_use]
377    pub fn afsel5(&mut self) -> AFSEL5_W<20> {
378        AFSEL5_W::new(self)
379    }
380    ///Bits 24:27 - Alternate function selection for port x bit y (y=0-7)
381    #[inline(always)]
382    #[must_use]
383    pub fn afsel6(&mut self) -> AFSEL6_W<24> {
384        AFSEL6_W::new(self)
385    }
386    ///Bits 28:31 - Alternate function selection for port x bit y (y=0-7)
387    #[inline(always)]
388    #[must_use]
389    pub fn afsel7(&mut self) -> AFSEL7_W<28> {
390        AFSEL7_W::new(self)
391    }
392    ///Writes raw bits to the register.
393    #[inline(always)]
394    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
395        self.0.bits(bits);
396        self
397    }
398}
399/**GPIO alternate function low register
400
401This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
402
403For information about available fields see [afrl](index.html) module*/
404pub struct AFRL_SPEC;
405impl crate::RegisterSpec for AFRL_SPEC {
406    type Ux = u32;
407}
408///`read()` method returns [afrl::R](R) reader structure
409impl crate::Readable for AFRL_SPEC {
410    type Reader = R;
411}
412///`write(|w| ..)` method takes [afrl::W](W) writer structure
413impl crate::Writable for AFRL_SPEC {
414    type Writer = W;
415    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
416    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
417}
418///`reset()` method sets AFRL to value 0
419impl crate::Resettable for AFRL_SPEC {
420    const RESET_VALUE: Self::Ux = 0;
421}
py32f0/py32f040/gpioa/afrl.rs

py32f0/py32f040/gpioa/
afrl.rs
