py32f0/py32f030/wwdg/
cr.rs

1///Register `CR` reader
2pub struct R(crate::R<CR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `CR` writer
17pub struct W(crate::W<CR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `T` reader - 7-bit counter (MSB to LSB)
38pub type T_R = crate::FieldReader<u8, u8>;
39///Field `T` writer - 7-bit counter (MSB to LSB)
40pub type T_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CR_SPEC, u8, u8, 7, O>;
41///Field `WDGA` reader - Activation bit
42pub type WDGA_R = crate::BitReader<WDGA_A>;
43/**Activation bit
44
45Value on reset: 0*/
46#[derive(Clone, Copy, Debug, PartialEq, Eq)]
47pub enum WDGA_A {
48    ///0: Watchdog disabled
49    Disabled = 0,
50    ///1: Watchdog enabled
51    Enabled = 1,
52}
53impl From<WDGA_A> for bool {
54    #[inline(always)]
55    fn from(variant: WDGA_A) -> Self {
56        variant as u8 != 0
57    }
58}
59impl WDGA_R {
60    ///Get enumerated values variant
61    #[inline(always)]
62    pub fn variant(&self) -> WDGA_A {
63        match self.bits {
64            false => WDGA_A::Disabled,
65            true => WDGA_A::Enabled,
66        }
67    }
68    ///Checks if the value of the field is `Disabled`
69    #[inline(always)]
70    pub fn is_disabled(&self) -> bool {
71        *self == WDGA_A::Disabled
72    }
73    ///Checks if the value of the field is `Enabled`
74    #[inline(always)]
75    pub fn is_enabled(&self) -> bool {
76        *self == WDGA_A::Enabled
77    }
78}
79///Field `WDGA` writer - Activation bit
80pub type WDGA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, WDGA_A, O>;
81impl<'a, const O: u8> WDGA_W<'a, O> {
82    ///Watchdog disabled
83    #[inline(always)]
84    pub fn disabled(self) -> &'a mut W {
85        self.variant(WDGA_A::Disabled)
86    }
87    ///Watchdog enabled
88    #[inline(always)]
89    pub fn enabled(self) -> &'a mut W {
90        self.variant(WDGA_A::Enabled)
91    }
92}
93impl R {
94    ///Bits 0:6 - 7-bit counter (MSB to LSB)
95    #[inline(always)]
96    pub fn t(&self) -> T_R {
97        T_R::new((self.bits & 0x7f) as u8)
98    }
99    ///Bit 7 - Activation bit
100    #[inline(always)]
101    pub fn wdga(&self) -> WDGA_R {
102        WDGA_R::new(((self.bits >> 7) & 1) != 0)
103    }
104}
105impl W {
106    ///Bits 0:6 - 7-bit counter (MSB to LSB)
107    #[inline(always)]
108    #[must_use]
109    pub fn t(&mut self) -> T_W<0> {
110        T_W::new(self)
111    }
112    ///Bit 7 - Activation bit
113    #[inline(always)]
114    #[must_use]
115    pub fn wdga(&mut self) -> WDGA_W<7> {
116        WDGA_W::new(self)
117    }
118    ///Writes raw bits to the register.
119    #[inline(always)]
120    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
121        self.0.bits(bits);
122        self
123    }
124}
125/**Control register (WWDG_CR)
126
127This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
128
129For information about available fields see [cr](index.html) module*/
130pub struct CR_SPEC;
131impl crate::RegisterSpec for CR_SPEC {
132    type Ux = u32;
133}
134///`read()` method returns [cr::R](R) reader structure
135impl crate::Readable for CR_SPEC {
136    type Reader = R;
137}
138///`write(|w| ..)` method takes [cr::W](W) writer structure
139impl crate::Writable for CR_SPEC {
140    type Writer = W;
141    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
142    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
143}
144///`reset()` method sets CR to value 0x7f
145impl crate::Resettable for CR_SPEC {
146    const RESET_VALUE: Self::Ux = 0x7f;
147}
py32f0/py32f030/wwdg/cr.rs

py32f0/py32f030/wwdg/
cr.rs
