py32f0/py32f030/tim16/
ccer.rs

1///Register `CCER` reader
2pub struct R(crate::R<CCER_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CCER_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CCER_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CCER_SPEC>) -> Self {
13        R(reader)
14    }
15}
16///Register `CCER` writer
17pub struct W(crate::W<CCER_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CCER_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CCER_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CCER_SPEC>) -> Self {
34        W(writer)
35    }
36}
37///Field `CC1E` reader - Capture/Compare 1 output enable
38pub type CC1E_R = crate::BitReader<bool>;
39///Field `CC1E` writer - Capture/Compare 1 output enable
40pub type CC1E_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
41///Field `CC1P` reader - Capture/Compare 1 output Polarity
42pub type CC1P_R = crate::BitReader<bool>;
43///Field `CC1P` writer - Capture/Compare 1 output Polarity
44pub type CC1P_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
45///Field `CC1NE` reader - Capture/Compare 1 complementary output enable
46pub type CC1NE_R = crate::BitReader<bool>;
47///Field `CC1NE` writer - Capture/Compare 1 complementary output enable
48pub type CC1NE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
49///Field `CC1NP` reader - Capture/Compare 1 output Polarity
50pub type CC1NP_R = crate::BitReader<bool>;
51///Field `CC1NP` writer - Capture/Compare 1 output Polarity
52pub type CC1NP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCER_SPEC, bool, O>;
53impl R {
54    ///Bit 0 - Capture/Compare 1 output enable
55    #[inline(always)]
56    pub fn cc1e(&self) -> CC1E_R {
57        CC1E_R::new((self.bits & 1) != 0)
58    }
59    ///Bit 1 - Capture/Compare 1 output Polarity
60    #[inline(always)]
61    pub fn cc1p(&self) -> CC1P_R {
62        CC1P_R::new(((self.bits >> 1) & 1) != 0)
63    }
64    ///Bit 2 - Capture/Compare 1 complementary output enable
65    #[inline(always)]
66    pub fn cc1ne(&self) -> CC1NE_R {
67        CC1NE_R::new(((self.bits >> 2) & 1) != 0)
68    }
69    ///Bit 3 - Capture/Compare 1 output Polarity
70    #[inline(always)]
71    pub fn cc1np(&self) -> CC1NP_R {
72        CC1NP_R::new(((self.bits >> 3) & 1) != 0)
73    }
74}
75impl W {
76    ///Bit 0 - Capture/Compare 1 output enable
77    #[inline(always)]
78    #[must_use]
79    pub fn cc1e(&mut self) -> CC1E_W<0> {
80        CC1E_W::new(self)
81    }
82    ///Bit 1 - Capture/Compare 1 output Polarity
83    #[inline(always)]
84    #[must_use]
85    pub fn cc1p(&mut self) -> CC1P_W<1> {
86        CC1P_W::new(self)
87    }
88    ///Bit 2 - Capture/Compare 1 complementary output enable
89    #[inline(always)]
90    #[must_use]
91    pub fn cc1ne(&mut self) -> CC1NE_W<2> {
92        CC1NE_W::new(self)
93    }
94    ///Bit 3 - Capture/Compare 1 output Polarity
95    #[inline(always)]
96    #[must_use]
97    pub fn cc1np(&mut self) -> CC1NP_W<3> {
98        CC1NP_W::new(self)
99    }
100    ///Writes raw bits to the register.
101    #[inline(always)]
102    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
103        self.0.bits(bits);
104        self
105    }
106}
107/**capture/compare enable register
108
109This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
110
111For information about available fields see [ccer](index.html) module*/
112pub struct CCER_SPEC;
113impl crate::RegisterSpec for CCER_SPEC {
114    type Ux = u32;
115}
116///`read()` method returns [ccer::R](R) reader structure
117impl crate::Readable for CCER_SPEC {
118    type Reader = R;
119}
120///`write(|w| ..)` method takes [ccer::W](W) writer structure
121impl crate::Writable for CCER_SPEC {
122    type Writer = W;
123    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
124    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
125}
126///`reset()` method sets CCER to value 0
127impl crate::Resettable for CCER_SPEC {
128    const RESET_VALUE: Self::Ux = 0;
129}
py32f0/py32f030/tim16/ccer.rs

py32f0/py32f030/tim16/
ccer.rs
